NXP 74HC 4052D NXP Datasheet

INTEGRATED CIRCUITS
DATA SH EET
74HC4052; 74HCT4052
Dual 4-channel analog multiplexer, demultiplexer
Product specification Supersedes data of 1997 Aug 27
2003 May 16
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer

FEATURES

Wide analog input voltage range from 5 V to +5 V
Low ON-resistance:
–80Ω(typical) at VCC− VEE= 4.5 V –70Ω(typical) at VCC− VEE= 6.0 V –60Ω(typical) at VCC− VEE= 9.0 V
Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
Typical “break before make” built in
Complies with JEDEC standard no. 8-1 A
ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V.
Specified from 40 to +85 °C and 40 to +125 °C.

APPLICATIONS

Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating.
74HC4052; 74HCT4052

DESCRIPTION

The 74HC4052/74HCT4052 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4052B. Theyare specified in compliance with JEDEC standard no. 7A.
The 74HC4052/74HCT4052 are dual 4-channel analog multiplexers or demultiplexers with common select logic. Each multiplexer has four independent inputs/outputs (pinsnY0 to nY3) and acommoninput/output (pin nZ). The common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input (pin E). When pin E = LOW, one of the four switches is selected (low-impedance ON-state) with pins S0 and S1. When pin E = HIGH, all switches are in the high-impedance OFF-state, independent of pins S0 and S1.
VCC and GND are the supply voltage pins for the digital control inputs (pins S0, S1, and E). The VCC to GND ranges are 2.0 to 10.0 V for 74HC4052 and 4.5 to 5.5 V for 74HCT4052. The analog inputs/outputs (pins nY0 to nY3and nZ) can swingbetween VCCasa positive limit and VEEas a negative limit. VCC− VEEmay not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEEis connected to GND (typically ground).

FUNCTION TABLE

ES1S0
L L L nY0 and nZ L L H nY1 and nZ L H L nY2 and nZ L H H nY3 and nZ H X X none
Note
1. H = HIGH voltage level
L = LOW voltage level X = don’t care.
INPUT
(1)
CHANNEL BETWEEN
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer

QUICK REFERENCE DATA

VEE= GND = 0 V; T
SYMBOL PARAMETER CONDITIONS
t
PZH/tPZL
t
PHZ/tPLZ
C
I
C
PD
C
S
turn-on time E or Sn to V
turn-off time E or Sn to V
input capacitance 3.5 3.5 pF power dissipation capacitance per switch notes 1 and 2 57 57 pF maximum switch capacitance independent (Y) 5 5 pF
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
PD=CPD× V fi= input frequency in MHz; fo= output frequency in MHz; CL= output load capacitance in pF; CS= maximum switch capacitance in pF; VCC= supply voltage in Volts; N = total load switching outputs; Σ[(CL+CS)×V
2. For 74HC4052 the condition is VI= GND to V
For 74HCT4052 the condition is VI= GND to VCC− 1.5 V.
=25°C; tr=tf= 6 ns.
amb
2
× fN+Σ[(CL+CS)×V
CC
2
× fo] = sum of the outputs.
CC
os
CL= 15 pF; RL=1kΩ; VCC=5V
os
CL= 15 pF; RL=1kΩ; VCC=5V
common (Z) 12 12 pF
2
× fo] where:
CC
CC
74HC4052; 74HCT4052
TYPICAL
UNIT
74HC4052 74HCT4052
28 18 ns
21 13 ns

ORDERING INFORMATION

PACKAGE
TYPE NUMBER
TEMPERATURE
RANGE
PINS PACKAGE MATERIAL CODE
74HC4052D 40 to +125 °C 16 SO16 plastic SOT109-3 74HCT4052D 40 to +125 °C 16 SO16 plastic SOT109-3 74HC4052DB 40 to +125 °C 16 SSOP16 plastic SOT338-1 74HCT4052DB 40 to +125 °C 16 SSOP16 plastic SOT338-1 74HC4052N 40 to +125 °C 16 DIP16 plastic SOT38-9 74HCT4052N 40 to +125 °C 16 DIP16 plastic SOT38-9 74HC4052PW 40 to +125 °C 16 TSSOP16 plastic SOT403-1 74HC4052BQ 40 to +125 °C 16 DHVQFN16 plastic SOT763-1 74HCT4052BQ 40 to +125 °C 16 DHVQFN16 plastic SOT763-1
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer

PINNING

PIN SYMBOL DESCRIPTION
1 2Y0 independent input or output 2 2Y2 independent input or output 3 2Z common input or output 4 2Y3 independent input or output 5 2Y1 independent input or output 6 7V 8 GND ground (0 V)
9 S1 select logic input 10 S0 select logic input 11 1Y3 independent input or output 12 1Y0 independent input or output 13 1Z common input or output 14 1Y1 independent input or output 15 1Y2 independent input or output 16 V
E enable input (active LOW)
EE
CC
74HC4052; 74HCT4052
negative supply voltage
positive supply voltage
handbook, halfpage
2Y0 2Y2
2Z 2Y3 2Y1
V
EE
GND
1 2 3 4
4052
5 6
E
7 8
MNB039
16
V
15
1Y2
14
1Y1
13
1Z
12
1Y0
11
1Y3
10
S0
9
S1
Fig.1 Pin configuration DIP16, SO16 and
(T)SSOP16.
CC
V
handbook, halfpage
2
2Y2
3
2Z
4
2Y3
5
2Y1
E
611
7
V
EE
Top view
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
2Y0
CC
116
(1)
GND
8
9
GND
S1
MNB061
15
1Y2
14
1Y1
13
1Z
12
1Y0
1Y3
S0
10
Fig.2 Pin configuration DHVQFN16.
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
S0 S1
E
13
1Z
2Z
1Y0
12
1Y1
14
1Y2
15
1Y3
11 2Y0 2Y1 2Y2 2Y3
3
1 5 2 4
MNB040
handbook, halfpage
10
9
6
Fig.3 Logic symbol.
handbook, halfpage
74HC4052; 74HCT4052
10
0
0
1
G4
4 ×
MDX
3
MNB041
1
0
5
1
2
2
4
3
12 14 15 11
9 6
3
13
Fig.4 IEC logic symbol.
handbook, full pagewidth
S0
S1
V
CC
16
10
LOGIC
LEVEL
CONVERSION
9
6
E
GND
1 - OF - 4
DECODER
78
V
EE
13 12
14
15
11
MNB042
1Z 1Y0
1Y1
1Y2
1Y3
1
2Y0
5
2Y1
2
2Y2
4
2Y3
3
2Z
Fig.5 Functional diagram.
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer
handbook, full pagewidth
V
CC
V
CC
V
CC
V
from
logic
EE
Fig.6 Schematic diagram (one switch).

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to VEE= GND (ground = 0 V); note 1.
nYn
nZ
V
EE
V
CC
V
EE
MNB043
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
I
IK
I
SK
I
S
I
EE
I
CC;IGND
T
stg
P
tot
P
S
supply voltage 0.5 +11.0 V input diode current VI<−0.5 V or VI> VCC+ 0.5 V −±20 mA switch diode current VS<−0.5 V or VS> VCC+ 0.5 V −±20 mA switch current 0.5 V < VS< VCC+ 0.5 V −±25 mA VEE current −±20 mA VCC or GND current −±50 mA storage temperature 65 +150 °C power dissipation T
= 40 to +125 °C; note 500 mW
amb
power dissipation per switch 100 mW
Notes
1. To avoid drawing V
current out of pins nZ, when switch current flows in pins nYn, the voltage drop across the
CC
bidirectional switch must not exceed 0.4 V. If the switch current flows into pins nZ, no VCC current will flow out of pins nYn. In this case thereis no limit for the voltage drop across theswitch, but the voltages at pins nYn and nZmay not exceed VCC or VEE.
2. For DIP16 packages: above 70 °C derate linearly with 12 mW/K. For SO16 packages: above 70 °C derate linearly with 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 °C derate linearly with 5.5 mW/K. For DHVQFN16 packages: above 60 °C derate linearly with 4.5 mW/K.
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS
V
CC
V
I
V
S
T
amb
t
, t
r
f
supply voltage see Figs 7 and 8
V
GND 2.0 5.0 10.0 4.5 5.0 5.5 V
CC
V
V
CC
EE
input voltage GND V switch voltage V operating ambient
temperature
see DC and AC characteristics per device
input rise and fall times VCC= 2.0 V 6.0 1000 6.0 500 ns
V
= 4.5 V 6.0 500 6.0 500 ns
CC
V
= 6.0 V 6.0 400 6.0 500 ns
CC
V
= 10.0 V 6.0 250 6.0 500 ns
CC
74HC4052; 74HCT4052
74HC4052 74HCT4052
MIN. TYP. MAX. MIN. TYP. MAX.
2.0 5.0 10.0 2.0 5.0 10.0 V GND V
CC
EE
V
CC
V
EE
V
40 +25 +85 40 +25 +85 °C
40 +125 40 +125 °C
CC CC
UNIT
V V
12
handbook, halfpage
VCC GND
(V)
8
4
0
operating area
04 12
8
VCC VEE (V)
MNB044
Fig.7 Guaranteed operating area as a function of
the supply voltages for 74HC4052.
12
handbook, halfpage
VCC GND
(V)
10
8
6
4
2
0
04 128
operating area
VCC VEE (V)
MNB045
Fig.8 Guaranteed operating area as a function of
the supply voltages for 74HCT4052.
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer
DC CHARACTERISTICS Family 74HC4052
Visis the input voltage at pins nYn or nZ, whichever is assigned as an input; Vosis the output voltage at pins nZ or nYn, whichever is assigned as an output; voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER
T
= 40 to +85 °C; note 1
amb
V
IH
HIGH-level input voltage
V
IL
LOW-level input voltage
I
LI
I
S(OFF)
input leakage current VI=VCCor GND 6.0 0 −−±1.0 µA
analog switch OFF-state current
I
S(ON)
analog switch ON-state current
I
CC
quiescent supply current
VI=VIHor VIL; VS =VCC− VEE; see Fig.9
per channel 10.0 0 −−±1.0 µA all channels 10.0 0 −−±2.0 µA
VI=VIHor VIL; VS =VCC− VEE; see Fig.10
VI=VCCor GND; Vis=VEEor VCC; Vos=VCCor V
TEST CONDITIONS
OTHER V
2.0 1.5 1.2 V
4.5 3.15 2.4 V
6.0 4.2 3.2 V
9.0 6.3 4.7 V
2.0 −−0.8 0.5 V
4.5 −−2.1 1.35 V
6.0 −−2.8 1.8 V
9.0 −−4.3 2.7 V
10.0 0 −−±2.0 µA
10.0 0 −−±2.0 µA
6.0 0 −−80.0 µA
10.0 0 −−160.0 µA
EE
(V) VEE(V)
CC
MIN. TYP. MAX. UNIT
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
SYMBOL PARAMETER
T
= 40 to +125 °C
amb
V
IH
V
IL
I
LI
I
S(OFF)
I
S(ON)
I
CC
Note
1. All typical values are measured at T
HIGH-level input voltage
LOW-level input voltage
input leakage current VI=VCCor GND 6.0 0 −−±1.0 µA
analog switch OFF-state current
VI=VIHor VIL; VS =VCC− VEE; see Fig.9
per channel 10.0 0 −−±1.0 µA all channels 10.0 0 −−±2.0 µA
analog switch ON-state current
quiescent supply current
VI=VIHor VIL; VS =VCC− VEE; see Fig.10
VI=VCCor GND; Vis=VEEor VCC; Vos=VCCor V
=25°C.
amb
TEST CONDITIONS
OTHER V
2.0 1.5 −−V
4.5 3.15 −− V
6.0 4.2 −−V
9.0 6.3 −−V
2.0 −−0.5 V
4.5 −−1.35 V
6.0 −−1.8 V
9.0 −−2.7 V
10.0 0 −−±2.0 µA
10.0 0 −−±2.0 µA
6.0 0 −−160 µA
10.0 0 −−320.0 µA
EE
(V) VEE(V)
CC
74HC4052; 74HCT4052
MIN. TYP. MAX. UNIT
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer
Family 74HCT4052
Visis the input voltage at pins nYn or nZ, whichever is assigned as an input; Vosis the output voltage at pins nZ or nYn, whichever is assigned as an output; voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER
= 40 to +85 °C; note 1
T
amb
V
IH
HIGH-level input voltage
V
IL
LOW-level input voltage
I
LI
I
S(OFF)
input leakage current VI=VCCor GND 5.5 0 −−±1.0 µA analog switch
OFF-state current
I
S(ON)
analog switch ON-state current
I
CC
quiescent supply current
I
CC
additional quiescent supply current per input
T
= 40 to +125 °C
amb
V
IH
HIGH-level input voltage
V
IL
LOW-level input voltage
I
LI
I
S(OFF)
input leakage current VI=VCCor GND 5.5 0 −−±1.0 µA analog switch
OFF-state current
I
S(ON)
analog switch ON-state current
I
CC
quiescent supply current
I
CC
additional quiescent supply current per input
VI=VIHor VIL; VS =VCC− VEE; see Fig.9
per channel 10.0 0 −−±1.0 µA all channels 10.0 0 −−±2.0 µA
VI=VIHor VIL; VS =VCC− VEE; see Fig.10
VI=VCCor GND; Vis=VEEor VCC; Vos=VCCor V
VI=VCC− 2.1 V;otherinputs at VCC or GND
VI=VIHor VIL; VS =VCC− VEE; see Fig.9
per channel 10.0 0 −−±1.0 µA all channels 10.0 0 −−±2.0 µA
VI=VIHor VIL; VS =VCC− VEE; see Fig.10
VI=VCCor GND; Vis=VEEor VCC; Vos=VCCor V
VI=VCC− 2.1 V;otherinputs at VCC or GND
TEST CONDITIONS
OTHER V
4.5 to 5.5 2.0 1.6 V
4.5 to 5.5 −−1.2 0.8 V
10.0 0 −−±2.0 µA
5.5 0 −−80.0 µA
5.0 5.0 −−160.0 µA
EE
4.5 to 5.5 0 45 202.5 µA
4.5 to 5.5 2.0 −− V
4.5 to 5.5 −−0.8 V
10.0 0 −−±2.0 µA
5.5 0 −−160.0 µA
5.0 5.0 −−320.0 µA
EE
4.5 to 5.5 0 −−220.5 µA
(V) VEE(V)
CC
MIN. TYP. MAX. UNIT
Note
1. All typical values are measured at T
amb
=25°C.
2003 May 16 10
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
handbook, full pagewidth
(from select input)
LOW
AA
VI = VCC or V
nYn nZ
EE
VO = VEE or V
MNB048
74HC4052; 74HCT4052
CC
V
EE
handbook, full pagewidth
Fig.9 Test circuit for measuring OFF-state current.
(from select input)
HIGH
nYn nZ
A
VI = VEE or V
CC
VO (open circuit)
V
MNB049
EE
Fig.10 Test circuit for measuring ON-state current.
2003 May 16 11
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer
Resistance RON for 74HC4052 and 74HCT4052
V
is the input voltage at pins nYn or nZ, whichever is assigned as an input; see notes 1 and 2; see Fig.11.
is
SYMBOL PARAMETER
T
= 40 to +85 °C; note 3
amb
R
ON(peak)
ON-resistance (peak)
R
ON(rail)
R
ON
ON-resistance (rail) Vis=VEE;
maximum ON-resistance difference between any two channels
T
= 40 to +125 °C
amb
R
ON(peak)
ON-resistance (peak)
R
ON(rail)
ON-resistance (rail) Vis=VEE;
OTHER V
Vis=VCCto VEE; VI=VIHor V
VI=VIHor V
Vis=VCC; VI=VIHor V
Vis=VCC to VEE; VI=VIHor V
Vis=VCC to VEE; VI=VIHor V
VI=VIHor V
V
is=VCC
VI=VIHor V
TEST CONDITIONS
IL
IL
IL
IL
IL
IL
;
IL
(V) VEE(V) IS (µA)
CC
2.0 0 100 −−−Ω
4.5 0 1000 100 225
6.0 0 1000 90 200
4.5 4.5 1000 70 165
2.0 0 100 150 −Ω
4.5 0 1000 80 175
6.0 0 1000 70 150
4.5 4.5 1000 60 130
2.0 0 100 150 −Ω
4.5 0 1000 90 200
6.0 0 1000 80 175
4.5 4.5 1000 65 150
2.0 0 − −−−Ω
4.5 0 −−9−Ω
6.0 0 −−8−Ω
4.5 4.5 −−6−Ω
2.0 0 100 −−−Ω
4.5 0 1000 −−270
6.0 0 1000 −−240
4.5 4.5 1000 −−195
2.0 0 100 −−−Ω
4.5 0 1000 −−210
6.0 0 1000 −−180
4.5 4.5 1000 −−160
2.0 0 100 −−−Ω
4.5 0 1000 −−240
6.0 0 1000 −−210
4.5 4.5 1000 −−180
MIN. TYP. MAX. UNIT
Notes
1. For 74HC4052: V
GND or VCC− VEE= 2.0, 4.5, 6.0 and 9.0 V; for 74HCT4052: VCC− GND = 4.5 and 5.5 V,
CC
VCC− VEE= 2.0, 4.5, 6.0 and 9.0 V.
2. Whensupplyvoltages (VCC− VEE)near2.0 V the analog switchON-resistancebecomesextremely non-linear. When using a supply of 2 V, it is recommended to use these devices only for transmitting digital signals.
3. All typical values are measured at T
amb
=25°C.
2003 May 16 12
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
handbook, full pagewidth
(from select input)
V
= 0 to VCC V
is
HIGH
EE
nYn
74HC4052; 74HCT4052
V
nZ
I
is
V
MNB046
EE
Vis= 0 to VCC− V (1) VCC= 4.5 V (2) VCC=6V (3) VCC=9V
Fig.11 Test circuit for measuring RON.
100
handbook, halfpage
R
ON
()
80
60
40
20
0
EE
1.8 3.6 5.4 7.2
09
(1)
(2)
(3)
MNB047
Vis (V)
Fig.12 Typical RON as a function of input voltage Vis.
2003 May 16 13
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
AC CHARACTERISTICS Type 74HC4052
GND = 0 V; tr=tf= 6 ns; CL=50pF.
SYMBOL PARAMETER
T
= 40 to +85 °C; note 1
amb
t
PHL/tPLH
t
PZH/tPZL
t
PHZ/tPLZ
T
amb
t
PHL/tPLH
t
PZH/tPZL
t
PHZ/tPLZ
propagation delay Vis to VosRL= ; see Fig.19 2.0 0 14 75 ns
turn-on time E, Sn to V
RL= ; see Figs 20,
os
22 and 21
turn-off time E, Sn to V
RL=1kΩ; see Figs 20,
os
22 and 21
= 40 to +125 °C
propagation delay Vis to VosRL= ; see Fig.19 2.0 0 −−90 ns
turn-on time E, Sn to V
RL= ; see Figs 20,
os
22 and 21
turn-off time E, Sn to V
RL=1kΩ; see Figs 20,
os
22 and 21
TEST CONDITIONS
OTHER V
74HC4052; 74HCT4052
(V) VEE(V)
CC
4.5 0 515ns
6.0 0 413ns
4.5 4.5 410ns
2.0 0 105 405 ns
4.5 0 38 81 ns
6.0 0 30 69 ns
4.5 4.5 26 58 ns
2.0 0 74 315 ns
4.5 0 27 63 ns
6.0 0 22 54 ns
4.5 4.5 22 48 ns
4.5 0 −−18 ns
6.0 0 −−15 ns
4.5 4.5 −−12 ns
2.0 0 −−490 ns
4.5 0 −−98 ns
6.0 0 −−83 ns
4.5 4.5 −−69 ns
2.0 0 −−375 ns
4.5 0 −−75 ns
6.0 0 −−64 ns
4.5 4.5 −−57 ns
MIN. TYP. MAX. UNIT
Note
1. All typical values are measured at T
amb
=25°C.
2003 May 16 14
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
Type 74HCT4052
GND = 0 V; tr=tf= 6 ns; CL=50pF.
SYMBOL PARAMETER
T
= 40 to +85 °C; note 1
amb
t
PHL/tPLH
t
PZH/tPZL
t
PHZ tPLZ
T
amb
t
PHL/tPLH
t
PZH/tPZL
t
PHZ/tPLZ
propagation delay Visto VosRL= ; see Fig.19 4.5 0 515ns
turn-on time E, Sn to V
RL=1kΩ; see Figs 20,
os
22 and 21
turn-off time E, Sn to V
RL=1kΩ; see Figs 20,
os
22 and 21
= 40 to +125 °C
propagation delay Vis to VosRL= ; see Fig.19 4.5 0 −−18 ns
turn-on time E, Sn to V
RL=1kΩ; see Figs 20,
os
22 and 21
turn-off time E, Sn to V
RL=1kΩ; see Figs 20,
os
22 and 21
TEST CONDITIONS
OTHER V
74HC4052; 74HCT4052
(V) VEE(V)
CC
4.5 4.5 410ns
4.5 0 41 88 ns
4.5 4.5 28 60 ns
4.5 0 26 63 ns
4.5 4.5 21 48 ns
4.5 4.5 −−12 ns
4.5 0 −−105 ns
4.5 4.5 −−72 ns
4.5 0 −−75 ns
4.5 4.5 −−57 ns
MIN. TYP. MAX. UNIT
Note
1. All typical values are measured at T
amb
=25°C.
2003 May 16 15
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
Type 74HC4052 and 74HCT4052
Recommended conditions and typical values; GND = 0 V; T or nZ, whichever is assigned as an input. V output.
SYMBOL PARAMETER
d
sin
α
OFF(feedthr)
sine-wave distortion f = 1 kHz; RL=10kΩ;
switch OFF signal feed-through
α
ct(s)
crosstalk between two switches/multiplexers
V
ct(p-p)
crosstalk voltage between control and any switch (peak-to-peak value)
f
max
minimum frequency response (3dB)
C
S
maximum switch capacitance
is the output voltage at pins nYn or nZ, whichever is assigned as an
os
OTHER
see Fig.13 f = 10 kHz; R
=10kΩ;
L
see Fig.13 RL= 600 ; f = 1 MHz;
see Figs 14 and 15 RL= 600 ; f = 1 MHz;
see Fig.16 RL= 600 ; f = 1 MHz; E or Sn,
square-wave between VCC and GND, tr=tf= 6 ns; see Fig.17
RL=50Ω; see Figs 13 and 18 note 2 2.25 2.25 170 MHz
independent (Y) −−−5pF common (Z) −−−12 pF
74HC4052; 74HCT4052
=25°C; CL=50pF.Visis the input voltage at pins nYn
amb
TEST CONDITIONS
V
is(p-p)
(V)
VCC (V) VEE (V)
4.0 2.25 2.25 0.04 %
8.0 4.5 4.5 0.02 %
4.0 2.25 2.25 0.12 %
8.0 4.5 4.5 0.06 % note 1 2.25 2.25 50 dB
4.5 4.5 50 dB
note 1 2.25 2.25 60 dB
4.5 4.5 60 dB
4.5 0 110 mV
4.5 4.5 220 mV
4.5 4.5 180 MHz
TYP. UNIT
Notes
1. Adjust input voltage V
to 0 dBm level (0 dBm = 1 mW into 600 ).
is
2. Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 ).
handbook, full pagewidth
10 µF
V
is
CLdB
R
L
channel
ON
nZ/nYnnYn/nZ
MNB052
V
GND
Fig.13 Test circuit for measuring sine-wave distortion and minimum frequency response.
os
2003 May 16 16
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
handbook, full pagewidth
handbook, full pagewidth
0

0
Fig.14 Test circuit for measuring switch OFF signal feed-through.
0.1 µF
V
is
channel
OFF
74HC4052; 74HCT4052
nZ/nYnnYn/nZ
V
os
CLdB
R
L
GND
MNB053

0
0
0
00
0 0
Test conditions: VCC= 4.5 V; GND = 0 V; VEE= 4.5 V; RL=50Ω;R
Fig.15 Typical switch OFF signal feed-through as a function of frequency.
handbook, full pagewidth
V
0.1 µF
is
R
L
channel
ON
(a)
nZ/nYnnYn/nZ
R
L
0
=1kΩ.
source
C
L
GND
0
R
L
channel
OFF
(b)
0
R
L

nZ/nYnnYn/nZ
dB
C
L
MNB054
0
V
os
GND
(a) channel ON condition. (b) channel OFF condition.
Fig.16 Test circuits for measuring crosstalk between any two switches/multiplexers.
2003 May 16 17
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
handbook, full pagewidth
The crosstalk is defined as follows (oscilloscope output):
V(pp)
2R
2R
74HC4052; 74HCT4052
V
Sn or E
CC
L
DUT
L
2R
V
CC
2R
L
nZ/nYnnYn/nZ
C
L
L
oscilloscope
MNB055
GND V
EE
handbook, full pagewidth
5

0
5 0 0
Fig.17 Test circuit for measuring crosstalk between control and any switch.
0
0
5
0


0
Test conditions: VCC= 4.5 V; GND = 0 V; VEE= 4.5 V; RL=50Ω; R
source
Fig.18 Typical frequency response.
2003 May 16 18
=1kΩ.
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer

AC WAVEFORMS

input
GND
V
OH
V
OL
V
I
handbook, halfpage
V
is
V
output
os
50%
50%
t
PLH
74HC4052; 74HCT4052
t
PHL
MNB056
Fig.19 Waveforms showing the input (Vis) to output (Vos) propagation delays.
handbook, full pagewidth
E, Sn input
Vos output
Vos output
For 74HC4052: VM= 50%; VI= GND to VCC. For 74HCT4052: VM= 1.3 V; VI= GND to 3 V.
10%
t
r
90%
V
M
t
PLZ
10%
t
PHZ
90%
switch
ON
switch
OFF
t
f
t
PZL
50%
t
PZH
50%
switch ON
MNB057
Fig.20 Waveforms showing the turn-on and turn-off times.
2003 May 16 19
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
handbook, full pagewidth
90%
V
10%
90%
V
10%
M
f
; PULSE WIDTH OTHER
max
FAMILY AMPLITUDE V
74HC4052 V
CC
negative
input pulse
positive
input pulse
50% <2ns 6ns
74HCT4052 3.0 V 1.3 V <2ns 6ns
t
W
M
t
(tf)t
THL
t
(tr)t
TLH
M
t
W
tr and t
f
TLH THL
74HC4052; 74HCT4052
amplitude
0 V
(tr) (tf)
amplitude
0 V
MNB059
Fig.21 Input pulse definitions.
handbook, full pagewidth
VCCV
is
TEST SWITCH V
t
PZH
t
PZL
t
PHZ
t
PLZ
V
EE
V
CC
V
EE
V
CC
V V V V
PULSE
GENERATOR
is
CC EE CC EE
V
I
D.U.T.
R
T
V
O
other open pulse
Definitions for test circuit: RL= load resistance CL= load capacitance including jig and probe capacitance. RT= termination resistance should be equal to the output impedance ZO of the pulse generator. tr=tf= 6 ns; when measuring f
, there is no constraint to trand tf with 50% duty factor.
max
switch
R
L
C
L
V open
MNB058
CC
GND V
EE
Fig.22 Test circuit for measuring AC performance.
2003 May 16 20
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer

PACKAGE OUTLINES

SO16: plastic small outline package; 16 leads; body width 3.9 mm; body thickness 1.47 mm
D
c
y
Z
16
9
E
H
E

SOT109-3

A
X
v M
A
pin 1 index
1
e
0 2.5 5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
mm
inches
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
A
max.
1.75
0.069
OUTLINE
VERSION
SOT109-3
A1A2A3b
0.25
1.55
0.10
0.010
0.004
0.25
1.40
0.061
0.01
0.055
IEC JEDEC JEITA
p
0.49
0.36
0.019
0.014
0.25
0.19
0.0100
0.0075
MS-012AC
(1)E(1) (1)
cD
10.0
9.8
0.39
0.38
REFERENCES
8
b
4.0
3.8
0.16
0.15
w M
p
scale
eHELL
6.2
1.27
5.8
0.244
0.05
0.228
A
2
1.05
0.041
A
1
detail X
p
1.0
0.25
0.4
0.039
0.01 0.004
0.016
PROJECTION
(A )
L
p
L
0.25 0.1
0.01
EUROPEAN
A
3
θ
Zywv θ
0.7
0.3
0.028
0.012
o
8
o
0
ISSUE DATE
98-12-23 03-02-19
2003 May 16 21
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
D
c
y
Z
16
9
E
H
E
74HC4052; 74HCT4052

SOT338-1

A
X
v M
A
pin 1 index
1
e
DIMENSIONS (mm are the original dimensions)
mm
A
max.
2
1
0.21
0.05
A2A3b
1.80
0.25
1.65
p
0.38
0.25
UNIT A
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
8
b
p
cD
0.20
6.4
0.09
6.0
w M
0 2.5 5 mm
scale
(1)E(1)
eHELLpQZywv θ
5.4
0.65 1.25
5.2
7.9
7.6
Q
A
2
A
1
detail X
1.03
0.9
0.63
0.7
(A )
L
p
L
3
θ
0.130.2 0.1
A
(1)
1.00
0.55
o
8
o
0
OUTLINE VERSION
SOT338-1
IEC JEDEC JEITA
REFERENCES
MO-150
2003 May 16 22
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27 03-02-19
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
DIP16: plastic dual in-line package; 16 leads (300 mil)
D
seating plane
L
Z
16
e
b
74HC4052; 74HCT4052

SOT38-9

M
E
A
2
A
A
1
b
1
w M
b
2
9
c
(e1) M
H
pin 1 index
1
0 5 10 mm
DIMENSIONS (mm dimensions are derived from the original inch dimensions)
A
UNIT
mm
inches
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
A
max.
OUTLINE
VERSION
SOT38-9
A
1
2
min.
max.
IEC JEDEC JEITA
b
1.65
1.40
0.065
0.055
0.51
0.41
0.020
0.016
b
1
b
1.14
0.76
0.045
0.030
REFERENCES
cD E e M
2
0.36
0.20
0.014
0.008
8
scale
(1) (1)
19.3
18.8
0.76
0.74
6.45
6.24
0.254
0.246
E
(1)
Z
L
e
1
0.150
0.115
M
3.81
8.23
2.92
7.62
0.324
0.300
EUROPEAN
PROJECTION
E
9.40
8.38
0.37
0.33
H
0.2542.54 7.62
0.010.1 0.3
ISSUE DATE
w
97-07-24 03-03-12
max.
0.764.32 0.38 3.56
0.030.17 0.015 0.14
2003 May 16 23
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
E
H
E
16
D
c
y
Z
9

SOT403-1

A
X
v M
A
pin 1 index
18
w M
b
e
DIMENSIONS (mm are the original dimensions)
UNIT A1A2A3b
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
A
max.
0.15
mm
1.1
OUTLINE
VERSION
SOT403-1 MO-153
0.05
0.95
0.25
0.80
IEC JEDEC JEITA
p
0.30
0.19
p
0 2.5 5 mm
scale
(1)E(2) (1)
cD
0.2
5.1
0.1
4.9
REFERENCES
eHELLpQZywv θ
4.5
0.65
4.3
A
6.6
6.2
Q
(A )
2
A
1
L
p
L
detail X
0.75
0.4
0.50
0.3
EUROPEAN
PROJECTION
3
A
θ
0.13 0.10.21
0.40
0.06
ISSUE DATE
99-12-27 03-02-18
o
8
o
0
2003 May 16 24
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm
A
D
terminal 1 index area
B
A
A
E
1
detail X

SOT763-1

c
terminal 1 index area
L
1
E
h
16
DIMENSIONS (mm are the original dimensions)
(1)
A
UNIT
mm
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
max.
A
0.05
0.00
1
e
27
15
c
b
0.30
0.2
0.18
e
1
b
10
D
h
0 2.5 5 mm
D
3.6
3.4
(1)
2.15
1.85
(1)
E
2.6
2.4
E
1.15
0.85
h
D
h
v
w
8
e
9
scale
2.5
0.51
C
M
ACCB
M
e
L
1
0.5
0.3
y
w
0.1v0.05
C
1
ye
y
0.05 0.1
1
y
X
OUTLINE
VERSION
SOT763-1 MO-241 - - -- - -
IEC JEDEC JEITA
REFERENCES
2003 May 16 25
EUROPEAN
PROJECTION
ISSUE DATE
02-10-17 03-01-27
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
SOLDERING Introduction to soldering surface mount packages
Thistext gives a very briefinsightto a complex technology. A more in-depth account of soldering ICs can be found in our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011). There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for certainsurfacemount ICs, but itisnotsuitable for fine pitch SMDs. In these situations reflow soldering is recommended.
Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied tothe printed-circuit boardbyscreen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
Typical reflow peak temperatures range from 215 to 270 °C depending on solder paste material. The top-surface temperature of the packages should preferably be kept:
below 220 °C (SnPb process) or below 245 °C (Pb-free process)
– for all the BGA packages – for packages with a thickness 2.5 mm – for packages with a thickness < 2.5 mm and a
volume 350 mm3 so called thick/large packages.
below 235 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages.
Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
74HC4052; 74HCT4052
If wave soldering is used the following conditions must be observed for optimal results:
Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave.
For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the printed-circuit board.
The footprint must incorporate solder thieves at the downstream end.
Forpackageswith leads on foursides,thefootprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.
During placement andbefore soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 °C or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
Wave soldering
Conventional single wave soldering is not recommended forsurfacemount devices (SMDs) orprinted-circuitboards with a high component density, as solder bridging and non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically developed.
2003 May 16 26
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer
Suitability of surface mount IC packages for wave and reflow soldering methods
PACKAGE
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, HVSON, SMS
(4)
PLCC LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO, VSSOP not recommended
Notes
1. Formore detailed information onthe BGA packages refertothe
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
6. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
, SO, SOJ suitable suitable
from your Philips Semiconductors sales office.
temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface.
The package footprint must incorporate solder thieves downstream and at the side corners.
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
(1)
not suitable
“(LF)BGAApplication Note
SOLDERING METHOD
WAVE REFLOW
(3)
suitable
(4)(5)
suitable
(6)
suitable
”(AN01026); order a copy
(2)
.
2003 May 16 27
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer

DATA SHEET STATUS

LEVEL
I Objective data Development This data sheet contains data from the objective specification for product
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
III Product data Production This data sheet contains data from the product specification. Philips
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product statusdetermines thedata sheetstatus.
DATA SHEET
STATUS
(1)
PRODUCT
STATUS
(2)(3)
development. Philips Semiconductors reserves the right to change the specification in any manner without notice.
Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product.
Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
DEFINITION
DEFINITIONS Short-form specification The data in a short-form
specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting values definition  Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device atthese or at anyotherconditions above those giveninthe Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make norepresentationor warranty that such applications willbe suitable for the specified use without further testing or modification.
DISCLAIMERS Life support applications These products are not
designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expectedto result inpersonal injury. Philips Semiconductorscustomersusingor selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes  Philips Semiconductors reserves the right to make changes in the products ­including circuits, standard cells, and/or software ­described or contained herein in order to improve design and/or performance. Whenthe productis in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 May 16 28
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
74HC4052; 74HCT4052
NOTES
2003 May 16 29
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
74HC4052; 74HCT4052
NOTES
2003 May 16 30
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
74HC4052; 74HCT4052
NOTES
2003 May 16 31
Philips Semiconductors – a w orldwide compan y
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands 613508/03/pp32 Date of release: 2003 May 16 Document order number: 9397 750 11266
SCA75
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