NXP 74HC 4052D NXP Datasheet

INTEGRATED CIRCUITS
DATA SH EET
74HC4052; 74HCT4052
Dual 4-channel analog multiplexer, demultiplexer
Product specification Supersedes data of 1997 Aug 27
2003 May 16
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer

FEATURES

Wide analog input voltage range from 5 V to +5 V
Low ON-resistance:
–80Ω(typical) at VCC− VEE= 4.5 V –70Ω(typical) at VCC− VEE= 6.0 V –60Ω(typical) at VCC− VEE= 9.0 V
Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
Typical “break before make” built in
Complies with JEDEC standard no. 8-1 A
ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V.
Specified from 40 to +85 °C and 40 to +125 °C.

APPLICATIONS

Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating.
74HC4052; 74HCT4052

DESCRIPTION

The 74HC4052/74HCT4052 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4052B. Theyare specified in compliance with JEDEC standard no. 7A.
The 74HC4052/74HCT4052 are dual 4-channel analog multiplexers or demultiplexers with common select logic. Each multiplexer has four independent inputs/outputs (pinsnY0 to nY3) and acommoninput/output (pin nZ). The common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input (pin E). When pin E = LOW, one of the four switches is selected (low-impedance ON-state) with pins S0 and S1. When pin E = HIGH, all switches are in the high-impedance OFF-state, independent of pins S0 and S1.
VCC and GND are the supply voltage pins for the digital control inputs (pins S0, S1, and E). The VCC to GND ranges are 2.0 to 10.0 V for 74HC4052 and 4.5 to 5.5 V for 74HCT4052. The analog inputs/outputs (pins nY0 to nY3and nZ) can swingbetween VCCasa positive limit and VEEas a negative limit. VCC− VEEmay not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEEis connected to GND (typically ground).

FUNCTION TABLE

ES1S0
L L L nY0 and nZ L L H nY1 and nZ L H L nY2 and nZ L H H nY3 and nZ H X X none
Note
1. H = HIGH voltage level
L = LOW voltage level X = don’t care.
INPUT
(1)
CHANNEL BETWEEN
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer

QUICK REFERENCE DATA

VEE= GND = 0 V; T
SYMBOL PARAMETER CONDITIONS
t
PZH/tPZL
t
PHZ/tPLZ
C
I
C
PD
C
S
turn-on time E or Sn to V
turn-off time E or Sn to V
input capacitance 3.5 3.5 pF power dissipation capacitance per switch notes 1 and 2 57 57 pF maximum switch capacitance independent (Y) 5 5 pF
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
PD=CPD× V fi= input frequency in MHz; fo= output frequency in MHz; CL= output load capacitance in pF; CS= maximum switch capacitance in pF; VCC= supply voltage in Volts; N = total load switching outputs; Σ[(CL+CS)×V
2. For 74HC4052 the condition is VI= GND to V
For 74HCT4052 the condition is VI= GND to VCC− 1.5 V.
=25°C; tr=tf= 6 ns.
amb
2
× fN+Σ[(CL+CS)×V
CC
2
× fo] = sum of the outputs.
CC
os
CL= 15 pF; RL=1kΩ; VCC=5V
os
CL= 15 pF; RL=1kΩ; VCC=5V
common (Z) 12 12 pF
2
× fo] where:
CC
CC
74HC4052; 74HCT4052
TYPICAL
UNIT
74HC4052 74HCT4052
28 18 ns
21 13 ns

ORDERING INFORMATION

PACKAGE
TYPE NUMBER
TEMPERATURE
RANGE
PINS PACKAGE MATERIAL CODE
74HC4052D 40 to +125 °C 16 SO16 plastic SOT109-3 74HCT4052D 40 to +125 °C 16 SO16 plastic SOT109-3 74HC4052DB 40 to +125 °C 16 SSOP16 plastic SOT338-1 74HCT4052DB 40 to +125 °C 16 SSOP16 plastic SOT338-1 74HC4052N 40 to +125 °C 16 DIP16 plastic SOT38-9 74HCT4052N 40 to +125 °C 16 DIP16 plastic SOT38-9 74HC4052PW 40 to +125 °C 16 TSSOP16 plastic SOT403-1 74HC4052BQ 40 to +125 °C 16 DHVQFN16 plastic SOT763-1 74HCT4052BQ 40 to +125 °C 16 DHVQFN16 plastic SOT763-1
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer

PINNING

PIN SYMBOL DESCRIPTION
1 2Y0 independent input or output 2 2Y2 independent input or output 3 2Z common input or output 4 2Y3 independent input or output 5 2Y1 independent input or output 6 7V 8 GND ground (0 V)
9 S1 select logic input 10 S0 select logic input 11 1Y3 independent input or output 12 1Y0 independent input or output 13 1Z common input or output 14 1Y1 independent input or output 15 1Y2 independent input or output 16 V
E enable input (active LOW)
EE
CC
74HC4052; 74HCT4052
negative supply voltage
positive supply voltage
handbook, halfpage
2Y0 2Y2
2Z 2Y3 2Y1
V
EE
GND
1 2 3 4
4052
5 6
E
7 8
MNB039
16
V
15
1Y2
14
1Y1
13
1Z
12
1Y0
11
1Y3
10
S0
9
S1
Fig.1 Pin configuration DIP16, SO16 and
(T)SSOP16.
CC
V
handbook, halfpage
2
2Y2
3
2Z
4
2Y3
5
2Y1
E
611
7
V
EE
Top view
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
2Y0
CC
116
(1)
GND
8
9
GND
S1
MNB061
15
1Y2
14
1Y1
13
1Z
12
1Y0
1Y3
S0
10
Fig.2 Pin configuration DHVQFN16.
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
S0 S1
E
13
1Z
2Z
1Y0
12
1Y1
14
1Y2
15
1Y3
11 2Y0 2Y1 2Y2 2Y3
3
1 5 2 4
MNB040
handbook, halfpage
10
9
6
Fig.3 Logic symbol.
handbook, halfpage
74HC4052; 74HCT4052
10
0
0
1
G4
4 ×
MDX
3
MNB041
1
0
5
1
2
2
4
3
12 14 15 11
9 6
3
13
Fig.4 IEC logic symbol.
handbook, full pagewidth
S0
S1
V
CC
16
10
LOGIC
LEVEL
CONVERSION
9
6
E
GND
1 - OF - 4
DECODER
78
V
EE
13 12
14
15
11
MNB042
1Z 1Y0
1Y1
1Y2
1Y3
1
2Y0
5
2Y1
2
2Y2
4
2Y3
3
2Z
Fig.5 Functional diagram.
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer
handbook, full pagewidth
V
CC
V
CC
V
CC
V
from
logic
EE
Fig.6 Schematic diagram (one switch).

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to VEE= GND (ground = 0 V); note 1.
nYn
nZ
V
EE
V
CC
V
EE
MNB043
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
I
IK
I
SK
I
S
I
EE
I
CC;IGND
T
stg
P
tot
P
S
supply voltage 0.5 +11.0 V input diode current VI<−0.5 V or VI> VCC+ 0.5 V −±20 mA switch diode current VS<−0.5 V or VS> VCC+ 0.5 V −±20 mA switch current 0.5 V < VS< VCC+ 0.5 V −±25 mA VEE current −±20 mA VCC or GND current −±50 mA storage temperature 65 +150 °C power dissipation T
= 40 to +125 °C; note 500 mW
amb
power dissipation per switch 100 mW
Notes
1. To avoid drawing V
current out of pins nZ, when switch current flows in pins nYn, the voltage drop across the
CC
bidirectional switch must not exceed 0.4 V. If the switch current flows into pins nZ, no VCC current will flow out of pins nYn. In this case thereis no limit for the voltage drop across theswitch, but the voltages at pins nYn and nZmay not exceed VCC or VEE.
2. For DIP16 packages: above 70 °C derate linearly with 12 mW/K. For SO16 packages: above 70 °C derate linearly with 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 °C derate linearly with 5.5 mW/K. For DHVQFN16 packages: above 60 °C derate linearly with 4.5 mW/K.
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS
V
CC
V
I
V
S
T
amb
t
, t
r
f
supply voltage see Figs 7 and 8
V
GND 2.0 5.0 10.0 4.5 5.0 5.5 V
CC
V
V
CC
EE
input voltage GND V switch voltage V operating ambient
temperature
see DC and AC characteristics per device
input rise and fall times VCC= 2.0 V 6.0 1000 6.0 500 ns
V
= 4.5 V 6.0 500 6.0 500 ns
CC
V
= 6.0 V 6.0 400 6.0 500 ns
CC
V
= 10.0 V 6.0 250 6.0 500 ns
CC
74HC4052; 74HCT4052
74HC4052 74HCT4052
MIN. TYP. MAX. MIN. TYP. MAX.
2.0 5.0 10.0 2.0 5.0 10.0 V GND V
CC
EE
V
CC
V
EE
V
40 +25 +85 40 +25 +85 °C
40 +125 40 +125 °C
CC CC
UNIT
V V
12
handbook, halfpage
VCC GND
(V)
8
4
0
operating area
04 12
8
VCC VEE (V)
MNB044
Fig.7 Guaranteed operating area as a function of
the supply voltages for 74HC4052.
12
handbook, halfpage
VCC GND
(V)
10
8
6
4
2
0
04 128
operating area
VCC VEE (V)
MNB045
Fig.8 Guaranteed operating area as a function of
the supply voltages for 74HCT4052.
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer
DC CHARACTERISTICS Family 74HC4052
Visis the input voltage at pins nYn or nZ, whichever is assigned as an input; Vosis the output voltage at pins nZ or nYn, whichever is assigned as an output; voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER
T
= 40 to +85 °C; note 1
amb
V
IH
HIGH-level input voltage
V
IL
LOW-level input voltage
I
LI
I
S(OFF)
input leakage current VI=VCCor GND 6.0 0 −−±1.0 µA
analog switch OFF-state current
I
S(ON)
analog switch ON-state current
I
CC
quiescent supply current
VI=VIHor VIL; VS =VCC− VEE; see Fig.9
per channel 10.0 0 −−±1.0 µA all channels 10.0 0 −−±2.0 µA
VI=VIHor VIL; VS =VCC− VEE; see Fig.10
VI=VCCor GND; Vis=VEEor VCC; Vos=VCCor V
TEST CONDITIONS
OTHER V
2.0 1.5 1.2 V
4.5 3.15 2.4 V
6.0 4.2 3.2 V
9.0 6.3 4.7 V
2.0 −−0.8 0.5 V
4.5 −−2.1 1.35 V
6.0 −−2.8 1.8 V
9.0 −−4.3 2.7 V
10.0 0 −−±2.0 µA
10.0 0 −−±2.0 µA
6.0 0 −−80.0 µA
10.0 0 −−160.0 µA
EE
(V) VEE(V)
CC
MIN. TYP. MAX. UNIT
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer, demultiplexer
SYMBOL PARAMETER
T
= 40 to +125 °C
amb
V
IH
V
IL
I
LI
I
S(OFF)
I
S(ON)
I
CC
Note
1. All typical values are measured at T
HIGH-level input voltage
LOW-level input voltage
input leakage current VI=VCCor GND 6.0 0 −−±1.0 µA
analog switch OFF-state current
VI=VIHor VIL; VS =VCC− VEE; see Fig.9
per channel 10.0 0 −−±1.0 µA all channels 10.0 0 −−±2.0 µA
analog switch ON-state current
quiescent supply current
VI=VIHor VIL; VS =VCC− VEE; see Fig.10
VI=VCCor GND; Vis=VEEor VCC; Vos=VCCor V
=25°C.
amb
TEST CONDITIONS
OTHER V
2.0 1.5 −−V
4.5 3.15 −− V
6.0 4.2 −−V
9.0 6.3 −−V
2.0 −−0.5 V
4.5 −−1.35 V
6.0 −−1.8 V
9.0 −−2.7 V
10.0 0 −−±2.0 µA
10.0 0 −−±2.0 µA
6.0 0 −−160 µA
10.0 0 −−320.0 µA
EE
(V) VEE(V)
CC
74HC4052; 74HCT4052
MIN. TYP. MAX. UNIT
Philips Semiconductors Product specification
Dual 4-channel analog multiplexer,
74HC4052; 74HCT4052
demultiplexer
Family 74HCT4052
Visis the input voltage at pins nYn or nZ, whichever is assigned as an input; Vosis the output voltage at pins nZ or nYn, whichever is assigned as an output; voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER
= 40 to +85 °C; note 1
T
amb
V
IH
HIGH-level input voltage
V
IL
LOW-level input voltage
I
LI
I
S(OFF)
input leakage current VI=VCCor GND 5.5 0 −−±1.0 µA analog switch
OFF-state current
I
S(ON)
analog switch ON-state current
I
CC
quiescent supply current
I
CC
additional quiescent supply current per input
T
= 40 to +125 °C
amb
V
IH
HIGH-level input voltage
V
IL
LOW-level input voltage
I
LI
I
S(OFF)
input leakage current VI=VCCor GND 5.5 0 −−±1.0 µA analog switch
OFF-state current
I
S(ON)
analog switch ON-state current
I
CC
quiescent supply current
I
CC
additional quiescent supply current per input
VI=VIHor VIL; VS =VCC− VEE; see Fig.9
per channel 10.0 0 −−±1.0 µA all channels 10.0 0 −−±2.0 µA
VI=VIHor VIL; VS =VCC− VEE; see Fig.10
VI=VCCor GND; Vis=VEEor VCC; Vos=VCCor V
VI=VCC− 2.1 V;otherinputs at VCC or GND
VI=VIHor VIL; VS =VCC− VEE; see Fig.9
per channel 10.0 0 −−±1.0 µA all channels 10.0 0 −−±2.0 µA
VI=VIHor VIL; VS =VCC− VEE; see Fig.10
VI=VCCor GND; Vis=VEEor VCC; Vos=VCCor V
VI=VCC− 2.1 V;otherinputs at VCC or GND
TEST CONDITIONS
OTHER V
4.5 to 5.5 2.0 1.6 V
4.5 to 5.5 −−1.2 0.8 V
10.0 0 −−±2.0 µA
5.5 0 −−80.0 µA
5.0 5.0 −−160.0 µA
EE
4.5 to 5.5 0 45 202.5 µA
4.5 to 5.5 2.0 −− V
4.5 to 5.5 −−0.8 V
10.0 0 −−±2.0 µA
5.5 0 −−160.0 µA
5.0 5.0 −−320.0 µA
EE
4.5 to 5.5 0 −−220.5 µA
(V) VEE(V)
CC
MIN. TYP. MAX. UNIT
Note
1. All typical values are measured at T
amb
=25°C.
2003 May 16 10
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