NXP 74HC 27 Datasheet

INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT27
Triple 3-input NOR gate
Product specification File under Integrated Circuits, IC06
December 1990
Philips Semiconductors Product specification
Triple 3-input NOR gate 74HC/HCT27
FEATURES
Output capability: standard
ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT27 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT27 provide the 3-input NOR function.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL
C C
I PD
/ t
PLH
propagation delay nA, nB, nC to nY CL= 15 pF; VCC= 5 V 8 10 ns input capacitance 3.5 3.5 pF power dissipation capacitance per gate notes 1 and 2 24 30 pF
Notes
1. C
is used to determine the dynamic power dissipation (PD in µW):
PD
PD=CPD× V
2
× fi+∑(CV
CC
2
× fO) where:
CC
fi= input frequency in MHz fo= output frequency in MHz (CV
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
TYPICAL
UNIT
HC HCT
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
December 1990 2
.
Philips Semiconductors Product specification
Triple 3-input NOR gate 74HC/HCT27
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 3, 9 1A to 3A data inputs 2, 4, 10 1B to 3B data inputs 13, 5, 11 1C to 3C data inputs 7 GND ground (0 V) 12, 6, 8 1Y to 3Y data outputs 14 V
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
FUNCTION TABLE
INPUTS OUTPUT
nA nB nC nY
L X X
H
Notes
1. H = HIGH voltage level L = LOW voltage level X = don’t care
Fig.4 Functional diagram. Fig.5 Logic diagram (one gate).
L
L
X
H
H
X
X
X
H
L L L
December 1990 3
Philips Semiconductors Product specification
Triple 3-input NOR gate 74HC/HCT27
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
Output capability: standard ICC category: SSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
= 6 ns; CL= 50 pF
r=tf
SYMBOL PARAMETER
t
PHL
/ t
propagation delay
PLH
nA, nB, nC to nY
t
THL
/ t
output transition time 19
TLH
(°C) TEST CONDITIONS
T
amb
74HC
+25 40 to +85 40 to +125
min. typ. max. min. max. min. max.
28 10 8
7 6
90 18 15
75 15 13
115 23 20
95 19 16
135 27 23
110 22 19
.
UNIT
ns 2.0
ns 2.0
V
(V)
4.5
6.0
4.5
6.0
CC
WAVEFORMS
Fig.6
Fig.6
December 1990 4
Philips Semiconductors Product specification
Triple 3-input NOR gate 74HC/HCT27
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard ICC category: SSI
Note to HCT types
The value of additional quiescent supply current (I
) for a unit load of 1 is given in the family specifications.
CC
To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT UNIT LOAD COEFFICIENT
nA, nB, nC 1.50
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr=tf= 6 ns; CL= 50 pF
(°C) TEST CONDITIONS
T
amb
74HCT
SYMBOL PARAMETER
+25 40 to +85 40 to +125
UNIT
V
(V)
CC
min. typ. max. min. max. min. max.
t
PHL
/ t
propagation delay
PLH
12 21 26 32 ns 4.5 Fig.6
nA, nB, nC to nY
t
THL
/ t
output transition time 7 15 19 22 ns 4.5 Fig.6
TLH
WAVEFORMS
AC WAVEFORMS
(1) HC : VM= 50%; VI= GND to VCC.
HCT: V
= 1.3 V; VI= GND to 3 V.
M
Fig.6 Waveforms showing the input (nA, nB, nC) to output (nY) propagation delays and the output transition times.
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
December 1990 5
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