NXP 74HC 132D NXP Datasheet

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT132

Quad 2-input NAND Schmitt trigger

Product specification
File under Integrated Circuits, IC06

September 1993

Philips Semiconductors Product specification

Quad 2-input NAND Schmitt trigger 74HC/HCT132

FEATURES

• Output capability: standard

• ICC category: SSI

GENERAL DESCRIPTION

The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.

The 74HC/HCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of
transforming slowly changing input signals into sharply defined, jitter-free output signals.

The gate switches at different points for positive and negative-going signals. The difference between the positive voltage

and the negative voltage VT− is defined as the hysteresis voltage VH.

V

T+

QUICK REFERENCE DATA

GND = 0 V; T

=25°C; tr=tf= 6 ns

amb

SYMBOL PARAMETER CONDITIONS

t

PHL

C
C

I
PD

/ t

PLH

propagation delay nA, nB to nY CL= 15 pF; VCC=5 V 11 17 ns
input capacitance 3.5 3.5 pF
power dissipation capacitance per gate notes 1 and 2 24 20 pF

Notes

1. C

is used to determine the dynamic power dissipation (PD in µW):

PD

PD=CPD× V

2

× fi+∑(CL× V

CC

2

× fo) where:

CC

fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V

2

× fo) = sum of outputs

CC

CL= output load capacitance in pF
VCC= supply voltage in V

2. For HC the condition is VI= GND to V

CC

For HCT the condition is VI= GND to VCC− 1.5 V

ORDERING INFORMATION

“74HC/HCT/HCU/HCMOS Logic Package Information”

See

.

TYPICAL

UNIT

HC HCT

September 1993 2

Philips Semiconductors Product specification

Quad 2-input NAND Schmitt trigger 74HC/HCT132

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

1, 4, 9, 12 1A to 4A data inputs
2, 5, 10, 13 1B to 4B data inputs
3, 6, 8, 11 1Y to 4Y data outputs
7 GND ground (0 V)
14 V

CC

positive supply voltage

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

FUNCTION TABLE

INPUTS OUTPUT

nA nB nY

LL H

LH H
HL H
HH L

Notes

1. H = HIGH voltage level
L = LOW voltage level

Fig.5 Logic diagram

Fig.4 Functional diagram.

(one Schmitt trigger).

APPLICATIONS

• Wave and pulse shapers

• Astable multivibrators

• Monostable multivibrators

September 1993 3

Philips Semiconductors Product specification

Quad 2-input NAND Schmitt trigger 74HC/HCT132

DC CHARACTERISTICS FOR 74HC

For the DC characteristics see

“74HC/HCT/HCU/HCMOS Logic Family Specifications”

given below.
Output capability: standard

ICC category: SSI

Transfer characteristics for 74HC

Voltages are referenced to GND (ground = 0 V)

SYMBOL PARAMETER

min. typ. max. min. max. min. max.

V

T+

positive-going threshold 0.7 1.18 1.5 0.7 1.5 0.7 1.5 V 2.0 Figs 6 and 7

1.7 2.38 3.15 1.7 3.15 1.7 3.15 4.5

2.1 3.14 4.2 2.1 4.2 2.1 4.2 6.0

V

T−

negative-going threshold 0.3 0.63 1.0 0.3 1.0 0.3 1.0 V 2.0 Figs 6 and 7

0.9 1.67 2.2 0.9 2.2 0.9 2.2 4.5

1.2 2.26 3.0 1.2 3.0 1.2 3.0 6.0

V

H

hysteresis (VT+− VT−) 0.2 0.55 1.0 0.2 1.0 0.2 1.0 V 2.0 Figs 6 and 7

0.4 0.71 1.4 0.4 1.4 0.4 1.4 4.5

0.6 0.88 1.6 0.6 1.6 0.6 1.6 6.0

(°C)

T

amb

74HC

+25 −40 to +85 −40 to +125

. Transfer characteristics are

TEST CONDITIONS

UNIT

WAVEFORMS

V

CC

(V)

AC CHARACTERISTICS FOR 74HC

GND = 0 V; t

= 6 ns; CL= 50 pF

r=tf

SYMBOL PARAMETER

t

PHL

/ t

propagation delay

PLH

nA, nB to nY

t

THL

/ t

output transition time 19 75 95 110 ns 2.0 Fig.13

TLH

T

(°C)

amb

74HC

UNIT

+25 −40 TO +85 −40 TO +125

min. typ. max. min. max. min. max.

36 125 155 190 ns 2.0 Fig.13
13 25 31 38 4.5
10 21 26 32 6.0

7 15 19 22 4.5
6 13 16 19 6.0

TEST CONDITIONS

WAVEFORMS

V

CC

(V)

September 1993 4

Philips Semiconductors Product specification

Quad 2-input NAND Schmitt trigger 74HC/HCT132

DC CHARACTERISTICS FOR 74HCT

For the DC characteristics see

“74HC/HCT/HCU/HCMOS Logic Family Specifications”

. Transfer characteristics are

given below.
Output capability: standard

ICC category: SSI

Notes to HCT types

The value of additional quiescent supply current (∆I

) for a unit load of 1 is given in the family specifications.

CC

To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.

INPUT UNIT LOAD COEFFICIENT

nA, nB 0.3

Transfer characteristics for 74HCT

Voltages are referenced to GND (ground = 0 V)

T

amb

(°C)

TEST CONDITIONS

74HCT

SYMBOL PARAMETER

+25 −40 to +85 −40 to +125

UNIT

V

(V)

min. typ. max. min. max. min. max.

V

T+

positive-going threshold 1.2 1.41 1.9 1.2 1.9 1.2 1.9 V 4.5 Figs 6 and 7

1.4 1.59 2.1 1.4 2.1 1.4 2.1 5.5

V

T−

negative-going threshold 0.5 0.85 1.2 0.5 1.2 0.5 1.2 V 4.5 Figs 6 and 7

0.6 0.99 1.4 0.6 1.4 0.6 1.4 5.5

V

H

hysteresis (VT+− VT−) 0.4 0.56 − 0.4 − 0.4 − V 4.5 Figs 6 and 7

0.4 0.60 − 0.4 − 0.4 − 5.5

WAVEFORMS

CC

AC CHARACTERISTICS FOR 74HCT

GND = 0 V; t

= 6 ns; CL= 50 pF

r=tf

T

amb

74HCT

SYMBOL PARAMETER

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

t

PHL

t

THL

/ t

/ t

propagation delay

PLH

nA, nB to nY

output transition time 7 15 19 22 ns 4.5 Fig.13

TLH

20 33 41 50 ns 4.5 Fig.13

September 1993 5

(°C)

UNIT

TEST CONDITIONS

WAVEFORMS

V

CC

(V)

Philips Semiconductors Product specification

Quad 2-input NAND Schmitt trigger 74HC/HCT132

TRANSFER CHARACTERISTIC WAVEFORMS

Fig.7 Waveforms showing the definition of VT+,

VT− and VH; where VT+ and VT− are between

Fig.6 Transfer characteristic.

limits of 20% and 70%.

Fig.8 Typical HC transfer characteristics;

VCC= 2 V.

Fig.10 Typical HC transfer characteristics;

VCC= 6 V.

September 1993 6

Fig.9 Typical HC transfer characteristics;

VCC= 4.5 V.

Fig.11 Typical HCT transfer characteristics;

VCC= 4.5 V.

Philips Semiconductors Product specification

Quad 2-input NAND Schmitt trigger 74HC/HCT132

Fig.12 Typical HCT transfer characteristics; VCC= 5.5 V.

AC WAVEFORMS

(1) HC : VM= 50%; VI= GND to VCC.

HCT: V

= 1.3 V; VI= GND to 3 V.

M

Fig.13 Waveforms showing the input (nA, nB) to output (nY) propagation delays and the output transition times.

September 1993 7

Philips Semiconductors Product specification

Quad 2-input NAND Schmitt trigger 74HC/HCT132

Application information

The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula:
Pad=fi×(tr× I

Where:

P
f

i

t

r

t

f

I

CCa

Average I

= additional power dissipation (µW)

ad

= input frequency (MHz)
= input rise time (ns); 10% − 90%
= input fall time (ns); 10% − 90%
= average additional supply current (µA)

CCa

CCa

+ tf× I

CCa

) × VCC.

differs with positive or negative input transitions, as shown in Figs 14 and 15.

Fig.14 Average ICC for HC Schmitt trigger devices;

linear change of Vi between 0.1 VCC to

0.9 VCC.

HC/HCT132 used in a relaxation oscillator circuit, see Fig.16.

1

1

HC:

HCT:

≈=

f

-----------------

---

0.8RC

T

1

≈=

--­T

1

--------------------- -

0.67 RC

f

Fig.16 Relaxation oscillator using HC/HCT132.

Note to Application information

All values given are typical unless otherwise specified.

PACKAGE OUTLINES

“74HC/HCT/HCU/HCMOS Logic Package Outlines”

See

.

Fig.15 Average ICC for HCT Schmitt trigger

devices; linear change of Vi between

0.1 VCC to 0.9 VCC.

September 1993 8

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