ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
Table of Contents
5
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EC
G
Galaxy Microsystems (HK) Ltd.
Table of Contents
Table of Contents
Table of Contents
Design By:
Design By:
P25Z
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P25Z
Design By:
NestonV10
NestonV10
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152Friday, March 03, 2017
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152Friday, March 03, 2017
Page 2
ABCDEFGH
Page2: Block Diagram
1
NVVDD
SLI
STEREO
FRAME LOCK
Power Supply
NVVDD-PH2
Power Supply
NVVDD-PH3
Power Supply
1
EXT_12V 2x3 PWR 1
DYNAMIC NVVDD-PH4
MEM
2
DP/HDMIDP
MEM
E
DMEMC
MEM
Power Supply
NVVDD-PH4
Power Supply
NVVDD-PH5
EXT_12V 2x4 PWR 2
B
Power Supply
STUFF OPTION
2
DYNAMIC NVVDD-PH1
GP102
FBVDDQ
3
MEM
F
MEMA
DP
DVI-D
DP
4
1V8
Power Supply
FBVDD/Q PH1&PH2
Power Supply
NVVDD-PH7
Power Supply
NVVDD-PH6
Power Supply
NVVDD-PH1
Power Supply
1V8
STEER
PEX_12V Finger
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
BLOCK DIAGRAM
5V
PEX_VDD
Power Supply
5V SWITCHER
Power Supply
PEX_VDD
FAN
OVREG
FDBA
PEX_3V3 Finger
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
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Custom
Custom
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Date:Sheetof
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property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
G
Galaxy Microsystems (HK) Ltd.
Block Diagram
Block Diagram
Block Diagram
P25Z
P25Z
P25Z
Design By:
Design By:
Design By:
H
NestonV10
NestonV10
NestonV10
252Friday, March 03, 2017
252Friday, March 03, 2017
252Friday, March 03, 2017
5
Page 3
nv_cap
Page3: PCI Express
12V
3V3
1
0603
GND
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
C70
4.7uF
10uF
6.3V
6.3V
20%
10%
X6S
X7R
0603
0805
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
PCI Express
PCI Express
PCI Express
P25Z
P25Z
P25Z
Design By:
Design By:
Design By:
H
0805
0805
PEX_VDD
C88
C89
22uF
22uF
6.3V
6.3V
20%
10%
X6S
X7R
0805
GND
1V8_MAIN
C71
C69
10uF
22uF
6.3V
6.3V
10%
20%
X7R
X6S
0805
GND
NestonV10
NestonV10
NestonV10
of
of
of
352Friday, March 03, 2017
352Friday, March 03, 2017
352Friday, March 03, 2017
2
3
4
5
Page 4
ABCDEFGH
Page4: MEMORY: GPU Partition A/B
1
{5,6}
2
3
{5,6}
{5,6}
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
G
FB_CMD
FBB_CMD[31..0]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R831 60.4ohm/NC
1 %
0402
FBB_CLK0FB_CLK
FBB_CLK0FB_CLK
FBB_CLK1FB_CLK
FB_CLKFBB_CLK1
FB_WCKFBB_WCK01
FB_WCKFBB_WCK01
FB_WCKFBB_WCK23
FB_WCKFBB_WCK23
FBB_WCK45FB_WCK
FB_WCKFBB_WCK45
FB_WCKFBB_WCK67
FBB_WCK67FB_WCK
IN
MEMORY: GPU Partition A/B
MEMORY: GPU Partition A/B
MEMORY: GPU Partition A/B
P25Z
P25Z
P25Z
OUT
FBVDDQ
R830 60.4ohm/NC
1 %
0402
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
{4,9,14,29}
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Design By:
Design By:
Design By:
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NestonV10
NestonV10
452Friday, March 03, 2017
452Friday, March 03, 2017
452Friday, March 03, 2017
H
1
{7,8}
2
{7}
{7}
{8}
{8}
3
{7}
{7}
{7}
{7}
{8}
{8}
{8}
{8}
4
5
of
of
of
Page 5
ABCDEFGH
Page5: MEMORY: FBA Partition 31..0
GND
M11C
@memory.u_mem_gddr5x_x32(sym_7):page5_i578
Mirrored
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
add 1k to VDD
FBVDDQ
W12
MF
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
A13
VDDQ
A2
VDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C13
VDDQ
C14
VDDQ
C2
VDDQ
E1
VDDQ
E11
VDDQ
E13
VDDQ
E14
VDDQ
E2
VDDQ
E4
VDDQ
F10
VDDQ
F5
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
J13
VDDQ
J2
VDDQ
L13
VDDQ
L2
VDDQ
M12
VDDQ
M3
VDDQ
N13
VDDQ
N2
VDDQ
P10
VDDQ
P5
VDDQ
R1
VDDQ
R11
VDDQ
R13
VDDQ
R14
VDDQ
R2
VDDQ
R4
VDDQ
U1
VDDQ
U13
VDDQ
U14
VDDQ
U2
VDDQ
V10
VDDQ
V5
VDDQ
W13
VDDQ
W2
VDDQ
A3
VPP
W3
VPP
1V8_AON
1
2
3
M11B
{4}
1
BI
2
{4}
{4}
3
FBA_D[31..0]
M11D
@memory.u_mem_gddr5x_x32(sym_2):page5_i499
MIRRORED
x32
FBA_D0
0
FBA_D1
1
FBA_D2
2
FBA_D3
3
FBA_D4
4
FBA_D5
5
FBA_D6
6
FBA_D7
7
FBA_EDC0
FBA_DBI0
FBA_D8
8
FBA_D9
9
FBA_D10
10
FBA_D11
11
FBA_D12
12
FBA_D13
13
FBA_D14
14
FBA_D15
15
FBA_EDC1
FBA_DBI1
FBA_WCK01
IN
FBA_WCK01*
IN
x16
V4
DQ0
NC
V3
DQ1
NC
U4
DQ2
NC
U3
DQ3
NC
P4
DQ4
NC
P3
DQ5
NC
N4
DQ6
NC
N3
DQ7
NC
T3
EDC0
NC
R3
DBI0
NC
V11
DQ8
V12
DQ9
U11
DQ10
U12
DQ11
P11
DQ12
P12
DQ13
N11
DQ14
N12
DQ15
T12
EDC1
R12
DBI1
T4
WCK01
T5
WCK01
{4}
{4}
{7,10,12,15,17,27}
FBA_D16
16
FBA_D17
17
FBA_D18
18
FBA_D19
19
FBA_D20
20
FBA_D21
21
FBA_D22
22
FBA_D23
23
FBA_EDC2
FBA_DBI2
FBA_D24
24
FBA_D25
25
FBA_D26
26
FBA_D27
27
FBA_D28
28
FBA_D29
29
FBA_D30
30
FBA_D31
31
FBA_EDC3
FBA_DBI3
FBA_WCK23
IN
FBA_WCK23*
IN
GPIO10_FBVREF_SEL
IN
M11A
@memory.u_mem_gddr5x_x32(sym_4):page5_i544
MIRRORED
x32
x16
B11
DQ16
B12
DQ17
C11
DQ18
C12
DQ19
F11
DQ20
F12
DQ21
G11
DQ22
G12
DQ23
D12
EDC2
GND
E12
DBI2
B4
DQ24
B3
DQ25
C4
DQ26
C3
DQ27
F4
DQ28
F3
DQ29
G4
DQ30
G3
DQ31
D3
EDC3
E3
DBI3
D4
WCK23
D5
WCK23
1G1D1S
NC
NC
NC
NC
NC
NC
NC
NC
NC
D
G
1
S
SOT23
GND
3
Q12
@discrete.q_fet_n_enh(sym_2):page5_i595
2
AO3416L
30V
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
1.2A
0.2W
12V
{4,6}
{4}
{4}
FBA_VREF_Q
0.300
FBVDDQ
R112
549ohm
1 %
R106
1.33k
1 %
GND
FBA_CMD[31..0]
IN
FBA_CLK0
IN
FBA_CLK0*
IN
R113
931ohm
1 %
0.300
C99
820pF
50V
10%
X7R
GNDGND
FBA_CMD2
2
FBA_CMD0
0
FBA_CMD15
15
FBA_CMD6
6
FBA_CMD4
4
FBA_CMD3
3
FBA_CMD12
12
FBA_CMD11
11
FBA_CMD9
9
FBA_CMD10
10
FBA_CMD7
7
FBA_CMD8
8
FBA_CMD5
5
FBA_CMD14
14
FBA_CMD1
1
FBA_CMD13
13
OUT
FBA_VREFC
0.140A
R111
FBA_ZQ_1
121ohm
1 %
@memory.u_mem_gddr5x_x32(sym_5):page5_i580
M4
RAS
H4
CAS
H11
WE
K4
ABI
L4
A0_A10
L5
A1_A9
L11
A2_BA0
L10
A3_BA3
J11
A4_BA2
J10
A5_BA1
J5
A6_A11
J4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
M11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
{6}
K13
VREFC
H13
ZQ
4
FBVDDQ
C721
10uF
4V
20%
X6S
FBVDDQ
C712
22uF
4V
20%
X6S
5
{4,6}
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
IN
C791
10uF
4V
20%
X6S
C743
22uF
4V
20%
X6S
FB_DBI
FBA_DBI[7..0]
CLOSE DRAM
C815
10uF
4V
20%
X6S
AROUND DRAM
C822
22uF
4V
20%
X6S
C1281
C823
10uF
4V
20%
X6S
C738
22uF
4V
20%
X6S
0
1
2
3
4
5
6
7
FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7
C711
C780
C826
1uF
1uF
6.3V
10%
X6S
C742
22uF
4V
20%
X6S
1uF
6.3V
6.3V
10%
10%
X6S
X6S
C794
C810
10uF
10uF
4V
4V
20%
20%
X6S
X6S
GND
{4,6}
1uF
6.3V
10%
X6S
IN
C804
1uF
6.3V
10%
X6S
FBVDDQ
UNDER DRAM FOR X32
C725
1uF
6.3V
10%
X6S
FB_EDC
FBA_EDC[7..0]
C720
C727
1uF
6.3V
10%
X6S
C779
1uF
6.3V
10%
X6S
C801
C767
C811
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
C774
C760
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
FBA_EDC0
0
FBA_EDC1
1
FBA_EDC2
2
FBA_EDC3
3
FBA_EDC4
4
FBA_EDC5
5
FBA_EDC6
6
FBA_EDC7
7
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
GND
C747
C753
C783
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
C776
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
GND
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBA PARTITION[31:0]
1V8_AON
C1469
C285
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
GND
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBA Partition 31..0
MEMORY: FBA Partition 31..0
MEMORY: FBA Partition 31..0
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
NestonV10
NestonV10
NestonV10
552Friday, March 03, 2017
552Friday, March 03, 2017
552Friday, March 03, 2017
H
of
of
of
Page 6
ABCDEFGH
Page6: MEMORY: FBA Partition 63..32
1
{4}
2
FBA_D[63..32]
BI
M12D
@memory.u_mem_gddr5x_x32(sym_1):page6_i467
BGA190
COMMON
FBA_D32
32
FBA_D33
33
FBA_D34
34
FBA_D35
35
FBA_D36
36
FBA_D37
37
FBA_D38
38
FBA_D39
39
FBA_EDC4
FBA_DBI4
FBA_D40
40
FBA_D41
41
FBA_D42
42
FBA_D43
43
FBA_D44
44
FBA_D45
45
FBA_D46
46
FBA_D47
47
FBA_EDC5
FBA_DBI5
{4}
{4}
FBA_WCK45
IN
FBA_WCK45*
IN
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
x16
B11
DQ8
NC
B12
DQ9
NC
C11
DQ10
NC
C12
DQ11
NC
F11
DQ12
NC
F12
DQ13
NC
G11
DQ14
NC
G12
DQ15
NC
D12
EDC1
GND
E12
DBI1
NC
D4
WCK01
D5
WCK01
{4}
{4}
FBA_D48
48
FBA_D49
49
FBA_D50
50
FBA_D51
51
FBA_D52
52
FBA_D53
53
FBA_D54
54
FBA_D55
55
FBA_EDC6
FBA_DBI6
FBA_D56
56
FBA_D57
57
FBA_D58
58
FBA_D59
59
FBA_D60
60
FBA_D61
61
FBA_D62
62
FBA_D63
63
FBA_EDC7
FBA_DBI7
FBA_WCK67
IN
FBA_WCK67*
IN
M12A
@memory.u_mem_gddr5x_x32(sym_3):page6_i497
BGA190
COMMON
NORMAL
V11
DQ16
V12
DQ17
U11
DQ18
U12
DQ19
P11
DQ20
P12
DQ21
N11
DQ22
N12
DQ23
T12
EDC2
R12
DBI2
x32
x16
V4
DQ24
NC
V3
DQ25
NC
U4
DQ26
NC
U3
DQ27
NC
P4
DQ28
NC
P3
DQ29
NC
N4
DQ30
NC
N3
DQ31
NC
T3
EDC3
NC
R3
DBI3
NC
T4
WCK23
T5
WCK23
{4,5}
{4}
{4}
{5}
3
IN
IN
IN
IN
FBA_CMD[31..0]
FBA_CLK1
FBA_CLK1*
C101
820pF
50V
10%
X7R
0402
COMMON
GNDGND
FBA_VREFC
GND
M12C
@memory.u_mem_gddr5x_x32(sym_6):page6_i522
BGA190
COMMON
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
FBVDDQ
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
A13
VDDQ
A2
VDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C13
VDDQ
C14
VDDQ
C2
VDDQ
E1
VDDQ
E11
VDDQ
E13
VDDQ
E14
VDDQ
E2
VDDQ
E4
VDDQ
F10
VDDQ
F5
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
J13
VDDQ
J2
VDDQ
L13
VDDQ
L2
VDDQ
M12
VDDQ
M3
VDDQ
N13
VDDQ
N2
VDDQ
P10
VDDQ
P5
VDDQ
R1
VDDQ
R11
VDDQ
R13
VDDQ
R14
VDDQ
R2
VDDQ
R4
VDDQ
U1
VDDQ
U13
VDDQ
U14
VDDQ
U2
VDDQ
V10
VDDQ
V5
VDDQ
W13
VDDQ
W2
VDDQ
A3
VPP
W3
VPP
1V8_AON
M12B
@memory.u_mem_gddr5x_x32(sym_5):page6_i509
BGA190
FBA_CMD18
18
FBA_CMD16
16
FBA_CMD31
31
FBA_CMD22
22
FBA_CMD20
20
FBA_CMD19
19
FBA_CMD28
28
FBA_CMD27
27
FBA_CMD25
25
FBA_CMD26
26
FBA_CMD23
23
FBA_CMD24
24
FBA_CMD21
21
FBA_CMD30
30
FBA_CMD17
17
FBA_CMD29
29
R107
0402
FBA_ZQ_2
121ohm
COMMON
1 %
COMMON
H4
RAS
M4
CAS
M11
WE
K4
ABI
J4
A0_A10
J5
A1_A9
J11
A2_BA0
J10
A3_BA3
L11
A4_BA2
L10
A5_BA1
L5
A6_A11
L4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
H11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
K13
VREFC
H13
ZQ
1
2
3
4
FBVDDQ
C805
10uF
4V
20%
X6S
0603
COMMON
FBVDDQ
C741
22uF
4V
20%
X6S
0603W
COMMON
5
{4,5}
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
IN
C705
10uF
4V
20%
X6S
0603
COMMON
C824
22uF
4V
20%
X6S
0603W
COMMON
FB_DBI
FBA_DBI[7..0]
CLOSE DRAM
C799
10uF
4V
20%
X6S
0603
COMMON
AROUND DRAM
C702
22uF
4V
20%
X6S
0603W
COMMON
C788
10uF
4V
20%
X6S
0603
COMMON
C809
22uF
4V
20%
X6S
0603W
COMMON
C787
C723
C768
C817
C773
1uF
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C785
C828
22uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603W
COMMON
COMMON
{4,5}
FBA_DBI0
0
FBA_DBI1
1
FBA_DBI2
2
FBA_DBI3
3
FBA_DBI4
4
FBA_DBI5
5
FBA_DBI6
6
FBA_DBI7
7
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C709
10uF
4V
20%
X6S
0603
COMMON
GND
IN
1uF
6.3V
10%
X6S
0402
COMMON
FBVDDQ
UNDER DRAM FOR X32
C758
1uF
6.3V
10%
X6S
0402
COMMON
FB_EDC
FBA_EDC[7..0]
C734
1uF
6.3V
10%
X6S
0402
COMMON
C706
1uF
6.3V
10%
X6S
0402
COMMON
C759
1uF
6.3V
10%
X6S
0402
COMMON
C772
1uF
6.3V
10%
X6S
0402
COMMON
C728
C713
1uF
6.3V
10%
X6S
0402
COMMON
C770
1uF
6.3V
10%
X6S
0402
COMMON
C769
1uF
6.3V
10%
X6S
0402
COMMON
GND
C766
1uF
6.3V
10%
X6S
0402
COMMON
C754
1uF
6.3V
10%
X6S
0402
COMMON
GND
C752
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C737
1uF
6.3V
10%
X6S
0402
COMMON
FBA_EDC0
0
FBA_EDC1
1
FBA_EDC2
2
FBA_EDC3
3
FBA_EDC4
4
FBA_EDC5
5
FBA_EDC6
6
FBA_EDC7
7
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBA PARTITION[63:32]
1V8_AON
C1470
C268
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
GND
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBA Partition 63..32
MEMORY: FBA Partition 63..32
MEMORY: FBA Partition 63..32
P25Z
P25Z
P25Z
Design By:
Design By:
Design By:
H
NestonV10
NestonV10
NestonV10
of
of
of
652Friday, March 03, 2017
652Friday, March 03, 2017
652Friday, March 03, 2017
Page 7
ABCDEFGH
Page7: MEMORY: FBB Partition 31..0
{4}
1
BI
2
{4}
{4}
3
FBB_D[31..0]
FBB_D0
0
FBB_D1
1
FBB_D2
2
FBB_D3
3
FBB_D4
4
FBB_D5
5
FBB_D6
6
FBB_D7
7
FBB_EDC0
FBB_DBI0
FBB_D8
8
FBB_D9
9
FBB_D10
10
FBB_D11
11
FBB_D12
12
FBB_D13
13
FBB_D14
14
FBB_D15
15
FBB_EDC1
FBB_DBI1
FBB_WCK01
IN
FBB_WCK01*
IN
M9D
@memory.u_mem_gddr5x_x32(sym_2):page7_i510
BGA190_MIRR
COMMON
MIRRORED
x32
x16
V4
DQ0
V3
DQ1
U4
DQ2
U3
DQ3
P4
DQ4
P3
DQ5
N4
DQ6
N3
DQ7
T3
EDC0
R3
DBI0
V11
DQ8
V12
DQ9
U11
DQ10
U12
DQ11
P11
DQ12
P12
DQ13
N11
DQ14
N12
DQ15
T12
EDC1
R12
DBI1
T4
WCK01
T5
WCK01
M9C
GND
@memory.u_mem_gddr5x_x32(sym_7):page7_i573
BGA190_MIRR
COMMON
Mirrored
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
add 1k to VDD
FBVDDQ
W12
MF
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
A13
VDDQ
A2
VDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C13
VDDQ
C14
VDDQ
C2
VDDQ
E1
VDDQ
E11
VDDQ
E13
VDDQ
E14
VDDQ
E2
VDDQ
E4
VDDQ
F10
VDDQ
F5
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
J13
VDDQ
J2
VDDQ
L13
VDDQ
L2
VDDQ
M12
VDDQ
M3
VDDQ
N13
VDDQ
N2
VDDQ
P10
VDDQ
P5
VDDQ
R1
VDDQ
R11
VDDQ
R13
VDDQ
R14
VDDQ
R2
VDDQ
R4
VDDQ
U1
VDDQ
U13
VDDQ
U14
VDDQ
U2
VDDQ
V10
VDDQ
V5
VDDQ
W13
VDDQ
W2
VDDQ
A3
VPP
W3
VPP
1V8_AON
1
2
3
M9B
M9A
{4,8}
@memory.u_mem_gddr5x_x32(sym_4):page7_i544
BGA190_MIRR
COMMON
@memory.u_mem_gddr5x_x32(sym_5):page7_i554
BGA190_MIRR
COMMON
M4
RAS
H4
CAS
H11
WE
K4
ABI
L4
A0_A10
L5
A1_A9
L11
A2_BA0
L10
A3_BA3
J11
A4_BA2
J10
A5_BA1
J5
A6_A11
J4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
M11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
{8}
K13
VREFC
H13
ZQ
4
FBVDDQ
C813
10uF
4V
20%
X6S
0603
COMMON
FBVDDQ
C724
22uF
4V
20%
X6S
0603W
COMMON
5
{4,8}
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
IN
C751
10uF
4V
20%
X6S
0603
COMMON
C793
22uF
4V
20%
X6S
0603W
COMMON
FB_DBI
FBB_DBI[7..0]
CLOSE DRAM
C722
10uF
4V
20%
X6S
0603
COMMON
C786
22uF
4V
20%
X6S
0603W
COMMON
C790
10uF
4V
20%
X6S
0603
COMMON
C755
22uF
4V
20%
X6S
0603W
COMMON
C803
C829
C744
C718
1uF
1uF
6.3V
10%
X6S
0402
COMMON
C703
22uF
4V
20%
X6S
0603W
COMMON
FBB_DBI0
0
FBB_DBI1
1
FBB_DBI2
2
FBB_DBI3
3
FBB_DBI4
4
FBB_DBI5
5
FBB_DBI6
6
FBB_DBI7
7
6.3V
10%
X6S
0402
COMMON
C730
10uF
4V
20%
X6S
0603
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C820
10uF
4V
20%
X6S
0603
COMMON
GND
{4,8}
1uF
6.3V
10%
X6S
0402
COMMON
C731
1uF
6.3V
10%
X6S
0402
COMMON
FBVDDQ
UNDER DRAM FOR X32AROUND DRAM
C827
1uF
6.3V
10%
X6S
0402
COMMON
FB_EDC
FBB_EDC[7..0]
OUT
C771
1uF
6.3V
10%
X6S
0402
COMMON
C756
1uF
6.3V
10%
X6S
0402
COMMON
C814
1uF
6.3V
10%
X6S
0402
COMMON
C806
1uF
6.3V
10%
X6S
0402
COMMON
C765
C802
1uF
6.3V
10%
X6S
0402
COMMON
C761
1uF
6.3V
10%
X6S
0402
COMMON
C715
1uF
6.3V
10%
X6S
0402
COMMON
GND
C781
C757
1uF
6.3V
10%
X6S
0402
COMMON
C762
1uF
6.3V
10%
X6S
0402
COMMON
GND
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C750
1uF
6.3V
10%
X6S
0402
COMMON
FBB_EDC0
0
FBB_EDC1
1
FBB_EDC2
2
FBB_EDC3
3
FBB_EDC4
4
FBB_EDC5
5
FBB_EDC6
6
FBB_EDC7
7
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBB PARTITION[31:0]
1V8_AON
C269
C1471
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
GND
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBB Partition 31..0
MEMORY: FBB Partition 31..0
MEMORY: FBB Partition 31..0
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
NestonV10
NestonV10
NestonV10
752Friday, March 03, 2017
752Friday, March 03, 2017
752Friday, March 03, 2017
H
of
of
of
Page 8
ABCDEFGH
Page8: MEMORY: FBB Partition 63..32
GND
M10C
@memory.u_mem_gddr5x_x32(sym_6):page8_i521
BGA190
COMMON
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
FBVDDQ
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
A13
VDDQ
A2
VDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C13
VDDQ
C14
VDDQ
C2
VDDQ
E1
VDDQ
E11
VDDQ
E13
VDDQ
E14
VDDQ
E2
VDDQ
E4
VDDQ
F10
VDDQ
F5
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
J13
VDDQ
J2
VDDQ
L13
VDDQ
L2
VDDQ
M12
VDDQ
M3
VDDQ
N13
VDDQ
N2
VDDQ
P10
VDDQ
P5
VDDQ
R1
VDDQ
R11
VDDQ
R13
VDDQ
R14
VDDQ
R2
VDDQ
R4
VDDQ
U1
VDDQ
U13
VDDQ
U14
VDDQ
U2
VDDQ
V10
VDDQ
V5
VDDQ
W13
VDDQ
W2
VDDQ
A3
VPP
W3
VPP
1V8_AON
1
2
3
1
2
FBB_D[63..32]
BI
M10D
@memory.u_mem_gddr5x_x32(sym_1):page8_i466
BGA190
COMMON
FBB_D32
32
FBB_D33
33
FBB_D34
34
FBB_D35
35
FBB_D36
36
FBB_D37
37
FBB_D38
38
FBB_D39
39
FBB_EDC4
FBB_DBI4
FBB_D40
40
FBB_D41
41
FBB_D42
42
FBB_D43
43
FBB_D44
44
FBB_D45
45
FBB_D46
46
FBB_D47
47
FBB_EDC5
FBB_DBI5
{4}
{4}
FBB_WCK45
IN
FBB_WCK45*
IN
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
x16
B11
DQ8
NC
B12
DQ9
NC
C11
DQ10
NC
C12
DQ11
NC
F11
DQ12
NC
F12
DQ13
NC
G11
DQ14
NC
G12
DQ15
NC
D12
EDC1
GND
E12
DBI1
NC
D4
WCK01
D5
WCK01
{4}
{4}
FBB_D48
48
FBB_D49
49
FBB_D50
50
FBB_D51
51
FBB_D52
52
FBB_D53
53
FBB_D54
54
FBB_D55
55
FBB_EDC6
FBB_DBI6
FBB_D56
56
FBB_D57
57
FBB_D58
58
FBB_D59
59
FBB_D60
60
FBB_D61
61
FBB_D62
62
FBB_D63
63
FBB_EDC7
FBB_DBI7
FBB_WCK67
IN
FBB_WCK67*
IN
M10A
@memory.u_mem_gddr5x_x32(sym_3):page8_i496
BGA190
COMMON
NORMAL
V11
DQ16
V12
DQ17
U11
DQ18
U12
DQ19
P11
DQ20
P12
DQ21
N11
DQ22
N12
DQ23
T12
EDC2
R12
DBI2
x32
x16
V4
DQ24
V3
DQ25
U4
DQ26
U3
DQ27
P4
DQ28
P3
DQ29
N4
DQ30
N3
DQ31
T3
EDC3
R3
DBI3
T4
WCK23
T5
WCK23
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
{4,7}
{4}
{4}
{7}
IN
3
IN
IN
IN
C100
820pF
50V
10%
X7R
0402
COMMON
GNDGND
FBB_CMD[31..0]
FBB_VREFC
FBB_CLK1
FBB_CLK1*
R105
M10B
@memory.u_mem_gddr5x_x32(sym_5):page8_i509
BGA190
FBB_CMD18
18
FBB_CMD16
16
FBB_CMD31
31
FBB_CMD22
22
FBB_CMD20
20
FBB_CMD19
19
FBB_CMD28
28
FBB_CMD27
27
FBB_CMD25
25
FBB_CMD26
26
FBB_CMD23
23
FBB_CMD24
24
FBB_CMD21
21
FBB_CMD30
30
FBB_CMD17
17
FBB_CMD29
29
121ohm
COMMON0402
1 %
FBB_ZQ_2
COMMON
H4
RAS
M4
CAS
M11
WE
K4
ABI
J4
A0_A10
J5
A1_A9
J11
A2_BA0
J10
A3_BA3
L11
A4_BA2
L10
A5_BA1
L5
A6_A11
L4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
H11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
K13
VREFC
H13
ZQ
4
FBVDDQ
C819
10uF
4V
20%
X6S
0603
COMMON
FBVDDQ
C740
22uF
4V
20%
X6S
0603W
COMMON
5
{4,7}
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
IN
CLOSE DRAM
C782
10uF
4V
20%
X6S
0603
COMMON
C818
22uF
4V
20%
X6S
0603W
COMMON
FB_DBI
FBB_DBI[7..0]
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
AROUND DRAMUNDER DRAM FOR X32
C708
C732
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
0
1
2
3
4
5
6
7
C707
C710
FBB_DBI0
FBB_DBI1
FBB_DBI2
FBB_DBI3
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7
C798
1uF
6.3V
10%
X6S
0402
COMMON
C739
22uF
4V
20%
X6S
0603W
COMMON
C797
1uF
6.3V
10%
X6S
0402
COMMON
C816
10uF
4V
20%
X6S
0603
COMMON
C795
C763
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
FBVDDQ
C821
10uF
4V
20%
X6S
0603
COMMON
GND
{4,7}
OUT
C736
1uF
6.3V
10%
X6S
0402
COMMON
C778
1uF
6.3V
10%
X6S
0402
COMMON
FB_EDC
FBB_EDC[7..0]
C830
1uF
6.3V
10%
X6S
0402
COMMON
C807
1uF
6.3V
10%
X6S
0402
COMMON
C719
C789
1uF
6.3V
10%
X6S
0402
COMMON
C775
1uF
6.3V
10%
X6S
0402
COMMON
C749
1uF
6.3V
10%
X6S
0402
COMMON
GND
C746
C784
1uF
6.3V
10%
X6S
0402
COMMON
C764
1uF
6.3V
10%
X6S
0402
COMMON
GND
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C748
1uF
6.3V
10%
X6S
0402
COMMON
FBB_EDC0
0
FBB_EDC1
1
FBB_EDC2
2
FBB_EDC3
3
FBB_EDC4
4
FBB_EDC5
5
FBB_EDC6
6
FBB_EDC7
7
C808
1uF
6.3V
10%
X6S
0402
COMMON
C777
1uF
6.3V
10%
X6S
0402
COMMON
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBB PARTITION[63:31]
1V8_AON
C270
C1472
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
GND
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheetof
Date:Sheetof
Date:Sheetof
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
Table of Contents
Table of Contents
Table of Contents
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
NestonV10
NestonV10
NestonV10
852Friday, March 03, 2017
852Friday, March 03, 2017
852Friday, March 03, 2017
H
Page 9
ABCDEFGH
Page9: MEMORY: GPU Partition C/D
1
{10,11}
2
3
4
{10,11}
{10,11}
FB_DATA
FBC_D[63..0]
BI
FB_DBI
FBC_DBI[7..0]
IN
FB_EDC
FBC_EDC[7..0]
OUT
FBC_D0
0
FBC_D1
1
FBC_D2
2
FBC_D3
3
FBC_D4
4
FBC_D5
5
FBC_D6
6
FBC_D7
7
FBC_D8
8
FBC_D9
9
FBC_D10
10
FBC_D11
11
FBC_D12
12
FBC_D13
13
FBC_D14
14
FBC_D15
15
FBC_D16
16
FBC_D17
17
FBC_D18
18
FBC_D19
19
FBC_D20
20
FBC_D21
21
FBC_D22
22
FBC_D23
23
FBC_D24
24
FBC_D25
25
FBC_D26
26
FBC_D27
27
FBC_D28
28
FBC_D29
29
FBC_D30
30
FBC_D31
31
FBC_D32
32
FBC_D33
33
FBC_D34
34
FBC_D35
35
FBC_D36
36
FBC_D37
37
FBC_D38
38
FBC_D39
39
FBC_D40
40
FBC_D41
41
FBC_D42
42
FBC_D43
43
FBC_D44
44
FBC_D45
45
FBC_D46
46
FBC_D47
47
FBC_D48
48
FBC_D49
49
FBC_D50
50
FBC_D51
51
FBC_D52
52
FBC_D53
53
FBC_D54
54
FBC_D55
55
FBC_D56
56
FBC_D57
57
FBC_D58
58
FBC_D59
59
FBC_D60
60
FBC_D61
61
FBC_D62
62
FBC_D63
63
FBC_DBI0
0
FBC_DBI1
1
FBC_DBI2
2
FBC_DBI3
3
FBC_DBI4
4
FBC_DBI5
5
FBC_DBI6
6
FBC_DBI7
7
FBC_EDC0
0
FBC_EDC1
1
FBC_EDC2
2
FBC_EDC3
3
FBC_EDC4
4
FBC_EDC5
5
FBC_EDC6
6
FBC_EDC7
7
G1D
@digital.u_gpu_gb3c_384(sym_4):page9_i601
BGA2397
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
COMMON
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
{4,9,14,29}
R353
10k
5 %
0402
COMMON
R354
10k
5 %
0402
COMMON
ASSEMBLY
PAGE DETAIL
BI
FBVDDQ
FBVDDQ
nv_res
R355
10k
5 %
0402
COMMON
nv_res
R356
10k
5 %
0402
COMMON
GND
<ASSEMBLY_DESCRIPTION>
MEMORY: GPU PARTITION C/D
{10,11}BI{12,13}
GDDR5X CMD Mapping
CMD
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30
CMD31
CMD32
CMD33
CMD34
CMD35
{10}
{10}
{11}
{11}
{10}
{10}
{10}
{10}
{11}
{11}
{11}
{11}
{12,13}
{12,13}
CAS*
RST*
RAS*
A1_A9
A0_A10
A12_A13
ABI*
A6_A11
A7_A8
A4_BA2
A5_BA1
A3_BA3
A2_BA0
CKE*
A14_A15
WE*
DBG0
DBG1
32..630..31
CAS*
RST*
RAS*
A1_A9
A0_A10
A12_A13
ABI*
A6_A11
A7_A8
A4_BA2
A5_BA1
A3_BA3
A2_BA0
CKE*
A14_A15
WE*
DBG0
DBG1
FBD_CMD13
FBD_CMD29
FBD_CMD1
FBD_CMD17
FB_DATA
FBD_D[63..0]
OUT
OUT
FB_DBI
FBD_DBI[7..0]
FB_EDC
FBD_EDC[7..0]
nv_res
nv_res
R344
10k
5 %
0402
COMMON
R357
10k
5 %
0402
COMMON
FBVDDQ
G1E
@digital.u_gpu_gb3c_384(sym_5):page9_i602
BGA2397
COMMON
@memory.u_mem_gddr5x_x32(sym_4):page10_i544
BGA190_MIRR
COMMON
MIRRORED
x32
x16
DQ16
NC
DQ17
NC
DQ18
NC
DQ19
NC
DQ20
NC
DQ21
NC
DQ22
NC
DQ23
NC
EDC2
GND
DBI2
NC
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
AO3416L
M7D
@memory.u_mem_gddr5x_x32(sym_2):page10_i510
BGA190_MIRR
COMMON
MIRRORED
x32
FBC_D0
0
FBC_D1
1
FBC_D2
2
FBC_D3
3
FBC_D4
4
FBC_D5
5
FBC_D6
6
FBC_D7
7
FBC_EDC0
FBC_DBI0
FBC_D8
8
FBC_D9
9
FBC_D10
10
FBC_D11
11
FBC_D12
12
FBC_D13
13
FBC_D14
14
FBC_D15
15
FBC_EDC1
FBC_DBI1
FBC_WCK01
IN
FBC_WCK01*
IN
x16
V4
DQ0
NC
V3
DQ1
NC
U4
DQ2
NC
U3
DQ3
NC
P4
DQ4
NC
P3
DQ5
NC
N4
DQ6
NC
N3
DQ7
NC
T3
EDC0
NC
R3
DBI0
NC
V11
DQ8
V12
DQ9
U11
DQ10
U12
DQ11
P11
DQ12
P12
DQ13
N11
DQ14
N12
DQ15
T12
EDC1
R12
DBI1
T4
WCK01
T5
WCK01
{5,7,12,15,17,27}
{9}
{9}
IN
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
GPIO10_FBVREF_SEL
IN
IN
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_EDC2
FBC_DBI2
FBC_EDC3
FBC_DBI3
FBC_WCK23
FBC_WCK23*
1G1D1S
3
{9,11}
{9}
{9}
FBC_VREF_Q
0.300
FBVDDQ
R78
549ohm
1 %
0402
COMMON
R75
1.33k
1 %
0402
COMMON
GND
FBC_CMD[31..0]
IN
FBC_CLK0
IN
FBC_CLK0*
IN
R79
931ohm
1 %
0402
COMMON
0.300
C78
820pF
50V
10%
X7R
0402
COMMON
GNDGND
2
0
15
6
4
3
12
11
9
10
7
8
5
14
1
13
R74 121ohm
0402
1 %
FBC_CMD2
FBC_CMD0
FBC_CMD15
FBC_CMD6
FBC_CMD4
FBC_CMD3
FBC_CMD12
FBC_CMD11
FBC_CMD9
FBC_CMD10
FBC_CMD7
FBC_CMD8
FBC_CMD5
FBC_CMD14
FBC_CMD1
FBC_CMD13
0.140A
COMMON
OUT
FBC_VREFC
FBC_ZQ_1
@memory.u_mem_gddr5x_x32(sym_5):page10_i559
BGA190_MIRR
COMMON
M4
RAS
H4
CAS
H11
WE
K4
ABI
L4
A0_A10
L5
A1_A9
L11
A2_BA0
L10
A3_BA3
J11
A4_BA2
J10
A5_BA1
J5
A6_A11
J4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
M11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
{11}
K13
VREFC
H13
ZQ
4
FBVDDQ
C948
10uF
4V
20%
X6S
0603
COMMON
FBVDDQ
C881
22uF
4V
20%
X6S
0603W
COMMON
5
{9,11}
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
OUT
CLOSE DRAM
C888
C1003
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
AROUND DRAMUNDER DRAM FOR X32
C924
C939
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
FB_DBI
FBC_DBI[7..0]
C1089
10uF
4V
20%
X6S
0603
COMMON
C1005
22uF
4V
20%
X6S
0603W
COMMON
C1001
C890
C1000
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C937
C916
22uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603W
COMMON
COMMON
{9,11}
FBC_DBI0
0
FBC_DBI1
1
FBC_DBI2
2
FBC_DBI3
3
FBC_DBI4
4
FBC_DBI5
5
FBC_DBI6
6
FBC_DBI7
7
C883
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
FBVDDQ
C880
10uF
4V
20%
X6S
0603
COMMON
GND
OUT
C921
1uF
6.3V
10%
X6S
0402
COMMON
C952
1uF
6.3V
10%
X6S
0402
COMMON
FB_EDC
FBC_EDC[7..0]
C1002
1uF
6.3V
10%
X6S
0402
COMMON
C945
1uF
6.3V
10%
X6S
0402
COMMON
C982
C915
1uF
6.3V
10%
X6S
0402
COMMON
C837
1uF
6.3V
10%
X6S
0402
COMMON
C914
1uF
6.3V
10%
X6S
0402
COMMON
GND
C838
C852
1uF
6.3V
10%
X6S
0402
COMMON
C864
1uF
6.3V
10%
X6S
0402
COMMON
GND
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C884
1uF
6.3V
10%
X6S
0402
COMMON
FBC_EDC0
0
FBC_EDC1
1
FBC_EDC2
2
FBC_EDC3
3
FBC_EDC4
4
FBC_EDC5
5
FBC_EDC6
6
FBC_EDC7
7
C999
1uF
6.3V
10%
X6S
0402
COMMON
C886
1uF
6.3V
10%
X6S
0402
COMMON
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBC PARTITION[31:0]
1V8_AON
C271
C272
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
GND
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheetof
Date:Sheetof
Date:Sheetof
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBC Partition 31..0
MEMORY: FBC Partition 31..0
MEMORY: FBC Partition 31..0
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
NestonV10
NestonV10
NestonV10
1052Friday, March 03, 2017
1052Friday, March 03, 2017
1052Friday, March 03, 2017
H
Page 11
ABCDEFGH
Page11: MEMORY: FBC Partition 63..32
GND
M8C
@memory.u_mem_gddr5x_x32(sym_6):page11_i521
BGA190
COMMON
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
FBVDDQ
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
A13
VDDQ
A2
VDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C13
VDDQ
C14
VDDQ
C2
VDDQ
E1
VDDQ
E11
VDDQ
E13
VDDQ
E14
VDDQ
E2
VDDQ
E4
VDDQ
F10
VDDQ
F5
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
J13
VDDQ
J2
VDDQ
L13
VDDQ
L2
VDDQ
M12
VDDQ
M3
VDDQ
N13
VDDQ
N2
VDDQ
P10
VDDQ
P5
VDDQ
R1
VDDQ
R11
VDDQ
R13
VDDQ
R14
VDDQ
R2
VDDQ
R4
VDDQ
U1
VDDQ
U13
VDDQ
U14
VDDQ
U2
VDDQ
V10
VDDQ
V5
VDDQ
W13
VDDQ
W2
VDDQ
A3
VPP
W3
VPP
1V8_AON
1
2
3
{9,10}
{9}
1
2
FBC_D[63..32]
BI
M8D
@memory.u_mem_gddr5x_x32(sym_1):page11_i466
BGA190
COMMON
FBC_D32
32
FBC_D33
33
FBC_D34
34
FBC_D35
35
FBC_D36
36
FBC_D37
37
FBC_D38
38
FBC_D39
39
FBC_EDC4
FBC_DBI4
FBC_D40
40
FBC_D41
41
FBC_D42
42
FBC_D43
43
FBC_D44
44
FBC_D45
45
FBC_D46
46
FBC_D47
47
FBC_EDC5
FBC_DBI5
{9}
{9}
FBC_WCK45
IN
FBC_WCK45*
IN
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
x16
B11
DQ8
NC
B12
DQ9
NC
C11
DQ10
NC
C12
DQ11
NC
F11
DQ12
NC
F12
DQ13
NC
G11
DQ14
NC
G12
DQ15
NC
D12
EDC1
GND
E12
DBI1
NC
D4
WCK01
D5
WCK01
{9}
{9}
FBC_D48
48
FBC_D49
49
FBC_D50
50
FBC_D51
51
FBC_D52
52
FBC_D53
53
FBC_D54
54
FBC_D55
55
FBC_EDC6
FBC_DBI6
FBC_D56
56
FBC_D57
57
FBC_D58
58
FBC_D59
59
FBC_D60
60
FBC_D61
61
FBC_D62
62
FBC_D63
63
FBC_EDC7
FBC_DBI7
FBC_WCK67
IN
FBC_WCK67*
IN
M8A
@memory.u_mem_gddr5x_x32(sym_3):page11_i498
BGA190
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
OUT
CLOSE DRAM
C841
C840
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
AROUND DRAMUNDER DRAM FOR X32
C831
C832
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
FB_DBI
FBC_DBI[7..0]
C836
10uF
4V
20%
X6S
0603
COMMON
C833
22uF
4V
20%
X6S
0603W
COMMON
C868
C850
C844
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C873
C867
22uF
10uF
4V
4V
20%
20%
X6S
X6S
0603W
0603
COMMON
COMMON
{9,10}
FBC_DBI0
0
FBC_DBI1
1
FBC_DBI2
2
FBC_DBI3
3
FBC_DBI4
4
FBC_DBI5
5
FBC_DBI6
6
FBC_DBI7
7
C874
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
FBVDDQ
C869
10uF
4V
20%
X6S
0603
COMMON
GND
OUT
C851
1uF
6.3V
10%
X6S
0402
COMMON
C842
1uF
6.3V
10%
X6S
0402
COMMON
FB_EDC
FBC_EDC[7..0]
C835
1uF
6.3V
10%
X6S
0402
COMMON
C834
1uF
6.3V
10%
X6S
0402
COMMON
C871
1uF
6.3V
10%
X6S
0402
COMMON
C847
1uF
6.3V
10%
X6S
0402
COMMON
C870
1uF
6.3V
10%
X6S
0402
COMMON
C845
1uF
6.3V
10%
X6S
0402
COMMON
FBC_EDC0
0
FBC_EDC1
1
FBC_EDC2
2
FBC_EDC3
3
FBC_EDC4
4
FBC_EDC5
5
FBC_EDC6
6
FBC_EDC7
7
C839
1uF
6.3V
10%
X6S
0402
COMMON
C887
1uF
6.3V
10%
X6S
0402
COMMON
C843
1uF
6.3V
10%
X6S
0402
COMMON
GND
C962
1uF
6.3V
10%
X6S
0402
COMMON
C899
1uF
6.3V
10%
X6S
0402
COMMON
GND
C983
1uF
6.3V
10%
X6S
0402
COMMON
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBC PARTITION[63:32]
1V8_AON
C273
C274
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
GND
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheetof
Date:Sheetof
Date:Sheetof
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBC Partition 63..32
MEMORY: FBC Partition 63..32
MEMORY: FBC Partition 63..32
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
H
NestonV10
NestonV10
NestonV10
1152Friday, March 03, 2017
1152Friday, March 03, 2017
1152Friday, March 03, 2017
Page 12
ABCDEFGH
Page12: MEMORY: FBD Partition 31..0
{9}
BI
1
{9}
2
{9}
3
FBD_D[31..0]
FBD_D0
0
FBD_D1
1
FBD_D2
2
FBD_D3
3
FBD_D4
4
FBD_D5
5
FBD_D6
6
FBD_D7
7
FBD_D8
8
FBD_D9
9
FBD_D10
10
FBD_D11
11
FBD_D12
12
FBD_D13
13
FBD_D14
14
FBD_D15
15
IN
IN
FBD_EDC0
FBD_DBI0
FBD_EDC1
FBD_DBI1
FBD_WCK01
FBD_WCK01*
M5D
@memory.u_mem_gddr5x_x32(sym_2):page12_i511
BGA190_MIRR
COMMON
MIRRORED
x32
x16
V4
DQ0
NC
V3
DQ1
NC
U4
DQ2
NC
U3
DQ3
NC
P4
DQ4
NC
P3
DQ5
NC
N4
DQ6
NC
N3
DQ7
NC
T3
EDC0
NC
R3
DBI0
NC
V11
DQ8
V12
DQ9
U11
DQ10
U12
DQ11
P11
DQ12
P12
DQ13
N11
DQ14
N12
DQ15
T12
EDC1
R12
DBI1
T4
WCK01
T5
WCK01
{5,7,10,15,17,27}
M5A
@memory.u_mem_gddr5x_x32(sym_4):page12_i550
BGA190_MIRR
COMMON
MIRRORED
x32
FBD_D16
16
FBD_D17
17
FBD_D18
18
FBD_D19
19
FBD_D20
20
FBD_D21
21
FBD_D22
22
FBD_D23
23
FBD_EDC2
FBD_DBI2
FBD_D24
24
FBD_D25
25
FBD_D26
26
FBD_D27
27
FBD_D28
28
FBD_D29
29
FBD_D30
30
FBD_D31
31
FBD_EDC3
FBD_DBI3
{9}
{9}
IN
IN
IN
GPIO10_FBVREF_SEL
FBD_WCK23
FBD_WCK23*
B11
B12
C11
C12
F11
F12
G11
G12
D12
E12
B4
B3
C4
C3
F4
F3
G4
G3
D3
E3
D4
D5
1G1D1S
G
1
x16
DQ16
NC
DQ17
NC
DQ18
NC
DQ19
NC
DQ20
NC
DQ21
NC
DQ22
NC
DQ23
NC
EDC2
GND
DBI2
NC
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
3
D
Q7
@discrete.q_fet_n_enh(sym_2):page12_i588
SOT323_1G1D1S
COMMON
S
2
AO3416L
30V
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
1.2A
0.2W
12V
SOT23
GND
{9,13}
{9}
{9}
FBD_VREF_Q
0.300
FBVDDQ
R65
549ohm
1 %
0402
COMMON
R62
1.33k
1 %
0402
COMMON
GND
FBD_CMD[31..0]
IN
FBD_CLK0
IN
FBD_CLK0*
IN
R66
931ohm
1 %
0402
COMMON
0.300
C74
820pF
50V
10%
X7R
0402
COMMON
GNDGND
FBD_CMD2
2
FBD_CMD0
0
FBD_CMD15
15
FBD_CMD6
6
FBD_CMD4
4
FBD_CMD3
3
FBD_CMD12
12
FBD_CMD11
11
FBD_CMD9
9
FBD_CMD10
10
FBD_CMD7
7
FBD_CMD8
8
FBD_CMD5
5
FBD_CMD14
14
FBD_CMD1
1
FBD_CMD13
13
OUT
FBD_VREFC
0.140A
FBD_ZQ_1
R61
121ohm
COMMON
0402
1 %
M5B
@memory.u_mem_gddr5x_x32(sym_5):page12_i541
BGA190_MIRR
COMMON
M4
RAS
H4
CAS
H11
WE
K4
ABI
L4
A0_A10
L5
A1_A9
L11
A2_BA0
L10
A3_BA3
J11
A4_BA2
J10
A5_BA1
J5
A6_A11
J4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
M11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
{13}
K13
VREFC
H13
ZQ
GND
M5C
@memory.u_mem_gddr5x_x32(sym_7):page12_i574
BGA190_MIRR
COMMON
Mirrored
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
add 1k to VDD
FBVDDQ
W12
MF
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
A13
VDDQ
A2
VDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C13
VDDQ
C14
VDDQ
C2
VDDQ
E1
VDDQ
E11
VDDQ
E13
VDDQ
E14
VDDQ
E2
VDDQ
E4
VDDQ
F10
VDDQ
F5
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
J13
VDDQ
J2
VDDQ
L13
VDDQ
L2
VDDQ
M12
VDDQ
M3
VDDQ
N13
VDDQ
N2
VDDQ
P10
VDDQ
P5
VDDQ
R1
VDDQ
R11
VDDQ
R13
VDDQ
R14
VDDQ
R2
VDDQ
R4
VDDQ
U1
VDDQ
U13
VDDQ
U14
VDDQ
U2
VDDQ
V10
VDDQ
V5
VDDQ
W13
VDDQ
W2
VDDQ
A3
VPP
W3
VPP
1V8_AON
1
2
3
4
FBVDDQ
C1217
10uF
4V
20%
X6S
0603
COMMON
FBVDDQ
C1173
22uF
4V
20%
X6S
0603W
COMMON
5
{9,13}
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
OUT
CLOSE DRAM
FB_DBI
FBD_DBI[7..0]
C1212
10uF
4V
20%
X6S
0603
COMMON
C1221
22uF
4V
20%
X6S
0603W
COMMON
C1220
10uF
4V
20%
X6S
0603
COMMON
C1201
22uF
4V
20%
X6S
0603W
COMMON
C1175
C1197
C1194
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C1180
C1200
22uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603W
COMMON
COMMON
{9,13}
FBD_DBI0
0
FBD_DBI1
1
FBD_DBI2
2
FBD_DBI3
3
FBD_DBI4
4
FBD_DBI5
5
FBD_DBI6
6
FBD_DBI7
7
C1218
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C1216
10uF
4V
20%
X6S
0603
COMMON
GND
C1210
10uF
4V
20%
X6S
0603
COMMON
AROUND DRAMUNDER DRAM FOR X32
C1181
22uF
4V
20%
X6S
0603W
COMMON
C1214
C1208
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
FBVDDQ
C1174
C1209
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
FB_EDC
FBD_EDC[7..0]
OUT
C1207
1uF
6.3V
10%
X6S
0402
COMMON
C1196
1uF
6.3V
10%
X6S
0402
COMMON
C1215
C1176
1uF
6.3V
10%
X6S
0402
COMMON
C1046
1uF
6.3V
10%
X6S
0402
COMMON
C1219
1uF
6.3V
10%
X6S
0402
COMMON
GND
C1112
1uF
6.3V
10%
X6S
0402
COMMON
C1149
1uF
6.3V
10%
X6S
0402
COMMON
GND
C1045
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C1195
1uF
6.3V
10%
X6S
0402
COMMON
FBD_EDC0
0
FBD_EDC1
1
FBD_EDC2
2
FBD_EDC3
3
FBD_EDC4
4
FBD_EDC5
5
FBD_EDC6
6
FBD_EDC7
7
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBD PARTITION[31:0]
1V8_AON
C275
C284
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
GND
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheetof
Date:Sheetof
Date:Sheetof
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBD Partition 31..0
MEMORY: FBD Partition 31..0
MEMORY: FBD Partition 31..0
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
NestonV10
NestonV10
NestonV10
1252Friday, March 03, 2017
1252Friday, March 03, 2017
1252Friday, March 03, 2017
H
Page 13
ABCDEFGH
Page13: MEMORY: FBD Partition 63..32
{9}
1
2
3
FBD_D[63..32]
BI
M6D
@memory.u_mem_gddr5x_x32(sym_1):page13_i466
BGA190
COMMON
FBD_D32
32
FBD_D33
33
FBD_D34
34
FBD_D35
35
FBD_D36
36
FBD_D37
37
FBD_D38
38
FBD_D39
39
FBD_EDC4
FBD_DBI4
FBD_D40
40
FBD_D41
41
FBD_D42
42
FBD_D43
43
FBD_D44
44
FBD_D45
45
FBD_D46
46
FBD_D47
47
FBD_EDC5
FBD_DBI5
{9}
{9}
FBD_WCK45
IN
FBD_WCK45*
IN
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
x16
B11
DQ8
NC
B12
DQ9
NC
C11
DQ10
NC
C12
DQ11
NC
F11
DQ12
NC
F12
DQ13
NC
G11
DQ14
NC
G12
DQ15
NC
D12
EDC1
GND
E12
DBI1
NC
D4
WCK01
D5
WCK01
{9}
{9}
FBD_D48
48
FBD_D49
49
FBD_D50
50
FBD_D51
51
FBD_D52
52
FBD_D53
53
FBD_D54
54
FBD_D55
55
FBD_EDC6
FBD_DBI6
FBD_D56
56
FBD_D57
57
FBD_D58
58
FBD_D59
59
FBD_D60
60
FBD_D61
61
FBD_D62
62
FBD_D63
63
FBD_EDC7
FBD_DBI7
FBD_WCK67
IN
FBD_WCK67*
IN
M6A
@memory.u_mem_gddr5x_x32(sym_3):page13_i500
BGA190
COMMON
NORMAL
V11
DQ16
V12
DQ17
U11
DQ18
U12
DQ19
P11
DQ20
P12
DQ21
N11
DQ22
N12
DQ23
T12
EDC2
R12
DBI2
x32
V4
DQ24
V3
DQ25
U4
DQ26
U3
DQ27
P4
DQ28
P3
DQ29
N4
DQ30
N3
DQ31
T3
EDC3
R3
DBI3
T4
WCK23
T5
WCK23
{9,12}
x16
NC
NC
NC
NC
NC
NC
NC
NC
{9}
{9}
NC
NC
{12}
IN
IN
IN
IN
C77
820pF
50V
10%
X7R
0402
COMMON
GNDGND
FBD_CMD[31..0]
FBD_CLK1
FBD_CLK1*
18
16
31
22
20
19
28
27
25
26
23
24
21
30
17
29
R69 121ohm
COMMON0402
1 %
FBD_CMD18
FBD_CMD16
FBD_CMD31
FBD_CMD22
FBD_CMD20
FBD_CMD19
FBD_CMD28
FBD_CMD27
FBD_CMD25
FBD_CMD26
FBD_CMD23
FBD_CMD24
FBD_CMD21
FBD_CMD30
FBD_CMD17
FBD_CMD29
FBD_VREFC
FBD_ZQ_2
M6B
@memory.u_mem_gddr5x_x32(sym_5):page13_i496
BGA190
COMMON
H4
RAS
M4
CAS
M11
WE
K4
ABI
J4
A0_A10
J5
A1_A9
J11
A2_BA0
J10
A3_BA3
L11
A4_BA2
L10
A5_BA1
L5
A6_A11
L4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
H11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
K13
VREFC
H13
ZQ
GND
M6C
@memory.u_mem_gddr5x_x32(sym_6):page13_i521
BGA190
COMMON
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
FBVDDQ
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
A13
VDDQ
A2
VDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C13
VDDQ
C14
VDDQ
C2
VDDQ
E1
VDDQ
E11
VDDQ
E13
VDDQ
E14
VDDQ
E2
VDDQ
E4
VDDQ
F10
VDDQ
F5
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
J13
VDDQ
J2
VDDQ
L13
VDDQ
L2
VDDQ
M12
VDDQ
M3
VDDQ
N13
VDDQ
N2
VDDQ
P10
VDDQ
P5
VDDQ
R1
VDDQ
R11
VDDQ
R13
VDDQ
R14
VDDQ
R2
VDDQ
R4
VDDQ
U1
VDDQ
U13
VDDQ
U14
VDDQ
U2
VDDQ
V10
VDDQ
V5
VDDQ
W13
VDDQ
W2
VDDQ
A3
VPP
W3
VPP
1V8_AON
1
2
3
4
FBVDDQ
C1118
10uF
4V
20%
X6S
0603
COMMON
FBVDDQ
C1166
22uF
4V
20%
X6S
0603W
COMMON
5
{9,12}
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
OUT
FB_DBI
FBD_DBI[7..0]
C1068
10uF
4V
20%
X6S
0603
COMMON
C1168
22uF
4V
20%
X6S
0603W
COMMON
CLOSE DRAM
C1165
10uF
4V
20%
X6S
0603
COMMON
C1027
22uF
4V
20%
X6S
0603W
COMMON
C1081
10uF
4V
20%
X6S
0603
COMMON
C1109
22uF
4V
20%
X6S
0603W
COMMON
C1163
C1026
C1047
C1086
C1079
FBVDDQ
1uF
6.3V
10%
X6S
0402
COMMON
UNDER DRAM FOR X32AROUND DRAM
C1034
1uF
6.3V
10%
X6S
0402
COMMON
FB_EDC
FBD_EDC[7..0]
C1182
1uF
6.3V
10%
X6S
0402
COMMON
C1155
1uF
6.3V
10%
X6S
0402
COMMON
1uF
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C1024
C1025
22uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603W
COMMON
COMMON
{9,12}
FBD_DBI0
0
FBD_DBI1
1
FBD_DBI2
2
FBD_DBI3
3
FBD_DBI4
4
FBD_DBI5
5
FBD_DBI6
6
FBD_DBI7
7
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C1102
10uF
4V
20%
X6S
0603
COMMON
GND
OUT
C1162
1uF
6.3V
10%
X6S
0402
COMMON
C1108
1uF
6.3V
10%
X6S
0402
COMMON
C1164
C1160
1uF
6.3V
10%
X6S
0402
COMMON
C1183
1uF
6.3V
10%
X6S
0402
COMMON
C1103
1uF
6.3V
10%
X6S
0402
COMMON
GND
C1179
C1213
1uF
6.3V
10%
X6S
0402
COMMON
C1211
1uF
6.3V
10%
X6S
0402
COMMON
GND
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C1104
1uF
6.3V
10%
X6S
0402
COMMON
FBD_EDC0
0
FBD_EDC1
1
FBD_EDC2
2
FBD_EDC3
3
FBD_EDC4
4
FBD_EDC5
5
FBD_EDC6
6
FBD_EDC7
7
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBD PARTITION[63:32]
1V8_AON
GND
C276
1uF
6.3V
10%
X6S
0402
COMMON
C277
1uF
6.3V
10%
X6S
0402
COMMON
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBD Partition 63..32
MEMORY: FBD Partition 63..32
MEMORY: FBD Partition 63..32
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
H
NestonV10
NestonV10
NestonV10
of
of
of
1352Friday, March 03, 2017
1352Friday, March 03, 2017
1352Friday, March 03, 2017
Page 14
ABCDEFGH
Page14: MEMORY: GPU Partition E/F
1
{15,16}
2
3
4
{15,16}
{15,16}
FB_DATA
FBE_D[63..0]
BI
FB_DBI
FBE_DBI[7..0]
IN
FB_EDC
FBE_EDC[7..0]
OUT
FBE_D0
0
FBE_D1
1
FBE_D2
2
FBE_D3
3
FBE_D4
4
FBE_D5
5
FBE_D6
6
FBE_D7
7
FBE_D8
8
FBE_D9
9
FBE_D10
10
FBE_D11
11
FBE_D12
12
FBE_D13
13
FBE_D14
14
FBE_D15
15
FBE_D16
16
FBE_D17
17
FBE_D18
18
FBE_D19
19
FBE_D20
20
FBE_D21
21
FBE_D22
22
FBE_D23
23
FBE_D24
24
FBE_D25
25
FBE_D26
26
FBE_D27
27
FBE_D28
28
FBE_D29
29
FBE_D30
30
FBE_D31
31
FBE_D32
32
FBE_D33
33
FBE_D34
34
FBE_D35
35
FBE_D36
36
FBE_D37
37
FBE_D38
38
FBE_D39
39
FBE_D40
40
FBE_D41
41
FBE_D42
42
FBE_D43
43
FBE_D44
44
FBE_D45
45
FBE_D46
46
FBE_D47
47
FBE_D48
48
FBE_D49
49
FBE_D50
50
FBE_D51
51
FBE_D52
52
FBE_D53
53
FBE_D54
54
FBE_D55
55
FBE_D56
56
FBE_D57
57
FBE_D58
58
FBE_D59
59
FBE_D60
60
FBE_D61
61
FBE_D62
62
FBE_D63
63
FBE_DBI0
0
FBE_DBI1
1
FBE_DBI2
2
FBE_DBI3
3
FBE_DBI4
4
FBE_DBI5
5
FBE_DBI6
6
FBE_DBI7
7
FBE_EDC0
0
FBE_EDC1
1
FBE_EDC2
2
FBE_EDC3
3
FBE_EDC4
4
FBE_EDC5
5
FBE_EDC6
6
FBE_EDC7
7
G1F
@digital.u_gpu_gb3c_384(sym_6):page14_i599
BGA2397
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
BI
FBVDDQ
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
{4,9,14,29}
R337
10k
5 %
0402
COMMON
R338
10k
5 %
0402
COMMON
ASSEMBLY
PAGE DETAIL
FBVDDQ
nv_res
R359
10k
5 %
0402
COMMON
nv_res
R339
10k
5 %
0402
COMMON
GND
<ASSEMBLY_DESCRIPTION>
MEMORY: GPU PARTITION E/F
{15,16}BI{17,18}
GDDR5X CMD Mapping
CMD
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30
CMD31
CMD32
CMD33
CMD34
CMD35
{15}
{15}
{16}
{16}
{15}
{15}
{15}
{15}
{16}
{16}
{16}
{16}
{17,18}
{17,18}
CAS*
RST*
RAS*
A1_A9
A0_A10
A12_A13
ABI*
A6_A11
A7_A8
A4_BA2
A5_BA1
A3_BA3
A2_BA0
CKE*
A14_A15
WE*
DBG0
DBG1
32..630..31
CAS*
RST*
RAS*
A1_A9
A0_A10
A12_A13
ABI*
A6_A11
A7_A8
A4_BA2
A5_BA1
A3_BA3
A2_BA0
CKE*
A14_A15
WE*
DBG0
DBG1
FBF_CMD13
FBF_CMD29
FBF_CMD1
FBF_CMD17
IN
OUT
FB_DATA
FBF_D[63..0]
FB_DBI
FBF_DBI[7..0]
FB_EDC
FBF_EDC[7..0]
nv_res
nv_res
R340
10k
5 %
0402
COMMON
R341
10k
5 %
0402
COMMON
FBVDDQ
G1G
@digital.u_gpu_gb3c_384(sym_7):page14_i600
BGA2397
COMMON
@memory.u_mem_gddr5x_x32(sym_5):page15_i571
BGA190_MIRR
COMMON
M4
RAS
H4
CAS
H11
WE
K4
ABI
L4
A0_A10
L5
A1_A9
L11
A2_BA0
L10
A3_BA3
J11
A4_BA2
J10
A5_BA1
J5
A6_A11
J4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
M11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
{16}
K13
VREFC
H13
ZQ
M2C
@memory.u_mem_gddr5x_x32(sym_7):page15_i573
BGA190_MIRR
COMMON
Mirrored
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
add 1k to VDD
FBVDDQ
W12
MF
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
A13
VDDQ
A2
VDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C13
VDDQ
C14
VDDQ
C2
VDDQ
E1
VDDQ
E11
VDDQ
E13
VDDQ
E14
VDDQ
E2
VDDQ
E4
VDDQ
F10
VDDQ
F5
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
J13
VDDQ
J2
VDDQ
L13
VDDQ
L2
VDDQ
M12
VDDQ
M3
VDDQ
N13
VDDQ
N2
VDDQ
P10
VDDQ
P5
VDDQ
R1
VDDQ
R11
VDDQ
R13
VDDQ
R14
VDDQ
R2
VDDQ
R4
VDDQ
U1
VDDQ
U13
VDDQ
U14
VDDQ
U2
VDDQ
V10
VDDQ
V5
VDDQ
W13
VDDQ
W2
VDDQ
A3
VPP
W3
VPP
1V8_AON
1
2
3
4
FBVDDQ
C1338
10uF
4V
20%
X6S
0603
COMMON
FBVDDQ
C1302
22uF
4V
20%
X6S
0603W
COMMON
5
{14,16}
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
IN
C1327
10uF
4V
20%
X6S
0603
COMMON
C1345
22uF
4V
20%
X6S
0603W
COMMON
FB_DBI
FBE_DBI[7..0]
CLOSE DRAM
C1230
10uF
4V
20%
X6S
0603
COMMON
AROUND DRAM
C1342
22uF
4V
20%
X6S
0603W
COMMON
C1276
10uF
4V
20%
X6S
0603
COMMON
C1258
22uF
4V
20%
X6S
0603W
COMMON
C1300
C1249
C1240
C1320
C1244
1uF
1uF
1uF
1uF
6.3V
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C1241
C1280
22uF
10uF
4V
4V
20%
20%
X6S
X6S
0603W
0603
COMMON
COMMON
{14,16}
FBE_DBI0
0
FBE_DBI1
1
FBE_DBI2
2
FBE_DBI3
3
FBE_DBI4
4
FBE_DBI5
5
FBE_DBI6
6
FBE_DBI7
7
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C1333
10uF
4V
20%
X6S
0603
COMMON
GND
IN
1uF
6.3V
10%
X6S
0402
COMMON
FBVDDQ
UNDER DRAM FOR X32
C1229
1uF
6.3V
10%
X6S
0402
COMMON
FB_EDC
FBE_EDC[7..0]
C1238
1uF
6.3V
10%
X6S
0402
COMMON
C1307
1uF
6.3V
10%
X6S
0402
COMMON
C1288
1uF
6.3V
10%
X6S
0402
COMMON
C1313
1uF
6.3V
10%
X6S
0402
COMMON
C1275
C1270
C1255
1uF
1uF
6.3V
10%
X6S
0402
COMMON
C1254
1uF
6.3V
10%
X6S
0402
COMMON
FBE_EDC0
0
FBE_EDC1
1
FBE_EDC2
2
FBE_EDC3
3
FBE_EDC4
4
FBE_EDC5
5
FBE_EDC6
6
FBE_EDC7
7
6.3V
10%
X6S
0402
COMMON
C1287
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
GND
C1232
C1292
C1328
1uF
1uF
6.3V
10%
X6S
0402
COMMON
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
GND
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBE PARTITION[31:0]
1V8_AON
C278
C279
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
GND
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheetof
Date:Sheetof
Date:Sheetof
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBE Partition 31..0
MEMORY: FBE Partition 31..0
MEMORY: FBE Partition 31..0
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
NestonV10
NestonV10
NestonV10
1552Friday, March 03, 2017
1552Friday, March 03, 2017
1552Friday, March 03, 2017
H
Page 16
ABCDEFGH
Page16: MEMORY: FBE Partition 63..32
{14}
1
2
3
FBE_D[63..32]
BI
M1D
@memory.u_mem_gddr5x_x32(sym_1):page16_i467
BGA190
COMMON
FBE_D32
32
FBE_D33
33
FBE_D34
34
FBE_D35
35
FBE_D36
36
FBE_D37
37
FBE_D38
38
FBE_D39
39
FBE_EDC4
FBE_DBI4
FBE_D40
40
FBE_D41
41
FBE_D42
42
FBE_D43
43
FBE_D44
44
FBE_D45
45
FBE_D46
46
FBE_D47
47
FBE_EDC5
FBE_DBI5
{14}
{14}
FBE_WCK45
IN
FBE_WCK45*
IN
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
x16
B11
DQ8
NC
B12
DQ9
NC
C11
DQ10
NC
C12
DQ11
NC
F11
DQ12
NC
F12
DQ13
NC
G11
DQ14
NC
G12
DQ15
NC
D12
EDC1
GND
E12
DBI1
NC
D4
WCK01
D5
WCK01
{14}
{14}
FBE_D48
48
FBE_D49
49
FBE_D50
50
FBE_D51
51
FBE_D52
52
FBE_D53
53
FBE_D54
54
FBE_D55
55
FBE_EDC6
FBE_DBI6
FBE_D56
56
FBE_D57
57
FBE_D58
58
FBE_D59
59
FBE_D60
60
FBE_D61
61
FBE_D62
62
FBE_D63
63
FBE_EDC7
FBE_DBI7
FBE_WCK67
IN
FBE_WCK67*
IN
M1A
@memory.u_mem_gddr5x_x32(sym_3):page16_i501
BGA190
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
IN
C1337
10uF
4V
20%
X6S
0603
COMMON
C1332
22uF
4V
20%
X6S
0603W
COMMON
FB_DBI
FBE_DBI[7..0]
CLOSE DRAM
C1231
10uF
4V
20%
X6S
0603
COMMON
C1250
22uF
4V
20%
X6S
0603W
COMMON
C1272
10uF
4V
20%
X6S
0603
COMMON
C1341
22uF
4V
20%
X6S
0603W
COMMON
C1237
C1293
C1284
C1312
C1277
1uF
1uF
6.3V
10%
X6S
0402
COMMON
C1315
10uF
4V
20%
X6S
0603
COMMON
{14,15}
1uF
6.3V
10%
X6S
0402
COMMON
C1234
10uF
4V
20%
X6S
0603
COMMON
GND
6.3V
10%
X6S
0402
COMMON
C1306
22uF
4V
20%
X6S
0603W
COMMON
FBE_DBI0
0
FBE_DBI1
1
FBE_DBI2
2
FBE_DBI3
3
FBE_DBI4
4
FBE_DBI5
5
FBE_DBI6
6
FBE_DBI7
7
1uF
6.3V
10%
X6S
0402
COMMON
C1266
1uF
6.3V
10%
X6S
0402
COMMON
FBVDDQ
UNDER DRAM FOR X32AROUND DRAM
C1299
1uF
6.3V
10%
X6S
0402
COMMON
FB_EDC
FBE_EDC[7..0]
IN
1uF
6.3V
10%
X6S
0402
COMMON
C1263
1uF
6.3V
10%
X6S
0402
COMMON
C1261
1uF
6.3V
10%
X6S
0402
COMMON
C1246
1uF
6.3V
10%
X6S
0402
COMMON
C1253
1uF
6.3V
10%
X6S
0402
COMMON
C1297
1uF
6.3V
10%
X6S
0402
COMMON
C1311
1uF
6.3V
10%
X6S
0402
COMMON
GND
C1265
C1283
1uF
6.3V
10%
X6S
0402
COMMON
C1314
1uF
6.3V
10%
X6S
0402
COMMON
GND
1uF
6.3V
10%
X6S
0402
COMMON
C1269
1uF
6.3V
10%
X6S
0402
COMMON
C1331
1uF
6.3V
10%
X6S
0402
COMMON
FBE_EDC0
0
FBE_EDC1
1
FBE_EDC2
2
FBE_EDC3
3
FBE_EDC4
4
FBE_EDC5
5
FBE_EDC6
6
FBE_EDC7
7
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBE PARTITION[63:32]
1V8_AON
C280
C281
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
GND
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheetof
Date:Sheetof
Date:Sheetof
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBE Partition 63..32
MEMORY: FBE Partition 63..32
MEMORY: FBE Partition 63..32
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
H
NestonV10
NestonV10
NestonV10
1652Friday, March 03, 2017
1652Friday, March 03, 2017
1652Friday, March 03, 2017
Page 17
ABCDEFGH
Page17: MEMORY: FBF Partition 31..0
{14}
BI
1
2
{14}
{14}
3
FBF_D[31..0]
1G1D1S
G
1
M4A
@memory.u_mem_gddr5x_x32(sym_4):page17_i549
BGA190_MIRR
COMMON
MIRRORED
x32
B11
DQ16
B12
DQ17
C11
DQ18
C12
DQ19
F11
DQ20
F12
DQ21
G11
DQ22
G12
DQ23
D12
EDC2
E12
DBI2
B4
DQ24
B3
DQ25
C4
DQ26
C3
DQ27
F4
DQ28
F3
DQ29
G4
DQ30
G3
DQ31
D3
EDC3
E3
DBI3
D4
WCK23
D5
WCK23
3
D
Q6
@discrete.q_fet_n_enh(sym_2):page17_i587
SOT323_1G1D1S
COMMON
S
2
AO3416L
30V
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
1.2A
0.2W
12V
SOT23
GND
GND
M4C
@memory.u_mem_gddr5x_x32(sym_7):page17_i573
BGA190_MIRR
COMMON
Mirrored
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
add 1k to VDD
FBVDDQ
W12
MF
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
A13
VDDQ
A2
VDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C13
VDDQ
C14
VDDQ
C2
VDDQ
E1
VDDQ
E11
VDDQ
E13
VDDQ
E14
VDDQ
E2
VDDQ
E4
VDDQ
F10
VDDQ
F5
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
J13
VDDQ
J2
VDDQ
L13
VDDQ
L2
VDDQ
M12
VDDQ
M3
VDDQ
N13
VDDQ
N2
VDDQ
P10
VDDQ
P5
VDDQ
R1
VDDQ
R11
VDDQ
R13
VDDQ
R14
VDDQ
R2
VDDQ
R4
VDDQ
U1
VDDQ
U13
VDDQ
U14
VDDQ
U2
VDDQ
V10
VDDQ
V5
VDDQ
W13
VDDQ
W2
VDDQ
A3
VPP
W3
VPP
1V8_AON
M4B
x16
NC
NC
NC
NC
NC
NC
NC
NC
GND
NC
{14,18}
{14}
{14}
FBF_VREF_Q
0.300
FBVDDQ
R30
549ohm
1 %
0402
COMMON
R32
1.33k
1 %
0402
COMMON
GND
FBF_CMD[31..0]
IN
FBF_CLK0
IN
FBF_CLK0*
IN
R31
931ohm
1 %
0402
COMMON
0.300
C60
820pF
50V
10%
X7R
0402
COMMON
GNDGND
FBF_CMD2
2
FBF_CMD0
0
FBF_CMD15
15
FBF_CMD6
6
FBF_CMD4
4
FBF_CMD3
3
FBF_CMD12
12
FBF_CMD11
11
FBF_CMD9
9
FBF_CMD10
10
FBF_CMD7
7
FBF_CMD8
8
FBF_CMD5
5
FBF_CMD14
14
FBF_CMD1
1
FBF_CMD13
13
OUT
FBF_VREFC
0.140A
FBF_ZQ_1
R37
121ohm
COMMON
0402
1 %
@memory.u_mem_gddr5x_x32(sym_5):page17_i540
BGA190_MIRR
COMMON
M4
RAS
H4
CAS
H11
WE
K4
ABI
L4
A0_A10
L5
A1_A9
L11
A2_BA0
L10
A3_BA3
J11
A4_BA2
J10
A5_BA1
J5
A6_A11
J4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
M11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
{18}
K13
VREFC
H13
ZQ
1
2
3
M4D
@memory.u_mem_gddr5x_x32(sym_2):page17_i510
BGA190_MIRR
COMMON
MIRRORED
x32
FBF_D0
0
FBF_D1
1
FBF_D2
2
FBF_D3
3
FBF_D4
4
FBF_D5
5
FBF_D6
6
FBF_D7
7
FBF_EDC0
FBF_DBI0
FBF_D8
8
FBF_D9
9
FBF_D10
10
FBF_D11
11
FBF_D12
12
FBF_D13
13
FBF_D14
14
FBF_D15
15
FBF_EDC1
FBF_DBI1
FBF_WCK01
IN
FBF_WCK01*
IN
x16
V4
DQ0
NC
V3
DQ1
NC
U4
DQ2
NC
U3
DQ3
NC
P4
DQ4
NC
P3
DQ5
NC
N4
DQ6
NC
N3
DQ7
NC
T3
EDC0
NC
R3
DBI0
NC
V11
DQ8
V12
DQ9
U11
DQ10
U12
DQ11
P11
DQ12
P12
DQ13
N11
DQ14
N12
DQ15
T12
EDC1
R12
DBI1
T4
WCK01
T5
WCK01
{5,7,10,12,15,27}
{14}
{14}
IN
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
IN
IN
GPIO10_FBVREF_SEL
FBF_D24
FBF_D25
FBF_D26
FBF_D27
FBF_D28
FBF_D29
FBF_D30
FBF_D31
FBF_D16
FBF_D17
FBF_D18
FBF_D19
FBF_D20
FBF_D21
FBF_D22
FBF_D23
FBF_EDC2
FBF_DBI2
FBF_EDC3
FBF_DBI3
FBF_WCK23
FBF_WCK23*
4
FBVDDQ
C1289
10uF
4V
20%
X6S
0603
COMMON
FBVDDQ
C1259
22uF
4V
20%
X6S
0603W
COMMON
5
{14,18}
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
IN
C1235
10uF
4V
20%
X6S
0603
COMMON
C1344
22uF
4V
20%
X6S
0603W
COMMON
FB_DBI
FBF_DBI[7..0]
CLOSE DRAM
C1242
10uF
4V
20%
X6S
0603
COMMON
AROUND DRAM
C1303
22uF
4V
20%
X6S
0603W
COMMON
C1301
10uF
4V
20%
X6S
0603
COMMON
C1243
22uF
4V
20%
X6S
0603W
COMMON
C1323
C1322
C1336
C1245
C1282
1uF
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C1326
C1227
22uF
10uF
4V
4V
20%
20%
X6S
X6S
0603W
0603
COMMON
COMMON
{14,18}
FBF_DBI0
0
FBF_DBI1
1
FBF_DBI2
2
FBF_DBI3
3
FBF_DBI4
4
FBF_DBI5
5
FBF_DBI6
6
FBF_DBI7
7
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C1340
10uF
4V
20%
X6S
0603
COMMON
GND
OUT
1uF
6.3V
10%
X6S
0402
COMMON
FBVDDQ
UNDER DRAM FOR X32
C1310
1uF
6.3V
10%
X6S
0402
COMMON
FB_EDC
FBF_EDC[7..0]
C1343
1uF
6.3V
10%
X6S
0402
COMMON
C1262
1uF
6.3V
10%
X6S
0402
COMMON
C1296
1uF
6.3V
10%
X6S
0402
COMMON
C1291
1uF
6.3V
10%
X6S
0402
COMMON
C1248
1uF
6.3V
10%
X6S
0402
COMMON
C1324
1uF
6.3V
10%
X6S
0402
COMMON
FBF_EDC0
0
FBF_EDC1
1
FBF_EDC2
2
FBF_EDC3
3
FBF_EDC4
4
FBF_EDC5
5
FBF_EDC6
6
FBF_EDC7
7
C1252
1uF
6.3V
10%
X6S
0402
COMMON
C1329
1uF
6.3V
10%
X6S
0402
COMMON
C1260
1uF
6.3V
10%
X6S
0402
COMMON
GND
C1268
1uF
6.3V
10%
X6S
0402
COMMON
C1285
1uF
6.3V
10%
X6S
0402
COMMON
GND
C1274
1uF
6.3V
10%
X6S
0402
COMMON
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBF PARTITION[31:0]
1V8_AON
C1473
C282
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
GND
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheetof
Date:Sheetof
Date:Sheetof
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBF Partition 31..0
MEMORY: FBF Partition 31..0
MEMORY: FBF Partition 31..0
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
NestonV10
NestonV10
NestonV10
1752Friday, March 03, 2017
1752Friday, March 03, 2017
1752Friday, March 03, 2017
H
Page 18
ABCDEFGH
Page18: MEMORY: FBF Partition 63..32
1
{14}
2
FBF_D[63..32]
BI
M3D
@memory.u_mem_gddr5x_x32(sym_1):page18_i466
BGA190
COMMON
FBF_D32
32
FBF_D33
33
FBF_D34
34
FBF_D35
35
FBF_D36
36
FBF_D37
37
FBF_D38
38
FBF_D39
39
FBF_EDC4
FBF_DBI4
FBF_D40
40
FBF_D41
41
FBF_D42
42
FBF_D43
43
FBF_D44
44
FBF_D45
45
FBF_D46
46
FBF_D47
47
FBF_EDC5
FBF_DBI5
{14}
{14}
FBF_WCK45
IN
FBF_WCK45*
IN
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
x16
B11
DQ8
NC
B12
DQ9
NC
C11
DQ10
NC
C12
DQ11
NC
F11
DQ12
NC
F12
DQ13
NC
G11
DQ14
NC
G12
DQ15
NC
D12
EDC1
GND
E12
DBI1
NC
D4
WCK01
D5
WCK01
{14}
{14}
FBF_D48
48
FBF_D49
49
FBF_D50
50
FBF_D51
51
FBF_D52
52
FBF_D53
53
FBF_D54
54
FBF_D55
55
FBF_EDC6
FBF_DBI6
FBF_D56
56
FBF_D57
57
FBF_D58
58
FBF_D59
59
FBF_D60
60
FBF_D61
61
FBF_D62
62
FBF_D63
63
FBF_EDC7
FBF_DBI7
FBF_WCK67
IN
FBF_WCK67*
IN
M3A
@memory.u_mem_gddr5x_x32(sym_3):page18_i498
BGA190
COMMON
NORMAL
V11
DQ16
V12
DQ17
U11
DQ18
U12
DQ19
P11
DQ20
P12
DQ21
N11
DQ22
N12
DQ23
T12
EDC2
R12
DBI2
x32
x16
V4
DQ24
V3
DQ25
U4
DQ26
U3
DQ27
P4
DQ28
P3
DQ29
N4
DQ30
N3
DQ31
T3
EDC3
R3
DBI3
T4
WCK23
T5
WCK23
{14,17}
NC
NC
NC
NC
NC
NC
{14}
NC
{14}
NC
NC
NC
{17}
IN
3
FBF_CMD[31..0]
IN
FBF_CMD18
18
FBF_CMD16
16
FBF_CMD31
31
FBF_CMD22
22
FBF_CMD20
20
FBF_CMD19
19
FBF_CMD28
28
FBF_CMD27
27
FBF_CMD25
25
FBF_CMD26
26
FBF_CMD23
23
FBF_CMD24
24
FBF_CMD21
21
FBF_CMD30
30
FBF_CMD17
17
FBF_CMD29
C59
820pF
50V
10%
X7R
0402
COMMON
29
R36 121ohm
0402 COMMON
1 %
FBF_VREFC
FBF_ZQ_2
FBF_CLK1
IN
FBF_CLK1*
IN
GNDGND
M3B
@memory.u_mem_gddr5x_x32(sym_5):page18_i493
BGA190
COMMON
H4
RAS
M4
CAS
M11
WE
K4
ABI
J4
A0_A10
J5
A1_A9
J11
A2_BA0
J10
A3_BA3
L11
A4_BA2
L10
A5_BA1
L5
A6_A11
L4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
H11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
K13
VREFC
H13
ZQ
GND
M3C
@memory.u_mem_gddr5x_x32(sym_6):page18_i521
BGA190
COMMON
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
FBVDDQ
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
A13
VDDQ
A2
VDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C13
VDDQ
C14
VDDQ
C2
VDDQ
E1
VDDQ
E11
VDDQ
E13
VDDQ
E14
VDDQ
E2
VDDQ
E4
VDDQ
F10
VDDQ
F5
VDDQ
G13
VDDQ
G2
VDDQ
H12
VDDQ
H3
VDDQ
J13
VDDQ
J2
VDDQ
L13
VDDQ
L2
VDDQ
M12
VDDQ
M3
VDDQ
N13
VDDQ
N2
VDDQ
P10
VDDQ
P5
VDDQ
R1
VDDQ
R11
VDDQ
R13
VDDQ
R14
VDDQ
R2
VDDQ
R4
VDDQ
U1
VDDQ
U13
VDDQ
U14
VDDQ
U2
VDDQ
V10
VDDQ
V5
VDDQ
W13
VDDQ
W2
VDDQ
A3
VPP
W3
VPP
1V8_AON
1
2
3
4
FBVDDQ
C1325
10uF
4V
20%
X6S
0603
COMMON
FBVDDQ
C1239
22uF
4V
20%
X6S
0603W
COMMON
5
{14,17}
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
IN
C1286
10uF
4V
20%
X6S
0603
COMMON
C1233
22uF
4V
20%
X6S
0603W
COMMON
FB_DBI
FBF_DBI[7..0]
CLOSE DRAM
C1298
10uF
4V
20%
X6S
0603
COMMON
AROUND DRAM
C1339
22uF
4V
20%
X6S
0603W
COMMON
C1251
10uF
4V
20%
X6S
0603
COMMON
C1226
22uF
4V
20%
X6S
0603W
COMMON
C1319
C1257
C1295
C1279
C1335
C1334
C1330
1uF
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C1236
C1294
22uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603W
COMMON
COMMON
{14,17}
FBF_DBI0
0
FBF_DBI1
1
FBF_DBI2
2
FBF_DBI3
3
FBF_DBI4
4
FBF_DBI5
5
FBF_DBI6
6
FBF_DBI7
7
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C1225
10uF
4V
20%
X6S
0603
COMMON
GND
OUT
1uF
6.3V
10%
X6S
0402
COMMON
FBVDDQ
UNDER DRAM FOR X32
C1267
1uF
6.3V
10%
X6S
0402
COMMON
FB_EDC
FBF_EDC[7..0]
1uF
6.3V
10%
X6S
0402
COMMON
C1309
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C1273
1uF
6.3V
10%
X6S
0402
COMMON
C1308
C1256
1uF
6.3V
10%
X6S
0402
COMMON
C1305
1uF
6.3V
10%
X6S
0402
COMMON
FBF_EDC0
0
FBF_EDC1
1
FBF_EDC2
2
FBF_EDC3
3
FBF_EDC4
4
FBF_EDC5
5
FBF_EDC6
6
FBF_EDC7
7
1uF
6.3V
10%
X6S
0402
COMMON
C1290
1uF
6.3V
10%
X6S
0402
COMMON
C1321
1uF
6.3V
10%
X6S
0402
COMMON
GND
C1264
C1271
1uF
6.3V
10%
X6S
0402
COMMON
C1318
1uF
6.3V
10%
X6S
0402
COMMON
GND
1uF
6.3V
10%
X6S
0402
COMMON
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBF PARTITION[63:32]
1V8_AON
GND
C283
1uF
6.3V
10%
X6S
0402
COMMON
C1474
1uF
6.3V
10%
X6S
0402
COMMON
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheetof
Date:Sheetof
Date:Sheetof
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FDBA
G
Galaxy Microsystems (HK) Ltd.
MEMORY: FBF Partition 63..32
MEMORY: FBF Partition 63..32
MEMORY: FBF Partition 63..32
Design By:
Design By:
P25Z
P25Z
P25Z
Design By:
H
NestonV10
NestonV10
NestonV10
1852Friday, March 03, 2017
1852Friday, March 03, 2017
1852Friday, March 03, 2017
Page 19
ABCDEFGH
Page19: GPU PWR and GND
G1H
@digital.u_gpu_gb3c_384(sym_20):page19_i52
BGA2397
COMMON
20/24 GND
A11
GND
A15
GND
A2
GND
A23
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
GND
A27
GND
A3
GND
A31
GND
A39
GND
A43
GND
A51
GND
A52
GND
AA12
GND
AA17
GND
AA19
GND
AA2
GND
AA21
GND
AA23
GND
AA25
GND
AA27
GND
AA29
GND
AA3
GND
AA31
GND
AA33
GND
AA35
GND
AA37
GND
AA4
GND
AA42
GND
AA45
GND
AA48
GND
AA49
GND
AA5
GND
AA50
GND
AA51
GND
AA52
GND
AA6
GND
AA9
GND
AB12
GND
AB18
GND
AB20
GND
AB22
GND
AB24
GND
AB26
GND
AB28
GND
AB30
GND
AB32
GND
AB34
GND
AB36
GND
AB42
GND
AB46
GND
AB8
GND
AC1
GND
AC10
GND
AC17
GND
AC19
GND
AC2
GND
AC21
GND
AC23
GND
AC25
GND
AC27
GND
AC29
GND
AC3
GND
AC31
GND
AC33
GND
AC35
GND
AC37
GND
AC4
GND
AC44
GND
AC45
GND
AC46
GND
AC47
GND
AC48
GND
AC49
GND
AC5
GND
AC50
GND
AC51
GND
AC52
GND
AC53
GND
AC6
GND
AC7
GND
AC8
GND
AC9
GND
AD12
GND
AD18
GND
AD20
GND
AD22
GND
AD24
GND
AD26
GND
AD28
GND
AD30
GND
AD32
GND
AD34
GND
AD36
GND
AD42
GND
AD46
GND
AD8
GND
AE12
GND
AE17
GND
AE19
GND
AE2
GND
AE21
GND
AE23
GND
AE25
GND
AE27
GND
AE29
GND
AE3
GND
AE31
GND
AE33
GND
AE35
GND
AE37
GND
W12
GND
W17
GND
W19
GND
W2
GND
W21
GND
W23
GND
W25
GND
W27
GND
W29
GND
W3
GND
W31
GND
GNDGNDGNDGNDGNDGNDGND
AE4
GND
AE42
GND
AE45
GND
AE48
GND
AE49
GND
AE5
GND
AE50
GND
AE51
GND
AE52
GND
AE6
GND
AE9
GND
AF12
GND
AF18
GND
AF20
GND
AF22
GND
AF24
GND
AF26
GND
AF28
GND
AF30
GND
AF32
GND
AF34
GND
AF36
GND
AF42
GND
AF47
GND
AF7
GND
AG1
GND
AG10
GND
AG11
GND
AG19
GND
AG2
GND
AG21
GND
AG23
GND
AG25
GND
AG27
GND
AG29
GND
AG3
GND
AG31
GND
AG33
GND
AG35
GND
AG4
GND
AG43
GND
AG44
GND
AG46
GND
AG47
GND
AG49
GND
AG5
GND
AG50
GND
AG51
GND
AG52
GND
AG53
GND
AG7
GND
AG8
GND
AH12
GND
AH18
GND
AH20
GND
AH22
GND
AH24
GND
AH26
GND
AH28
GND
AH30
GND
AH32
GND
AH34
GND
AH36
GND
AH42
GND
AH47
GND
AH7
GND
AJ12
GND
AJ17
GND
AJ19
GND
AJ2
GND
AJ21
GND
AJ23
GND
AJ25
GND
AJ27
GND
AJ29
GND
AJ3
GND
AJ31
GND
AJ33
GND
AJ35
GND
AJ37
GND
AJ4
GND
AJ42
GND
AJ45
GND
AJ48
GND
AJ49
GND
AJ5
GND
AJ50
GND
AJ51
GND
AJ52
GND
AJ6
GND
AJ9
GND
AK12
GND
AK18
GND
AK20
GND
AK22
GND
AK24
GND
AK26
GND
AK28
GND
AK30
GND
AK32
GND
AK34
GND
AK36
GND
AK42
GND
AK46
GND
AK8
GND
AL1
GND
AL10
GND
AL17
GND
AL19
GND
W35
GND
W37
GND
W4
GND
W42
GND
W43
GND
W44
GND
W46
GND
W47
GND
W49
GND
W5
GND
W33
GND
G1I
@digital.u_gpu_gb3c_384(sym_21):page19_i49
BGA2397
COMMON
21/24 GND
AL2
GND
AL21
GND
AL23
GND
AL25
GND
AL27
GND
AL29
GND
AL3
GND
AL31
GND
AL33
GND
AL35
GND
AL37
GND
AL4
GND
AL44
GND
AL45
GND
AL46
GND
AL47
GND
AL48
GND
AL49
GND
AL5
GND
AL50
GND
AL51
GND
AL52
GND
AL53
GND
AL6
GND
AL7
GND
AL8
GND
AL9
GND
AM12
GND
AM18
GND
AM20
GND
AM22
GND
AM24
GND
AM26
GND
AM28
GND
AM30
GND
AM32
GND
AM34
GND
AM36
GND
AM42
GND
AM46
GND
AM8
GND
AN12
GND
AN17
GND
AN19
GND
AN2
GND
AN21
GND
AN23
GND
AN25
GND
AN27
GND
AN29
GND
AN3
GND
AN31
GND
AN33
GND
AN35
GND
AN37
GND
AN4
GND
AN42
GND
AN45
GND
AN48
GND
AN49
GND
AN5
GND
AN50
GND
AN51
GND
AN52
GND
AN6
GND
AN9
GND
AP12
GND
AP18
GND
AP20
GND
AP22
GND
AP24
GND
AP26
GND
AP28
GND
AP30
GND
AP32
GND
AP34
GND
AP36
GND
AP42
GND
AP48
GND
AP6
GND
AR10
GND
AR11
GND
AR12
GND
AR17
GND
AR19
GND
AR2
GND
AR21
GND
AR23
GND
AR25
GND
AR27
GND
AR29
GND
AR3
GND
AR31
GND
AR33
GND
AR35
GND
AR37
GND
AR4
GND
AR42
GND
AR43
GND
AR44
GND
AR46
GND
AR47
GND
AR49
GND
AR5
GND
AR50
GND
AR51
GND
AR52
GND
AR7
GND
AR8
GND
AT12
GND
W50
GND
W51
GND
W52
GND
W7
GND
W8
GND
Y12
GND
Y18
GND
Y20
GND
Y22
GND
Y24
GND
AT18
GND
AT20
GND
AT22
GND
AT24
GND
AT26
GND
AT28
GND
AT30
GND
AT32
GND
AT34
GND
AT36
GND
AT42
GND
AU12
GND
AU17
GND
AU19
GND
AU21
GND
AU23
GND
AU25
GND
AU29
GND
AU31
GND
AU33
GND
AU35
GND
AU37
GND
AU42
GND
AV10
GND
AV3
GND
AV4
GND
AV42
GND
AV43
GND
AV44
GND
AV46
GND
AV47
GND
AV49
GND
AV5
GND
AV50
GND
AV51
GND
AV7
GND
AV8
GND
AW1
GND
AW12
GND
AW42
GND
AW45
GND
AW53
GND
AW9
GND
AY11
GND
AY4
GND
AY43
GND
AY45
GND
AY46
GND
AY48
GND
AY49
GND
AY5
GND
AY50
GND
AY6
GND
AY8
GND
AY9
GND
B1
GND
B13
GND
B19
GND
B2
GND
B21
GND
B23
GND
B25
GND
B27
GND
B29
GND
B31
GND
B33
GND
B35
GND
B41
GND
B45
GND
B47
GND
B49
GND
B5
GND
B52
GND
B53
GND
B7
GND
B9
GND
BA2
GND
BA23
GND
BA45
GND
BA46
GND
BA48
GND
BA52
GND
BA6
GND
BA8
GND
BA9
GND
BB23
GND
BB4
GND
BB45
GND
BB50
GND
BB9
GND
BC1
GND
BC11
GND
BC23
GND
BC28
GND
BC29
GND
BC3
GND
BC43
GND
BC51
GND
BC53
GND
BD10
GND
BD12
GND
BD23
GND
BD29
GND
BD30
GND
BD4
GND
BD44
GND
BD45
GND
BD47
GND
BD48
GND
BD49
GND
T46
GND
T47
GND
T49
GND
T5
GND
T50
GND
Y26
GND
Y28
GND
Y30
GND
Y32
GND
Y34
GND
G1J
@digital.u_gpu_gb3c_384(sym_22):page19_i50
BGA2397
COMMON
* Connect Probe_XXXX to
Pwr/Gnd in Production Cards
TPs for E-boards
GND
FBVDDQ_SENSE_GPU
85DIFF_NETCLASS1FBVDDQ_SENSE
1V8_MAIN
FBVDDQ_SENSE_RTN
85DIFF_NETCLASS1FBVDDQ_SENSE
1V8_AON
OUT
OUT
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
GPU PWR and GND
GPU PWR and GND
GPU PWR and GND
P25Z
P25Z
P25Z
H
Design By:
Design By:
Design By:
R836
0ohm
0402
0.05 ohm
COMMON
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
OUT
OUT
{34}
{34}
NestonV10
NestonV10
NestonV10
1952Friday, March 03, 2017
1952Friday, March 03, 2017
1952Friday, March 03, 2017
1
2
{32}
{32}
3
4
5
of
of
of
Page 20
ABCDEFGH
Page20: GPU Decoupling
FBVDDQ
1
2
3
Partition A
C908
1uF
6.3V
X6S
0402
Partition B
C912
1uF
6.3V
X6S
0402
Partition C
C936
1uF
6.3V
X6S
0402
Partition D
C1091
1uF
6.3V
X6S
0402
Partition E
C1143
1uF
6.3V
X6S
0402
Partition F
C1139
1uF
6.3V
X6S
0402
Place close to GPU
C858
10uF
4V
X6S
4
5
0603
Place close to GPU
C856
22uF
4V
X6S
0603_LARGE
C853
22uF
4V
X6S
0603_LARGE
0402
0402
0402
0402
0402
0402
0603
0603_LARGE
0603_LARGE
2 X 10UF, 6 X 1UF
C909
C910
C905
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
0402
2 X 10UF, 6 X 1UF
C901
C911
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
0402
2 X 10UF, 6 X 1UF
C981
C958
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
0402
2 X 10UF, 6 X 1UF
C1061
C1078
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
0402
2 X 10UF, 6 X 1UF
C1144
C1141
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
0402
2 X 10UF, 6 X 1UF
C1137
C1153
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
0402
C906
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
C903
C896
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
C919
C1006
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
C1021
C1041
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
C1142
C1140
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
C1136
C1138
1uF
1uF
6.3V
6.3V
X6S
X6S
0402
6 X 10UF
C857
C900
C1132
10uF
4V
X6S
14 x 22UF
C1148
22uF
4V
X6S
C1095
22uF
4V
X6S
0603
0603_LARGE
0603_LARGE
C1186
10uF
4V
X6S
C1187
22uF
4V
X6S
C855
22uF
4V
X6S
10uF
10uF
4V
4V
X6S
X6S
0603
0603
C848
C891
22uF
22uF
4V
4V
X6S
X6S
0603_LARGE
0603_LARGE
C854
C979
22uF
22uF
4V
4V
X6S
X6S
0603_LARGE
0603_LARGE
0402
0402
0402
0402
0402
0402
0603
GND
0603_LARGE
0603_LARGE
C907
1uF
6.3V
X6S
C904
1uF
6.3V
X6S
C897
1uF
6.3V
X6S
C1107
1uF
6.3V
X6S
C1145
1uF
6.3V
X6S
C1135
1uF
6.3V
X6S
C1192
10uF
4V
X6S
C1198
22uF
4V
X6S
C1193
22uF
4V
X6S
FBVDDQ
C859
10uF
4V
X6S
0603
C861
10uF
4V
X6S
0603
C949
10uF
4V
X6S
0603
C1082
10uF
4V
X6S
0603
C1189
10uF
4V
X6S
0603
C1191
10uF
4V
X6S
0603
C1190
22uF
4V
X6S
0603_LARGE
GND
C1205
22uF
4V
X6S
0603_LARGE
GND
NVVDD
2 X 470UF
C1058
C968
560uF
C862
10uF
4V
X6S
0603
GND
C860
10uF
4V
X6S
0603
GND
C920
10uF
4V
X6S
0603
GND
C1161
10uF
4V
X6S
0603
GND
C1199
10uF
4V
X6S
0603
GND
C1188
10uF
4V
X6S
0603
GND
560uF
5V@105degC
5V@105degC
TA-Polymer
TA-Polymer
1.7A@-3.1degC,100KHz
1.7A@-3.1degC,100KHz
0.035ohm
0.035ohm
CAP_SMD_7343
CAP_SMD_7343
GND
4 X 22UF
C960
C1065
22uF
22uF
6.3V
6.3V
X6S
X6S
0805
0805
0805
11 X 4.7UF
C1070
C1115
4.7uF
4.7uF
6.3V
6.3V
X6S
X6S
0603
0603
0603
58 X 1UF
C1012
C1014
1uF
1uF
6.3V
6.3V
X6S
X6S
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
0805
C1096
1uF
6.3V
X6S
C1048
1uF
6.3V
X6S
C1123
1uF
6.3V
X6S
C1124
1uF
6.3V
X6S
C941
1uF
6.3V
X6S
C942
22uF/NC
6.3V
X6S
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
0805
C1035
1uF
6.3V
X6S
1005_BGA
C926
1uF/NC
6.3V
X6S
1005_BGA
C1094
1uF
6.3V
X6S
1005_BGA
C1129
1uF
6.3V
X6S
1005_BGA
C1087
1uF
6.3V
X6S
1005_BGA
Additional MLCCs: 8 X 22UF, CO-LAYOUT WITH POSCAPs
C1084
22uF/NC
6.3V
X6S
0805
C1077
22uF
6.3V
X6S
C1113
4.7uF
6.3V
X6S
C1121
1uF
6.3V
X6S
C987
1uF/NC
6.3V
X6S
C951
1uF
6.3V
X6S
C1015
1uF
6.3V
X6S
C1125
1uF
6.3V
X6S
C1131
1uF/NC
6.3V
X6S
C1038
22uF/NC
6.3V
X6S
0603
0805
GND
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
0805
C973
22uF
6.3V
X6S
C1033
C1114
4.7uF
6.3V
X6S
C1100
1uF/NC
6.3V
X6S
C1054
1uF
6.3V
X6S
C929
1uF
6.3V
X6S
C966
1uF
6.3V
X6S
C930
1uF
6.3V
X6S
C1090
1uF/NC
6.3V
X6S
C994
22uF/NC
6.3V
X6S
0603
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
0805
C1072
4.7uF
6.3V
X6S
C984
1uF
6.3V
X6S
C969
1uF/NC
6.3V
X6S
C977
1uF
6.3V
X6S
C1051
1uF
6.3V
X6S
C953
1uF/NC
6.3V
X6S
C1055
1uF/NC
6.3V
X6S
C993
22uF/NC
6.3V
X6S
4.7uF
6.3V
X6S
0603
C1022
1uF
6.3V
X6S
1005_BGA
C995
1uF
6.3V
X6S
1005_BGA
C1097
1uF
6.3V
X6S
1005_BGA
C992
1uF
6.3V
X6S
1005_BGA
C965
1uF/NC
6.3V
X6S
1005_BGA
C922
1uF
6.3V
X6S
1005_BGA
C943
22uF/NC
6.3V
X6S
0805
0603
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
0805
C1018
4.7uF
6.3V
X6S
C1127
1uF
6.3V
X6S
C1063
1uF/NC
6.3V
X6S
C1030
1uF
6.3V
X6S
C1074
1uF/NC
6.3V
X6S
C954
1uF/NC
6.3V
X6S
C1052
1uF/NC
6.3V
X6S
C1085
22uF/NC
6.3V
X6S
Co-layout with other MLCC
0603
C1071
4.7uF/NC
6.3V
X6S
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
0805
GND
C1049
1uF
6.3V
X6S
C1029
1uF
6.3V
X6S
C927
1uF
6.3V
X6S
C946
1uF/NC
6.3V
X6S
C989
1uF
6.3V
X6S
C1120
1uF
6.3V
X6S
C1039
22uF/NC
6.3V
X6S
0603
1005_BGA
1005_BGA
1005_BGA
1005_BGA
1005_BGA
NVVDD
NVVDD
C963
560uF
5V@105degC
TA-Polymer
1.7A@-3.1degC,100KHz
0.035ohm
CAP_SMD_7343
GND
C974
4.7uF
6.3V
X6S
C1110
1uF
6.3V
X6S
C975
1uF/NC
6.3V
X6S
C1059
1uF/NC
6.3V
X6S
C1119
1uF
6.3V
X6S
C976
1uF/NC
6.3V
X6S
C944
C1117
4.7uF
4.7uF
6.3V
6.3V
X6S
X6S
0603
0603
GND
C1098
1uF
6.3V
X6S
1005_BGA
C970
GND
1uF
6.3V
X6S
1005_BGA
C990
GND
1uF
6.3V
X6S
1005_BGA
C1067
GND
1uF/NC
6.3V
X6S
1005_BGA
C928
GND
1uF
6.3V
X6S
1005_BGA
GND
GND
NVVDD
2 X 22UF
0805
5 X 4.7UF
22 X 1UF
C1101
22uF/NC
6.3V
X6S
0603
1005_BGA
1005_BGA
1005_BGA
1V8_MAIN
C1004
4.7uF
6.3V
X6S
C1105
1uF
6.3V
X6S
C988
1uF
6.3V
X6S
C1043
1uF
6.3V
X6S
0603
GND
0603
GND
0603
C935
22uF
6.3V
X6S
0805
GND
C1069
4.7uF
6.3V
X6S
0603
C1028
1uF
6.3V
X6S
1005_BGA
C1075
1uF/NC
6.3V
X6S
1005_BGA
1005_BGA
3 X 4.7UF, 3 X 1UF,7 X 0.1UF
C1008
4.7uF
6.3V
X6S
C938
4.7uF
6.3V
X6S
C997
4.7uF
6.3V
X6S
1V8_AON
1 X 4.7UF, 1 X 1UF,2 X 0.1UF
C73
4.7uF
6.3V
X6S
0603
NVVDD
NVVDD
C1062
560uF
5V@105degC
TA-Polymer
1.7A@-3.1degC,100KHz
0.035ohm
GND
CAP_SMD_7343
0603
GND
1005_BGA
1005_BGA
1005_BGA
C1020
4.7uF
6.3V
X6S
C1050
1uF
6.3V
X6S
C1009
1uF
6.3V
X6S
C1092
1uF
6.3V
X6S
Co-layout with other MLCC
C1122
1uF
6.3V
X6S
1005_BGA
1005_BGA
C1042
1uF
6.3V
X6S
1005_BGA
1005_BGA
C931
1uF
6.3V
X6S
1005_BGA
GND
C1031
C1032
1uF
1uF/NC
6.3V
6.3V
X6S
X6S
1005_BGA
C991
C955
1uF
1uF
6.3V
6.3V
X6S
X6S
1005_BGA
C959
C1116
4.7uF
4.7uF
6.3V
6.3V
X6S
X6S
0603
0603
C1099
C1013
1uF
1uF
6.3V
6.3V
X6S
X6S
1005_BGA
1005_BGA
C932
C1126
1uF
1uF
6.3V
6.3V
X6S
X6S
1005_BGA
1005_BGA
C964
1uF/NC
6.3V
X6S
1005_BGA
C1060
1uF/NC
6.3V
X6S
C947
1uF
6.3V
X6S
1005_BGA
1
2
GND
GND
3
1V8_MAIN
C1133
1uF
6.3V
X6S
0402
0402
C998
1uF
6.3V
X6S
0402
0402
C986
C1150
0.1uF
1uF
6.3V
16V
X6S
X7R
0402
0402
C1167
C1159
0.1uF
0.1uF
16V
16V
X7R
X7R
0402
C1169
C1147
0.1uF
0.1uF
16V
16V
X7R
X7R
0402
C1134
0.1uF
16V
X7R
0402
1005_BGA
GND
C1130
0.1uF
16V
X7R
4
1V8_AON
C72
1uF
6.3V
X6S
0402
1005_BGA
C1111
C1106
0.1uF
0.1uF
16V
16V
X7R
X7R
1005_BGA
GND
5
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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GPU DECOUPLING
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GPU Decoupling
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Page 21
ABCDEFGH
Page21: IFPAB DVI-D-DL
1
{22,24,29}
2
3
4
5
IN
PEX_VDD
Near the GPU
A, B share the filter
C1053
4.7uF
6.3V
20%
X6S
0603
COMMON
GPU_PLLVDD_XS_SP
C1010
1uF
6.3V
10%
X6S
0402
COMMON
1005_BGA
GND
1005_BGA
Close the GPU
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
R24
10k
R993
100k
5 %
0402
COMMON
GND
499ohm
COMMON 0402
499ohm
COMMON
499ohm
COMMON
499ohm
COMMON
499ohm
COMMON
499ohm
COMMON
499ohm
COMMON 0402
499ohm
COMMON 0402
499ohm
COMMON 0402
499ohm
COMMON 0402
499ohm
COMMON 0402
499ohm
COMMON 0402
499ohm
COMMON 0402
499ohm
COMMON 0402
3V3_PROT
C1356 0.1uF
C1365 0.1uF
C1353 0.1uF
C1355 0.1uF
C1359
C1350
C1362 0.1uF
R992
0402
R926
1 %
R927
0402
1 %
R912
0402
1 %
R913
0402
1 %
R914
0402
1 %
R915
0402
1 %
R923
1 %
R918
1 %
R908
1 %
R909
1 %
R919
1 %
R920
1 %
R917
1 %
R916
1 %
5 %
0402
COMMON
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
R20
10k
5 %
0402
COMMON
C1357
0.1uF
COMMON
COMMON
C1364 0.1uF
COMMON
COMMON
C1352 0.1uF
COMMON
COMMON
C1354 0.1uF
COMMON
COMMON
C1358
0.1uF
0.1uF
COMMON
COMMON
C1351
0.1uF
0.1uF
COMMON
COMMON
C1361
0.1uF
COMMON
COMMON
DVIA_HPD_RDVIA_HPD_R_Q
100k
COMMON
5 %
G1O
@digital.u_gpu_gb3c_384(sym_9):page21_i186
BGA2397
COMMON
9/24 IFPAB
DVI/HDMIDP
DVI-DL
IFPA_AUX
SDA
SDA
IFPAB_RSET
R842
C1023
0.1uF
16V
10%
X7R
0402
COMMON
1k
COMMON0402
1 %
1005_BGA
BH28
IFPAB_RSET
BC26
IFPAB_PLLVDD
BC27
C1040
0.1uF
16V
10%
X7R
0402
COMMON
GND
C1064
0.1uF
16V
10%
X7R
0402
COMMON
GND
IFPAB_PLLVDD
IFPAB
BA24
IFP_IOVDD
BA22
IFP_IOVDD
BA21
IFP_IOVDD
BA25
IFP_IOVDD
BA26
IFP_IOVDD
BA27
IFP_IOVDD
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
TXD3
TXD3
TXD4
TXD4
TXD5
TXD5
{27}
IFPA_AUX
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
IFPB_AUX
SDA
IFPB_AUX
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
OUT
IFPA_L3
IFPA_L3
IFPA_L2
IFPA_L2
IFPA_L1
IFPA_L1
IFPA_L0
IFPA_L0
IFPB_L3
IFPB_L3
IFPB_L2
IFPB_L2
IFPB_L1
IFPB_L1
IFPB_L0
IFPB_L0
NV3V3
NC
NC
GPIO14_IFPA_HPD
BJ30
BK30
BD28
BE28
BD27
BD26
BF26
BG26
BJ26
BJ27
BG28
BG27
BL28
BK28
BK26
BL26
BN26
BM26
BN27
BM27
BL8
BM28
1G1D1S
IFPA_AUX_SDA
IFPA_AUX_SCL
IFPA_TXC*
IFPA_TXC
IFPA_L0*
IFPA_L0
IFPA_L1*
IFPA_L1
IFPA_L2*
IFPA_L2
IFPB_L2*
IFPB_L2
IFPB_L1*
IFPB_L1
IFPB_L0*
IFPB_L0
G
1
NV3V3
R975
10k
1 %
0402
COMMON
Q559
@discrete.q_npn(sym_1):page21_i125
SOT23_1B1C1E
COMMON
GND
IFPAB_TERM_CM
3
D
Q550
@discrete.q_fet_n_enh(sym_2):page21_i100
SOT23_1G1D1S
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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<ASSEMBLY_DESCRIPTION>
IFPAB DVI-D-DL
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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Size Project Name: Rev
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Size Project Name: Rev
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Custom
Custom
Date:Sheet
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FDBA
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PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
IFPAB DVI-D-DL
IFPAB DVI-D-DL
IFPAB DVI-D-DL
P25Z
P25Z
P25Z
H
Design By:
Design By:
Design By:
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2152Friday, March 03, 2017
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Page 22
Page22: IFPE DP
1
2
3
ABCDEFGH
DP_PWR2
R1010
100k
IFPE_AUX_C*
IFPE_AUX_C
C1412
220pF
50V
5%
C0G
0402
COMMON
COMMON
R1009
COMMON
DP_E_HPD_CDP_E_HPD_RDP_E_HPD_R_Q
5 %
0402
100k
5 %
0402
GNDGND
DP_SIGNALSIFPE_L3
DP_SIGNALSIFPE_L3
DP_SIGNALSIFPE_L2
DP_SIGNALSIFPE_L2
DP_SIGNALSIFPE_L1
DP_SIGNALSIFPE_L1
DP_SIGNALSIFPE_L0
DP_SIGNALSIFPE_L0
D520
@discrete.d_3pin_ac(sym_1):page22_i220
3
0.1A
100V
SOT23
COMMON
12
D_3PIN_AC/NC
GND
D519
@discrete.d_3pin_ac(sym_1):page22_i212
3
0.1A
100V
SOT23
COMMON
12
D_3PIN_AC/NC
IFPE_AUX_C
IFPE_AUX_C
C1424
0.1uF/NC
16V
NV12V
10%
X7R
0402
R1027
COMMON
10k
5 %
C1426
10nF
25V
10%
X7R
0402
COMMON
0402
COMMON
3
C
Q574
@discrete.q_npn(sym_1):page22_i226
1
SOT23_1B1C1E
COMMON
E
2
MMBT2222A-7-F
GNDGND
HPD
18
AUXN
17
AUXP
15
LANE_3N
12
LANE_3P
10
LANE_2N
9
LANE_2P
7
LANE_1N
6
LANE_1P
4
LANE_0N
3
LANE_0P
1
DPORT_26P_0_7MM
GND
GND
B
1B1C1E
DPE_MODE*
RECEPTACLE
COMMON
NV3V3
@discrete.q_npn(sym_1):page22_i236
SOT23_1B1C1E
COMMON
DPORT_26P_0_7MM
J3
20
18
16
14
12
10
8
6
4
2
27
R980
10k
5 %
0402
COMMON
3
1B1C1E
C
Q542
DPE_MODE_R
B
1
E
2
MMBT2222A-7-F
SHIELD6
21
SHIELD5
23
MODE
C1405
25
0.1uF/NC
16V
10%
PWR
20
X7R
19
0402
COMMON
GND
16
CEC
DPE_CEC
14
13
GND
11
GND
8
GND
5
GND
2
22
24
26
GND
SHIELD4
PWR_RET
19
17
15
13
11
9
7
5
3
1
SHIELD3
SHIELD2
SHIELD1
{21,24,29}
GND
IN
PEX_VDD
C1011
4.7uF
6.3V
20%
X6S
0603
COMMON
Near the GPU
E, F share the filterClose the GPU
1005_BGA
C996
1uF
6.3V
10%
X6S
0402
COMMON
R843 1k
0402 COMMON
GPU_PLLVDD_XS_SP
C1066
0.1uF
16V
10%
X7R
0402
COMMON
GND
1 %
1005_BGA
GND
C1036
0.1uF
16V
10%
X7R
0402
COMMON
IFPEF_RSET
G1P
@digital.u_gpu_gb3c_384(sym_12):page22_i264
BGA2397
COMMON
12/24 IFPE
BK22
IFPEF_RSET
BC22
IFPEF_PLLVDD
IFPE
BB25
IFP_IOVDD
BB26
IFP_IOVDD
C1406
90DIFF_NETCLASS1IFPE_AUX_C
IFPE_AUX_BYP*
D
2S3
[Q_AUX_FET2*_DP]
COMMON
SOT23_1G1D1S
G
INS17493423
Q4
1
L2N7002LT1G
L2N7002LT1G
1
Q30
INS17493674
G
SOT23_1G1D1S
COMMON
2S3
[Q_AUX_FET2*_DP]
R989
100k
5 %
0402
COMMON
DPDVI/HDMI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
IFPE_AUX
IFPE_AUX
IFPE_L3
IFPE_L3
IFPE_L2
IFPE_L2
IFPE_L1
IFPE_L1
IFPE_L0
IFPE_L0
{27}
GND
IFPE_AUX*
BL18
IFPE_AUX
BL19
IFPE_L3*
BD22
IFPE_L3
BD21
IFPE_L2*
BF21
IFPE_L2
BG21
IFPE_L1*
BK21
IFPE_L1
BJ21
IFPE_L0*
BH22
IFPE_L0
BG22
GPIO18_IFPE_HPD
OUT
IFPE_AUX_C
NV3V3
COMMON
D
R991
R1030
10k
5 %
0402
COMMON
100k
5 %
0402
GND
IFPE_AUX_BYP
90DIFF_NETCLASS1
DP_SIGNALSIFPE_L3
DP_SIGNALSIFPE_L3
DP_SIGNALSIFPE_L2
DP_SIGNALSIFPE_L2
DP_SIGNALSIFPE_L1
DP_SIGNALSIFPE_L1
DP_SIGNALSIFPE_L0
DP_SIGNALSIFPE_L0
3
C
Q575
@discrete.q_npn(sym_1):page22_i127
SOT23_1B1C1E
COMMON
E
2
MMBT2222A-7-F
GND
1
0.1uF
16V0402
10%
IFPE_MODE
X7R
COMMON
90DIFF_NETCLASS1
G
L2N7002LT1G
L2N7002LT1G
G
S3D
1
1
S3D
C1407
0.1uF
0402
16V
X7R
10%
C8
C5
C3 0.1uF
C1
Hotplug Detection
1B1C1E
B
R1023
R1024
100k
5 %
0402
COMMON
GNDGNDGND
COMMON
0.1uF
0.1uF
0.1uF
COMMON
COMMON
COMMON
COMMON
0402
90DIFF_NETCLASS1
C9 0.1uF
IFPE_L3_C*
IFPE_L3_C
COMMON
C6
0.1uF
IFPE_L2_C*
IFPE_L2_C
COMMON
C4
0.1uF
IFPE_L1_C*
IFPE_L1_C
COMMON
C2 0.1uF
IFPE_L0_C*
IFPE_L0_C
COMMON
100k
COMMON
5 %
C1418
220pF/NC
50V
5%
C0G
0402
COMMON
2
[Q_AUX_FET2*_DP]
COMMON
SOT23_1G1D1S
INS17493456
Q28
Q29
INS17493583
SOT23_1G1D1S
COMMON
2
[Q_AUX_FET2*_DP]
R1013
0ohm
0603COMMON
0.05 ohm
R900
0402 COMMON
DP_PWR2
GND
DPE_MODE_C
R990
5.1M/NC
5 %
0402
COMMON
GND
5 %
10k
C11
10uF/NC
6.3V
10%
X7R
0805
COMMON
1
2
R901
1M
5 %
0402
COMMON
GND
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
IFPE DP
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
IFPE DP
IFPE DP
IFPE DP
P25Z
P25Z
P25Z
H
Design By:
Design By:
Design By:
NestonV10
NestonV10
NestonV10
2252Friday, March 03, 2017
2252Friday, March 03, 2017
2252Friday, March 03, 2017
of
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Page 23
Page23: IFPF DP
1
2
3
ABCDEFGH
DP_PWR2
R998
100k
5 %
0402
COMMON
R997
100k
5 %
0402
COMMON
IFPF_AUX_C*
IFPF_AUX_C
IFPF_L3DP_SIGNALS
IFPF_L3DP_SIGNALS
IFPF_L2DP_SIGNALS
IFPF_L2DP_SIGNALS
IFPF_L1DP_SIGNALS
IFPF_L1DP_SIGNALS
IFPF_L0DP_SIGNALS
IFPF_L0DP_SIGNALS
DP_F_HPD_CDP_F_HPD_RDP_F_HPD_R_Q
COMMON0603
C1416
220pF
50V
5%
C0G
0402
COMMON
3
3
GNDGND
D518
@discrete.d_3pin_ac(sym_1):page23_i92
0.1A
100V
SOT23
COMMON
12
D_3PIN_AC/NC
GND
D517
@discrete.d_3pin_ac(sym_1):page23_i94
0.1A
100V
SOT23
COMMON
12
D_3PIN_AC/NC
IFPF_AUX_C
IFPF_AUX_C
C1410
0.1uF/NC
16V
NV12V
10%
X7R
0402
R1016
COMMON
10k
5 %
C1413
10nF
25V
10%
X7R
0402
COMMON
0402
COMMON
3
C
Q566
@discrete.q_npn(sym_1):page23_i79
1
SOT23_1B1C1E
COMMON
E
2
MMBT2222A-7-F
SOT23
GNDGND
HPD
18
AUXN
17
AUXP
15
LANE_3N
12
LANE_3P
10
LANE_2N
9
LANE_2P
7
LANE_1N
6
LANE_1P
4
LANE_0N
3
LANE_0P
1
DPORT_26P_0_7MM
GND
GND
B
1B1C1E
RECEPTACLE
COMMON
DPF_MODE*
@discrete.q_npn(sym_1):page23_i77
SOT23_1B1C1E
DPORT_26P_0_7MM
20
18
16
14
12
10
8
6
4
2
27
NV3V3
COMMON
J4
R1019
10k
5 %
0402
COMMON
3
1B1C1E
C
Q569
DPF_MODE_R
B
1
E
2
MMBT2222A-7-F
SOT23
SHIELD6
21
SHIELD5
23
MODE
C1414
25
0.1uF/NC
16V
10%
PWR
20
X7R
19
0402
COMMON
GND
16
CEC
DPF_CEC
14
13
GND
11
GND
8
GND
5
GND
2
22
24
26
GND
SHIELD4
PWR_RET
19
17
15
13
11
9
7
5
3
1
SHIELD3
SHIELD2
SHIELD1
PEX_VDD
1005_BGA
GND
Close the GPU
C1019
0.1uF
16V
10%
X7R
0402
COMMON
G1Q
@digital.u_gpu_gb3c_384(sym_8):page23_i152
BGA2397
COMMON
8/24 IFPF
BB28
IFP_IOVDD
BB27
IFP_IOVDD
IFPF
DVI/HDMI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
{27}
DP
IFPF_AUX
IFPF_AUX
IFPF_L3
IFPF_L3
IFPF_L2
IFPF_L2
IFPF_L1
IFPF_L1
IFPF_L0
IFPF_L0
C1401
IFPF_AUX_C90DIFF_NETCLASS1
IFPF_AUX_BYP*
D
2S3
[Q_AUX_FET2*_DP]
COMMON
SOT23_1G1D1S
G
INS17494291
Q31
1
L2N7002LT1G
L2N7002LT1G
1
Q34
INS17494354
G
SOT23_1G1D1S
COMMON
2S3
[Q_AUX_FET2*_DP]
R965
100k
5 %
0402
COMMON
GND
IFPF_AUX*
BM18
IFPF_AUX
BM17
IFPF_L3*
BN18
IFPF_L3
BN19
IFPF_L2*
BM20
IFPF_L2
BN20
IFPF_L1*
BK20
IFPF_L1
BJ20
IFPF_L0*
BM21
IFPF_L0
BL21
GPIO24_IFPF_HPD
OUT
IFPF_AUX_BYP
D
IFPF_AUX_C90DIFF_NETCLASS1
R966
100k
5 %
0402
COMMON
GND
IFPF_L3DP_SIGNALS
IFPF_L3DP_SIGNALS
IFPF_L2DP_SIGNALS
IFPF_L2DP_SIGNALS
IFPF_L1DP_SIGNALS
IFPF_L1DP_SIGNALS
IFPF_L0DP_SIGNALS
IFPF_L0DP_SIGNALS
NV3V3
R1020
10k
5 %
0402
COMMON
Q571
@discrete.q_npn(sym_1):page23_i116
SOT23_1B1C1E
COMMON
GND
3
C
E
2
MMBT2222A-7-F
SOT23
1
0.1uF
16V0402
10%
X7R
COMMON
IFPF_MODE
90DIFF_NETCLASS1
G
L2N7002LT1G
L2N7002LT1G
G
S3D
1
1
S3D
C1400
0.1uF
16V0402
10%
X7R
COMMON
C38
0.1uF
COMMON
C47 0.1uF
COMMON
C43 0.1uF
COMMON
C45 0.1uF
COMMON
Hotplug Detection
1B1C1E
B
R1036
100k
COMMON
0402
R1035
100k
5 %
0402
COMMON
GNDGNDGND
5 %
C37
C46 0.1uF
C42 0.1uF
C44 0.1uF
0.1uF
COMMON
COMMON
COMMON
COMMON
90DIFF_NETCLASS1
IFPF_L3_C*
IFPF_L3_C
IFPF_L2_C*
IFPF_L2_C
IFPF_L1_C*
IFPF_L1_C
IFPF_L0_C*
IFPF_L0_C
C1428
220pF/NC
50V
5%
C0G
0402
COMMON
2
[Q_AUX_FET2*_DP]
COMMON
SOT23_1G1D1S
INS17494312
Q32
Q33
INS17494333
SOT23_1G1D1S
COMMON
2
[Q_AUX_FET2*_DP]
R1018 0ohm
0.05 ohm
R1032 10k
5 %
DP_PWR2
GND
DPF_MODE_C
R1034
5.1M/NC
5 %
0402
COMMON
GND
COMMON0402
C41
10uF/NC
6.3V
10%
X7R
0805
COMMON
1
2
R1029
1M
5 %
0402
COMMON
GND
3
4
Fused DP_PWR
DP-SKU
3V3
C55
0.1uF
16V
10%
X7R
0402
COMMON
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
GND
U5
@analog.u_sw_pwr_tps2031(sym_1):page23_i136
SO8
COMMON
2
IN
3
IN
4
EN
5
OC*
8
OUT
OUT
OUT
GND
0.4003.3V
7
R28
C56
6
10k
5 %
0402
COMMON
1
GND GNDGNDGNDGNDGND
0.1uF
16V
10%
X7R
0402
COMMON
C33
10uF
6.3V
10%
X7R
0805
COMMON
CE
C51
330uF
COMMON
20%
6.3V@85degC
TA-Polymer
0.975A@105degC,100KHz
0.015ohm
SMD_7343
DP_PWR2
C52
330uF
COMMON
20%
6.3V@85degC
TA-Polymer
0.975A@105degC,100KHz
0.015ohm
SMD_7343
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
IFPF DP
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
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PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
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PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
LB511600ohm
LB510600ohm
IND_SMD_0402
LB509600ohm
IND_SMD_0402
LB508600ohm
IND_SMD_0402
LB507600ohm
IND_SMD_0402
LB506600ohm
IND_SMD_0402
LB505600ohm
IND_SMD_0402
LB504600ohm
IND_SMD_0402
IND_SMD_0402
95DIFF_NETCLASS1
95DIFF_NETCLASS1
95DIFF_NETCLASS1
95DIFF_NETCLASS1
95DIFF_NETCLASS1
95DIFF_NETCLASS1
95DIFF_NETCLASS1
95DIFF_NETCLASS1
ASSEMBLY
PAGE DETAIL
0402
IFPC_TERM_BEAD_1
IFPC_TERM_BEAD_2
IFPC_TERM_BEAD_3
IFPC_TERM_BEAD_4
IFPC_TERM_BEAD_5
IFPC_TERM_BEAD_6
IFPC_TERM_BEAD_7
IFPC_TERM_BEAD_8
C1379 0.1uF/NC
C1381 0.1uF/NC
0402
C1383 0.1uF/NC
0402
C1385 0.1uF/NC
0402
0402
<ASSEMBLY_DESCRIPTION>
IFPC HDMI/DP
R974
499ohm
1 %
R973
499ohm
1 %
0402
C1380 0.1uF/NC
C1382 0.1uF/NC
0402
C1384 0.1uF/NC
0402
C1386 0.1uF/NC
0402
0402
R969
R968
R972
R971
R970
0402
499ohm
1 %
I2CW_SDA_R_Q
I2CW_SCL_R_Q
IFPC_L3_C*
IFPC_L3_C
IFPC_L2_C*
IFPC_L2_C
IFPC_L1_C*
IFPC_L1_C
IFPC_L0_C*
IFPC_L0_C
499ohm
1 %
0402
499ohm
499ohm
1 %
1 %
0402
0402
R967
499ohm
499ohm
1 %
1 %
0402
0402
RECEPTACLE
HPD
18
AUXN
17
AUXP
15
LANE_3N
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
12
LANE_3P
10
LANE_2N
9
LANE_2P
7
LANE_1N
6
LANE_1P
4
LANE_0N
3
LANE_0P
1
DPORT_26P_0_7MM
FDBA
DPORT_26P_0_7MM
J2
20
19
18
17
16
15
14
13
12
11
10
8
6
4
2
CON_DISPLAYPORT/NC
27
DP FOR QUADRO
SHIELD6
SHIELD5
SHIELD4
PWR
PWR_RET
GND
CEC
MODE
GND
9
GND
7
GND
5
3
GND
1
SHIELD3
SHIELD2
SHIELD1
G
DP_PWR
C13
C1409
0.1uF/NC
21
23
25
20
19
16
14
13
11
8
5
2
22
24
26
22uF/NC
6.3V
16V
20%
10%
X6S
0805
DPC_CEC
DPC_MODE_C
GND
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
X7R
0402
GND
R1000
5.1M/NC
5 %
0402
0402
GND
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
IFPC HDMI 2.0/DP
IFPC HDMI 2.0/DP
IFPC HDMI 2.0/DP
P25Z
P25Z
P25Z
H
R982
1M/NC
5 %
Design By:
Design By:
Design By:
NestonV10
NestonV10
NestonV10
2452Friday, March 03, 2017
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4
5
Page 25
Page25: IFPD DP
1
2
3
ABCDEFGH
DP_PWR
R984
100k
5 %
0402
IFPD_MODE
R985
100k
5 %
0402
GNDGND
IFPD_AUX_C*
IFPD_AUX_C
DP_SIGNALSIFPD_L3
DP_SIGNALSIFPD_L3
IFPD_L2DP_SIGNALS
IFPD_L2DP_SIGNALS
IFPD_L1DP_SIGNALS
IFPD_L1DP_SIGNALS
DP_SIGNALSIFPD_L0
DP_SIGNALSIFPD_L0
C1419
220pF
50V
5%
C0G
0402
D516
@discrete.d_3pin_ac(sym_1):page25_i197
3
0.1A
100V
12
D_3PIN_AC/NC
GND
SOT23
D515
@discrete.d_3pin_ac(sym_1):page25_i194
3
0.1A
100V
12
D_3PIN_AC/NC
SOT23
DP_D_HPD_C
IFPD_AUX
IFPD_AUX
C1404
0.1uF/NC
16V
NV12V
10%
X7R
R957
0402
GND
0402
GND
10k
1 %
3
0402
C1403
10nF
25V
10%
X7R
C
Q558
@discrete.q_npn(sym_1):page25_i203
1
E
2
MMBT2222A-7-F
SOT23
GNDGND
HPD
18
AUXN
17
AUXP
15
LANE_3N
12
LANE_3P
10
LANE_2N
9
LANE_2P
7
LANE_1N
6
LANE_1P
4
LANE_0N
3
LANE_0P
1
DPORT_26P_0_7MM
B
1B1C1E
RECEPTACLE
DPD_MODE*
NV3V3
0402
@discrete.q_npn(sym_1):page25_i211
DPORT_26P_0_7MM
J1
20
18
16
14
12
10
8
6
4
2
27
R987
10k
1 %
3
1B1C1E
C
Q557
B
1
DP_MODE_R
E
2
MMBT2222A-7-F
SOT23
SHIELD6
21
SHIELD5
23
MODE
C7
25
10uF/NC
6.3V
10%
PWR
20
X7R
19
0805
GND
16
CEC
14
DP_CEC
13
GND
11
GND
8
GND
5
GND
2
22
24
26
GND
SHIELD4
PWR_RET
19
17
15
13
11
9
7
5
3
1
SHIELD3
SHIELD2
SHIELD1
PEX_VDD
Close the GPU
GND
1005_BGA
C1387
IFPD_AUX
90DIFF_NETCLASS1
IFPD_AUX_BYP*
D
90DIFF_NETCLASS1
2S3
[Q_AUX_FET2*_DP]
G
INS17497345
Q51
1
L2N7002LT1G
L2N7002LT1G
1
Q54
SOT23
INS17497408
G
2S3
[Q_AUX_FET2*_DP]
R959
100k
G1S
@digital.u_gpu_gb3c_384(sym_11):page25_i231
11/24 IFPD
BA29
NC
NC
BA31
NC
NC
BB24
IFP_IOVDD
BB22
C1044
0.1uF
16V
10%
X7R
IFP_IOVDD
BGA_2397_P090_P085_P080_P100_450X450
IFPD
DVI/HDMI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
DP
IFPD_AUX
IFPD_AUX
IFPD_L3
IFPD_L3
IFPD_L2
IFPD_L2
IFPD_L1
IFPD_L1
IFPD_L0
IFPD_L0
{27}
5 %
0402
GND
IFPD_AUX*
BH20
IFPD_AUX
BG20
IFPD_L3*
BN22
IFPD_L3
BM22
IFPD_L2*
BN23
IFPD_L2
BM23
IFPD_L1*
BN24
IFPD_L1
BM24
IFPD_L0*
BL25
IFPD_L0
BM25
GPIO17_IFPD_HPD
OUT
IFPD_AUX_BYP
D
90DIFF_NETCLASS1
IFPD_AUX
90DIFF_NETCLASS1
SOT23
R977
100k
5 %
0402
GND
DP_SIGNALSIFPD_L3
DP_SIGNALSIFPD_L3
DP_SIGNALSIFPD_L2
IFPD_L2DP_SIGNALS
IFPD_L1DP_SIGNALS
IFPD_L1DP_SIGNALS
DP_SIGNALSIFPD_L0
DP_SIGNALSIFPD_L0
NV3V3
R995
10k
1 %
0402
@discrete.q_npn(sym_1):page25_i158
GND
Q567
3
C
E
2
MMBT2222A-7-F
SOT23
1
0.1uF
16V
10%
X7R
0402
L2N7002LT1G
L2N7002LT1G
90DIFF_NETCLASS1
S3D
G
1
1
G
SOT23
S3D
C1402
0.1uF
16V
10%
X7R
0402
C22 0.1uF
C19 0.1uF
0402
C15 0.1uF
0402
C17 0.1uF
0402
0402
Hotplug Detection
1B1C1E
B
R1022 100k
5 %
0402
R1014
100k
5 %
0402
GNDGNDGND
C21 0.1uF
C18 0.1uF
0402
C14 0.1uF
0402
C16 0.1uF
0402
0402
DP_D_HPD_RDP_D_HPD_R_Q
90DIFF_NETCLASS1
SOT23
IFPD_L3_C*
IFPD_L3_C
IFPD_L2_C*
IFPD_L2_C
IFPD_L1_C*
IFPD_L1_C
IFPD_L0_C*
IFPD_L0_C
C1420
220pF/NC
50V
5%
C0G
0402
2
[Q_AUX_FET2*_DP]
INS17497366
Q52
Q53
INS17497387
2
[Q_AUX_FET2*_DP]
R1017 0ohm
0.05 ohm
0603
R983 10k
0402
DP_PWR
0402
DP_MODE_C
R1011
5.1M/NC
5 %
0402
GND
1
1 %
C1408
0.1uF/NC
16V
10%
X7R
GND
2
R986
1M
5 %
0402
GND
3
4
Fused DP_PWR
DP-SKU
3V3
C24
0.1uF
16V
10%
X7R
0402
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
GND
U1
@analog.u_sw_pwr_tps2031(sym_1):page25_i139
2
IN
3
IN
4
EN
5
OC*
SO08_048X038
1.0A
8
OUT
7
OUT
6
OUT
1
GND
GND GNDGNDGNDGNDGND
3.3V
0.400
R996
10k
5 %
0402
C10
C20
10uF
0.1uF
6.3V
16V
10%
10%
X7R
X7R
0805
0402
CE
C12
330uF
20%
6.3V@85degC
TA-Polymer
0.975A@105degC,100KHz
0.015ohm
CAP_SMD_7343
DP_PWR
C23
330uF
20%
6.3V@85degC
TA-Polymer
0.975A@105degC,100KHz
0.015ohm
CAP_SMD_7343
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
IFPD DP
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
IFPD DP
IFPD DP
IFPD DP
P25Z
P25Z
P25Z
H
Design By:
Design By:
Design By:
NestonV10
NestonV10
NestonV10
2552Friday, March 03, 2017
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Page 26
ABCDEFGH
Page26: MIOA/B Interface and FRAME LOCK
1
2
1V8_MAIN
GND
R865 49.9ohm
COMMON0402
1 %
R863 49.9ohm
0402 COMMON
1 %
GND
C1172
0.1uF
16V
10%
X7R
0402
COMMON
R856
1k
1 %
0402
COMMON
MIOA_CAL_PD_VDDQ
MIOA_CAL_PU_GND
MIOA_VREF
R861
1k
1 %
0402
COMMON
0.305
0.305
0.305
G1U
@digital.u_gpu_gb3c_384(sym_13):page26_i156
BGA2397
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
1
THERM_OVERT*
OUT
{28,45,46}
NV3V3
2
R247
R319
R318
R252
NV3V3
5%
5%
R251
2.2k
2.2k
5 %
5 %
0402
0402
COMMON
COMMON
IN
BI
OUT
BI
OUT
GPIO9_THERM_ALERT*
nv_cap
NV3V3
R283
10k
5 %
0402
COMMON
GND
NV3V312V_F
R291
C107
10uF
6.3V
10%
X7R
0805
COMMON
R0805
1k
5 %
0402
COMMON
R292
10k/NC
5 %
0402
DNI
BAT54C
D4
3
@discrete.d_3pin_cc(sym_2):page27_i93
30V
0.2A
SOT23
COMMON
1
2
C369
1000pF
16V
10%
X5R
0603
COMMON
R0603
82.5K
0
R561
4
R0402
4.7K
RESET
+0.05R
7
DISCH
6
THRES
2
TRIG
5
CONT
C386
103PF
U20
16V
LM555CM
10%
SOP8_1_27MM_3_8MM
X7R
C0402
COMMON
BI
IN
OUT
R282
0ohm/NC
0.05 ohm
0805
COMMON
0.635
C223
0.1uF
50V
10%
X7R
0402
COMMON
5V
C496
1UF/10V,X5R
C0402
GND
8
VCC
GND
1
GND
FDBA
{3}
{3}
{32,34,44,47,50}
{32,34,44,47,50}
{32,34,47,50}
{32,34,47,50}
{44}
{5,7,10,12,15,17}
12V_PEX8_F1
R273
0ohm
0.05 ohm
0805
DNI
nv_cap
+0.05RR0402
0/NC
R637
GPIO16_FAN_PWMFAN_PWM
3
OUT
NO STUFF
FAN_PWR
C222
1uF/NC
25V
10%
X7R
0603
COMMON
GND
GPIO16_FAN_PWMGPIO16_FAN_PWM_BU
FAN_PWM
G
FAN
J11
1
@electro_mechanic.hdr_1x4(sym_1):page27_i114
2
MALE
3
2.0MM
VERTICAL
4
NORM
COMMON
Circuit
1
0
R549
R0402
0
R548
FAN_PWM_BU
+0.05R
R0402
0
R555
FAN_PWM_555_BUFAN_PWM_555
+0.05R
R0402
12V_F
+0.05R
Page Name:
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MISC1: Fan, Thermal, JTAG, GPIO, STEREO
MISC1: Fan, Thermal, JTAG, GPIO, STEREO
MISC1: Fan, Thermal, JTAG, GPIO, STEREO
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J18
1
1
2
2
3
3
44556
6
R296
10K
R0402
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
P25Z
P25Z
P25Z
H
2
3
CON3
6-pin OC Button Connector
INPUT_BU
Design By:
Design By:
Design By:
4
5
6
OUT
NestonV10
NestonV10
NestonV10
2752Friday, March 03, 2017
2752Friday, March 03, 2017
2752Friday, March 03, 2017
of
of
of
3
4
{44}
5
R254
2.2k
5 %
0402
COMMON
R259
33ohm
0402
COMMON
5 %
R851
33ohm
R846
R958
100k/NC
5 %
0402
COMMON
33ohm
0402
COMMON
5 %
OUT
OUT
OUT
OUT
R850
100k/NC
5 %
0402
COMMON
IN
IN
IN
IN
IN
BI
{34}
{34}
{34}
{34}
{34}
{34}
{45}
{48}
{32}
{46,48}
R302
R588
10k
10k/NC
5 %
5 %
0402
0402
DNI
NV3V3
COMMON
0402
5 %
2.2k
5 %
0402
COMMON
R253 33ohm
5 %
OUT
BI
BI
BI
IN
IN
IN
R639
1k
5 %
0402
COMMON
2.2k
2.2k
5 %
5 %
0402
0402
COMMON
COMMON
R250
COMMON
33ohm
COMMON0402
5 %
R899
10k
5 %
0402
COMMON
GND
{34}
{26}
{26}
{26}
{23}
{24}
{44}
R798
R0402 COMMON
K65K:R786=65K
K15K:R786=82.5K
R225
R1118
1k
R0402 COMMON
5 %
K65K:R812=14K
0402
K15K:R812=4.7K
C247
1000PF
16V
10%
X7R
C0402
COMMON
GND
COMMON0402
Page 28
ABCDEFGH
Page28: MISC2: ROM, Straps
STRAP2
L
LHL00010
1
L
H
H
STRAP1
L
H
H
H
ROM_SO
L
L
L
L
H
H
2
H
H
L
L
L
L
H
H
H
3
STRAP5
M
M
M
L
H
H
LL
L
H
L
M
M
H
M
M
H
STRAP4
H
H
L
L
L
L
L
4
M
M
L
HH
HH
H
H
L
L
L
L
H=High :Tied to 1.8V
M=Middle:Tied to 0.9V
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
L=Low :Tied to 0V
L
L
H
H001
L
L
STRAP0
ROM_SCLKROM_SI
STRAP3
H
L
HLM
MH
H
M
L
H
L
H
L
H
L
RAMCFG[4:0]
00000
H
00011
00110L
H
LL
H
L
H
00111
SOR_EXPOSED[3:0]
1111 DEFAULT
1110
1101
1100
1:ENABLE 0:DISABLE
SOR0/1/2/3 ENABLE
1011
H
L
H
M
L
H
M
MLH
L
H
M
1010
1001H
1000
0111
0110
0101
0100
0011
0010
0001
0000
SMB_ALT_ADDR
1
11
1
1
1
1
1
0
0
0
0
DEVID_SEL
1
1
1L
0
0
0
0
10H
1
1
1
0
PCIE_CFG
1
1
0
0
1
1
0
1
0
1
VGA_DEVICE
1
0
1
0
1
0
101L
0
11
0
10
0
1
0
0
0
1:SMB_ALT_ADDR ENABLE
0:SMB_ALT_ADDR DISABLE
1:DEVID_SEL REBRAND
0:DEVID_SEL ORIGNAL
0
0
0
0
1:PCIE_CFG LOW POWER
0:PCIE_CFG HIGH POWER
1:VGA_DEVICE ENABLE
0:VGA_DEVICE DISABLE
CE
1 DEFAULT
0
ASSEMBLY
PAGE DETAIL
GROUP0
STRAP0
STRAP1
STRAP2
<ASSEMBLY_DESCRIPTION>
MISC: ROM, STRAPS
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
STRAP5
R858
100k/NC
1 %
0402
COMMON
R857
100k
1 %
0402
COMMON
1V8_AON
R860
100k
1 %
0402
COMMON
R859
100k/NC
1 %
0402
COMMON
GND
G1W
@digital.u_gpu_gb3c_384(sym_17):page28_i85
BGA2397
COMMON
BG14
BH14
BJ14
BL14
BK14
BC15
R862
100k/NC
1 %
0402
COMMON
R864
100k
1 %
0402
COMMON
17/24 MISC2
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
STRAP5
GROUP1
ROM_CS
ROM_SO
ROM_SCLK
ROM_SI
ROM_SO
ROM_SCLK
ROM_SI
OVERT
BUFRST
GROUP2L
1
R867
100k/NC
1 %
0402
COMMON
R866
100k
1 %
0402
COMMON
1V8_AON
R848
100k/NC
1 %
0402
COMMON
R849
100k
1 %
0402
COMMON
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MISC2: ROM, Straps
MISC2: ROM, Straps
MISC2: ROM, Straps
P25Z
P25Z
P25Z
H
Design By:
Design By:
Design By:
NestonV10
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NestonV10
2852Friday, March 03, 2017
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2852Friday, March 03, 2017
of
of
of
2
3
4
5
1V8_AON
R23
R12
100k/NC
1 %
0402
COMMON
R11
100k
1 %
0402
COMMON
R14 100ohm
0402
R16 100ohm
0402
R9
100k/NC
1 %
0402
COMMON
R7
100k
1 %
0402
COMMON
GND
1V8_AON
R10
10k
5 %
0402
COMMON
ROM_SI_R
COMMON
5 %
ROM_SCLK_R
COMMON
5 %
OUT
STRAP3
STRAP4
STRAP5
U3
@memory.u_mem_fl_ser_512kx8(sym_1):page28_i82
SO_8
COMMON
7
HOLD*8VCC
3
WP*/NC
1
CS*
5
DIO
2
DO
6
CLK
SO08_048X038
W25Q40EWSNIG
G
100k/NC
1 %
0402
COMMON
R17
100k
1 %
0402
COMMON
ROM_CS*
BM13
ROM_SI
BN14
ROM_SO
BM14
ROM_SCLK
BL13
THERM_OVERT*
BJ16
BD14
FDBA
GND
{27,45,46}
R869
100k
1 %
0402
COMMON
R868
100k/NC
1 %
0402
COMMON
1V8_AON
C29
0.1uF
16V
10%
X7R
4
0402
COMMON
GND
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Page 29
ABCDEFGH
Page29: MISC2: XTAL. PLL
1
1
1V8_MAIN
Place near GPU
L2
30ohm
COMMON
2
BEAD_0603
GPU_PLLVDD_XS_SP
C80
22uF
6.3V
20%
X6S
0805
COMMON
C1083
4.7uF
6.3V
20%
X6S
0603
COMMON
OUT
{21,22,24,29}
2
GND
G1X
@digital.u_gpu_gb3c_384(sym_16):page43_i55
BGA2397
COMMON
16/24 XTAL_PLL
BA19
XS_PLLVDD
BB19
C1128
C1146
C913
0.1uF
0.1uF
16V
16V
10%
10%
X7R
C894
0.1uF
16V
10%
X7R
0402
COMMON
X7R
0402
COMMON
0402
COMMON
1V8_AON
XTALSSIN_RC
R883
0402
5 %
GND
3
GND
1V8_FB_PLL_REF
C1037
0.1uF
16V
10%
X7R
0402
COMMON
C1154
0.1uF
16V
10%
X7R
0402
COMMON
{4,9,14}
IN
4
0.1uF
16V
10%
X7R
0402
COMMON
10k
COMMON
XTALSSIN_GP
R876
10k
5 %
0402
COMMON
C1222
18pF
50V
5%
C0G
0402
COMMON
U
1005_BGA
GND
C1093
0.1uF
16V
10%
X7R
0402
COMMON
R881
10k
5 %
0402
COMMON
GNDGND
XS_PLLVDD
T41
GPCPLL_AVDD0
T42
GPCPLL_AVDD0
T43
GPCPLL_AVDD0
L16
GPCPLL_AVDD1
M16
GPCPLL_AVDD1
N16
GPCPLL_AVDD1
AV11
GPCPLL_AVDD2
AV12
GPCPLL_AVDD2
AV13
GPCPLL_AVDD2
AG41
FB_REFPLL_AVDD0
AG42
FB_REFPLL_AVDD0
M27
FB_REFPLL_AVDD1
N27
FB_REFPLL_AVDD1
AG12
FB_REFPLL_AVDD2
AG13
FB_REFPLL_AVDD2
BE13
XTALSSIN
BJ13
XTALIN
Y501
INS9901678
SMD_60X35
27MHz
XTALINXTALOUT
C1224
22pF
50V
5%
C0G
0402
COMMON
COMMON
123
4
XTAL_4P_S
Y502
INS9901712
SMD_60X35
27MHz/NC
COMMON
123
4
XTAL_4P_6X3_5MM
GNDGND
VID_PLLVDD
VID_PLLVDD
SP_PLLVDD
XTALOUTBUFF
XTALOUT
50OHM_NETCLASS1
BA20
BB20
BC20
BF13
BH13
XTALOUTBUFF
GND
1005_BGA
GND
C1223
22pF
50V
5%
C0G
0402
COMMON
C1076
0.1uF
16V
10%
X7R
0402
COMMON
GND
R877
100k
5 %
0402
COMMON
GPU_PLLVDD_XS_SP
C1088
0.1uF
16V
10%
X7R
0402
COMMON
GND
1005_BGA
R882 100k
0402 COMMON
5 %
SmartFan Strap Table
XTALOUTBUFF
STRAP VALUE
00V
1
3
IN
{21,22,24,29}
3
1V8_AON
Inverted
SmartFan PWM %
Voltage
GPIO DISABLED
33% PWM
0.9V
66% PWM
1.8V
4
5
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CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
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MISC: XTAL, PLL
5
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IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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5
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IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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<ASSEMBLY_DESCRIPTION>
PS: NVVDD Controller_PWR-MODULE
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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PS: NVVDD CONTROLLER_PWR-MODULE
PS: NVVDD CONTROLLER_PWR-MODULE
PS: NVVDD CONTROLLER_PWR-MODULE
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CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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<ASSEMBLY_DESCRIPTION>
PS: NVVDD Phase 1, 2
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IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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PS: NVVDD Phase 3, 4
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CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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PS: NVVDD Phase 5
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IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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PS: Dynamic power balance phase
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PS: Dynamic Power Balance Phases
PS: Dynamic Power Balance Phases
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PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
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PS: NVVDD Phase 15,16
PS: NVVDD Phase 15,16
PS: NVVDD Phase 15,16
Design By:
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Design By:
NestonV10
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4252Friday, March 03, 2017
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4252Friday, March 03, 2017
Page 43
ABCDEFGH
Page43: PS: DR5V SWITCHER
1
2
DEFAULT IS 12V_F
12V_PEX8_F1
3
R171
0
+0.05R
R0603
COMMON
12V_F
R1457
0/NC
+0.05R
R0603
COMMON
DR_5V_VIN_DN
D7
12
DIODE_SMD_SMA
40V
3A
COMMON
MBRA340T3 3.0A 12V_D_SCHOTTKY
10K
R1456
R0402 COMMON
5%
DR_5V_VIN_D
C227
10UF
16V
10%
X5R
C0805
COMMON
DR5V SWITCHER
C372
Co-Layout
R197
12.1K
1%
R0402
COMMON
GND
0.1UF/NC
16V
10%
X7R
C0402
COMMON
GND
Rb
C374
C0402 50V
47PF
5%
C0G
COMMON
R216
0/NC
R0805
+0.05R
R0805
DR_5V_FB_RC
R199
Vout = 0.8 * (1 + (R1/R2))
6.12V = 0.8 * (1 + (66.5K/12.1K))
VOUT=5.19V
U713
SOP8_1_27MM_3_8MM
COMMON
2
VIN
6
C244
0.1UF
16V
10%
X7R
C0402
COMMON
GND
DR_5V_EN
EN
1
PGND
3
AGND
APW7142-0.8V
GND
COMP
DR_5V_PHASE
7
LX
8
LX
DR_5V_ADJ
4
FB
DR_5V_COMP
5
C1881
82PF
50V
5%
C0G
C0402
COMMON
R173
24.9K
1%
R0402
COMMON
DR_5V_COMP_R
C385
1500PF
50V
10%
X7R
C0402
COMMON
GND
R198
Rt
66.5K
R0402 COMMON
1%
COMMONCOIL_5_4X6mm
0
R0402 COMMON
+0.05R
3.3uH M 4.1AL26
C375
C373
4.7UF/16V
10UF/16V
16V
16V
20%
20%
X5R
X5R
C0603
C0805
COMMON
COMMON
DR_5V_FB_R
R200
R0402 COMMON
3A
0.400
C384
0.1UF/16V
16V
10%
X7R
C0402
COMMON
GND
0
+0.05R
C171
10UF/16V
16V
20%
X5R
C0805
COMMON
C170
4.7UF/16V
16V
20%
X5R
C0603
COMMON
DR_5V
C172
0.1UF/16V
16V
10%
X7R
COMMON
C0402
GND
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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<ASSEMBLY_DESCRIPTION>
PS: Dynamic power balance logic
4
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P25Z
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Design By:
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Page 44
Page44: PS: Inputs, Filtering, and Monitoring
{46}
{45}
PLACE ON NORTH SIDE
{27,32,34,47,50}
{27,32,34,47,50}
OUT
IN
J13
PCI_Express Power
dip_powercon_8p_19X21MM
J15
PCI_Express Power
dip_powercon_8p_19X21MM
PS_PCIE_GOOD
INA3221_LOW_PERF*
56748
GND
COMMON4.2MM
56748
GND
IN
BI
MALE
4.2MM
COMMON
90
9
10
12V
1
12V
2
12V
3
MALE
90
9
10
1
2
3
I2CC_SCL_R
I2CC_SDA_R
J23
0
RS10.005ohm
MDU3603
DFN55X6_1_27MM
5
place caps close to INA3221
INA3221_VIN1P
C250
10uF/16V
6.3V
10%
X7R
0805
INA3221_VIN1N
COMMON
INA3221_VIN2P
C253
10uF/16V
6.3V
10%
X7R
0805
INA3221_VIN2N
COMMON
INA3221_VIN3P
C257
10uF/16V
6.3V
10%
X7R
0805
COMMON
DIP_HEAD1X2_2MM
1
2
RES_04_SMD_064X032_RKO
D
DFN55X6_1_27MM
Q45
D
G
4
R298 665k
0402
INA3221_VIN3N
DIP_HEAD1X2_2MM
1
2
345
Q44
S
MDU3603
DFN55X6_1_27MM
G
1
2
3
S
DFN55X6_1_27MM
1 %
R314 665k
1 %
R322
0402
1 %
<VOLTAGE>
5.5A
12V_IN_R
0.400
R301
0402 COMMON
1 %
GND
COMMON
R300
0402 COMMON
R310
GND
COMMON0402
R308
0402
R324
0402 COMMON
665k
GND
COMMON
R325
0402
R299
0402
0.05 ohm
R307 0ohm/NC
0402 DNI
0.05 ohm
R303
0.05 ohm
R305
0.05 ohm
R1280
0402
0.05 ohm
PEX_12V INPUT - 66W
12V
12
C174
C507
C506
0.1uF
1uF
16V
16V
10%
10%
X7R
X5R
0402
0603
COMMON
COMMON
R0603
R0402
3V3_F
C255
0.1uF
16V
10%
X7R
0402
COMMON
GND
R0402
0
R366
I2CC_SCL_R_M1
R0402
0
R367
I2CC_SDA_R_M1
3V3_F
R306
10k
5 %
0402
DNI
R0402
0
R373
PS_PCIE_GOOD_M1
INA3221_VPU
0ohm
COMMON
0402
0.05 ohm
R315
10uF/16V
25V
10%
X5R
C1206
COMMON
U26
@digital.u_pwrmtr_ina3221(sym_1):page38_i99
QFN16
COMMON
4
6
7
5
GND
10
13
16
3
TP
I2C Address:(1000 000b)
GND
VS
SCL
SDA
A0
PV
TC
VPU
GND
PAD
+
DIP_ECAPD8MM
GND
CE29
270UF/16V
R1460
INPUT_BU
R0805
+0.05R
R0805
12
VIN1P
11
VIN1N
15
VIN2P
14
VIN2N
2
VIN3P
1
VIN3N
INA3221_WARN
8
WARN
GPIO9_THERM_ALERT_R*
CRIT
9
Alternate
0.470uHL21
COIL_2_77MM_S
12V_INP
20ohm
12V_INN
20ohm
1 %
12V_PEX8_1_INP
20ohm
COMMON0402
1 %
12V_PEX8_1_INN
20ohm
COMMON
1 %
12V_PEX8_2_INP
20ohm
1 %
12V_PEX8_2_INN
20ohm
COMMON
1 %
OC_CRIT*
0ohm/NC
DNI
GPIO28_OC_WARN
0ohm/NC
DNI0402
GPIO9_THERM_ALERT*
0ohm/NC
COMMON0402
0ohm
COMMON
PEX6 INPUT 1 - 2x3 PCIE CON 75W
C1885
10uF/16V
16V
20%
X5R
C1206
COMMON
C1884
10uF/16V
25V
10%
X5R
C1206
COMMON
INPUT_BU
{45}
WARN AND CRIT ARE PULLED-UP TO 3.3V ON GPIO PAGE
0
R1458
R0805
+0.05R
R0805
12V_PEX8_1_INP
12V_PEX8_1_INN
0
R1459
INPUT_BU
IN
R0805
+0.05R
R0805
{45}
12V_PEX8_2_INP
12V_PEX8_2_INN
J21
1
RES_04_SMD_064X032_RKO
RS20.005ohm
5
D
DFN55X6_1_27MM
G
4
DFN55X6_1_27MM
Q22
MDU3603
DFN55X6_1_27MM
D
G
DFN55X6_1_27MM
J22
1
RS30.005ohm
Q42
MDU3603
DFN55X6_1_27MM
5
D
G
4
Q43
DFN55X6_1_27MM
MDU3603
DFN55X6_1_27MM
5
D
G
4
DFN55X6_1_27MM
DIP_HEAD1X2_2MM
DIP_HEAD1X2_2MM
2
1
2
3
Q24
S
MDU3603
1
2
345
S
DIP_HEAD1X2_2MM
DIP_HEAD1X2_2MM
2
RES_04_SMD_064X032_RKO
1
2
3
S
1
2
3
S
0.470uHL19
COIL_2_77MM_S
L1
L511
0.470uH
COIL_2_77MM_S
L1/L2 CO LAYOUT
L1 STUFFED FOR DESKTOP
L2 STUFFED FOR 2x4 EAST CONNECTOR STUFFED
I2C Address:(1000 000b)
PEX8 INPUT 1 - 2x4 PCIE CON 150W
12V_PEX8_VIN1
D501
1
3
2
D_3PIN_CC/NC
COMMONSOT230.2A30VINS16854842
12V
12V
12V
D502
1
3
2
D_3PIN_CC/NC
COMMONSOT230.2A30VINS16856008
TRUE
12V 6.25A
0.010
C203
0.1UF
16V
10%
X7R
C0402
COMMON
R632
0ohm/NC
0.05 ohm
R0603
PEX8 INPUT 2 - 2x4 PCIE CON 150W
12V_PEX8_VIN2
INPUT_PEX8_DT2*
R634
0ohm/NC
0.05 ohm
R0603
INPUT_PEX8_DT1*
INPUT_PEX8_FDT1*
INPUT_PEX8_FDT1*
TRUE
0.010
C1882
0.1UF
16V
10%
X7R
C0402
COMMON
INPUT_PEX8_FDT2*
<VOLTAGE>
0.008
12.5A
C206
1UF
16V
10%
X5R
C0603
COMMON
GND
OUT
OUT
C1883
1UF
16V
10%
X5R
C0603
COMMON
{27}
GNDGND
0.008
OUT
OUT
12V_F
12V
5.5A
0.400
C208
10uF/16V
16V
20%
X5R
C1206
COMMON
GND
{46}
OUT
{27}
OUT
{27}
OUT
12V_PEX8_F1
C207
10UF
16V
20%
X5R
C1206
COMMON
GND
12V_PEX8_F2
12V
15A
C230
10UF
16V
20%
X5R
C1206
COMMON
PEX 3V3 INPUT - 10W
3V3
C689
0.1uF
16V
10%
X7R
0402
COMMON
GND
I2CC_SCL_R
I2CC_SDA_R
PS_PCIE_GOOD
R293
INA3221_LOW_PERF*
R290
3V3
R364
R365
R362
R363
0
R0402 COMMON
+0.05R
0
R0402 COMMON
+0.05R
12V_F 12V_PEX8_F1
R174
0/NC
+0.05R
R0603
COMMON
C198
0.1UF
16V
10%
X7R
C0402
COMMON
GND
R0402
0
R0402
0
R0402 COMMON
+0.05R
R0402 COMMON
+0.05R
INA3221_PV_E12
R175
0
+0.05R
R0603
COMMON
dip_powercon_8p_19X21MM
J17
PCI_Express Power
3V3_F
I2CC_SCL_R_M2
I2CC_SDA_R_M2
0
0/NC
INA3221_VPU_E12
PLACE 0603 10UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT
nv_cap
3.3V
Alternate
L501
1uH
COMMON
SMD_045_041
COIL_2_77MM_S
LB503 220ohm/NC
COMMONBEAD_0805
LB501
220ohm/NC
COMMON
BEAD_0805
LB502 220ohm/NC
COMMONBEAD_0805
MALE
COMMON4.2MM
90
9
10
12V_PEX8_VIN3
12V
1
12V
2
12V
3
56748
D503
1
3
2
D_3PIN_CC/NC
GND
COMMONSOT230.2A30VINS16916152
R638
0ohm/NC
R0603
place caps close to INA3221
U54
QFN16P_80X80
R311
DNI
0/NC
R0402
+0.05R
COMMON
4
VS
6
SCL
7
SDA
5
A0
R361
0/NC
R0402
+0.05R
COMMON
GND
10
NC
13
NC
16
NC
3
GND
17
PAD
GND
5V_LED
R181
0/NC
+0.05R
R0603
COMMON
1
LED_VIN
1
1
LED2
Red
LED+
Green
Blue
18-038T-RGB
LED4P_1PX1PMM
LED3
Red
LED+
Green
Blue
18-038T-RGB
LED4P_1PX1PMM
LED4
Red
LED+
Green
Blue
18-038T-RGB
LED4P_1PX1PMM
VIN1P
VIN1N
VIN2P
VIN2N
VIN3P
VIN3N
CRIT
12
11
15
14
2
1
8
WARN
GPIO9_THERM_ALERT_R*_M2
9
2
3
4
2
3
4
2
3
4
R40 1.62K
R41 1.47K
R42 1.47K
R43 1.62K
R44 1.47K
R45 1.47K
R49 1.62K
R51 1.47K
R50 1.47K
C105
10uF
6.3V
10%
X7R
0805
COMMON
INPUT_PEX8_FDT3*
12V_INP_E12
C190
10uF/16V
16V
10%
X5R
C0805
COMMON
12V_INN_E12
R0603
R0603
R0603
R0603
R0603
R0603
R0603
R0603
R0603
INPUT_PEX8_DT3*
LEDR1_OUT
LEDG1_OUT
LEDB1_OUT
LEDR1_OUT
LEDG1_OUT
LEDB1_OUT
LEDR1_OUT
LEDG1_OUT
LEDB1_OUT
3A
0.400
C726
1uF
6.3V
10%
X7R
0603
DNI
TRUE
0.406 12V 6.25A
C572
0.1UF
16V
10%
X7R
C0402
COMMON
R374 665k
0402
BI
BI
BI
OUT
INPUT_BU
OUT
1 %
COMMON
nv_cap
C714
1uF
6.3V
10%
X6S
0402
COMMON
R297
R0402
R309
R0402
R1282
3V3_F
GND
C575
1UF
16V
10%
X5R
C0603
COMMON
{45}
0
R289
R0805 NO STUFF
+0.05R
R0805
20
GND
20
R372
0ohm/NC
0402
DNI
0.05 ohm
R370 0ohm/NC
0402 DNI
0.05 ohm
R369
0ohm/NC
DNI0402
0.05 ohm
R368
0ohm/NC
COMMON0402
0.05 ohm
0ohm
0402
COMMON
0.05 ohm
{50}
{50}
{50}
C704
0.1uF
16V
10%
X7R
0402
COMMON
C576
10uF/16V
16V
20%
X5R
C1206
COMMON
current through choke
GND
12V_PEX8_3_INP
J26
DIP_HEAD1X2_2MM
DIP_HEAD1X2_2MM
1
2
RES_04_SMD_064X032_RKO
RS40.005ohm
Q37
MDU3603
1
DFN55X6_1_27MM
2
3
5
S
D
G
4
Q38
MDU3603
DFN55X6_1_27MM
1
DFN55X6_1_27MM
2
3
5
S
D
G
4
DFN55X6_1_27MM
12V_PEX8_3_INN
OC_CRIT*INA3221_WARN_M2
GPIO28_OC_WARN
GPIO9_THERM_ALERT*
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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Page Name:
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Custom
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Date:Sheet
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PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
PS: Inputs, Filtering, and Monitoring
PS: Inputs, Filtering, and Monitoring
PS: Inputs, Filtering, and Monitoring
P25Z
P25Z
P25Z
Design By:
Design By:
Design By:
12V_PEX8_F3
12V
6.25A
0.406
0.470uHL31
COMMONCOIL_2_77MM_S
GND
NestonV10
NestonV10
NestonV10
4452Friday, March 03, 2017
4452Friday, March 03, 2017
4452Friday, March 03, 2017
of
of
of
12V
6.25A
0.406
C578
10uF/16V
16V
20%
X5R
C1206
COMMON
Page 45
ABCDEFGH
Page45: PS: 12V Current Steering & Hot Unplug Detect
QUADRO/TESLA:
12V CURRENT STEERING (UNDER POWER BOOT):
GUIDES CURRENT FROM PEX EDGE TO PEX 8 PIN INPUT AREA
For OpenVreg Type4 + Phase Doubler, 2 phase PSI mode
1
R148
INPUT_PEX8_DT1_R*
INPUT_PEX8_DT2_R*
INPUT_PEX8_DT3_R*
2
PEX 6 INPUT CONNECTOR IS NOT LOADED
PEX 6 INPUT DETECT MUST BE DISABLED
3
4
PEX 8 INPUT DETECT MUST BE USED TO CONTROL STEERING
NO STUFF R1
NO STUFF R2
NO STUFF C3
GeFORCE:
PEX 6 INPUT CONNECTOR IS LOADED
PEX 6 INPUT DETECT MUST BE USED TO CONTROL STEERING
A 2 x 4 auxiliary power connector plug from the power supply unit must not use the 75 W sense
coding (Sense1=Open and Sense0=Ground) to avoid end-user confusion.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
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<ASSEMBLY_DESCRIPTION>
PS: Current Sterring, Hot Unplug
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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PS: 12V Current Steering & Hot Unplug Detect
PS: 12V Current Steering & Hot Unplug Detect
PS: 12V Current Steering & Hot Unplug Detect
Size Project Name: Rev
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PROPERTY NOTE: This document contains information confidential and
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PROPERTY NOTE: This document contains information confidential and
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property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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Design By:
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Design By:
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4552Friday, March 03, 2017
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Page 46
ABCDEFGH
Page46: PS: NVVDD ENABLE,VOUT LED
High Priority
Protection Event
1
{44}
{44}
Under power boot protect
12V_PEX8_F1
2
GNDGND
0}
0}
IN
3
PEXVDD ENABLE
R1081
10k
COMMON
0402
5 %
12V_PEX_2R_DIV
R508
1k
0402
COMMON
1 %
IN
GPIO20_RGB
IN
GPIO29_RGB
IN
PS_1V8_AON_EN
GPIO15_YL
OC_CRIT*OC_CRIT_D
IN
PS_PCIE_GOOD
IN
MCU_THERMAL_ALERT
IN
THERM_OVERT*
IN
1B1C1E
C
B
1
MMBT2222A
C1429
E
10nF
16V
10%
X7R
0402
COMMON
0/NC
R667
R0402
0/NC
R665
R0402
0/NC
R666
R0402
0/NC
R669
R0402
{30,31,49}
NV3V3
NV3V3
3
Q55
SOT23
2
GND
{52}
{27,28,45}
12V_PEX8_F2
R683
10k
5 %
0402
COMMON
12V_PEX_R_DIV
R682
1k
5 %
0402
COMMON
GND
NV3V3
R668
10k/NC
5 %
0402
COMMON
1
2
@discrete.d_3pin_aa(sym_1):page45_i101
BAS70-06W/NC
SOT323
R648
0402
0.05 ohm
R647
0402 COMMON
R641 10k
0402
5 %
R645
0402
R642
0402
R636
0402
0.05 ohm
D507
70V
70mA
SOT323
COMMON
3
5 %
NV3V3
NV3V3
R649
R650
10k
10k/NC
5 %
5 %
0402
0402
COMMON
COMMON
0ohm
COMMON
INPUT_EXT_PRSNT_D
0ohm
0.05 ohm
COMMON
0.05 ohm
GND
10k
COMMON
0ohm
COMMON
1V8_MAIN
0ohm/NC
COMMON
1B1C1E
C543
10nF
25V
10%
X7R
0402
COMMON
R932
10k/NC
5 %
0402
COMMON
COMMON
B
1
R663
0402
@discrete.d_3pin_aa(sym_1):page45_i74
MCU_THERMAL_ALERT_EN
OVERT_3V3NV_PGODDPS1_NVVDD_EN_IN
12V_F
10k
5 %
12V_PEX_Q
3
C
Q56
MMBT2222A
SOT23
E
2
GND
1B1C1E
1
2
SOT323BAS70-06W
1
2
B
SOT323BAS70-06W
1
1V8_MAIN_PGOOD
1V8_AON
D509
R635
10k/NC
70V
70mA
5 %
0402
SOT323
COMMON
COMMON
3
D508
@discrete.d_3pin_aa(sym_1):page45_i91
70V
70mA
SOT323
COMMON
PS1_NVVDD_EN_PROT
3
3
C
Q57
MMBT2222A
SOT23
E
2
GND
OUT
NV3V3
R659
10k
5 %
0402
COMMON
NVVDD ENABLE
1V8_AON3V3_SEQ
R622
0ohm/NC
0.05 ohm
0402
COMMON
BUFFER_VCC_R
C540
0.1uF/NC
16V
0402
10%
5
X7R
U503
COMMON
1
4
2
SC70-5
COMMON
@logic.u_and_2in(sym_1):page45_i86
3
U_AND_2IN/NC
GND
R1310
0402
0.05 ohm
{49}
0ohm
COMMON
R617
0ohm/NC
0.05 ohm
0402
COMMON
R613
10k/NC
5 %
0402
COMMON
3V3_SEQ
3V3_F
R896
150ohm
1%
R0402
OUT
{34}
NVVDD
1V8_AON
R895
100ohm
1%
R0402
COMMON
R1091
100ohm
1%
R0402
COMMON
COMMON
D11
Blue
LED_0603
3
C
Q587
B
MMBT3904A
1
SOT23
COMMON
E
2
GND
3V3_F
R1092
150ohm
1%
R0402
COMMON
D803
Blue
LED_0603
3
1V8
C
Q585
B
MMBT3904A
1
SOT23
COMMON
E
2
GND
FBVDDQ
R889
100ohm
1%
R0402
GPU_VDDR_VPCI_V
COMMON
5V
R887
1.8K
1%
R0603
COMMON
5V
D8
Blue
LED_0603
GND
3V3_F3V3_F
R890
150ohm
1%
R0402
COMMON
D12
Blue
LED_0603
3
C
Q576
B
MMBT3904A
1
SOT23
COMMON
E
2
GND
12V_PEX8_F1
R894
10K
1%
R0402
COMMON
R815
330ohm
1%
R0402
COMMON
LED_0603
GND
3V3_F
60V
0.3A
2R@10V
0.8A
0.35W
+/-20V
1G1D1S
3
S
Q586
2N7002
SOT23
G
SOT23
1
D
2
GND
D10
Blue
R892
0ohm
1%
R0402
COMMON
D5
Blue
LED_0603
PEX_VDD
R1083
100ohm
1%
R0402
3V3
COMMON
DR_5V
R893
750ohm
1%
R0603
COMMON
12V
3V3_F
3
C
Q578
B
MMBT3904A
1
SOT23
COMMON
E
2
GND
DR_5V
GND
R1302
3V3_F
NV3V3
GND
R630
0402
R629
100k/NC
5 %
0402
COMMON
GND
0ohm/NC
COMMON
0402
0.05 ohm
R1301
0ohm/NC
0402
COMMON
0.05 ohm
0
COMMON
5 %
PS_NVVDD_EN
C531
10nF
25V
10%
X7R
0402
COMMON
GNDGND
R1084
150ohm
1%
R0402
COMMON
R888
1.8K
1%
R0603
COMMON
DR_5V
D802
Blue
LED_0603
D9
Blue
LED_0603
1
2
3
NV3V3
R1308
10k
5 %
0402
PS_NVVDD_PGOOD
4
IN
{30,34,47}
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
COMMON
POWER BRAKE
IN
POWER_BRAKE*
R721
0ohm
COMMON
0402
0.05 ohm
3V3
R190
NV3V3
10k/NC
5 %
0402
5
1
2
U_AND_2IN/NC
GND
U18
INS16886489
4
SC70-5
COMMON
3
GPIO11_LOGO_LED_POWER_BRAKE
{3}
COMMON
R189
0ohm/NC
0.05 ohm
0402
COMMON
GND
CE
PS_PEXVDD_EN
OUT
OUT
{27,48}
ASSEMBLY
PAGE DETAIL
{30}
<ASSEMBLY_DESCRIPTION>
PS: NVVDD ENABLE
4
5
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Galaxy Microsystems (HK) Ltd.
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PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
PS: NVVDD ENABLE, VOUT LED
PS: NVVDD ENABLE, VOUT LED
PS: NVVDD ENABLE, VOUT LED
P25Z
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H
Design By:
Design By:
Design By:
NestonV10
NestonV10
NestonV10
4652Friday, March 03, 2017
4652Friday, March 03, 2017
4652Friday, March 03, 2017
of
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Page 47
ABCDEFGH
Page47: GC6 MISC,SN EEPROM
PEX_CLKREQ*
1
{3}
{3}
2
GPU_EVENT*
3
BI
BI
PEX_CONN_B12
PEX_TCLK
R878
0ohm/NC
COMMON0402
0.05 ohm
R880 0ohm/NC
COMMON0402
0.05 ohm
R879
COMMON
PEX_CLKREQ_CONN*
10k/NC
5 %
0402
Accept 3V3 Logic
R1440 0ohm/NC
R0402
R213
10k
5 %
0402
COMMON
U800
1V8_AON
C577
0.1uF
16V
0402
10%
X7R
GND
COMMON
5
U511
1
@logic.u_and_2in(sym_1):page46_i36
PEX_RST_BUF*
4
2
SC70-5
R727
COMMON
100k
NL17SZ08DFT2G
SC70_5
3
GND
5 %
0402
COMMON
GND
C1430
0.1UF
COMMON
X7R
16V
C0402
8
5
A0
SDA
VCC
A1
A2
SCL
WP
GND
4
GND
10%
GND
R961
0
COMMONR0603
R1047
2.2K
5%
R0402
COMMON
D800
12
SM_SOD123
COMMON
PEX_RST_BUF*
(DEPENDS ON I2C BUS PULL UP VOLTAGE)
(TO SELECT 3.3V OR 5V)
3V3_F
30VR
0.5A
R1048
2.2K
5%
R0402
COMMON
OUT
R1051
0
5%
R0805
COMMON
R1049
10K
5%
R0402
COMMON
R1050
100K
5%
R0402
COMMON
GND
{3}
1
2
3
R1441 0ohm/NC
R0402
EEPROMA0
EEPROMA1
EEPROMA2
3V3_F
PEX_RST_MCU*
1
2
3
6
7
FT24C02A-USR
PEX_RST# LOGIC
3V3
RJU003N03/NC
Q540
D
SOT323
1G1D1S
NV3V3
@discrete.q_fet_n_enh(sym_2):page46_i6
NV3V3
R885
10k/NC
5 %
0402
COMMON
2S3
COMMON
SOT323_1G1D1S
G
1
GPU_PEX_CLKREQ*
BI
{3}
3.3V
{3}
J24
4
3
2
1
GND1
VERTICAL
COMMON
MALE
2.0MM
dip_head1x4_2mm_90
HDR_1X4_2.00mm 90 DEGREE DIP
EXTERNAL PROGRAMMING HEARDER
IN
VCC_3V3
I2C_CLK
I2C_DATA
5 pin 90 Degree Connector
GND
PEX_RST*
FBVDD/Q ENABLE
NV3V3
3V3_F
4
{30,34,46}
{30}
IN
IN
PS_NVVDD_PGOOD
PEX_OVREG_PGOOD
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
R1309
10k/NC
5 %
0402
COMMON
R789
10k/NC
5 %
0402
COMMON
R774 0ohm
0402 COMMON
0.05 ohm
R784
0402
0.05 ohm
0ohm/NC
COMMON
PS_FBVDD_EN
OUT
{32}
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
PS: GC6 MISC
GND
TEST HOLES
I2C_DATAI2C_CLK
3
4
1
2
GND
TP5
I2C_CLK
VCC_3V3
I2C_DATA
Test4P_SN
Test4P_SN
VCC_3V3
R1043
0/NC
I2CC_SCL_R
OUT
COMMONR0603
R1042
0
COMMONR0603
VCC_3V3
R1052
0/NC
5%
COMMON
R0402
R1053
5%
COMMON
R0402
GND
VCC_3V3
R1054
5%
COMMON
R0402
R1055
5%
COMMON
R0402
GND
FDBA
EEPROMA1
0
0/NC
EEPROMA0
VCC_3V3
GND
0
G
+0.05R
R1044
0/NC
I2CC_SDA_R
COMMONR0603
+0.05R
R1045
0
I2CB_SCL_R
OUT
COMMONR0603
+0.05R
R1046
0
I2CB_SDA_R
COMMONR0603
+0.05R
R1056
0
5%
COMMON
R0402
R1057
5%
COMMON
R0402
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Custom
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Date:Sheet
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@discrete.q_fet_n_enh(sym_2):page47_i70
SOT23_1G1D1S
COMMON
AO3416L
S
2
12V_F
LED
R614
R596
1k
1k
5 %
5 %
0805
0805
COMMON
COMMON
GND
J7
1
2
@electro_mechanic.hdr_1x2(sym_1):page47_i77
MALE
2.5MM
0
NORM
COMMON
DIP_FAN_2P
R572
R584
680ohm
680ohm/NC
5 %
5 %
0603
0603
COMMON
COMMON
3
SLI LED (GEFORCE ONLY)
R976
10k
0402
COMMON
1B1C1E
B
1
1 %
C
E
MMBT2222A-7-F
SOT23
1V8_AON
3
Q563
@discrete.q_npn(sym_1):page47_i17
SOT23_1B1C1E
COMMON
2
1G1D1S
4
{27}
IN
GPIO7_SLI_LED_DIM
1V8_AON
R994
3.3k
5 %
0402
COMMON
D
G
1
S
SOT323
NV3V3
R981
3.3k/NC
5 %
0402
COMMON
12V_F
R954
24.9k
1 %
0402
COMMON
GPIO7_LED_Q
3
Q556
@discrete.q_fet_n_enh(sym_2):page47_i19
SOT323_1G1D1S
COMMON
2
RJU003N03FRA 30V 300mA
30V
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
1.2A
0.2W
12V
GND
1G1D1S
G
1
12V_F
R951
24.9k
1 %
0402
COMMON
3
D
L2N7002LT1G
Q552
@discrete.q_fet_n_enh(sym_2):page47_i39
SOT23_1G1D1S
COMMON
GPIO7_LED_Q_N
S
2
SOT23
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
GND
12V_F
R1031
44.2ohm
1 %
0603
COMMON
@discrete.q_fet_n_enh(sym_2):page47_i36
SOT323_1G1D1S
COMMON
R2
44.2ohm
1 %
0603
COMMON
SLI_LED_R
SLI_LED_Q
3
D
Q548
1G1D1S
G
1
S
2
30V
0.3A
1.2A
0.2W
12V
PJC138K
SOT323
18mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
25V
-80A
3.4W
-30V
-10.8A
1S2
3
COMMON
MDV3605
G
4
DFET_SMD_032X033
INS16875532
DFN3X3
Q2
5
D
1G4D3S
SLI_LED
R925
0ohm/NC
0.05 ohm
0402
COMMON
GND
OUT
STUFF FOR QUADRO
{26}
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
GEFORCE LED AND SLI LED
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
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PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
PS: NV3V3, NV12V
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
NV3V3, NV12V
NV3V3, NV12V
NV3V3, NV12V
P25Z
P25Z
P25Z
H
Design By:
Design By:
Design By:
NestonV10
NestonV10
NestonV10
4952Friday, March 03, 2017
4952Friday, March 03, 2017
4952Friday, March 03, 2017
of
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Page 50
Page50: PS_ RGB LED,LCD LED
A
1
12V_PEX8_F1
2
12V_LED
3
4
5
12V_F
5V
3V3_F
5V_LED
R1073
R1074
R1076
NC/0
10k/NC/0
NC/0
0805
0805
0805
R1124
R0805
R0805
R0805
12k/NC
0805
R0805
GND
LED_B
LED_G
LED_R
3V3_F
5V_LED
R1142
R1143
R1141
10k/NC/0
NC/0
NC/0
0805
0805
0805
R1128
R0805
R0805
12k/NC
0805
R0805
GND
LED_G
LED_R
R769
10k
R770 1k
0402
LED_B
R0402
R937
10k
R1146 1k
0402
0402
R0402
R1136
10k
R1070 1k
0402
R0402
LEDR1_OUT
LEDG1_OUT
LEDB1_OUT
R771
10k
0402
R772 1k
R0402
3
0402
Q58
D
[Q_AUX_FET2*_DP]
INS17705164
G
SOT23_1G1D1S
1
R0402
0402
R0402
0402
S
2
Q_FET_N_ENH
R0402
GND
R1147
10k
0402
R1148 1k
R0402
3
0402
Q60
D
[Q_AUX_FET2*_DP]
INS17705207
G
SOT23_1G1D1S
1
R0402
S
2
Q_FET_N_ENH
GND
R1137
10k
0402
R1138 1k
R0402
3
0402
Q63
D
[Q_AUX_FET2*_DP]
INS17705267
G
SOT23_1G1D1S
1
R0402
S
2
Q_FET_N_ENH
R0402
GND
4-pin GPU fansink
R1119
PWM
TACH
R0402
0ohm
R1120 0ohm
R0402
12V
GND
R0402
0ohm
R1121
3
G
1
2
Q_FET_N_ENH
GND
3
G
1
2
Q_FET_N_ENH
GND
3
G
1
2
Q_FET_N_ENH
GND
BKT-LED
J27
1
INS17704960
2
MALE
3
2.0MM
VERTICAL
4
GPU
CON_WAFER232_004_TH_ST_P020
HDR_1X4
Q59
D
[Q_AUX_FET2*_DP]
INS17705184
SOT23_1G1D1S
S
LEDG1_OUT
Q61
D
[Q_AUX_FET2*_DP]
INS17705227
SOT23_1G1D1S
S
Q62
D
[Q_AUX_FET2*_DP]
INS17705247
SOT23_1G1D1S
S
5V_LED
R0805
C0402
LEDB1_OUT
LEDR1_OUT
R1123
NC/0
0805
12
ONBAORD_GPIO
12V_LED
R1122
0ohm
R0805
12
C191
C192
0.1uF
10uF/16V
16V
16V
X7R
X5R
C0402
0805
R0805
GND
NEW ADD R1107
LEDR1_OUT
LEDG1_OUT
LEDB1_OUT
3V3_F
5V_LED
R1139
R1140
0/NC
10k/NC/0
0805
0805
R1129
R0805
R0805
12k/NC
0805
R0805
R1144
10k
GND
R1145 1k
0402
0402
R0402
R1135
0ohm
R0402
R0402
1
12
C181
0.1uF
16V
X7R
C0402
GND
C0402
1
12V_LED
5V_LED
R1082
0/NC
0805
R0805
12
C193
0.1uF
16V
SS LED
X7R
R1132 0ohm
R1131 0ohm
R0402
R1133
4-pin GPU fansink
PWM
1
TACH
R0402
2
12V
3
GND
0ohm
4
R0402
J25
INS17704817
MALE
2.0MM
VERTICAL
GPU
CON_WAFER232_004_TH_ST_P020
HDR_1X4
C0402
C0402
LEDB1_OUT
LEDG1_OUT
LEDR1_OUT
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
RGB LED,LCD LED
RGB LED,LCD LED
RGB LED,LCD LED
P25Z
P25Z
P25Z
OUT{44}
OUT{44}
OUT{44}
Design By:
Design By:
Design By:
NestonV10
NestonV10
NestonV10
5052Friday, March 03, 2017
5052Friday, March 03, 2017
5052Friday, March 03, 2017
of
of
of
3
Q64
D
[Q_AUX_FET2*_DP]
INS17705287
G
SOT23_1G1D1S
S
2
AO3416L
GND
3
Q65
D
[Q_AUX_FET2*_DP]
INS17705307
G
SOT23_1G1D1S
1
S
2
AO3416L
GND
3
Q66
D
[Q_AUX_FET2*_DP]
INS17705327
G
SOT23_1G1D1S
S
2
AO3416L
GND
R1130
0ohm
R0805
12
C194
10uF/16V
16V
X5R
0805
R0805
GND
Page Name:
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Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
I2CC_SCL_R
OUT
R0402
R0402
R0402
R0402
OUT
OUT
12V_LED
R0805
BI{27,32,34,47,50}
OUT {27,32,34,47,50}
{27,32,34,44,47,50}
OUT
BI{27,32,34,44,47,50}
1
10
LED0
SCL
2
9
LED1
SDA
3
8
LED2
NC2
4
7
INIT
NC1
6
R1059
0ohm
5V_LED
R0805
GPIO20_RGB
GPIO29_RGB
0805
R0402
R1098
R0402
0ohm
R0402
R1060
0ohm
LED_BLED_GLED_R
R1071
0/NC
0805
R0805
R0402
3V3_F
R0805
GND
0ohm
4-pin GPU fansink
U702
R1072
10k/NC/0
R1125
12k/NC
PWM
1
TACH
2
12V
3
GND
4
VCC5NC
AW2013DNR
0805
0805
FAN LED
CON_WAFER232_004_TH_ST_P020
HDR_1X4
GND
NEW ADD U702
11
GND
ONBAORD_GPIO
R1085
10k
R1086 1k
0402
0402
R0402
R0402
{27,31,46}
OUT
OUT{27,31,46}
12V_LED
5V_LED
R1069
NC/0
0805
R0805
12
C176
0.1uF
16V
X7R
C0402
C0402
J14
INS17700629
MALE
2.0MM
VERTICAL
GPU
LCM
J28
VERTICAL
COMMON
MALE
2.0MM
CON_WAFER232_004_TH_ST_P020
R1095 0 OHM/NC
R0402
12
GND
C0402
R1068
0ohm
R0805
12
C177
10uF/16V
16V
X5R
0805
R0805
GND
4
3
2
1
C178
0.1uF
16V
X7R
C0402
VCC_3V3_LCD
SCL_R_LCD
SDA_R_LCD
GND1
3V3
R1093
NC/10K
R0402
5 pin 90 Degree Connector
R1117
R0805
GND
R1094 1K/NC
R0402
G
1
AO3416L
1
AO3416L
G
1
AO3416L
3V3_F
0ohm
12
C189
4.7uF
16V
X5R
0603
R0603
GND
12
C81
0.1UF/NC
16V
10%
X7R
C0402
COMMON
GND
0ohm
R1114
I2CB_SDA_R
0ohm
R1113
I2CB_SCL_R
0ohm/NC
R1115
0ohm/NC
R1116
I2CC_SDA_R
3
1G1D1S
D
Q49
2N7002/NC
SOT23
G
1
COMMON
S
2
60V
0.26A@25C
3R
0.31A
0.3W@25C
+/-20V
GND
LEDB1
3
Q19
D
[Q_AUX_FET2*_DP]
INS17701370
SOT23_1G1D1S
S
2
GND
LEDG1
3
Q20
D
[Q_AUX_FET2*_DP]
INS17701390
G
SOT23_1G1D1S
S
2
GND
LEDR1
3
Q21
D
[Q_AUX_FET2*_DP]
INS17701410
SOT23_1G1D1S
S
2
GND
3V3_F
R1077
R1075
NC/10K
NC/10K
R0402
R0402
R1108
0ohm
0603
R0402
12V_LED
R1078
0ohm
R0805
R1080
0ohm/NC
R0805
R1079
0ohm/NC
R0805
R765
10k
R766 1k
0402
0402
R0402
R0402
R823
10k
R952 1k
0402
0402
R0402
R0402
R1061
10k
R1062 1k
0402
0402
R0402
R0402
R0402
5V_LED
R767
10k
0402
R768 1k
R0402
3
0402
Q13
D
[Q_AUX_FET2*_DP]
INS17701198
G
SOT23_1G1D1S
1
R0402
S
2
Q_FET_N_ENH
GND
R1090
10k
0402
R1100 1k
R0402
3
0402
Q15
D
[Q_AUX_FET2*_DP]
INS17701284
G
SOT23_1G1D1S
1
R0402
S
2
Q_FET_N_ENH
GND
R1063
10k
0402
R1064 1k
R0402
3
0402
Q18
D
[Q_AUX_FET2*_DP]
INS17701350
G
SOT23_1G1D1S
1
R0402
S
2
Q_FET_N_ENH
GND
12
C179
R1087
R1088
10K/NC
0ohm
R0402
R1099
0ohm
0603
RGB_SDA
RGB_SCL
0.1uF
16V
R0402
X7R
C0402
GND
C0402
R1058
0ohm
0805
0805
R0402
R0402
R0402
0ohm
R1110
I2CB_SDA_R
BI{27,32,34,47,50}
R0402
0ohm
R1109
I2CB_SCL_R
OUT{27,32,34,47,50}
R0402
0ohm/NC
R1111
I2CC_SCL_R
OUT{27,32,34,44,47,50}
R0402
0ohm/NC
R1112
I2CC_SDA_R
BI{27,32,34,44,47,50}
LEDB1
3
Q14
D
[Q_AUX_FET2*_DP]
INS17701232
G
SOT23_1G1D1S
1
S
2
Q_FET_N_ENH
1
3
G
2
Q_FET_N_ENH
GND
GND
Q16
[Q_AUX_FET2*_DP]
INS17701310
SOT23_1G1D1S
LEDG1
D
S
ONBAORD_GPIO
R1097
R1096
R0402
R0402
0ohm
0 OHM/NC
LEDR1
3
Q17
D
[Q_AUX_FET2*_DP]
INS17701330
G
SOT23_1G1D1S
1
Q_FET_N_ENH
S
2
GND
LEDR1
LEDG1
LEDB1
R1066 0ohm
R0402
R1065 0ohm
R1067
Page 51
ABCDEFGH
Page51: Mechanical: Bracket/Thermal Solution
1
BKT2
2
3
HOLE125AAA
BRACKET
Brackets:
1
GNDGND
MECH. MOUNTING TOP
BKT3
HOLE125AAA
BRACKET
1
MECH. MOUNTING TOP
PEX_VDD
5V
GND
NVVDD
1
1
GPU_V
TP_OCT2MM_DIP
FBVDDQ
1
1
DDR_V
TP_OCT2MM_DIP
1
1
PCI_V
TP_OCT2MM_DIP
1
1
5V
TP_OCT2MM_DIP
GND
TP_OCT2MM_DIP
DR_5V
1V8_AON
1
1
1
1
DR_5V
TP_OCT2MM_DIP
1
1
1V8
TP_OCT2MM_DIP
1
2
3
GPU Stiffner
MEC7
BOARD STIFFENER
8 connected mounting pins
1234567
8
HSN_SAV_GF100GPU_T_AL_1
4
STIFFENER
GND
INS16897109
8PIN
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MECH
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Mechanical: Bracket/Thermal Solution
Mechanical: Bracket/Thermal Solution
Mechanical: Bracket/Thermal Solution
P25Z
P25Z
P25Z
H
Design By:
Design By:
Design By:
NestonV10
NestonV10
NestonV10
5152Friday, March 03, 2017
5152Friday, March 03, 2017
5152Friday, March 03, 2017
of
of
of
Page 52
ABCDEFGH
Page52: VR THERMAL PROTECTION
1
2
PS_THERMAL_VREF
GND
C574
4.7nF/NC
16V
10%
X7R
0402
COMMON
GND
GND
C570
1uF/NC
6.3V
10%
X6S
0402
COMMON
PS_TSENSE_IN
PS_TCOMP_VREF
C586
4.7nF/NC
16V
10%
X7R
0402
COMMON
3V3_F
R147
51.1ohm/NC
0603 COMMON
1 %
R146
51.1ohm/NC
0603
COMMON
1 %
C185
R145
1k/NC
1 %
0402
23
COMMON
1
R143
1.62k/NC
1 %
PS_THERMAL_ADJ
0402
COMMON
GND
2
V-
GND
1
COMP_THERM_ALERT
4
V+
3
COMMON
@analog.u_comp(sym_3):page51_i24
SC70_5
5
U508
R752
10k/NC
1 %
0402
COMMON
R755
10k/NC
1 %
0402
COMMON
GND
U_COMP/NC
3V3_F
C567
1uF/NC
6.3V
10%
X6S
0402
COMMON
GND
1uF/NC
6.3V
10%
U14
X6S
0402
@power_supply.u_shntreg_tl431(sym_2):page51_i30
COMMON
1.24V/NC
SOT23
SOT23
COMMON
GND
3V3_F
R722
10k/NC
5 %
0402
COMMON
1G1D1S
R697
C558
100k/NC
1uF/NC
1 %
6.3V
0402
10%
COMMON
X6S
0402
COMMON
GND
6
D
Q528A
@discrete.q_fet_n_enh(sym_2):page51_i17
SOT363
G
2
COMMON
S
1
Q_FET_N_ENH/NC
3V3_F
C542
47nF/NC
16V
10%
X7R
0402
COMMON
3
Q528B
@discrete.q_fet_n_enh(sym_2):page51_i38
SOT363
COMMON
4
COMP_THERM_ALERT_INV
GND
R654
10k/NC
5 %
0402
COMMON
R681
3.3k/NC
COMMON
0402
5 %
1B1C1E
THERM_ALERT_PNP_RQ
1G1D1S
D
THERM_ALERT_PNP_R
G
5
S
Q_FET_N_ENH/NC
STUFF FOR BYPASSING THE LATCHED CIRCUIT
E
B
1
C
Q_PNP/NC
R674
0402 COMMON
1 %
C552
47nF/NC
16V
10%
X7R
0402
COMMON
2
Q526
COMMON
SOT323_1B1C1E
@discrete.q_pnp(sym_1):page51_i42
3
THERM_ALERT_PNP
1.02k/NC
R653
10k/NC
5 %
0402
COMMON
R646
0ohm/NC
COMMON0402
0.05 ohm
1G1D1S
G
1
R652
10k/NC
5 %
0402
COMMON
3
D
Q525
@discrete.q_fet_n_enh(sym_2):page51_i44
SOT323_1G1D1S
COMMON
S
2
30V
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
1.2A
0.2W
12V
Q_FET_N_ENH/NC
GND
NV3V3
R644
10k/NC
5 %
0402
COMMON
MCU_THERMAL_ALERT
OUT
{46}
PS_THERMAL_R1
PS_THERMAL_R2
PS_THERMAL_R3
PS_THERMAL_R4
PS_THERMAL_R5
PS_THERMAL_R6
PS_THERMAL_R7
PS_THERMAL_R8
PS_FBVDD_VREF
IN
RT4
1k_B25/100=0K/NC
50%
0402
COMMON
RT3
1k_B25/100=0K/NC
50%
0402
COMMON
RT5
1k_B25/100=0K/NC
50%
0402
COMMON
RT2
1k_B25/100=0K/NC
50%
0402
COMMON
RT6
1k_B25/100=0K/NC
50%
0402
COMMON
RT7
1k_B25/100=0K/NC
50%
0402
COMMON
RT8
1k_B25/100=0K/NC
50%
0402
COMMON
RT9
1k_B25/100=0K/NC
50%
0402
COMMON
RT10
1k_B25/100=0K/NC
50%
0402
COMMON
GND
R155
0ohm/NC
0.05 ohm
0402
COMMON
R1040
64.9k/NC
1 %
0402
COMMON
{32}
3
4
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
VR Thermal Protection
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
VR THERMAL PROTECTION
VR THERMAL PROTECTION
VR THERMAL PROTECTION
P25Z
P25Z
P25Z
H
Design By:
Design By:
Design By:
NestonV10
NestonV10
NestonV10
5252Friday, March 03, 2017
5252Friday, March 03, 2017
5252Friday, March 03, 2017
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