Nvidia GeForce GTX 1080 Ti Schematics

A B

D

HGFEC

P25Z PG611 A00

12GB GDDR5X, 384b, 256Mx32

1

TALL DVI-D + DP + DP + HDMI/DP + DP

TABLE OF CONTENTS

Page

2

3

4

Description

1

Table of Contents

2

BLOCK DIAGRAM

3

PCI EXPRESS

4

MEMORY: GPU PARTITION A/B

MEMORY: FBA PARTITION[31:0]

5

6

MEMORY: FBA PARTITION[63:32]

MEMORY: FBB PARTITION[31:0]

7

MEMORY: FBB PARTITION[63:31]

8

MEMORY: GPU PARTITION C/D

9

MEMORY: FBC PARTITION[31:0]

10

MEMORY: FBC PARTITION[63:32]

11

MEMORY: FBD PARTITION[31:0]

12

MEMORY: FBD PARTITION[63:32]

13

MEMORY: GPU PARTITION E/F

14

MEMORY: FBE PARTITION[31:0]15

MEMORY: FBE PARTITION[63:32]

16

MEMORY: FBF PARTITION[31:0]

17

MEMORY: FBF PARTITION[63:32]

18

GPU PWR AND GND

19

20

GPU DECOUPLING

21

IFPAB DVI-D-DL

22

IFPE DP

23

IFPF DP

24

IFPC HDMI/DP

25

IFPD DP

Page

Description

26

MIOA/B INTERFACE & FRAME LOCK

27

MISC: FAN, THERMAL, JTAG, GPIO, STEREO

28

MISC: ROM, STRAPS

29

MISC: XTAL, PLL

30

PS: 5V, PEXVDD

31

PS: 1V8 Rails

32

PS: FBVDDQ

33

PS: NVVDD Controller_OVR8

34

PS: NVVDD Controller_PWR-MODULE

35

PS: NVVDD Phase 1, 2

36

PS: NVVDD Phase 3, 4

37

PS: NVVDD Phase 5

38

PS: NVVDD Phase 6, 7

39

PS: Dynamic power balance phase

40

PS: Dynamic power balance logic

41

PS: Input, filtering, and Monitoring

42

PS: Current Sterring, Hot Unplug

43

PS: NVVDD ENABLE

44

PS: GC6 MISC

45

GEFORCE LED AND SLI LED

46

PS: NV3V3, NV12V

PS: MCU47

48

MECH

49

VR Thermal Protection

1

2

3

4

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

A B D F H

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

Table of Contents

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

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Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

EC

G

Galaxy Microsystems (HK) Ltd.

Table of Contents

Table of Contents

Table of Contents

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

Neston V10

Neston V10

Neston V10

152Friday, March 03, 2017

152Friday, March 03, 2017

152Friday, March 03, 2017

A B C D E F G H

Page2: Block Diagram

1

NVVDD

SLI

STEREO

FRAME LOCK

Power Supply

NVVDD-PH2

Power Supply

NVVDD-PH3

Power Supply

1

EXT_12V 2x3 PWR 1

DYNAMIC NVVDD-PH4

MEM

2

DP/HDMI DP

MEM

E

D MEM C

MEM

Power Supply

NVVDD-PH4

Power Supply

NVVDD-PH5

EXT_12V 2x4 PWR 2

B

Power Supply

STUFF OPTION

2

DYNAMIC NVVDD-PH1

GP102

FBVDDQ

3

MEM

F

MEM A

DP

DVI-D

DP

4

1V8

Power Supply

FBVDD/Q PH1&PH2

Power Supply

NVVDD-PH7

Power Supply

NVVDD-PH6

Power Supply

NVVDD-PH1

Power Supply

1V8

STEER

PEX_12V Finger

3

4

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

BLOCK DIAGRAM

5V

PEX_VDD

Power Supply

5V SWITCHER

Power Supply

PEX_VDD

FAN

OVREG

FDBA

PEX_3V3 Finger

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

G

Galaxy Microsystems (HK) Ltd.

Block Diagram

Block Diagram

Block Diagram

P25Z

P25Z

P25Z

Design By:

Design By:

Design By:

H

Neston V10

Neston V10

Neston V10

252Friday, March 03, 2017

252Friday, March 03, 2017

252Friday, March 03, 2017

5

nv_cap

Page3: PCI Express

12V

3V3

1

0603

GND

2

3

4

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

A B C D E F G H

C1317
10uF/16V

16V

20%
X6S

0805

C62

4.7uF

6.3V

20%
X6S

nv_cap

GND

GND

GND

GND

B1
B2
A2
A3
B3

B8
A9

A10

B10

A1

B17

B12

B4
A4

B7
A12
B13
A15
B16
B18
A18

B31
A19
B30
A32

A20
B21
B22
A23
A24
B25
B26
A27
A28
B29
A31
B32

B48
A33

A34
B35
B36
A37
A38
B39
B40
A41
A42
B43
B44
A45
A46
B47
B49
A49

B81
A50
B82

A51
B52
B53
A54
A55
B56
B57
A58
A59
B60
B61
A62
A63
B64
B65
A66
A67
B68
B69
A70
A71
B72
B73
A74
A75
B76
B77
A78
A79
B80
A82

CON_FINGER_PEX_164

CN2

CON_X16

@electro_mechanic.con_pci_express(sym_1):page3_i243

+12V
+12V
+12V
+12V
+12V/RSVD

+3V3
+3V3
+3V3

+3V3AUX

PRSNT1
PRSNT2

RSVD

GND
GND
GND
GND
GND
GND
GND
GND
GND

PRSNT2
RSVD
RSVD
RSVD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

PRSNT2
RSVD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

TRST* JTAG1

END OF X1

END OF X4

END OF X8

PRSNT2
RSVD
RSVD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

END OF X16

N/A

TCLK JTAG2

TDI JTAG3
TDO JTAG4
TMS JTAG5

SMCLK
SMDAT

PERST

REFCLK
REFCLK

PERP0
PERN0

PETP0
PETN0

PERP1
PERN1

PETP1
PETN1

PERP2
PERN2

PETP2
PETN2

PERP3
PERN3

PETP3
PETN3

PERP4
PERN4

PETP4
PETN4

PERP5
PERN5

PETP5
PETN5

PERP6
PERN6

PETP6
PETN6

PERP7
PERN7

PETP7
PETN7

PERP8
PERN8

PETP8
PETN8

PERP9
PERN9

PETP9
PETN9

PERP10
PERN10

PETP10
PETN10

PERP11
PERN11

PETP11
PETN11

PERP12
PERN12

PETP12
PETN12

PERP13
PERN13

PETP13
PETN13

PERP14
PERN14

PETP14
PETN14

PERP15
PERN15

PETP15
PETN15

R891 0ohm

0.05 ohm

B9

PEX_TCLK

A5
A6

PEX_TDI

PEX_TDO

A7
A8

PEX_SMCLK

B5

PEX_SMDAT

B6

B11

WAKE

PEX_RST* PEX_RST_BUF*

A11

PEX_REFCLK

A13

PEX_REFCLK*

A14

PEX_TXX0

A16

PEX_TXX0*

A17

PEX_RX0

B14

PEX_RX0*

B15

PEX_TXX1

A21

PEX_TXX1*

A22

PEX_RX1

B19

PEX_RX1*

B20

PEX_TXX2

A25

PEX_TXX2*

A26

PEX_RX2

B23

PEX_RX2*

B24

PEX_TXX3

A29

PEX_TXX3*

A30

PEX_RX3

B27

PEX_RX3*

B28

PEX_TXX4

A35

PEX_TXX4*

A36

PEX_RX4

B33

PEX_RX4*

B34

PEX_TXX5

A39

PEX_TXX5*

A40

PEX_RX5

B37

PEX_RX5*

B38

PEX_TXX6

A43

PEX_TXX6*

A44

PEX_RX6

B41

PEX_RX6*

B42

PEX_TXX7

A47

PEX_TXX7*

A48

PEX_RX7

B45

PEX_RX7*

B46

PEX_TXX8

A52

PEX_TXX8*

A53

PEX_RX8

B50

PEX_RX8*

B51

PEX_TXX9

A56

PEX_TXX9*

A57

PEX_RX9

B54

PEX_RX9*

B55

PEX_TXX10

A60

PEX_TXX10*

A61

PEX_RX10

B58

PEX_RX10*

B59

PEX_TXX11

A64

PEX_TXX11*

A65

PEX_RX11

B62

PEX_RX11*

B63

PEX_TXX12

A68

PEX_TXX12*

A69

PEX_RX12

B66

PEX_RX12*

B67

PEX_TXX13

A72

PEX_TXX13*

A73

PEX_RX13

B70

PEX_RX13*

B71

PEX_TXX14

A76

PEX_TXX14*

A77

PEX_RX14

B74

PEX_RX14*

B75

PEX_TXX15

A80

PEX_TXX15*

A81

PEX_RX15

B78

PEX_RX15*

B79

0402

3V3

R898

R897

100k/NC

100k/NC

5 %

5 %

0402

0402

OUT

PEX_REFCLK PEXGEN3_SIGNALS

PEX_TXC0 PEXGEN3_SIGNALS

PEX_RX0 PEXGEN3_SIGNALS

PEX_RX0 PEXGEN3_SIGNALS

PEX_RX1 PEXGEN3_SIGNALS

PEX_TXC2 PEXGEN3_SIGNALS

PEX_TXC2 PEXGEN3_SIGNALS

PEX_RX2 PEXGEN3_SIGNALS

PEX_RX2 PEXGEN3_SIGNALS

PEX_TXC3 PEXGEN3_SIGNALS

PEX_TXC3 PEXGEN3_SIGNALS

PEX_TXC4 PEXGEN3_SIGNALS

PEX_TXC5 PEXGEN3_SIGNALS

PEX_RX5 PEXGEN3_SIGNALS

PEX_TXC6 PEXGEN3_SIGNALS

PEX_TXC6 PEXGEN3_SIGNALS

PEX_RX6 PEXGEN3_SIGNALS

PEX_TXC7 PEXGEN3_SIGNALS

PEX_TXC7 PEXGEN3_SIGNALS

PEX_RX7 PEXGEN3_SIGNALS

PEX_TXC8 PEXGEN3_SIGNALS

PEX_TXC8 PEXGEN3_SIGNALS

PEX_RX8 PEXGEN3_SIGNALS

PEX_TXC10 PEXGEN3_SIGNALS

PEX_TXC10 PEXGEN3_SIGNALS

PEX_TXC11 PEXGEN3_SIGNALS

PEX_TXC12 PEXGEN3_SIGNALS

PEX_TXC12 PEXGEN3_SIGNALS

PEX_RX12 PEXGEN3_SIGNALS

PEX_TXC13 PEXGEN3_SIGNALS

PEX_TXC13 PEXGEN3_SIGNALS

PEX_RX13 PEXGEN3_SIGNALS

PEX_TXC14 PEXGEN3_SIGNALS

PEX_TXC14 PEXGEN3_SIGNALS

PEX_RX14 PEXGEN3_SIGNALS

PEX_TXC15 PEXGEN3_SIGNALS

PEX_TXC15 PEXGEN3_SIGNALS

PEX_RX15 PEXGEN3_SIGNALS

PEXGEN3_SIGNALSPEX_REFCLK

PEXGEN3_SIGNALSPEX_TXC0

PEXGEN3_SIGNALSPEX_TXC1

PEXGEN3_SIGNALSPEX_TXC1

PEXGEN3_SIGNALSPEX_RX1

PEXGEN3_SIGNALSPEX_RX3

PEXGEN3_SIGNALSPEX_RX3

PEXGEN3_SIGNALSPEX_TXC4

PEXGEN3_SIGNALSPEX_RX4

PEXGEN3_SIGNALSPEX_RX4

PEXGEN3_SIGNALSPEX_TXC5

PEXGEN3_SIGNALSPEX_RX5

PEXGEN3_SIGNALSPEX_RX6

PEXGEN3_SIGNALSPEX_RX7

PEXGEN3_SIGNALSPEX_RX8

PEXGEN3_SIGNALSPEX_TXC9

PEXGEN3_SIGNALSPEX_TXC9

PEXGEN3_SIGNALSPEX_RX9

PEXGEN3_SIGNALSPEX_RX9

PEXGEN3_SIGNALSPEX_RX10

PEXGEN3_SIGNALSPEX_RX10

PEXGEN3_SIGNALSPEX_TXC11

PEXGEN3_SIGNALSPEX_RX11

PEXGEN3_SIGNALSPEX_RX11

PEXGEN3_SIGNALSPEX_RX12

PEXGEN3_SIGNALSPEX_RX13

PEXGEN3_SIGNALSPEX_RX14

PEXGEN3_SIGNALSPEX_RX15

5

G

D

3

Q_FET_N_ENH/NC

R244

0.05 ohm

SC70_6
0402

Q35B

@discrete.q_fet_n_enh(sym_7):page3_i280

S

4

0ohm/NC

C E

C1316

C1278

4.7uF

0.1uF

16V

16V

10%

20%

X7R

X6S

0603_LARGE

0402

GND

C64

0.1uF

16V

10%
X7R

PEX_CONN_B12

R874
0ohm/NC

0.05 ohm

0402

POWER_BRAKE*

R875
0ohm/NC

0.05 ohm

0402

PEX_RSVD4_POWER_BRAKE

PEX_PRSNT*

0402

BI

OUT

{47}

PEX_TCLK

NV3V3

2

G

D

6

Q_FET_N_ENH/NC

R237

SC70_6

0.05 ohm

0402

C1202

0.22uF

6.3V

X7R

C0402

C1184

0.22uF

6.3V

X7R

C0402

C1177

0.22uF

6.3V

X7R

C0402

C1170

0.22uF

6.3V

X7R

C0402

C1157

0.22uF

6.3V

X7R

C0402

C980

0.22uF

6.3V

X7R

C0402

C961

0.22uF

6.3V

X7R

C0402

C940

0.22uF

6.3V

X7R

C0402

C918

0.22uF

6.3V

X7R

C0402

C893 0.22uF

6.3V

X7R

C0402

C889 0.22uF

6.3V

X7R

C0402

C882 0.22uF

6.3V

X7R

C0402

C878

0.22uF

6.3V

X7R

C0402

C876

0.22uF

6.3V

X7R

C0402

C872

0.22uF

6.3V

X7R

C0402

C865

0.22uF

6.3V

X7R

C0402

Q35A

@discrete.q_fet_n_enh(sym_7):page3_i279

S

1

0ohm/NC

{47}

{47}

C1203 0.22uF

C0402

C1185

C0402

C1178 0.22uF

C0402

C1171

C0402

C1158

C0402

C972 0.22uF

C0402

C950 0.22uF

C0402

C934 0.22uF

C0402

C902

C0402

C892

C0402

C885

C0402

C879

C0402

C877

C0402

C875

C0402

C866

C0402

C863

C0402

6.3V

0.22uF

6.3V

6.3V

0.22uF

6.3V

0.22uF

6.3V

6.3V

6.3V

6.3V

0.22uF

6.3V

0.22uF

6.3V

0.22uF

6.3V

0.22uF

6.3V

0.22uF

6.3V

0.22uF

6.3V

0.22uF

6.3V

0.22uF

6.3V

BI

I2CS_SCL_R

I2CS_SDA_R

X7R

X7R

X7R

X7R

X7R

X7R

X7R

X7R

X7R

X7R

X7R

X7R

X7R

X7R

X7R

X7R

ASSEMBLY

PAGE DETAIL

{47}

OUT

OUT

IN

BI

PEX_TXC0 PEXGEN3_SIGNALS

PEX_TXC0 PEXGEN3_SIGNALS

PEX_TXC1 PEXGEN3_SIGNALS

PEX_TXC2 PEXGEN3_SIGNALS

PEX_TXC5 PEXGEN3_SIGNALS

PEX_TXC6 PEXGEN3_SIGNALS

PEX_TXC7 PEXGEN3_SIGNALS

PEX_TXC7 PEXGEN3_SIGNALS

PEX_TXC8 PEXGEN3_SIGNALS

PEX_TXC8 PEXGEN3_SIGNALS

PEX_TXC9 PEXGEN3_SIGNALS

PEX_TXC10 PEXGEN3_SIGNALS

PEX_TXC11 PEXGEN3_SIGNALS

PEX_TXC11 PEXGEN3_SIGNALS

PEX_TXC12 PEXGEN3_SIGNALS

PEX_TXC12 PEXGEN3_SIGNALS

PEX_TXC13 PEXGEN3_SIGNALS

PEX_TXC13 PEXGEN3_SIGNALS

PEX_TXC14 PEXGEN3_SIGNALS

{27}
{27}

GPU_PEX_CLKREQ*

PEX_TX0
PEX_TX0*

PEX_TX1
PEX_TX1*

PEX_TX2

PEX_TX2*

PEX_TX3
PEX_TX3*

PEX_TX4

PEX_TX4*

PEX_TX5
PEX_TX5*

PEX_TX6
PEX_TX6*

PEX_TX7

PEX_TX7*

PEX_TX8
PEX_TX8*

PEX_TX9

PEX_TX9*

PEX_TX10
PEX_TX10*

PEX_TX11
PEX_TX11*

PEX_TX12

PEX_TX12*

PEX_TX13
PEX_TX13*

PEX_TX14

PEX_TX14*

PEX_TX15
PEX_TX15*

<ASSEMBLY_DESCRIPTION>

PCI EXPRESS

NET MAX_CURRENTVOLTAGE MIN_WIDTH

3V3

3V3

GND

GND

8.5A 0.400

0.4003.0A

1

G1A

@digital.u_gpu_gb3c_384(sym_1):page3_i288

1/24 PCI_EXPRESS

BA32

NC

BD31

PEX_RST

BE32

PEX_CLKREQ

BG40

PEX_REFCLK

BF40

PEX_REFCLK

BJ32

PEX_TX0

BK32

PEX_TX0

BM32

PEX_RX0

BM33

PEX_RX0

BH32

PEX_TX1

PEXGEN3_SIGNALSPEX_TXC1

PEXGEN3_SIGNALSPEX_TXC2

PEXGEN3_SIGNALSPEX_TXC3

PEXGEN3_SIGNALSPEX_TXC3

PEXGEN3_SIGNALSPEX_TXC4

PEXGEN3_SIGNALSPEX_TXC4

PEXGEN3_SIGNALSPEX_TXC5

PEXGEN3_SIGNALSPEX_TXC6

PEXGEN3_SIGNALSPEX_TXC9

PEXGEN3_SIGNALSPEX_TXC10

PEXGEN3_SIGNALSPEX_TXC14

PEXGEN3_SIGNALSPEX_TXC15

PEXGEN3_SIGNALSPEX_TXC15

BG32

PEX_TX1

BM34

PEX_RX1

BN34

PEX_RX1

BG33

PEX_TX2

BF33

PEX_TX2

BN35

PEX_RX2

BN36

PEX_RX2

BK34

PEX_TX3

BJ34

PEX_TX3

BM36

PEX_RX3

BL36

PEX_RX3

BF35

PEX_TX4

BG35

PEX_TX4

BM37

PEX_RX4

BL37

PEX_RX4

BG36

PEX_TX5

BH36

PEX_TX5

BN38

PEX_RX5

BM38

PEX_RX5

BH37

PEX_TX6

BJ37

PEX_TX6

BN39

PEX_RX6

BN40

PEX_RX6

BJ38

PEX_TX7

BK38

PEX_TX7

BM40

PEX_RX7

BL40

PEX_RX7

BG41

PEX_TX8

BH41

PEX_TX8

BM41

PEX_RX8

BL41

PEX_RX8

BH42

PEX_TX9

BJ42

PEX_TX9

BN42

PEX_RX9

BM42

PEX_RX9

BJ43

PEX_TX10

BK43

PEX_TX10

BN43

PEX_RX10

BN44

PEX_RX10

BK44

PEX_TX11

BJ44

PEX_TX11

BM44

PEX_RX11

BM45

PEX_RX11

BF44

PEX_TX12

BG44

PEX_TX12

BM46

PEX_RX12

BN46

PEX_RX12

BG45

PEX_TX13

BH45

PEX_TX13

BN47

PEX_RX13

BN48

PEX_RX13

BJ46

PEX_TX14

BJ47

PEX_TX14

BM48

PEX_RX14

BM49

PEX_RX14

BK47

PEX_TX15

BK48

PEX_TX15

BM50

PEX_RX15

BN50

PEX_RX15

BGA_2397_P090_P085_P080_P100_450X450

PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD

PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD

PEX_PLL_HVDD
PEX_PLL_HVDD

PEX_TERMP
PEX_TERMP

NC
NC

NC
NC

NC
NC

FDBA

Place near balls

BB37
BC37

C933

C923

C925

0402

1005_BGA

C956

0.1uF

16V

10%
X7R

1 %

C917

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

C967

C971

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

1V8_MAIN

2.49k

GND

BC38

1uF

1005_BGA

1005_BGA

50OHM_NETCLASS1

PEX_TERMP

1uF

6.3V

6.3V

10%

10%

X6S

X6S

1005_BGA

C978

C985

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

1005_BGA

1005_BGA

GND

R840

0402

BC39
BC40
BD37
BD38
BD39
BD40

BA33
BA34
BA37
BB33
BB34
BC31
BC32
BC33
BC34
BC35
BC36
BD32
BD33
BD34
BD35
BD36

BB35
BA35

BB32
BC25

BC30
BD42

BB29
BB31

BA36
BB36

G

Place between
GPU and PS

C86

C87

4.7uF

4.7uF

6.3V

6.3V

20%

20%

X6S

X6S

0603

0603

C957

C1017

4.7uF

6.3V

20%
X6S

0603

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

C70

4.7uF

10uF

6.3V

6.3V

20%

10%

X6S

X7R

0603

0805

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

PCI Express

PCI Express

PCI Express

P25Z

P25Z

P25Z

Design By:

Design By:

Design By:

H

0805

0805

PEX_VDD

C88

C89

22uF

22uF

6.3V

6.3V

20%

10%

X6S

X7R

0805

GND

1V8_MAIN

C71

C69

10uF

22uF

6.3V

6.3V

10%

20%

X7R

X6S

0805

GND

Neston V10

Neston V10

Neston V10

of

of

of

352Friday, March 03, 2017

352Friday, March 03, 2017

352Friday, March 03, 2017

2

3

4

5

A B C D E F G H

Page4: MEMORY: GPU Partition A/B

1

{5,6}

2

3

{5,6}

{5,6}

4

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

FB_DATA

FBA_D[63..0]

BI

FB_DBI

FBA_DBI[7..0]

IN

FB_EDC

FBA_EDC[7..0]

OUT

1V8_MAIN

FBA_D0

0

FBA_D1

1

FBA_D2

2

FBA_D3

3

FBA_D4

4

FBA_D5

5

FBA_D6

6

FBA_D7

7

FBA_D8

8

FBA_D9

9

FBA_D10

10

FBA_D11

11

FBA_D12

12

FBA_D13

13

FBA_D14

14

FBA_D15

15

FBA_D16

16

FBA_D17

17

FBA_D18

18

FBA_D19

19

FBA_D20

20

FBA_D21

21

FBA_D22

22

FBA_D23

23

FBA_D24

24

FBA_D25

25

FBA_D26

26

FBA_D27

27

FBA_D28

28

FBA_D29

29

FBA_D30

30

FBA_D31

31

FBA_D32

32

FBA_D33

33

FBA_D34

34

FBA_D35

35

FBA_D36

36

FBA_D37

37

FBA_D38

38

FBA_D39

39

FBA_D40

40

FBA_D41

41

FBA_D42

42

FBA_D43

43

FBA_D44

44

FBA_D45

45

FBA_D46

46

FBA_D47

47

FBA_D48

48

FBA_D49

49

FBA_D50

50

FBA_D51

51

FBA_D52

52

FBA_D53

53

FBA_D54

54

FBA_D55

55

FBA_D56

56

FBA_D57

57

FBA_D58

58

FBA_D59

59

FBA_D60

60

FBA_D61

61

FBA_D62

62

FBA_D63

63

FBA_DBI0

0

FBA_DBI1

1

FBA_DBI2

2

FBA_DBI3

3

FBA_DBI4

4

FBA_DBI5

5

FBA_DBI6

6

FBA_DBI7

7

FBA_EDC0

0

FBA_EDC1

1

FBA_EDC2

2

FBA_EDC3

3

FBA_EDC4

4

FBA_EDC5

5

FBA_EDC6

6

FBA_EDC7

7

Place near GPU

LB1 30ohm

IND_SMD_0603

C83
22uF

6.3V

20%
X6S

0805

GND

G1B

@digital.u_gpu_gb3c_384(sym_2):page4_i626

2/24 FBA

AH43

FBA_D0

AH46

FBA_D1

AH44

FBA_D2

AH45

FBA_D3

AH50

FBA_D4

AH51

FBA_D5

AH53

FBA_D6

AH52

FBA_D7

AK51

FBA_D8

AK53

FBA_D9

AK50

FBA_D10

AK52

FBA_D11

AK47

FBA_D12

AJ47

FBA_D13

AK45

FBA_D14

AJ46

FBA_D15

AP52

FBA_D16

AP53

FBA_D17

AP50

FBA_D18

AP51

FBA_D19

AP46

FBA_D20

AP45

FBA_D21

AP43

FBA_D22

AP44

FBA_D23

AN46

FBA_D24

AN47

FBA_D25

AM45

FBA_D26

AM47

FBA_D27

AM50

FBA_D28

AM52

FBA_D29

AM51

FBA_D30

AM53

FBA_D31

BH52

FBA_D32

BH50

FBA_D33

BH53

FBA_D34

BH51

FBA_D35

BK51

FBA_D36

BK53

FBA_D37

BL52

FBA_D38

BK52

FBA_D39

BF49

FBA_D40

BE47

FBA_D41

BF50

FBA_D42

BE48

FBA_D43

BG51

FBA_D44

BG50

FBA_D45

BG48

FBA_D46

BF51

FBA_D47

AW49

FBA_D48

AW50

FBA_D49

AW47

FBA_D50

AW48

FBA_D51

BA49

FBA_D52

BB49

FBA_D53

BA47

FBA_D54

AY47

FBA_D55

AW43

FBA_D56

BA43

FBA_D57

AW44

FBA_D58

AY44

FBA_D59

BB46

FBA_D60

BB44

FBA_D61

BA44

FBA_D62

BB43

FBA_D63

AH49

FBA_DQM0

AK49

FBA_DQM1

AP47

FBA_DQM2

AM49

FBA_DQM3

BJ51

FBA_DQM4

BG53

FBA_DQM5

BA50

FBA_DQM6

BB47

FBA_DQM7

AH48

FBA_DQS_WP0

AK48

FBA_DQS_WP1

AP49

FBA_DQS_WP2

AM48

FBA_DQS_WP3

BJ50

FBA_DQS_WP4

BF48

FBA_DQS_WP5

AW46

FBA_DQS_WP6

BB48

FBA_DQS_WP7

BGA_2397_P090_P085_P080_P100_450X450

C85

4.7uF

6.3V

20%
X6S

0603

0603

FB_CMD

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32
FBA_CMD33
FBA_CMD34
FBA_CMD35

FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1

FBA_WCK01
FBA_WCK01

FBA_WCKB01
FBA_WCKB01

FBA_WCK23
FBA_WCK23

FBA_WCKB23
FBA_WCKB23

FBA_WCK45
FBA_WCK45

FBA_WCKB45
FBA_WCKB45

FBA_WCK67
FBA_WCK67

FBA_WCKB67
FBA_WCKB67

FBA_PLL_AVDD
FBA_PLL_AVDD
FBA_PLL_AVDD

AT52
AT53
AT51
AU52
AU51
AV52
AV53
AW51
AW52
AY53
AT48
AT50
AT47
AT46
AT45
BF53
BF52
BE51
BD51
BD52
BD53
BC52
BB51
BB53
BB52
BA51
AU48
AU50
AU47
AU46
AU45
AY52
AY51
AT49
AU49

AT43
AT44
AU43
AU44

AK44
AK43
AJ43
AJ44
AM43
AM44
AN43
AN44
BC49
BC50
BC47
BC48
BC46
BD46
BC44
BC45

AL41
AL42
AL43

FBA_CMD1

FBA_CMD2
FBA_CMD3

FBA_CMD4
FBA_CMD5
FBA_CMD6

FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11

FBA_CMD12
FBA_CMD13

FBA_CMD14
FBA_CMD15
FBA_CMD16

FBA_CMD17
FBA_CMD18

FBA_CMD19
FBA_CMD20
FBA_CMD21

FBA_CMD22
FBA_CMD23

FBA_CMD24
FBA_CMD25
FBA_CMD26

FBA_CMD27
FBA_CMD28

FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DEBUG0
FBA_DEBUG1

FBA_CLK0
FBA_CLK0*
FBA_CLK1

FBA_CLK1*

FBA_WCK01

FBA_WCK01*

FBA_WCK23
FBA_WCK23*

FBA_WCK45
FBA_WCK45*

FBA_WCK67

FBA_WCK67*

0402

GND

C895

0.1uF

16V

10%
X7R

FBA_CMD0

AR53

1V8_FB_PLL_REF

C84

4.7uF

6.3V

20%
X6S

FBA_CMD[31..0]

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

R833

1 %

0402

FBA_CLK0 FB_CLK

FB_CLKFBA_CLK0

FBA_CLK1 FB_CLK

FBA_CLK1 FB_CLK

FBA_WCK01 FB_WCK

FB_WCKFBA_WCK01

FB_WCKFBA_WCK23

FB_WCKFBA_WCK23

FB_WCKFBA_WCK45

FBA_WCK45 FB_WCK

FB_WCKFBA_WCK67

FBA_WCK67 FB_WCK

OUT

FBA_CMD13
FBA_CMD29

FBA_CMD1

FBA_CMD17

60.4ohm/NC
R832

0402

nv_res

0402

nv_res

0402

C E

BI

60.4ohm/NC

1 %

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

{4,9,14,29}

R345
10k

5 %

R348
10k

5 %

ASSEMBLY

PAGE DETAIL

FBVDDQ

FBVDDQ

0402

0402

nv_res

R349
10k

5 %

nv_res

R350
10k

5 %

GND

{5,6}BI{7,8}

GDDR5X CMD Mapping

CMD

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

CMD31

CMD32

CMD33

CMD34

CMD35

{5}
{5}
{6}
{6}

{5}
{5}

{5}
{5}

{6}
{6}

{7,8}

{6}
{6}

{7,8}

<ASSEMBLY_DESCRIPTION>

MEMORY: GPU PARTITION A/B

CAS*

RST*

RAS*

A1_A9

A0_A10

A12_A13

ABI*

A6_A11

A7_A8

A4_BA2

A5_BA1

A3_BA3

A2_BA0

CKE*

A14_A15

WE*

DBG0

DBG1

32..630..31

CAS*

RST*

RAS*

A1_A9

A0_A10

A12_A13

ABI*

A6_A11

A7_A8

A4_BA2

A5_BA1

A3_BA3

A2_BA0

CKE*

A14_A15

WE*

DBG0

DBG1

FBB_CMD13
FBB_CMD29

FBB_CMD1

FBB_CMD17

IN

OUT

FB_DATA

FBB_D[63..0]

FB_DBI

FBB_DBI[7..0]

FB_EDC

FBB_EDC[7..0]

nv_res

0402

nv_res

0402

G1C

@digital.u_gpu_gb3c_384(sym_3):page4_i627

FBB_D0

0

FBB_D1

1

FBB_D2

2

FBB_D3

3

FBB_D4

4

FBB_D5

5

FBB_D6

6

FBB_D7

7

FBB_D8

8

FBB_D9

9

FBB_D10

10

FBB_D11

11

FBB_D12

12

FBB_D13

13

FBB_D14

14

FBB_D15

15

FBB_D16

16

FBB_D17

17

FBB_D18

18

FBB_D19

19

FBB_D20

20

FBB_D21

21

FBB_D22

22

FBB_D23

23

FBB_D24

24

FBB_D25

25

FBB_D26

26

FBB_D27

27

FBB_D28

28

FBB_D29

29

FBB_D30

30

FBB_D31

31

FBB_D32

32

FBB_D33

33

FBB_D34

34

FBB_D35

35

FBB_D36

36

FBB_D37

37

FBB_D38

38

FBB_D39

39

FBB_D40

40

FBB_D41

41

FBB_D42

42

FBB_D43

43

FBB_D44

44

FBB_D45

45

FBB_D46

46

FBB_D47

47

FBB_D48

48

FBB_D49

49

FBB_D50

50

FBB_D51

51

FBB_D52

52

FBB_D53

53

FBB_D54

54

FBB_D55

55

FBB_D56

56

FBB_D57

57

FBB_D58

58

FBB_D59

59

FBB_D60

60

FBB_D61

61

FBB_D62

62

FBB_D63

63

FBB_DBI0

0

FBB_DBI1

1

FBB_DBI2

2

FBB_DBI3

3

FBB_DBI4

4

FBB_DBI5

5

FBB_DBI6

6

FBB_DBI7

7

FBB_EDC0

0

FBB_EDC1

1

FBB_EDC2

2

FBB_EDC3

3

FBB_EDC4

4

FBB_EDC5

5

FBB_EDC6

6

FBB_EDC7

7

FBVDDQ

nv_res

R346

R351

10k

10k

5 %

5 %

0402

nv_res

R347

R352

10k

10k

5 %

5 %

0402

GND

3/24 FBB

F52

FBB_D0

F50

FBB_D1

F53

FBB_D2

F51

FBB_D3

D51

FBB_D4

D53

FBB_D5

C52

FBB_D6

D52

FBB_D7

H49

FBB_D8

J47

FBB_D9

H50

FBB_D10

J48

FBB_D11

G51

FBB_D12

G50

FBB_D13

G48

FBB_D14

H51

FBB_D15

R49

FBB_D16

R50

FBB_D17

R47

FBB_D18

R48

FBB_D19

N49

FBB_D20

M49

FBB_D21

N47

FBB_D22

P47

FBB_D23

R43

FBB_D24

N43

FBB_D25

R44

FBB_D26

P44

FBB_D27

M46

FBB_D28

M44

FBB_D29

N44

FBB_D30

M43

FBB_D31

AF43

FBB_D32

AF46

FBB_D33

AF44

FBB_D34

AF45

FBB_D35

AF50

FBB_D36

AF51

FBB_D37

AF53

FBB_D38

AF52

FBB_D39

AD51

FBB_D40

AD53

FBB_D41

AD50

FBB_D42

AD52

FBB_D43

AD47

FBB_D44

AE47

FBB_D45

AD45

FBB_D46

AE46

FBB_D47

Y52

FBB_D48

Y53

FBB_D49

Y50

FBB_D50

Y51

FBB_D51

Y46

FBB_D52

Y45

FBB_D53

Y43

FBB_D54

Y44

FBB_D55

AA46

FBB_D56

AA47

FBB_D57

AB45

FBB_D58

AB47

FBB_D59

AB50

FBB_D60

AB52

FBB_D61

AB51

FBB_D62

AB53

FBB_D63

E51

FBB_DQM0

G53

FBB_DQM1

N50

FBB_DQM2

M47

FBB_DQM3

AF49

FBB_DQM4

AD49

FBB_DQM5

Y47

FBB_DQM6

AB49

FBB_DQM7

E50

FBB_DQS_WP0

H48

FBB_DQS_WP1

R46

FBB_DQS_WP2

M48

FBB_DQS_WP3

AF48

FBB_DQS_WP4

AD48

FBB_DQS_WP5

Y49

FBB_DQS_WP6

AB48

FBB_DQS_WP7

BGA_2397_P090_P085_P080_P100_450X450

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8

FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32
FBB_CMD33
FBB_CMD34
FBB_CMD35

FBB_CLK0
FBB_CLK0
FBB_CLK1
FBB_CLK1

FBB_WCK01
FBB_WCK01

FBB_WCKB01
FBB_WCKB01

FBB_WCK23
FBB_WCK23

FBB_WCKB23
FBB_WCKB23

FBB_WCK45
FBB_WCK45

FBB_WCKB45
FBB_WCKB45

FBB_WCK67
FBB_WCK67

FBB_WCKB67
FBB_WCKB67

FBB_PLL_AVDD
FBB_PLL_AVDD
FBB_PLL_AVDD

FDBA

FBB_CMD0

H53

FBB_CMD1

H52

FBB_CMD2

J51

FBB_CMD3

K51

FBB_CMD4

K52

FBB_CMD5

K53

FBB_CMD6

L52

FBB_CMD7

M51

FBB_CMD8

M53

FBB_CMD9

M52

FBB_CMD10

N51

FBB_CMD11

U48

FBB_CMD12

U50

FBB_CMD13

U47

FBB_CMD14

U46

FBB_CMD15

U45

FBB_CMD16

W53

FBB_CMD17

V52

FBB_CMD18

V53

FBB_CMD19

V51

FBB_CMD20

U52

FBB_CMD21

U51

FBB_CMD22

T52

FBB_CMD23

T53

FBB_CMD24

R51

FBB_CMD25

R52

FBB_CMD26

P53

FBB_CMD27

V48

FBB_CMD28

V50

FBB_CMD29

V47

FBB_CMD30

V46

FBB_CMD31

V45
P51
P52

FBB_DEBUG0

U49

FBB_DEBUG1

V49

FBB_CLK0

U43

FBB_CLK0*

U44

FBB_CLK1

V43

FBB_CLK1*

V44

FBB_WCK01

L49

FBB_WCK01*

L50
L47
L48

FBB_WCK23

K46

FBB_WCK23*

L46
L45
L44

FBB_WCK45

AD44

FBB_WCK45*

AD43
AE43
AE44

FBB_WCK67

AB43

FBB_WCK67*

AB44
AA43
AA44

1V8_FB_PLL_REF

AC41
AC42
AC43

C898

0.1uF

16V

10%
X7R

0402

GND

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

G

FB_CMD

FBB_CMD[31..0]

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

R831 60.4ohm/NC

1 %

0402

FBB_CLK0 FB_CLK

FBB_CLK0 FB_CLK

FBB_CLK1 FB_CLK

FB_CLKFBB_CLK1

FB_WCKFBB_WCK01

FB_WCKFBB_WCK01

FB_WCKFBB_WCK23

FB_WCKFBB_WCK23

FBB_WCK45 FB_WCK

FB_WCKFBB_WCK45

FB_WCKFBB_WCK67

FBB_WCK67 FB_WCK

IN

MEMORY: GPU Partition A/B

MEMORY: GPU Partition A/B

MEMORY: GPU Partition A/B

P25Z

P25Z

P25Z

OUT

FBVDDQ

R830 60.4ohm/NC

1 %

0402

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

{4,9,14,29}

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Design By:

Design By:

Design By:

Neston V10

Neston V10

Neston V10

452Friday, March 03, 2017

452Friday, March 03, 2017

452Friday, March 03, 2017

H

1

{7,8}

2

{7}
{7}
{8}
{8}

3

{7}
{7}

{7}
{7}

{8}
{8}

{8}
{8}

4

5

of

of

of

A B C D E F G H

Page5: MEMORY: FBA Partition 31..0

GND

M11C

@memory.u_mem_gddr5x_x32(sym_7):page5_i578

Mirrored

A10

VSS

A5

VSS

B1

VSS

B14

VSS

D1

VSS

D11

VSS

D14

VSS

F1

VSS

F14

VSS

H1

VSS

H14

VSS

J12

VSS

J3

VSS

K1

VSS

K14

VSS

K3

VSS

L12

VSS

L3

VSS

M1

VSS

M14

VSS

P1

VSS

P14

VSS

T1

VSS

T11

VSS

T14

VSS

V1

VSS

V14

VSS

W10

VSS

W5

VSS

B13

VSSQ

B2

VSSQ

C10

VSSQ

C5

VSSQ

D13

VSSQ

D2

VSSQ

E10

VSSQ

E5

VSSQ

F13

VSSQ

F2

VSSQ

G10

VSSQ

G5

VSSQ

N10

VSSQ

N5

VSSQ

P13

VSSQ

P2

VSSQ

R10

VSSQ

R5

VSSQ

T13

VSSQ

T2

VSSQ

U10

VSSQ

U5

VSSQ

V13

VSSQ

V2

VSSQ

add 1k to VDD

FBVDDQ

W12

MF

A1

VDD

A11

VDD

A14

VDD

A4

VDD

D10

VDD

G1

VDD

G14

VDD

H10

VDD

H5

VDD

J1

VDD

J14

VDD

L1

VDD

L14

VDD

M10

VDD

M5

VDD

N1

VDD

N14

VDD

T10

VDD

W1

VDD

W11

VDD

W14

VDD

W4

VDD

A13

VDDQ

A2

VDDQ

B10

VDDQ

B5

VDDQ

C1

VDDQ

C13

VDDQ

C14

VDDQ

C2

VDDQ

E1

VDDQ

E11

VDDQ

E13

VDDQ

E14

VDDQ

E2

VDDQ

E4

VDDQ

F10

VDDQ

F5

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

J13

VDDQ

J2

VDDQ

L13

VDDQ

L2

VDDQ

M12

VDDQ

M3

VDDQ

N13

VDDQ

N2

VDDQ

P10

VDDQ

P5

VDDQ

R1

VDDQ

R11

VDDQ

R13

VDDQ

R14

VDDQ

R2

VDDQ

R4

VDDQ

U1

VDDQ

U13

VDDQ

U14

VDDQ

U2

VDDQ

V10

VDDQ

V5

VDDQ

W13

VDDQ

W2

VDDQ

A3

VPP

W3

VPP

1V8_AON

1

2

3

M11B

{4}

1

BI

2

{4}
{4}

3

FBA_D[31..0]

M11D

@memory.u_mem_gddr5x_x32(sym_2):page5_i499

MIRRORED

x32

FBA_D0

0

FBA_D1

1

FBA_D2

2

FBA_D3

3

FBA_D4

4

FBA_D5

5

FBA_D6

6

FBA_D7

7

FBA_EDC0
FBA_DBI0

FBA_D8

8

FBA_D9

9

FBA_D10

10

FBA_D11

11

FBA_D12

12

FBA_D13

13

FBA_D14

14

FBA_D15

15

FBA_EDC1

FBA_DBI1

FBA_WCK01

IN

FBA_WCK01*

IN

x16

V4

DQ0

NC

V3

DQ1

NC

U4

DQ2

NC

U3

DQ3

NC

P4

DQ4

NC

P3

DQ5

NC

N4

DQ6

NC

N3

DQ7

NC

T3

EDC0

NC

R3

DBI0

NC

V11

DQ8

V12

DQ9

U11

DQ10

U12

DQ11

P11

DQ12

P12

DQ13

N11

DQ14

N12

DQ15

T12

EDC1

R12

DBI1

T4

WCK01

T5

WCK01

{4}
{4}

{7,10,12,15,17,27}

FBA_D16

16

FBA_D17

17

FBA_D18

18

FBA_D19

19

FBA_D20

20

FBA_D21

21

FBA_D22

22

FBA_D23

23

FBA_EDC2
FBA_DBI2

FBA_D24

24

FBA_D25

25

FBA_D26

26

FBA_D27

27

FBA_D28

28

FBA_D29

29

FBA_D30

30

FBA_D31

31

FBA_EDC3

FBA_DBI3

FBA_WCK23

IN

FBA_WCK23*

IN

GPIO10_FBVREF_SEL

IN

M11A

@memory.u_mem_gddr5x_x32(sym_4):page5_i544

MIRRORED

x32

x16

B11

DQ16

B12

DQ17

C11

DQ18

C12

DQ19

F11

DQ20

F12

DQ21

G11

DQ22

G12

DQ23

D12

EDC2

GND

E12

DBI2

B4

DQ24

B3

DQ25

C4

DQ26

C3

DQ27

F4

DQ28

F3

DQ29

G4

DQ30

G3

DQ31

D3

EDC3

E3

DBI3

D4

WCK23

D5

WCK23

1G1D1S

NC

NC

NC

NC

NC

NC

NC

NC

NC

D

G

1

S

SOT23

GND

3

Q12

@discrete.q_fet_n_enh(sym_2):page5_i595

2

AO3416L

30V

0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V

1.2A

0.2W
12V

{4,6}

{4}
{4}

FBA_VREF_Q

0.300

FBVDDQ

R112
549ohm

1 %

R106

1.33k

1 %

GND

FBA_CMD[31..0]

IN

FBA_CLK0

IN

FBA_CLK0*

IN

R113
931ohm

1 %

0.300

C99
820pF

50V

10%
X7R

GND GND

FBA_CMD2

2

FBA_CMD0

0

FBA_CMD15

15

FBA_CMD6

6

FBA_CMD4

4

FBA_CMD3

3

FBA_CMD12

12

FBA_CMD11

11

FBA_CMD9

9

FBA_CMD10

10

FBA_CMD7

7

FBA_CMD8

8

FBA_CMD5

5

FBA_CMD14

14

FBA_CMD1

1

FBA_CMD13

13

OUT

FBA_VREFC

0.140A

R111

FBA_ZQ_1

121ohm

1 %

@memory.u_mem_gddr5x_x32(sym_5):page5_i580

M4

RAS

H4

CAS

H11

WE

K4

ABI

L4

A0_A10

L5

A1_A9

L11

A2_BA0

L10

A3_BA3

J11

A4_BA2

J10

A5_BA1

J5

A6_A11

J4

A7_A8

K5

A12_A13

K12

A15_A14

K2

RESET

M11

CKE

K11

CLK

K10

CLK

M2

TCK

M13

TDI

A12

TDO

H2

TMS

{6}

K13

VREFC

H13

ZQ

4

FBVDDQ

C721
10uF

4V

20%
X6S

FBVDDQ

C712
22uF

4V

20%
X6S

5

{4,6}

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

IN

C791
10uF

4V

20%
X6S

C743
22uF

4V

20%
X6S

FB_DBI

FBA_DBI[7..0]

CLOSE DRAM

C815
10uF

4V

20%
X6S

AROUND DRAM

C822
22uF

4V

20%
X6S

C1281

C823
10uF

4V

20%
X6S

C738
22uF

4V

20%
X6S

0

1

2

3

4

5

6

7

FBA_DBI0

FBA_DBI1
FBA_DBI2

FBA_DBI3
FBA_DBI4
FBA_DBI5

FBA_DBI6
FBA_DBI7

C711

C780

C826

1uF

1uF

6.3V

10%
X6S

C742
22uF

4V

20%
X6S

1uF

6.3V

6.3V

10%

10%
X6S

X6S

C794

C810
10uF

10uF

4V

4V

20%

20%

X6S

X6S

GND

{4,6}

1uF

6.3V

10%
X6S

IN

C804
1uF

6.3V

10%
X6S

FBVDDQ

UNDER DRAM FOR X32

C725
1uF

6.3V

10%
X6S

FB_EDC

FBA_EDC[7..0]

C720

C727
1uF

6.3V

10%
X6S

C779
1uF

6.3V

10%
X6S

C801

C767

C811

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

C774

C760

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

FBA_EDC0

0

FBA_EDC1

1

FBA_EDC2

2

FBA_EDC3

3

FBA_EDC4

4

FBA_EDC5

5

FBA_EDC6

6

FBA_EDC7

7

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

GND

C747

C753

C783

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

C776

1uF

1uF

6.3V

6.3V

10%

10%
X6S

X6S

GND

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

MEMORY: FBA PARTITION[31:0]

1V8_AON

C1469

C285

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

GND

4

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

FDBA

G

Galaxy Microsystems (HK) Ltd.

MEMORY: FBA Partition 31..0

MEMORY: FBA Partition 31..0

MEMORY: FBA Partition 31..0

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

Neston V10

Neston V10

Neston V10

552Friday, March 03, 2017

552Friday, March 03, 2017

552Friday, March 03, 2017

H

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A B C D E F G H

Page6: MEMORY: FBA Partition 63..32

1

{4}

2

FBA_D[63..32]

BI

M12D

@memory.u_mem_gddr5x_x32(sym_1):page6_i467
BGA190
COMMON

FBA_D32

32

FBA_D33

33

FBA_D34

34

FBA_D35

35

FBA_D36

36

FBA_D37

37

FBA_D38

38

FBA_D39

39

FBA_EDC4

FBA_DBI4

FBA_D40

40

FBA_D41

41

FBA_D42

42

FBA_D43

43

FBA_D44

44

FBA_D45

45

FBA_D46

46

FBA_D47

47

FBA_EDC5
FBA_DBI5

{4}
{4}

FBA_WCK45

IN

FBA_WCK45*

IN

NORMAL

B4

DQ0

B3

DQ1

C4

DQ2

C3

DQ3

F4

DQ4

F3

DQ5

G4

DQ6

G3

DQ7

D3

EDC0

E3

DBI0

x32

x16

B11

DQ8

NC

B12

DQ9

NC

C11

DQ10

NC

C12

DQ11

NC

F11

DQ12

NC

F12

DQ13

NC

G11

DQ14

NC

G12

DQ15

NC

D12

EDC1

GND

E12

DBI1

NC

D4

WCK01

D5

WCK01

{4}
{4}

FBA_D48

48

FBA_D49

49

FBA_D50

50

FBA_D51

51

FBA_D52

52

FBA_D53

53

FBA_D54

54

FBA_D55

55

FBA_EDC6

FBA_DBI6

FBA_D56

56

FBA_D57

57

FBA_D58

58

FBA_D59

59

FBA_D60

60

FBA_D61

61

FBA_D62

62

FBA_D63

63

FBA_EDC7
FBA_DBI7

FBA_WCK67

IN

FBA_WCK67*

IN

M12A

@memory.u_mem_gddr5x_x32(sym_3):page6_i497
BGA190
COMMON

NORMAL

V11

DQ16

V12

DQ17

U11

DQ18

U12

DQ19

P11

DQ20

P12

DQ21

N11

DQ22

N12

DQ23

T12

EDC2

R12

DBI2

x32

x16

V4

DQ24

NC

V3

DQ25

NC

U4

DQ26

NC

U3

DQ27

NC

P4

DQ28

NC

P3

DQ29

NC

N4

DQ30

NC

N3

DQ31

NC

T3

EDC3

NC

R3

DBI3

NC

T4

WCK23

T5

WCK23

{4,5}

{4}
{4}

{5}

3

IN

IN

IN

IN

FBA_CMD[31..0]

FBA_CLK1
FBA_CLK1*

C101
820pF

50V

10%
X7R
0402
COMMON

GND GND

FBA_VREFC

GND

M12C

@memory.u_mem_gddr5x_x32(sym_6):page6_i522

BGA190

COMMON

Normal

W12

MF

add 1k to VSS

A10

VSS

A5

VSS

B1

VSS

B14

VSS

D1

VSS

D11

VSS

D14

VSS

F1

VSS

F14

VSS

H1

VSS

H14

VSS

J12

VSS

J3

VSS

K1

VSS

K14

VSS

K3

VSS

L12

VSS

L3

VSS

M1

VSS

M14

VSS

P1

VSS

P14

VSS

T1

VSS

T11

VSS

T14

VSS

V1

VSS

V14

VSS

W10

VSS

W5

VSS

B13

VSSQ

B2

VSSQ

C10

VSSQ

C5

VSSQ

D13

VSSQ

D2

VSSQ

E10

VSSQ

E5

VSSQ

F13

VSSQ

F2

VSSQ

G10

VSSQ

G5

VSSQ

N10

VSSQ

N5

VSSQ

P13

VSSQ

P2

VSSQ

R10

VSSQ

R5

VSSQ

T13

VSSQ

T2

VSSQ

U10

VSSQ

U5

VSSQ

V13

VSSQ

V2

VSSQ

FBVDDQ

A1

VDD

A11

VDD

A14

VDD

A4

VDD

D10

VDD

G1

VDD

G14

VDD

H10

VDD

H5

VDD

J1

VDD

J14

VDD

L1

VDD

L14

VDD

M10

VDD

M5

VDD

N1

VDD

N14

VDD

T10

VDD

W1

VDD

W11

VDD

W14

VDD

W4

VDD

A13

VDDQ

A2

VDDQ

B10

VDDQ

B5

VDDQ

C1

VDDQ

C13

VDDQ

C14

VDDQ

C2

VDDQ

E1

VDDQ

E11

VDDQ

E13

VDDQ

E14

VDDQ

E2

VDDQ

E4

VDDQ

F10

VDDQ

F5

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

J13

VDDQ

J2

VDDQ

L13

VDDQ

L2

VDDQ

M12

VDDQ

M3

VDDQ

N13

VDDQ

N2

VDDQ

P10

VDDQ

P5

VDDQ

R1

VDDQ

R11

VDDQ

R13

VDDQ

R14

VDDQ

R2

VDDQ

R4

VDDQ

U1

VDDQ

U13

VDDQ

U14

VDDQ

U2

VDDQ

V10

VDDQ

V5

VDDQ

W13

VDDQ

W2

VDDQ

A3

VPP

W3

VPP

1V8_AON

M12B

@memory.u_mem_gddr5x_x32(sym_5):page6_i509
BGA190

FBA_CMD18

18

FBA_CMD16

16

FBA_CMD31

31

FBA_CMD22

22

FBA_CMD20

20

FBA_CMD19

19

FBA_CMD28

28

FBA_CMD27

27

FBA_CMD25

25

FBA_CMD26

26

FBA_CMD23

23

FBA_CMD24

24

FBA_CMD21

21

FBA_CMD30

30

FBA_CMD17

17

FBA_CMD29

29

R107

0402

FBA_ZQ_2

121ohm

COMMON

1 %

COMMON

H4

RAS

M4

CAS

M11

WE

K4

ABI

J4

A0_A10

J5

A1_A9

J11

A2_BA0

J10

A3_BA3

L11

A4_BA2

L10

A5_BA1

L5

A6_A11

L4

A7_A8

K5

A12_A13

K12

A15_A14

K2

RESET

H11

CKE

K11

CLK

K10

CLK

M2

TCK

M13

TDI

A12

TDO

H2

TMS

K13

VREFC

H13

ZQ

1

2

3

4

FBVDDQ

C805
10uF

4V

20%
X6S
0603
COMMON

FBVDDQ

C741
22uF

4V

20%
X6S
0603W
COMMON

5

{4,5}

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

IN

C705
10uF

4V

20%
X6S
0603
COMMON

C824
22uF

4V

20%
X6S
0603W
COMMON

FB_DBI

FBA_DBI[7..0]

CLOSE DRAM

C799
10uF

4V

20%
X6S
0603
COMMON

AROUND DRAM

C702
22uF

4V

20%
X6S
0603W
COMMON

C788
10uF

4V

20%
X6S
0603
COMMON

C809
22uF

4V

20%
X6S
0603W
COMMON

C787

C723

C768

C817

C773

1uF

1uF

1uF

6.3V

6.3V

10%

10%
X6S

X6S

0402

0402

COMMON

COMMON

C785

C828

22uF

10uF

4V

4V

20%

20%
X6S

X6S
0603

0603W

COMMON

COMMON

{4,5}

FBA_DBI0

0

FBA_DBI1

1

FBA_DBI2

2

FBA_DBI3

3

FBA_DBI4

4

FBA_DBI5

5

FBA_DBI6

6

FBA_DBI7

7

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

C709
10uF

4V

20%
X6S
0603
COMMON

GND

IN

1uF

6.3V

10%
X6S
0402
COMMON

FBVDDQ

UNDER DRAM FOR X32

C758
1uF

6.3V

10%
X6S
0402
COMMON

FB_EDC

FBA_EDC[7..0]

C734
1uF

6.3V

10%
X6S
0402
COMMON

C706
1uF

6.3V

10%
X6S
0402
COMMON

C759
1uF

6.3V

10%
X6S
0402
COMMON

C772
1uF

6.3V

10%
X6S
0402
COMMON

C728

C713
1uF

6.3V

10%
X6S
0402
COMMON

C770
1uF

6.3V

10%
X6S
0402
COMMON

C769
1uF

6.3V

10%
X6S
0402
COMMON

GND

C766
1uF

6.3V

10%
X6S
0402
COMMON

C754
1uF

6.3V

10%
X6S
0402
COMMON

GND

C752
1uF

6.3V

10%
X6S
0402
COMMON

1uF

6.3V

10%
X6S
0402
COMMON

C737
1uF

6.3V

10%
X6S
0402
COMMON

FBA_EDC0

0

FBA_EDC1

1

FBA_EDC2

2

FBA_EDC3

3

FBA_EDC4

4

FBA_EDC5

5

FBA_EDC6

6

FBA_EDC7

7

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

MEMORY: FBA PARTITION[63:32]

1V8_AON

C1470

C268

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

GND

4

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

FDBA

G

Galaxy Microsystems (HK) Ltd.

MEMORY: FBA Partition 63..32

MEMORY: FBA Partition 63..32

MEMORY: FBA Partition 63..32

P25Z

P25Z

P25Z

Design By:

Design By:

Design By:

H

Neston V10

Neston V10

Neston V10

of

of

of

652Friday, March 03, 2017

652Friday, March 03, 2017

652Friday, March 03, 2017

A B C D E F G H

Page7: MEMORY: FBB Partition 31..0

{4}

1

BI

2

{4}
{4}

3

FBB_D[31..0]

FBB_D0

0

FBB_D1

1

FBB_D2

2

FBB_D3

3

FBB_D4

4

FBB_D5

5

FBB_D6

6

FBB_D7

7

FBB_EDC0
FBB_DBI0

FBB_D8

8

FBB_D9

9

FBB_D10

10

FBB_D11

11

FBB_D12

12

FBB_D13

13

FBB_D14

14

FBB_D15

15

FBB_EDC1

FBB_DBI1

FBB_WCK01

IN

FBB_WCK01*

IN

M9D

@memory.u_mem_gddr5x_x32(sym_2):page7_i510
BGA190_MIRR
COMMON

MIRRORED

x32

x16

V4

DQ0

V3

DQ1

U4

DQ2

U3

DQ3

P4

DQ4

P3

DQ5

N4

DQ6

N3

DQ7

T3

EDC0

R3

DBI0

V11

DQ8

V12

DQ9

U11

DQ10

U12

DQ11

P11

DQ12

P12

DQ13

N11

DQ14

N12

DQ15

T12

EDC1

R12

DBI1

T4

WCK01

T5

WCK01

M9C

GND

@memory.u_mem_gddr5x_x32(sym_7):page7_i573

BGA190_MIRR

COMMON

Mirrored

A10

VSS

A5

VSS

B1

VSS

B14

VSS

D1

VSS

D11

VSS

D14

VSS

F1

VSS

F14

VSS

H1

VSS

H14

VSS

J12

VSS

J3

VSS

K1

VSS

K14

VSS

K3

VSS

L12

VSS

L3

VSS

M1

VSS

M14

VSS

P1

VSS

P14

VSS

T1

VSS

T11

VSS

T14

VSS

V1

VSS

V14

VSS

W10

VSS

W5

VSS

B13

VSSQ

B2

VSSQ

C10

VSSQ

C5

VSSQ

D13

VSSQ

D2

VSSQ

E10

VSSQ

E5

VSSQ

F13

VSSQ

F2

VSSQ

G10

VSSQ

G5

VSSQ

N10

VSSQ

N5

VSSQ

P13

VSSQ

P2

VSSQ

R10

VSSQ

R5

VSSQ

T13

VSSQ

T2

VSSQ

U10

VSSQ

U5

VSSQ

V13

VSSQ

V2

VSSQ

add 1k to VDD

FBVDDQ

W12

MF

A1

VDD

A11

VDD

A14

VDD

A4

VDD

D10

VDD

G1

VDD

G14

VDD

H10

VDD

H5

VDD

J1

VDD

J14

VDD

L1

VDD

L14

VDD

M10

VDD

M5

VDD

N1

VDD

N14

VDD

T10

VDD

W1

VDD

W11

VDD

W14

VDD

W4

VDD

A13

VDDQ

A2

VDDQ

B10

VDDQ

B5

VDDQ

C1

VDDQ

C13

VDDQ

C14

VDDQ

C2

VDDQ

E1

VDDQ

E11

VDDQ

E13

VDDQ

E14

VDDQ

E2

VDDQ

E4

VDDQ

F10

VDDQ

F5

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

J13

VDDQ

J2

VDDQ

L13

VDDQ

L2

VDDQ

M12

VDDQ

M3

VDDQ

N13

VDDQ

N2

VDDQ

P10

VDDQ

P5

VDDQ

R1

VDDQ

R11

VDDQ

R13

VDDQ

R14

VDDQ

R2

VDDQ

R4

VDDQ

U1

VDDQ

U13

VDDQ

U14

VDDQ

U2

VDDQ

V10

VDDQ

V5

VDDQ

W13

VDDQ

W2

VDDQ

A3

VPP

W3

VPP

1V8_AON

1

2

3

M9B

M9A

{4,8}

@memory.u_mem_gddr5x_x32(sym_4):page7_i544
BGA190_MIRR
COMMON

MIRRORED

x32

B11
B12
C11
C12
F11
F12
G11
G12

D12
E12

B4
B3
C4
C3
F4
F3
G4
G3

D3
E3

D4
D5

1G1D1S

x16

DQ16

NC

DQ17

NC

DQ18

NC

DQ19

NC

DQ20

NC

DQ21

NC

DQ22

NC

DQ23

NC

EDC2

GND

DBI2

NC

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

EDC3
DBI3

WCK23
WCK23

D

Q11

@discrete.q_fet_n_enh(sym_2):page7_i588
SOT323_1G1D1S

G

1

COMMON

S

30V

0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V

1.2A

0.2W
12V

SOT23

GND

{4}
{4}

FBVDDQ

R109
549ohm

1 %
0402
COMMON

3

R104

2

AO3416L

FBB_VREF_Q

0.300

1.33k

1 %
0402
COMMON

GND

IN

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

FBB_D16
FBB_D17

FBB_D18
FBB_D19

FBB_D20
FBB_D21
FBB_D22

FBB_D23

FBB_D24
FBB_D25
FBB_D26

FBB_D27
FBB_D28

FBB_D29
FBB_D30
FBB_D31

IN

IN

GPIO10_FBVREF_SEL

FBB_EDC2
FBB_DBI2

FBB_EDC3

FBB_DBI3

FBB_WCK23

FBB_WCK23*

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

{4}
{4}

{5,10,12,15,17,27}

FBB_CMD[31..0]

IN

FBB_CLK0

IN

FBB_CLK0*

IN

R110
931ohm

1 %
0402
COMMON

0.300

C98
820pF

50V

10%
X7R
0402
COMMON

GND GND

FBB_CMD2

2

FBB_CMD0

0

FBB_CMD15

15

FBB_CMD6

6

FBB_CMD4

4

FBB_CMD3

3

FBB_CMD12

12

FBB_CMD11

11

FBB_CMD9

9

FBB_CMD10

10

FBB_CMD7

7

FBB_CMD8

8

FBB_CMD5

5

FBB_CMD14

14

FBB_CMD1

1

FBB_CMD13

13

OUT

FBB_VREFC

0.140A

FBB_ZQ_1

R108

121ohm

0402

COMMON

1 %

@memory.u_mem_gddr5x_x32(sym_5):page7_i554
BGA190_MIRR
COMMON

M4

RAS

H4

CAS

H11

WE

K4

ABI

L4

A0_A10

L5

A1_A9

L11

A2_BA0

L10

A3_BA3

J11

A4_BA2

J10

A5_BA1

J5

A6_A11

J4

A7_A8

K5

A12_A13

K12

A15_A14

K2

RESET

M11

CKE

K11

CLK

K10

CLK

M2

TCK

M13

TDI

A12

TDO

H2

TMS

{8}

K13

VREFC

H13

ZQ

4

FBVDDQ

C813
10uF

4V

20%
X6S
0603
COMMON

FBVDDQ

C724
22uF

4V

20%
X6S
0603W
COMMON

5

{4,8}

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

IN

C751
10uF

4V

20%
X6S
0603
COMMON

C793
22uF

4V

20%
X6S
0603W
COMMON

FB_DBI

FBB_DBI[7..0]

CLOSE DRAM

C722
10uF

4V

20%
X6S
0603
COMMON

C786
22uF

4V

20%
X6S
0603W
COMMON

C790
10uF

4V

20%
X6S
0603
COMMON

C755
22uF

4V

20%
X6S
0603W
COMMON

C803

C829

C744

C718

1uF

1uF

6.3V

10%
X6S
0402
COMMON

C703
22uF

4V

20%
X6S
0603W
COMMON

FBB_DBI0

0

FBB_DBI1

1

FBB_DBI2

2

FBB_DBI3

3

FBB_DBI4

4

FBB_DBI5

5

FBB_DBI6

6

FBB_DBI7

7

6.3V

10%
X6S
0402
COMMON

C730
10uF

4V

20%
X6S
0603
COMMON

1uF

6.3V

10%
X6S
0402
COMMON

C820
10uF

4V

20%
X6S
0603
COMMON

GND

{4,8}

1uF

6.3V

10%
X6S
0402
COMMON

C731
1uF

6.3V

10%
X6S
0402
COMMON

FBVDDQ

UNDER DRAM FOR X32AROUND DRAM

C827
1uF

6.3V

10%
X6S
0402
COMMON

FB_EDC

FBB_EDC[7..0]

OUT

C771
1uF

6.3V

10%
X6S
0402
COMMON

C756
1uF

6.3V

10%
X6S
0402
COMMON

C814
1uF

6.3V

10%
X6S
0402
COMMON

C806
1uF

6.3V

10%
X6S
0402
COMMON

C765

C802
1uF

6.3V

10%
X6S
0402
COMMON

C761
1uF

6.3V

10%
X6S
0402
COMMON

C715
1uF

6.3V

10%
X6S
0402
COMMON

GND

C781

C757
1uF

6.3V

10%
X6S
0402
COMMON

C762
1uF

6.3V

10%
X6S
0402
COMMON

GND

1uF

6.3V

10%
X6S
0402
COMMON

1uF

6.3V

10%
X6S
0402
COMMON

C750
1uF

6.3V

10%
X6S
0402
COMMON

FBB_EDC0

0

FBB_EDC1

1

FBB_EDC2

2

FBB_EDC3

3

FBB_EDC4

4

FBB_EDC5

5

FBB_EDC6

6

FBB_EDC7

7

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

MEMORY: FBB PARTITION[31:0]

1V8_AON

C269

C1471
1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402
COMMON

COMMON

GND

4

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

FDBA

G

Galaxy Microsystems (HK) Ltd.

MEMORY: FBB Partition 31..0

MEMORY: FBB Partition 31..0

MEMORY: FBB Partition 31..0

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

Neston V10

Neston V10

Neston V10

752Friday, March 03, 2017

752Friday, March 03, 2017

752Friday, March 03, 2017

H

of

of

of

A B C D E F G H

Page8: MEMORY: FBB Partition 63..32

GND

M10C

@memory.u_mem_gddr5x_x32(sym_6):page8_i521

BGA190

COMMON

Normal

W12

MF

add 1k to VSS

A10

VSS

A5

VSS

B1

VSS

B14

VSS

D1

VSS

D11

VSS

D14

VSS

F1

VSS

F14

VSS

H1

VSS

H14

VSS

J12

VSS

J3

VSS

K1

VSS

K14

VSS

K3

VSS

L12

VSS

L3

VSS

M1

VSS

M14

VSS

P1

VSS

P14

VSS

T1

VSS

T11

VSS

T14

VSS

V1

VSS

V14

VSS

W10

VSS

W5

VSS

B13

VSSQ

B2

VSSQ

C10

VSSQ

C5

VSSQ

D13

VSSQ

D2

VSSQ

E10

VSSQ

E5

VSSQ

F13

VSSQ

F2

VSSQ

G10

VSSQ

G5

VSSQ

N10

VSSQ

N5

VSSQ

P13

VSSQ

P2

VSSQ

R10

VSSQ

R5

VSSQ

T13

VSSQ

T2

VSSQ

U10

VSSQ

U5

VSSQ

V13

VSSQ

V2

VSSQ

FBVDDQ

A1

VDD

A11

VDD

A14

VDD

A4

VDD

D10

VDD

G1

VDD

G14

VDD

H10

VDD

H5

VDD

J1

VDD

J14

VDD

L1

VDD

L14

VDD

M10

VDD

M5

VDD

N1

VDD

N14

VDD

T10

VDD

W1

VDD

W11

VDD

W14

VDD

W4

VDD

A13

VDDQ

A2

VDDQ

B10

VDDQ

B5

VDDQ

C1

VDDQ

C13

VDDQ

C14

VDDQ

C2

VDDQ

E1

VDDQ

E11

VDDQ

E13

VDDQ

E14

VDDQ

E2

VDDQ

E4

VDDQ

F10

VDDQ

F5

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

J13

VDDQ

J2

VDDQ

L13

VDDQ

L2

VDDQ

M12

VDDQ

M3

VDDQ

N13

VDDQ

N2

VDDQ

P10

VDDQ

P5

VDDQ

R1

VDDQ

R11

VDDQ

R13

VDDQ

R14

VDDQ

R2

VDDQ

R4

VDDQ

U1

VDDQ

U13

VDDQ

U14

VDDQ

U2

VDDQ

V10

VDDQ

V5

VDDQ

W13

VDDQ

W2

VDDQ

A3

VPP

W3

VPP

1V8_AON

1

2

3

1

2

FBB_D[63..32]

BI

M10D

@memory.u_mem_gddr5x_x32(sym_1):page8_i466
BGA190
COMMON

FBB_D32

32

FBB_D33

33

FBB_D34

34

FBB_D35

35

FBB_D36

36

FBB_D37

37

FBB_D38

38

FBB_D39

39

FBB_EDC4
FBB_DBI4

FBB_D40

40

FBB_D41

41

FBB_D42

42

FBB_D43

43

FBB_D44

44

FBB_D45

45

FBB_D46

46

FBB_D47

47

FBB_EDC5

FBB_DBI5

{4}
{4}

FBB_WCK45

IN

FBB_WCK45*

IN

NORMAL

B4

DQ0

B3

DQ1

C4

DQ2

C3

DQ3

F4

DQ4

F3

DQ5

G4

DQ6

G3

DQ7

D3

EDC0

E3

DBI0

x32

x16

B11

DQ8

NC

B12

DQ9

NC

C11

DQ10

NC

C12

DQ11

NC

F11

DQ12

NC

F12

DQ13

NC

G11

DQ14

NC

G12

DQ15

NC

D12

EDC1

GND

E12

DBI1

NC

D4

WCK01

D5

WCK01

{4}
{4}

FBB_D48

48

FBB_D49

49

FBB_D50

50

FBB_D51

51

FBB_D52

52

FBB_D53

53

FBB_D54

54

FBB_D55

55

FBB_EDC6
FBB_DBI6

FBB_D56

56

FBB_D57

57

FBB_D58

58

FBB_D59

59

FBB_D60

60

FBB_D61

61

FBB_D62

62

FBB_D63

63

FBB_EDC7

FBB_DBI7

FBB_WCK67

IN

FBB_WCK67*

IN

M10A

@memory.u_mem_gddr5x_x32(sym_3):page8_i496
BGA190
COMMON

NORMAL

V11

DQ16

V12

DQ17

U11

DQ18

U12

DQ19

P11

DQ20

P12

DQ21

N11

DQ22

N12

DQ23

T12

EDC2

R12

DBI2

x32

x16

V4

DQ24

V3

DQ25

U4

DQ26

U3

DQ27

P4

DQ28

P3

DQ29

N4

DQ30

N3

DQ31

T3

EDC3

R3

DBI3

T4

WCK23

T5

WCK23

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

{4,7}

{4}
{4}

{7}

IN

3

IN

IN

IN

C100
820pF

50V

10%
X7R
0402
COMMON

GND GND

FBB_CMD[31..0]

FBB_VREFC

FBB_CLK1

FBB_CLK1*

R105

M10B

@memory.u_mem_gddr5x_x32(sym_5):page8_i509
BGA190

FBB_CMD18

18

FBB_CMD16

16

FBB_CMD31

31

FBB_CMD22

22

FBB_CMD20

20

FBB_CMD19

19

FBB_CMD28

28

FBB_CMD27

27

FBB_CMD25

25

FBB_CMD26

26

FBB_CMD23

23

FBB_CMD24

24

FBB_CMD21

21

FBB_CMD30

30

FBB_CMD17

17

FBB_CMD29

29

121ohm

COMMON0402

1 %

FBB_ZQ_2

COMMON

H4

RAS

M4

CAS

M11

WE

K4

ABI

J4

A0_A10

J5

A1_A9

J11

A2_BA0

J10

A3_BA3

L11

A4_BA2

L10

A5_BA1

L5

A6_A11

L4

A7_A8

K5

A12_A13

K12

A15_A14

K2

RESET

H11

CKE

K11

CLK

K10

CLK

M2

TCK

M13

TDI

A12

TDO

H2

TMS

K13

VREFC

H13

ZQ

4

FBVDDQ

C819
10uF

4V

20%
X6S
0603
COMMON

FBVDDQ

C740
22uF

4V

20%
X6S
0603W
COMMON

5

{4,7}

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

IN

CLOSE DRAM

C782
10uF

4V

20%
X6S
0603
COMMON

C818
22uF

4V

20%
X6S
0603W
COMMON

FB_DBI

FBB_DBI[7..0]

10uF

10uF

4V

4V

20%

20%

X6S

X6S

0603

0603

COMMON

COMMON

AROUND DRAM UNDER DRAM FOR X32

C708

C732

22uF

22uF

4V

4V

20%

20%

X6S

X6S

0603W

0603W
COMMON

COMMON

0

1

2

3

4

5

6

7

C707

C710

FBB_DBI0

FBB_DBI1
FBB_DBI2

FBB_DBI3
FBB_DBI4
FBB_DBI5

FBB_DBI6
FBB_DBI7

C798
1uF

6.3V

10%
X6S
0402
COMMON

C739
22uF

4V

20%
X6S
0603W
COMMON

C797
1uF

6.3V

10%
X6S
0402
COMMON

C816
10uF

4V

20%
X6S
0603
COMMON

C795

C763

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

FBVDDQ

C821
10uF

4V

20%
X6S
0603
COMMON

GND

{4,7}

OUT

C736
1uF

6.3V

10%
X6S
0402
COMMON

C778
1uF

6.3V

10%
X6S
0402
COMMON

FB_EDC

FBB_EDC[7..0]

C830
1uF

6.3V

10%
X6S
0402
COMMON

C807
1uF

6.3V

10%
X6S
0402
COMMON

C719

C789
1uF

6.3V

10%
X6S
0402
COMMON

C775
1uF

6.3V

10%
X6S
0402
COMMON

C749
1uF

6.3V

10%
X6S
0402
COMMON

GND

C746

C784
1uF

6.3V

10%
X6S
0402
COMMON

C764
1uF

6.3V

10%
X6S
0402
COMMON

GND

1uF

6.3V

10%
X6S
0402
COMMON

1uF

6.3V

10%
X6S
0402
COMMON

C748
1uF

6.3V

10%
X6S
0402
COMMON

FBB_EDC0

0

FBB_EDC1

1

FBB_EDC2

2

FBB_EDC3

3

FBB_EDC4

4

FBB_EDC5

5

FBB_EDC6

6

FBB_EDC7

7

C808
1uF

6.3V

10%
X6S
0402
COMMON

C777
1uF

6.3V

10%
X6S
0402
COMMON

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

MEMORY: FBB PARTITION[63:31]

1V8_AON

C270

C1472

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S
0402

0402
COMMON

COMMON

GND

4

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

FDBA

G

Galaxy Microsystems (HK) Ltd.

Table of Contents

Table of Contents

Table of Contents

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

Neston V10

Neston V10

Neston V10

852Friday, March 03, 2017

852Friday, March 03, 2017

852Friday, March 03, 2017

H

A B C D E F G H

Page9: MEMORY: GPU Partition C/D

1

{10,11}

2

3

4

{10,11}

{10,11}

FB_DATA

FBC_D[63..0]

BI

FB_DBI

FBC_DBI[7..0]

IN

FB_EDC

FBC_EDC[7..0]

OUT

FBC_D0

0

FBC_D1

1

FBC_D2

2

FBC_D3

3

FBC_D4

4

FBC_D5

5

FBC_D6

6

FBC_D7

7

FBC_D8

8

FBC_D9

9

FBC_D10

10

FBC_D11

11

FBC_D12

12

FBC_D13

13

FBC_D14

14

FBC_D15

15

FBC_D16

16

FBC_D17

17

FBC_D18

18

FBC_D19

19

FBC_D20

20

FBC_D21

21

FBC_D22

22

FBC_D23

23

FBC_D24

24

FBC_D25

25

FBC_D26

26

FBC_D27

27

FBC_D28

28

FBC_D29

29

FBC_D30

30

FBC_D31

31

FBC_D32

32

FBC_D33

33

FBC_D34

34

FBC_D35

35

FBC_D36

36

FBC_D37

37

FBC_D38

38

FBC_D39

39

FBC_D40

40

FBC_D41

41

FBC_D42

42

FBC_D43

43

FBC_D44

44

FBC_D45

45

FBC_D46

46

FBC_D47

47

FBC_D48

48

FBC_D49

49

FBC_D50

50

FBC_D51

51

FBC_D52

52

FBC_D53

53

FBC_D54

54

FBC_D55

55

FBC_D56

56

FBC_D57

57

FBC_D58

58

FBC_D59

59

FBC_D60

60

FBC_D61

61

FBC_D62

62

FBC_D63

63

FBC_DBI0

0

FBC_DBI1

1

FBC_DBI2

2

FBC_DBI3

3

FBC_DBI4

4

FBC_DBI5

5

FBC_DBI6

6

FBC_DBI7

7

FBC_EDC0

0

FBC_EDC1

1

FBC_EDC2

2

FBC_EDC3

3

FBC_EDC4

4

FBC_EDC5

5

FBC_EDC6

6

FBC_EDC7

7

G1D

@digital.u_gpu_gb3c_384(sym_4):page9_i601
BGA2397
COMMON

4/24 FBC

L28

FBC_D0

H28

FBC_D1

K28

FBC_D2

J28

FBC_D3

D28

FBC_D4

C28

FBC_D5

A28

FBC_D6

B28

FBC_D7

C30

FBC_D8

A30

FBC_D9

D30

FBC_D10

B30

FBC_D11

G30

FBC_D12

G29

FBC_D13

J30

FBC_D14

H29

FBC_D15

B34

FBC_D16

A34

FBC_D17

D34

FBC_D18

C34

FBC_D19

H34

FBC_D20

J34

FBC_D21

L34

FBC_D22

K34

FBC_D23

H33

FBC_D24

G33

FBC_D25

J32

FBC_D26

G32

FBC_D27

D32

FBC_D28

B32

FBC_D29

C32

FBC_D30

A32

FBC_D31

B48

FBC_D32

D48

FBC_D33

A48

FBC_D34

C48

FBC_D35

C50

FBC_D36

A50

FBC_D37

B51

FBC_D38

B50

FBC_D39

E46

FBC_D40

G45

FBC_D41

D46

FBC_D42

F45

FBC_D43

C47

FBC_D44

D47

FBC_D45

F47

FBC_D46

C46

FBC_D47

E39

FBC_D48

D39

FBC_D49

G39

FBC_D50

F39

FBC_D51

E41

FBC_D52

E42

FBC_D53

G41

FBC_D54

G40

FBC_D55

L39

FBC_D56

L41

FBC_D57

K39

FBC_D58

K40

FBC_D59

H42

FBC_D60

K42

FBC_D61

K41

FBC_D62

L42

FBC_D63

E28

FBC_DQM0

E30

FBC_DQM1

G34

FBC_DQM2

E32

FBC_DQM3

C49

FBC_DQM4

A47

FBC_DQM5

D41

FBC_DQM6

G42

FBC_DQM7

F28

FBC_DQS_WP0

F30

FBC_DQS_WP1

E34

FBC_DQS_WP2

F32

FBC_DQS_WP3

D49

FBC_DQS_WP4

F46

FBC_DQS_WP5

H39

FBC_DQS_WP6

F42

FBC_DQS_WP7

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8

FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
FBC_CMD32
FBC_CMD33
FBC_CMD34
FBC_CMD35

FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1

FBC_WCK01

FBC_WCK01

FBC_WCKB01
FBC_WCKB01

FBC_WCK23

FBC_WCK23

FBC_WCKB23
FBC_WCKB23

FBC_WCK45

FBC_WCK45

FBC_WCKB45
FBC_WCKB45

FBC_WCK67

FBC_WCK67

FBC_WCKB67
FBC_WCKB67

FBC_PLL_AVDD
FBC_PLL_AVDD
FBC_PLL_AVDD

FB_CMD

FBC_CMD0

A35

FBC_CMD1

B36

FBC_CMD2

A36

FBC_CMD3

C36

FBC_CMD4

B37

FBC_CMD5

C37

FBC_CMD6

B38

FBC_CMD7

A38

FBC_CMD8

C39

FBC_CMD9

B39

FBC_CMD10

A40

FBC_CMD11

F36

FBC_CMD12

D36

FBC_CMD13

G36

FBC_CMD14

H36

FBC_CMD15

J36

FBC_CMD16

A46

FBC_CMD17

B46

FBC_CMD18

C45

FBC_CMD19

C44

FBC_CMD20

B44

FBC_CMD21

A44

FBC_CMD22

B43

FBC_CMD23

C42

FBC_CMD24

A42

FBC_CMD25

B42

FBC_CMD26

C41

FBC_CMD27

F37

FBC_CMD28

D37

FBC_CMD29

G37

FBC_CMD30

H37

FBC_CMD31

J37
B40
C40

FBC_DEBUG0

E36

FBC_DEBUG1

E37

FBC_CLK0

L36

FBC_CLK0*

K36

FBC_CLK1

L37

FBC_CLK1*

K37

FBC_WCK01

K30

FBC_WCK01*

L30
L29
K29

FBC_WCK23

L32

FBC_WCK23*

K32
L33
K33

FBC_WCK45

E43

FBC_WCK45*

D43
G43
F43

FBC_WCK67

H43

FBC_WCK67*

H44
K43
J43

1V8_FB_PLL_REF 1V8_FB_PLL_REF

L31
M31
N31

C1007

0.1uF

16V

10%
X7R
0402
COMMON

GND

FBC_CMD[31..0]

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

R841

60.4ohm/NC

COMMON0402

1 %

FBC_CLK0 FB_CLK

FB_CLKFBC_CLK0

FBC_CLK1 FB_CLK

FBC_CLK1 FB_CLK

FBC_WCK01 FB_WCK

FBC_WCK01 FB_WCK

FBC_WCK23 FB_WCK

FB_WCKFBC_WCK23

FB_WCKFBC_WCK45

FB_WCKFBC_WCK45

FB_WCKFBC_WCK67

FB_WCKFBC_WCK67

IN

FBC_CMD13
FBC_CMD29

FBC_CMD1

FBC_CMD17

R839

60.4ohm/NC

0402

1 %

nv_res

nv_res

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

C E

COMMON

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

{4,9,14,29}

R353
10k

5 %
0402
COMMON

R354
10k

5 %
0402
COMMON

ASSEMBLY

PAGE DETAIL

BI

FBVDDQ

FBVDDQ

nv_res

R355
10k

5 %
0402
COMMON

nv_res

R356
10k

5 %
0402
COMMON

GND

<ASSEMBLY_DESCRIPTION>

MEMORY: GPU PARTITION C/D

{10,11}BI{12,13}

GDDR5X CMD Mapping

CMD

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

CMD31

CMD32

CMD33

CMD34

CMD35

{10}
{10}
{11}
{11}

{10}
{10}

{10}
{10}

{11}
{11}

{11}
{11}

{12,13}

{12,13}

CAS*

RST*

RAS*

A1_A9

A0_A10

A12_A13

ABI*

A6_A11

A7_A8

A4_BA2

A5_BA1

A3_BA3

A2_BA0

CKE*

A14_A15

WE*

DBG0

DBG1

32..630..31

CAS*

RST*

RAS*

A1_A9

A0_A10

A12_A13

ABI*

A6_A11

A7_A8

A4_BA2

A5_BA1

A3_BA3

A2_BA0

CKE*

A14_A15

WE*

DBG0

DBG1

FBD_CMD13
FBD_CMD29

FBD_CMD1

FBD_CMD17

FB_DATA

FBD_D[63..0]

OUT

OUT

FB_DBI

FBD_DBI[7..0]

FB_EDC

FBD_EDC[7..0]

nv_res

nv_res

R344
10k

5 %
0402
COMMON

R357
10k

5 %
0402
COMMON

FBVDDQ

G1E

@digital.u_gpu_gb3c_384(sym_5):page9_i602
BGA2397
COMMON

E15
D15
G15

F15

E13

E12
G13
G14

L15

L13

K15

K14
H12

K12

K13

L12

L26
H26

K26

J26
D26
C26

A26

B26
C24

A24
D24

B24
G24
G25

J24
H25

B20

A20
D20
C20
H20

J20

L20

K20
H21
G21

J22
G22
D22

B22
C22

A22

D13
G12

E26

E24
G20

E22

H15

F12

F26

F24

E20

F22

B6
D6
A6
C6
C4
A4
B3
B4
E8
G9
D8

F9
C7
D7

F7
C8

C5
A7

D5

F8

5/24 FBD

FBD_D0
FBD_D1
FBD_D2
FBD_D3
FBD_D4
FBD_D5
FBD_D6
FBD_D7
FBD_D8
FBD_D9
FBD_D10
FBD_D11
FBD_D12
FBD_D13
FBD_D14
FBD_D15
FBD_D16
FBD_D17
FBD_D18
FBD_D19
FBD_D20
FBD_D21
FBD_D22
FBD_D23
FBD_D24
FBD_D25
FBD_D26
FBD_D27
FBD_D28
FBD_D29
FBD_D30
FBD_D31
FBD_D32
FBD_D33
FBD_D34
FBD_D35
FBD_D36
FBD_D37
FBD_D38
FBD_D39
FBD_D40
FBD_D41
FBD_D42
FBD_D43
FBD_D44
FBD_D45
FBD_D46
FBD_D47
FBD_D48
FBD_D49
FBD_D50
FBD_D51
FBD_D52
FBD_D53
FBD_D54
FBD_D55
FBD_D56
FBD_D57
FBD_D58
FBD_D59
FBD_D60
FBD_D61
FBD_D62
FBD_D63

FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQM4
FBD_DQM5
FBD_DQM6
FBD_DQM7

FBD_DQS_WP0
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_DQS_WP4
FBD_DQS_WP5
FBD_DQS_WP6
FBD_DQS_WP7

FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
FBD_CMD5
FBD_CMD6
FBD_CMD7
FBD_CMD8
FBD_CMD9
FBD_CMD10
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD19
FBD_CMD20
FBD_CMD21
FBD_CMD22
FBD_CMD23
FBD_CMD24
FBD_CMD25
FBD_CMD26
FBD_CMD27
FBD_CMD28
FBD_CMD29
FBD_CMD30
FBD_CMD31
FBD_CMD32
FBD_CMD33
FBD_CMD34
FBD_CMD35

FBD_CLK0
FBD_CLK0
FBD_CLK1
FBD_CLK1

FBD_WCK01

FBD_WCK01
FBD_WCKB01
FBD_WCKB01

FBD_WCK23

FBD_WCK23
FBD_WCKB23
FBD_WCKB23

FBD_WCK45

FBD_WCK45
FBD_WCKB45
FBD_WCKB45

FBD_WCK67

FBD_WCK67
FBD_WCKB67
FBD_WCKB67

FBD_PLL_AVDD
FBD_PLL_AVDD
FBD_PLL_AVDD

FBD_D0

0

FBD_D1

1

FBD_D2

2

FBD_D3

3

FBD_D4

4

FBD_D5

5

FBD_D6

6

FBD_D7

7

FBD_D8

8

FBD_D9

9

FBD_D10

10

FBD_D11

11

FBD_D12

12

FBD_D13

13

FBD_D14

14

FBD_D15

15

FBD_D16

16

FBD_D17

17

FBD_D18

18

FBD_D19

19

FBD_D20

20

FBD_D21

21

FBD_D22

22

FBD_D23

23

FBD_D24

24

FBD_D25

25

FBD_D26

26

FBD_D27

27

FBD_D28

28

FBD_D29

29

FBD_D30

30

FBD_D31

31

FBD_D32

32

FBD_D33

33

FBD_D34

34

FBD_D35

35

FBD_D36

36

FBD_D37

37

FBD_D38

38

FBD_D39

39

FBD_D40

40

FBD_D41

41

FBD_D42

42

FBD_D43

43

FBD_D44

44

FBD_D45

45

FBD_D46

46

FBD_D47

47

FBD_D48

48

FBD_D49

49

FBD_D50

50

FBD_D51

51

FBD_D52

52

FBD_D53

53

FBD_D54

54

FBD_D55

55

FBD_D56

56

FBD_D57

57

FBD_D58

58

FBD_D59

59

FBD_D60

60

FBD_D61

61

FBD_D62

62

FBD_D63

63

FBD_DBI0

0

FBD_DBI1

1

FBD_DBI2

2

FBD_DBI3

3

FBD_DBI4

4

FBD_DBI5

5

FBD_DBI6

6

FBD_DBI7

7

FBD_EDC0

0

FBD_EDC1

1

FBD_EDC2

2

FBD_EDC3

3

FBD_EDC4

4

FBD_EDC5

5

FBD_EDC6

6

FBD_EDC7

7

nv_res

R336
10k

5 %
0402
COMMON

nv_res

R358
10k

5 %
0402
COMMON

GND

FDBA

FBD_CMD0

A8

FBD_CMD1

B8

FBD_CMD2

C9

FBD_CMD3

C10

FBD_CMD4

B10

FBD_CMD5

A10

FBD_CMD6

B11

FBD_CMD7

C12

FBD_CMD8

A12

FBD_CMD9

B12

FBD_CMD10

C13

FBD_CMD11

F17

FBD_CMD12

D17

FBD_CMD13

G17

FBD_CMD14

H17

FBD_CMD15

J17

FBD_CMD16

A19

FBD_CMD17

B18

FBD_CMD18

A18

FBD_CMD19

C18

FBD_CMD20

B17

FBD_CMD21

C17

FBD_CMD22

B16

FBD_CMD23

A16

FBD_CMD24

C15

FBD_CMD25

B15

FBD_CMD26

A14

FBD_CMD27

F18

FBD_CMD28

D18

FBD_CMD29

G18

FBD_CMD30

H18

FBD_CMD31

J18
C14
B14

FBD_DEBUG0

E17

FBD_DEBUG1

E18

FBD_CLK0

L17

FBD_CLK0*

K17

FBD_CLK1

L18

FBD_CLK1*

K18

FBD_WCK01

E11

FBD_WCK01*

D11
G11
F11

FBD_WCK23

H10

FBD_WCK23*

H11
J11
K11

FBD_WCK45

K24

FBD_WCK45*

L24
L25
K25

FBD_WCK67

L22

FBD_WCK67*

K22
L21
K21

L23
M23
N23

C1073

0.1uF

16V

10%
X7R
0402
COMMON

GND

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

G

FB_CMD

FBD_CMD[31..0]

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

R847 60.4ohm/NC

FBD_CLK0 FB_CLK

FBD_CLK0 FB_CLK

FBD_CLK1 FB_CLK

FBD_CLK1 FB_CLK

0402 COMMON

1 %

R845 60.4ohm/NC

IN

P25Z

P25Z

P25Z

0402 COMMON

OUT

FBVDDQ

1 %

OUT

OUT

OUT

OUT

FB_WCKFBD_WCK01

FB_WCKFBD_WCK01

FB_WCKFBD_WCK23

FB_WCKFBD_WCK23

FB_WCKFBD_WCK45

FB_WCKFBD_WCK45

FB_WCKFBD_WCK67

FB_WCKFBD_WCK67

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

{4,9,14,29}

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

MEMORY: GPU Partition C/D

MEMORY: GPU Partition C/D

MEMORY: GPU Partition C/D

Design By:

Design By:

Design By:

Neston V10

Neston V10

Neston V10

952Friday, March 03, 2017

952Friday, March 03, 2017

952Friday, March 03, 2017

H

{12,13}

{12}
{12}
{13}
{13}

{12}
{12}

{12}
{12}

{13}
{13}

{13}
{13}

1

2

3

4

5

A B C D E F G H

Page10: MEMORY: FBC Partition 31..0

GND

M7C

@memory.u_mem_gddr5x_x32(sym_7):page10_i573

BGA190_MIRR

COMMON

Mirrored

A10

VSS

A5

VSS

B1

VSS

B14

VSS

D1

VSS

D11

VSS

D14

VSS

F1

VSS

F14

VSS

H1

VSS

H14

VSS

J12

VSS

J3

VSS

K1

VSS

K14

VSS

K3

VSS

L12

VSS

L3

VSS

M1

VSS

M14

VSS

P1

VSS

P14

VSS

T1

VSS

T11

VSS

T14

VSS

V1

VSS

V14

VSS

W10

VSS

W5

VSS

B13

VSSQ

B2

VSSQ

C10

VSSQ

C5

VSSQ

D13

VSSQ

D2

VSSQ

E10

VSSQ

E5

VSSQ

F13

VSSQ

F2

VSSQ

G10

VSSQ

G5

VSSQ

N10

VSSQ

N5

VSSQ

P13

VSSQ

P2

VSSQ

R10

VSSQ

R5

VSSQ

T13

VSSQ

T2

VSSQ

U10

VSSQ

U5

VSSQ

V13

VSSQ

V2

VSSQ

add 1k to VDD

FBVDDQ

W12

MF

A1

VDD

A11

VDD

A14

VDD

A4

VDD

D10

VDD

G1

VDD

G14

VDD

H10

VDD

H5

VDD

J1

VDD

J14

VDD

L1

VDD

L14

VDD

M10

VDD

M5

VDD

N1

VDD

N14

VDD

T10

VDD

W1

VDD

W11

VDD

W14

VDD

W4

VDD

A13

VDDQ

A2

VDDQ

B10

VDDQ

B5

VDDQ

C1

VDDQ

C13

VDDQ

C14

VDDQ

C2

VDDQ

E1

VDDQ

E11

VDDQ

E13

VDDQ

E14

VDDQ

E2

VDDQ

E4

VDDQ

F10

VDDQ

F5

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

J13

VDDQ

J2

VDDQ

L13

VDDQ

L2

VDDQ

M12

VDDQ

M3

VDDQ

N13

VDDQ

N2

VDDQ

P10

VDDQ

P5

VDDQ

R1

VDDQ

R11

VDDQ

R13

VDDQ

R14

VDDQ

R2

VDDQ

R4

VDDQ

U1

VDDQ

U13

VDDQ

U14

VDDQ

U2

VDDQ

V10

VDDQ

V5

VDDQ

W13

VDDQ

W2

VDDQ

A3

VPP

W3

VPP

1V8_AON

1

2

3

M7B

{9}

BI

1

2

{9}
{9}

FBC_D[31..0]

B11
B12
C11
C12
F11
F12
G11
G12

D12
E12

B4

B3
C4
C3

F4

F3
G4
G3

D3

E3

D4
D5

3

D

Q8

@discrete.q_fet_n_enh(sym_2):page10_i588
SOT323_1G1D1S

G

1

COMMON

S

2

30V

0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V

1.2A

0.2W
12V

SOT23

GND

M7A

@memory.u_mem_gddr5x_x32(sym_4):page10_i544
BGA190_MIRR
COMMON

MIRRORED

x32

x16

DQ16

NC

DQ17

NC

DQ18

NC

DQ19

NC

DQ20

NC

DQ21

NC

DQ22

NC

DQ23

NC

EDC2

GND

DBI2

NC

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

EDC3
DBI3

WCK23
WCK23

AO3416L

M7D

@memory.u_mem_gddr5x_x32(sym_2):page10_i510
BGA190_MIRR
COMMON

MIRRORED

x32

FBC_D0

0

FBC_D1

1

FBC_D2

2

FBC_D3

3

FBC_D4

4

FBC_D5

5

FBC_D6

6

FBC_D7

7

FBC_EDC0

FBC_DBI0

FBC_D8

8

FBC_D9

9

FBC_D10

10

FBC_D11

11

FBC_D12

12

FBC_D13

13

FBC_D14

14

FBC_D15

15

FBC_EDC1
FBC_DBI1

FBC_WCK01

IN

FBC_WCK01*

IN

x16

V4

DQ0

NC

V3

DQ1

NC

U4

DQ2

NC

U3

DQ3

NC

P4

DQ4

NC

P3

DQ5

NC

N4

DQ6

NC

N3

DQ7

NC

T3

EDC0

NC

R3

DBI0

NC

V11

DQ8

V12

DQ9

U11

DQ10

U12

DQ11

P11

DQ12

P12

DQ13

N11

DQ14

N12

DQ15

T12

EDC1

R12

DBI1

T4

WCK01

T5

WCK01

{5,7,12,15,17,27}

{9}
{9}

IN

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

GPIO10_FBVREF_SEL

IN

IN

FBC_D24

FBC_D25
FBC_D26

FBC_D27
FBC_D28
FBC_D29

FBC_D30
FBC_D31

FBC_D16
FBC_D17

FBC_D18
FBC_D19
FBC_D20

FBC_D21
FBC_D22

FBC_D23

FBC_EDC2

FBC_DBI2

FBC_EDC3
FBC_DBI3

FBC_WCK23

FBC_WCK23*

1G1D1S

3

{9,11}

{9}
{9}

FBC_VREF_Q

0.300

FBVDDQ

R78
549ohm

1 %
0402
COMMON

R75

1.33k

1 %
0402
COMMON

GND

FBC_CMD[31..0]

IN

FBC_CLK0

IN

FBC_CLK0*

IN

R79
931ohm

1 %
0402
COMMON

0.300

C78
820pF

50V

10%
X7R
0402
COMMON

GND GND

2

0

15

6

4

3

12

11

9

10

7

8

5

14

1

13

R74 121ohm

0402

1 %

FBC_CMD2
FBC_CMD0
FBC_CMD15

FBC_CMD6

FBC_CMD4

FBC_CMD3
FBC_CMD12

FBC_CMD11
FBC_CMD9
FBC_CMD10

FBC_CMD7
FBC_CMD8

FBC_CMD5
FBC_CMD14

FBC_CMD1
FBC_CMD13

0.140A

COMMON

OUT

FBC_VREFC

FBC_ZQ_1

@memory.u_mem_gddr5x_x32(sym_5):page10_i559
BGA190_MIRR
COMMON

M4

RAS

H4

CAS

H11

WE

K4

ABI

L4

A0_A10

L5

A1_A9

L11

A2_BA0

L10

A3_BA3

J11

A4_BA2

J10

A5_BA1

J5

A6_A11

J4

A7_A8

K5

A12_A13

K12

A15_A14

K2

RESET

M11

CKE

K11

CLK

K10

CLK

M2

TCK

M13

TDI

A12

TDO

H2

TMS

{11}

K13

VREFC

H13

ZQ

4

FBVDDQ

C948
10uF

4V

20%
X6S
0603
COMMON

FBVDDQ

C881
22uF

4V

20%
X6S
0603W
COMMON

5

{9,11}

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

OUT

CLOSE DRAM

C888

C1003

10uF

10uF

4V

4V

20%

20%

X6S

X6S

0603

0603

COMMON

COMMON

AROUND DRAM UNDER DRAM FOR X32

C924

C939

22uF

22uF

4V

4V

20%

20%

X6S

X6S

0603W

0603W

COMMON

COMMON

FB_DBI

FBC_DBI[7..0]

C1089
10uF

4V

20%
X6S
0603
COMMON

C1005
22uF

4V

20%
X6S
0603W
COMMON

C1001

C890

C1000

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S
0402

0402

COMMON

COMMON

C937

C916

22uF

10uF

4V

4V

20%

20%

X6S

X6S

0603

0603W
COMMON

COMMON

{9,11}

FBC_DBI0

0

FBC_DBI1

1

FBC_DBI2

2

FBC_DBI3

3

FBC_DBI4

4

FBC_DBI5

5

FBC_DBI6

6

FBC_DBI7

7

C883

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

FBVDDQ

C880
10uF

4V

20%
X6S
0603
COMMON

GND

OUT

C921
1uF

6.3V

10%
X6S
0402
COMMON

C952
1uF

6.3V

10%
X6S
0402
COMMON

FB_EDC

FBC_EDC[7..0]

C1002
1uF

6.3V

10%
X6S
0402
COMMON

C945
1uF

6.3V

10%
X6S
0402
COMMON

C982

C915
1uF

6.3V

10%
X6S
0402
COMMON

C837
1uF

6.3V

10%
X6S
0402
COMMON

C914
1uF

6.3V

10%
X6S
0402
COMMON

GND

C838

C852
1uF

6.3V

10%
X6S
0402
COMMON

C864
1uF

6.3V

10%
X6S
0402
COMMON

GND

1uF

6.3V

10%
X6S
0402
COMMON

1uF

6.3V

10%
X6S
0402
COMMON

C884
1uF

6.3V

10%
X6S
0402
COMMON

FBC_EDC0

0

FBC_EDC1

1

FBC_EDC2

2

FBC_EDC3

3

FBC_EDC4

4

FBC_EDC5

5

FBC_EDC6

6

FBC_EDC7

7

C999
1uF

6.3V

10%
X6S
0402
COMMON

C886
1uF

6.3V

10%
X6S
0402
COMMON

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

MEMORY: FBC PARTITION[31:0]

1V8_AON

C271

C272
1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402
COMMON

COMMON

GND

4

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

FDBA

G

Galaxy Microsystems (HK) Ltd.

MEMORY: FBC Partition 31..0

MEMORY: FBC Partition 31..0

MEMORY: FBC Partition 31..0

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

Neston V10

Neston V10

Neston V10

10 52Friday, March 03, 2017

10 52Friday, March 03, 2017

10 52Friday, March 03, 2017

H

A B C D E F G H

Page11: MEMORY: FBC Partition 63..32

GND

M8C

@memory.u_mem_gddr5x_x32(sym_6):page11_i521

BGA190

COMMON

Normal

W12

MF

add 1k to VSS

A10

VSS

A5

VSS

B1

VSS

B14

VSS

D1

VSS

D11

VSS

D14

VSS

F1

VSS

F14

VSS

H1

VSS

H14

VSS

J12

VSS

J3

VSS

K1

VSS

K14

VSS

K3

VSS

L12

VSS

L3

VSS

M1

VSS

M14

VSS

P1

VSS

P14

VSS

T1

VSS

T11

VSS

T14

VSS

V1

VSS

V14

VSS

W10

VSS

W5

VSS

B13

VSSQ

B2

VSSQ

C10

VSSQ

C5

VSSQ

D13

VSSQ

D2

VSSQ

E10

VSSQ

E5

VSSQ

F13

VSSQ

F2

VSSQ

G10

VSSQ

G5

VSSQ

N10

VSSQ

N5

VSSQ

P13

VSSQ

P2

VSSQ

R10

VSSQ

R5

VSSQ

T13

VSSQ

T2

VSSQ

U10

VSSQ

U5

VSSQ

V13

VSSQ

V2

VSSQ

FBVDDQ

A1

VDD

A11

VDD

A14

VDD

A4

VDD

D10

VDD

G1

VDD

G14

VDD

H10

VDD

H5

VDD

J1

VDD

J14

VDD

L1

VDD

L14

VDD

M10

VDD

M5

VDD

N1

VDD

N14

VDD

T10

VDD

W1

VDD

W11

VDD

W14

VDD

W4

VDD

A13

VDDQ

A2

VDDQ

B10

VDDQ

B5

VDDQ

C1

VDDQ

C13

VDDQ

C14

VDDQ

C2

VDDQ

E1

VDDQ

E11

VDDQ

E13

VDDQ

E14

VDDQ

E2

VDDQ

E4

VDDQ

F10

VDDQ

F5

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

J13

VDDQ

J2

VDDQ

L13

VDDQ

L2

VDDQ

M12

VDDQ

M3

VDDQ

N13

VDDQ

N2

VDDQ

P10

VDDQ

P5

VDDQ

R1

VDDQ

R11

VDDQ

R13

VDDQ

R14

VDDQ

R2

VDDQ

R4

VDDQ

U1

VDDQ

U13

VDDQ

U14

VDDQ

U2

VDDQ

V10

VDDQ

V5

VDDQ

W13

VDDQ

W2

VDDQ

A3

VPP

W3

VPP

1V8_AON

1

2

3

{9,10}

{9}

1

2

FBC_D[63..32]

BI

M8D

@memory.u_mem_gddr5x_x32(sym_1):page11_i466
BGA190
COMMON

FBC_D32

32

FBC_D33

33

FBC_D34

34

FBC_D35

35

FBC_D36

36

FBC_D37

37

FBC_D38

38

FBC_D39

39

FBC_EDC4

FBC_DBI4

FBC_D40

40

FBC_D41

41

FBC_D42

42

FBC_D43

43

FBC_D44

44

FBC_D45

45

FBC_D46

46

FBC_D47

47

FBC_EDC5
FBC_DBI5

{9}
{9}

FBC_WCK45

IN

FBC_WCK45*

IN

NORMAL

B4

DQ0

B3

DQ1

C4

DQ2

C3

DQ3

F4

DQ4

F3

DQ5

G4

DQ6

G3

DQ7

D3

EDC0

E3

DBI0

x32

x16

B11

DQ8

NC

B12

DQ9

NC

C11

DQ10

NC

C12

DQ11

NC

F11

DQ12

NC

F12

DQ13

NC

G11

DQ14

NC

G12

DQ15

NC

D12

EDC1

GND

E12

DBI1

NC

D4

WCK01

D5

WCK01

{9}
{9}

FBC_D48

48

FBC_D49

49

FBC_D50

50

FBC_D51

51

FBC_D52

52

FBC_D53

53

FBC_D54

54

FBC_D55

55

FBC_EDC6

FBC_DBI6

FBC_D56

56

FBC_D57

57

FBC_D58

58

FBC_D59

59

FBC_D60

60

FBC_D61

61

FBC_D62

62

FBC_D63

63

FBC_EDC7
FBC_DBI7

FBC_WCK67

IN

FBC_WCK67*

IN

M8A

@memory.u_mem_gddr5x_x32(sym_3):page11_i498
BGA190
COMMON

NORMAL

V11

DQ16

V12

DQ17

U11

DQ18

U12

DQ19

P11

DQ20

P12

DQ21

N11

DQ22

N12

DQ23

T12

EDC2

R12

DBI2

x32

x16

V4

DQ24

V3

DQ25

U4

DQ26

U3

DQ27

P4

DQ28

P3

DQ29

N4

DQ30

N3

DQ31

T3

EDC3

R3

DBI3

T4

WCK23

T5

WCK23

{10}

NC

NC

NC

{9}

NC

{9}

NC

NC

NC

NC

NC

NC

IN

IN

IN

IN

C82
820pF

50V

10%
X7R
0402
COMMON

GND GND

FBC_CMD[31..0]

FBC_CLK1

FBC_CLK1*

M8B

@memory.u_mem_gddr5x_x32(sym_5):page11_i493
BGA190

FBC_CMD18

18

FBC_CMD16

16

FBC_CMD31

31

FBC_CMD22

22

FBC_CMD20

20

FBC_CMD19

19

FBC_CMD28

28

FBC_CMD27

27

FBC_CMD25

25

FBC_CMD26

26

FBC_CMD23

23

FBC_CMD24

24

FBC_CMD21

21

FBC_CMD30

30

FBC_CMD17

17

FBC_CMD29

29

FBC_VREFC

121ohm

COMMON

FBC_ZQ_2

R82

0402

1 %

COMMON

H4

RAS

M4

CAS

M11

WE

K4

ABI

J4

A0_A10

J5

A1_A9

J11

A2_BA0

J10

A3_BA3

L11

A4_BA2

L10

A5_BA1

L5

A6_A11

L4

A7_A8

K5

A12_A13

K12

A15_A14

K2

RESET

H11

CKE

K11

CLK

K10

CLK

M2

TCK

M13

TDI

A12

TDO

H2

TMS

K13

VREFC

H13

ZQ

3

4

FBVDDQ

C849
10uF

4V

20%
X6S
0603
COMMON

FBVDDQ

C846
22uF

4V

20%
X6S
0603W
COMMON

5

{9,10}

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

OUT

CLOSE DRAM

C841

C840

10uF

10uF

4V

4V

20%

20%

X6S

X6S

0603

0603

COMMON

COMMON

AROUND DRAM UNDER DRAM FOR X32

C831

C832

22uF

22uF

4V

4V

20%

20%

X6S

X6S

0603W

0603W

COMMON

COMMON

FB_DBI

FBC_DBI[7..0]

C836
10uF

4V

20%
X6S
0603
COMMON

C833
22uF

4V

20%
X6S
0603W
COMMON

C868

C850

C844

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S
0402

0402

COMMON

COMMON

C873

C867

22uF

10uF

4V

4V

20%

20%

X6S

X6S

0603W

0603

COMMON

COMMON

{9,10}

FBC_DBI0

0

FBC_DBI1

1

FBC_DBI2

2

FBC_DBI3

3

FBC_DBI4

4

FBC_DBI5

5

FBC_DBI6

6

FBC_DBI7

7

C874

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

FBVDDQ

C869
10uF

4V

20%
X6S
0603
COMMON

GND

OUT

C851
1uF

6.3V

10%
X6S
0402
COMMON

C842
1uF

6.3V

10%
X6S
0402
COMMON

FB_EDC

FBC_EDC[7..0]

C835
1uF

6.3V

10%
X6S
0402
COMMON

C834
1uF

6.3V

10%
X6S
0402
COMMON

C871
1uF

6.3V

10%
X6S
0402
COMMON

C847
1uF

6.3V

10%
X6S
0402
COMMON

C870
1uF

6.3V

10%
X6S
0402
COMMON

C845
1uF

6.3V

10%
X6S
0402
COMMON

FBC_EDC0

0

FBC_EDC1

1

FBC_EDC2

2

FBC_EDC3

3

FBC_EDC4

4

FBC_EDC5

5

FBC_EDC6

6

FBC_EDC7

7

C839
1uF

6.3V

10%
X6S
0402
COMMON

C887
1uF

6.3V

10%
X6S
0402
COMMON

C843
1uF

6.3V

10%
X6S
0402
COMMON

GND

C962
1uF

6.3V

10%
X6S
0402
COMMON

C899
1uF

6.3V

10%
X6S
0402
COMMON

GND

C983
1uF

6.3V

10%
X6S
0402
COMMON

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

MEMORY: FBC PARTITION[63:32]

1V8_AON

C273

C274

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

GND

4

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

FDBA

G

Galaxy Microsystems (HK) Ltd.

MEMORY: FBC Partition 63..32

MEMORY: FBC Partition 63..32

MEMORY: FBC Partition 63..32

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

H

Neston V10

Neston V10

Neston V10

11 52Friday, March 03, 2017

11 52Friday, March 03, 2017

11 52Friday, March 03, 2017

A B C D E F G H

Page12: MEMORY: FBD Partition 31..0

{9}

BI

1

{9}

2

{9}

3

FBD_D[31..0]

FBD_D0

0

FBD_D1

1

FBD_D2

2

FBD_D3

3

FBD_D4

4

FBD_D5

5

FBD_D6

6

FBD_D7

7

FBD_D8

8

FBD_D9

9

FBD_D10

10

FBD_D11

11

FBD_D12

12

FBD_D13

13

FBD_D14

14

FBD_D15

15

IN

IN

FBD_EDC0

FBD_DBI0

FBD_EDC1
FBD_DBI1

FBD_WCK01

FBD_WCK01*

M5D

@memory.u_mem_gddr5x_x32(sym_2):page12_i511
BGA190_MIRR
COMMON

MIRRORED

x32

x16

V4

DQ0

NC

V3

DQ1

NC

U4

DQ2

NC

U3

DQ3

NC

P4

DQ4

NC

P3

DQ5

NC

N4

DQ6

NC

N3

DQ7

NC

T3

EDC0

NC

R3

DBI0

NC

V11

DQ8

V12

DQ9

U11

DQ10

U12

DQ11

P11

DQ12

P12

DQ13

N11

DQ14

N12

DQ15

T12

EDC1

R12

DBI1

T4

WCK01

T5

WCK01

{5,7,10,15,17,27}

M5A

@memory.u_mem_gddr5x_x32(sym_4):page12_i550
BGA190_MIRR
COMMON

MIRRORED

x32

FBD_D16

16

FBD_D17

17

FBD_D18

18

FBD_D19

19

FBD_D20

20

FBD_D21

21

FBD_D22

22

FBD_D23

23

FBD_EDC2

FBD_DBI2

FBD_D24

24

FBD_D25

25

FBD_D26

26

FBD_D27

27

FBD_D28

28

FBD_D29

29

FBD_D30

30

FBD_D31

31

FBD_EDC3
FBD_DBI3

{9}
{9}

IN

IN

IN

GPIO10_FBVREF_SEL

FBD_WCK23

FBD_WCK23*

B11
B12
C11
C12
F11
F12
G11
G12

D12
E12

B4

B3
C4
C3

F4

F3
G4
G3

D3

E3

D4
D5

1G1D1S

G

1

x16

DQ16

NC

DQ17

NC

DQ18

NC

DQ19

NC

DQ20

NC

DQ21

NC

DQ22

NC

DQ23

NC

EDC2

GND

DBI2

NC

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

EDC3
DBI3

WCK23
WCK23

3

D

Q7

@discrete.q_fet_n_enh(sym_2):page12_i588
SOT323_1G1D1S
COMMON

S

2

AO3416L

30V

0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V

1.2A

0.2W
12V

SOT23

GND

{9,13}

{9}
{9}

FBD_VREF_Q

0.300

FBVDDQ

R65
549ohm

1 %
0402
COMMON

R62

1.33k

1 %
0402
COMMON

GND

FBD_CMD[31..0]

IN

FBD_CLK0

IN

FBD_CLK0*

IN

R66
931ohm

1 %
0402
COMMON

0.300

C74
820pF

50V

10%
X7R
0402
COMMON

GND GND

FBD_CMD2

2

FBD_CMD0

0

FBD_CMD15

15

FBD_CMD6

6

FBD_CMD4

4

FBD_CMD3

3

FBD_CMD12

12

FBD_CMD11

11

FBD_CMD9

9

FBD_CMD10

10

FBD_CMD7

7

FBD_CMD8

8

FBD_CMD5

5

FBD_CMD14

14

FBD_CMD1

1

FBD_CMD13

13

OUT

FBD_VREFC

0.140A

FBD_ZQ_1

R61

121ohm

COMMON

0402

1 %

M5B

@memory.u_mem_gddr5x_x32(sym_5):page12_i541
BGA190_MIRR
COMMON

M4

RAS

H4

CAS

H11

WE

K4

ABI

L4

A0_A10

L5

A1_A9

L11

A2_BA0

L10

A3_BA3

J11

A4_BA2

J10

A5_BA1

J5

A6_A11

J4

A7_A8

K5

A12_A13

K12

A15_A14

K2

RESET

M11

CKE

K11

CLK

K10

CLK

M2

TCK

M13

TDI

A12

TDO

H2

TMS

{13}

K13

VREFC

H13

ZQ

GND

M5C

@memory.u_mem_gddr5x_x32(sym_7):page12_i574

BGA190_MIRR

COMMON

Mirrored

A10

VSS

A5

VSS

B1

VSS

B14

VSS

D1

VSS

D11

VSS

D14

VSS

F1

VSS

F14

VSS

H1

VSS

H14

VSS

J12

VSS

J3

VSS

K1

VSS

K14

VSS

K3

VSS

L12

VSS

L3

VSS

M1

VSS

M14

VSS

P1

VSS

P14

VSS

T1

VSS

T11

VSS

T14

VSS

V1

VSS

V14

VSS

W10

VSS

W5

VSS

B13

VSSQ

B2

VSSQ

C10

VSSQ

C5

VSSQ

D13

VSSQ

D2

VSSQ

E10

VSSQ

E5

VSSQ

F13

VSSQ

F2

VSSQ

G10

VSSQ

G5

VSSQ

N10

VSSQ

N5

VSSQ

P13

VSSQ

P2

VSSQ

R10

VSSQ

R5

VSSQ

T13

VSSQ

T2

VSSQ

U10

VSSQ

U5

VSSQ

V13

VSSQ

V2

VSSQ

add 1k to VDD

FBVDDQ

W12

MF

A1

VDD

A11

VDD

A14

VDD

A4

VDD

D10

VDD

G1

VDD

G14

VDD

H10

VDD

H5

VDD

J1

VDD

J14

VDD

L1

VDD

L14

VDD

M10

VDD

M5

VDD

N1

VDD

N14

VDD

T10

VDD

W1

VDD

W11

VDD

W14

VDD

W4

VDD

A13

VDDQ

A2

VDDQ

B10

VDDQ

B5

VDDQ

C1

VDDQ

C13

VDDQ

C14

VDDQ

C2

VDDQ

E1

VDDQ

E11

VDDQ

E13

VDDQ

E14

VDDQ

E2

VDDQ

E4

VDDQ

F10

VDDQ

F5

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

J13

VDDQ

J2

VDDQ

L13

VDDQ

L2

VDDQ

M12

VDDQ

M3

VDDQ

N13

VDDQ

N2

VDDQ

P10

VDDQ

P5

VDDQ

R1

VDDQ

R11

VDDQ

R13

VDDQ

R14

VDDQ

R2

VDDQ

R4

VDDQ

U1

VDDQ

U13

VDDQ

U14

VDDQ

U2

VDDQ

V10

VDDQ

V5

VDDQ

W13

VDDQ

W2

VDDQ

A3

VPP

W3

VPP

1V8_AON

1

2

3

4

FBVDDQ

C1217
10uF

4V

20%
X6S
0603
COMMON

FBVDDQ

C1173
22uF

4V

20%
X6S
0603W
COMMON

5

{9,13}

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

OUT

CLOSE DRAM

FB_DBI

FBD_DBI[7..0]

C1212
10uF

4V

20%
X6S
0603
COMMON

C1221
22uF

4V

20%
X6S
0603W
COMMON

C1220
10uF

4V

20%
X6S
0603
COMMON

C1201
22uF

4V

20%
X6S
0603W
COMMON

C1175

C1197

C1194

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

C1180

C1200

22uF

10uF

4V

4V

20%

20%

X6S

X6S

0603

0603W
COMMON

COMMON

{9,13}

FBD_DBI0

0

FBD_DBI1

1

FBD_DBI2

2

FBD_DBI3

3

FBD_DBI4

4

FBD_DBI5

5

FBD_DBI6

6

FBD_DBI7

7

C1218

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

C1216
10uF

4V

20%
X6S
0603
COMMON

GND

C1210
10uF

4V

20%
X6S
0603
COMMON

AROUND DRAM UNDER DRAM FOR X32

C1181
22uF

4V

20%
X6S
0603W
COMMON

C1214

C1208

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

FBVDDQ

C1174

C1209

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

FB_EDC

FBD_EDC[7..0]

OUT

C1207
1uF

6.3V

10%
X6S
0402
COMMON

C1196
1uF

6.3V

10%
X6S
0402
COMMON

C1215

C1176
1uF

6.3V

10%
X6S
0402
COMMON

C1046
1uF

6.3V

10%
X6S
0402
COMMON

C1219
1uF

6.3V

10%
X6S
0402
COMMON

GND

C1112
1uF

6.3V

10%
X6S
0402
COMMON

C1149
1uF

6.3V

10%
X6S
0402
COMMON

GND

C1045
1uF

6.3V

10%
X6S
0402
COMMON

1uF

6.3V

10%
X6S
0402
COMMON

C1195
1uF

6.3V

10%
X6S
0402
COMMON

FBD_EDC0

0

FBD_EDC1

1

FBD_EDC2

2

FBD_EDC3

3

FBD_EDC4

4

FBD_EDC5

5

FBD_EDC6

6

FBD_EDC7

7

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

MEMORY: FBD PARTITION[31:0]

1V8_AON

C275

C284

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

GND

4

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

FDBA

G

Galaxy Microsystems (HK) Ltd.

MEMORY: FBD Partition 31..0

MEMORY: FBD Partition 31..0

MEMORY: FBD Partition 31..0

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

Neston V10

Neston V10

Neston V10

12 52Friday, March 03, 2017

12 52Friday, March 03, 2017

12 52Friday, March 03, 2017

H

A B C D E F G H

Page13: MEMORY: FBD Partition 63..32

{9}

1

2

3

FBD_D[63..32]

BI

M6D

@memory.u_mem_gddr5x_x32(sym_1):page13_i466
BGA190
COMMON

FBD_D32

32

FBD_D33

33

FBD_D34

34

FBD_D35

35

FBD_D36

36

FBD_D37

37

FBD_D38

38

FBD_D39

39

FBD_EDC4

FBD_DBI4

FBD_D40

40

FBD_D41

41

FBD_D42

42

FBD_D43

43

FBD_D44

44

FBD_D45

45

FBD_D46

46

FBD_D47

47

FBD_EDC5
FBD_DBI5

{9}
{9}

FBD_WCK45

IN

FBD_WCK45*

IN

NORMAL

B4

DQ0

B3

DQ1

C4

DQ2

C3

DQ3

F4

DQ4

F3

DQ5

G4

DQ6

G3

DQ7

D3

EDC0

E3

DBI0

x32

x16

B11

DQ8

NC

B12

DQ9

NC

C11

DQ10

NC

C12

DQ11

NC

F11

DQ12

NC

F12

DQ13

NC

G11

DQ14

NC

G12

DQ15

NC

D12

EDC1

GND

E12

DBI1

NC

D4

WCK01

D5

WCK01

{9}
{9}

FBD_D48

48

FBD_D49

49

FBD_D50

50

FBD_D51

51

FBD_D52

52

FBD_D53

53

FBD_D54

54

FBD_D55

55

FBD_EDC6

FBD_DBI6

FBD_D56

56

FBD_D57

57

FBD_D58

58

FBD_D59

59

FBD_D60

60

FBD_D61

61

FBD_D62

62

FBD_D63

63

FBD_EDC7
FBD_DBI7

FBD_WCK67

IN

FBD_WCK67*

IN

M6A

@memory.u_mem_gddr5x_x32(sym_3):page13_i500
BGA190
COMMON

NORMAL

V11

DQ16

V12

DQ17

U11

DQ18

U12

DQ19

P11

DQ20

P12

DQ21

N11

DQ22

N12

DQ23

T12

EDC2

R12

DBI2

x32

V4

DQ24

V3

DQ25

U4

DQ26

U3

DQ27

P4

DQ28

P3

DQ29

N4

DQ30

N3

DQ31

T3

EDC3

R3

DBI3

T4

WCK23

T5

WCK23

{9,12}

x16

NC

NC

NC

NC

NC

NC

NC

NC

{9}
{9}

NC

NC

{12}

IN

IN

IN

IN

C77
820pF

50V

10%
X7R
0402
COMMON

GND GND

FBD_CMD[31..0]

FBD_CLK1

FBD_CLK1*

18

16

31

22

20

19

28

27

25

26

23

24

21

30

17

29

R69 121ohm

COMMON0402

1 %

FBD_CMD18
FBD_CMD16
FBD_CMD31

FBD_CMD22

FBD_CMD20

FBD_CMD19
FBD_CMD28

FBD_CMD27
FBD_CMD25
FBD_CMD26

FBD_CMD23
FBD_CMD24

FBD_CMD21
FBD_CMD30

FBD_CMD17
FBD_CMD29

FBD_VREFC

FBD_ZQ_2

M6B

@memory.u_mem_gddr5x_x32(sym_5):page13_i496
BGA190
COMMON

H4

RAS

M4

CAS

M11

WE

K4

ABI

J4

A0_A10

J5

A1_A9

J11

A2_BA0

J10

A3_BA3

L11

A4_BA2

L10

A5_BA1

L5

A6_A11

L4

A7_A8

K5

A12_A13

K12

A15_A14

K2

RESET

H11

CKE

K11

CLK

K10

CLK

M2

TCK

M13

TDI

A12

TDO

H2

TMS

K13

VREFC

H13

ZQ

GND

M6C

@memory.u_mem_gddr5x_x32(sym_6):page13_i521

BGA190

COMMON

Normal

W12

MF

add 1k to VSS

A10

VSS

A5

VSS

B1

VSS

B14

VSS

D1

VSS

D11

VSS

D14

VSS

F1

VSS

F14

VSS

H1

VSS

H14

VSS

J12

VSS

J3

VSS

K1

VSS

K14

VSS

K3

VSS

L12

VSS

L3

VSS

M1

VSS

M14

VSS

P1

VSS

P14

VSS

T1

VSS

T11

VSS

T14

VSS

V1

VSS

V14

VSS

W10

VSS

W5

VSS

B13

VSSQ

B2

VSSQ

C10

VSSQ

C5

VSSQ

D13

VSSQ

D2

VSSQ

E10

VSSQ

E5

VSSQ

F13

VSSQ

F2

VSSQ

G10

VSSQ

G5

VSSQ

N10

VSSQ

N5

VSSQ

P13

VSSQ

P2

VSSQ

R10

VSSQ

R5

VSSQ

T13

VSSQ

T2

VSSQ

U10

VSSQ

U5

VSSQ

V13

VSSQ

V2

VSSQ

FBVDDQ

A1

VDD

A11

VDD

A14

VDD

A4

VDD

D10

VDD

G1

VDD

G14

VDD

H10

VDD

H5

VDD

J1

VDD

J14

VDD

L1

VDD

L14

VDD

M10

VDD

M5

VDD

N1

VDD

N14

VDD

T10

VDD

W1

VDD

W11

VDD

W14

VDD

W4

VDD

A13

VDDQ

A2

VDDQ

B10

VDDQ

B5

VDDQ

C1

VDDQ

C13

VDDQ

C14

VDDQ

C2

VDDQ

E1

VDDQ

E11

VDDQ

E13

VDDQ

E14

VDDQ

E2

VDDQ

E4

VDDQ

F10

VDDQ

F5

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

J13

VDDQ

J2

VDDQ

L13

VDDQ

L2

VDDQ

M12

VDDQ

M3

VDDQ

N13

VDDQ

N2

VDDQ

P10

VDDQ

P5

VDDQ

R1

VDDQ

R11

VDDQ

R13

VDDQ

R14

VDDQ

R2

VDDQ

R4

VDDQ

U1

VDDQ

U13

VDDQ

U14

VDDQ

U2

VDDQ

V10

VDDQ

V5

VDDQ

W13

VDDQ

W2

VDDQ

A3

VPP

W3

VPP

1V8_AON

1

2

3

4

FBVDDQ

C1118
10uF

4V

20%
X6S
0603
COMMON

FBVDDQ

C1166
22uF

4V

20%
X6S
0603W
COMMON

5

{9,12}

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

OUT

FB_DBI

FBD_DBI[7..0]

C1068
10uF

4V

20%
X6S
0603
COMMON

C1168
22uF

4V

20%
X6S
0603W
COMMON

CLOSE DRAM

C1165
10uF

4V

20%
X6S
0603
COMMON

C1027
22uF

4V

20%
X6S
0603W
COMMON

C1081
10uF

4V

20%
X6S
0603
COMMON

C1109
22uF

4V

20%
X6S
0603W
COMMON

C1163

C1026

C1047

C1086

C1079

FBVDDQ

1uF

6.3V

10%
X6S
0402
COMMON

UNDER DRAM FOR X32AROUND DRAM

C1034
1uF

6.3V

10%
X6S
0402
COMMON

FB_EDC

FBD_EDC[7..0]

C1182
1uF

6.3V

10%
X6S
0402
COMMON

C1155
1uF

6.3V

10%
X6S
0402
COMMON

1uF

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

C1024

C1025

22uF

10uF

4V

4V

20%

20%

X6S

X6S

0603

0603W
COMMON

COMMON

{9,12}

FBD_DBI0

0

FBD_DBI1

1

FBD_DBI2

2

FBD_DBI3

3

FBD_DBI4

4

FBD_DBI5

5

FBD_DBI6

6

FBD_DBI7

7

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

C1102
10uF

4V

20%
X6S
0603
COMMON

GND

OUT

C1162
1uF

6.3V

10%
X6S
0402
COMMON

C1108
1uF

6.3V

10%
X6S
0402
COMMON

C1164

C1160
1uF

6.3V

10%
X6S
0402
COMMON

C1183
1uF

6.3V

10%
X6S
0402
COMMON

C1103
1uF

6.3V

10%
X6S
0402
COMMON

GND

C1179

C1213
1uF

6.3V

10%
X6S
0402
COMMON

C1211
1uF

6.3V

10%
X6S
0402
COMMON

GND

1uF

6.3V

10%
X6S
0402
COMMON

1uF

6.3V

10%
X6S
0402
COMMON

C1104
1uF

6.3V

10%
X6S
0402
COMMON

FBD_EDC0

0

FBD_EDC1

1

FBD_EDC2

2

FBD_EDC3

3

FBD_EDC4

4

FBD_EDC5

5

FBD_EDC6

6

FBD_EDC7

7

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

MEMORY: FBD PARTITION[63:32]

1V8_AON

GND

C276
1uF

6.3V

10%
X6S
0402
COMMON

C277
1uF

6.3V

10%
X6S
0402
COMMON

4

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

FDBA

G

Galaxy Microsystems (HK) Ltd.

MEMORY: FBD Partition 63..32

MEMORY: FBD Partition 63..32

MEMORY: FBD Partition 63..32

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

H

Neston V10

Neston V10

Neston V10

of

of

of

13 52Friday, March 03, 2017

13 52Friday, March 03, 2017

13 52Friday, March 03, 2017

A B C D E F G H

Page14: MEMORY: GPU Partition E/F

1

{15,16}

2

3

4

{15,16}

{15,16}

FB_DATA

FBE_D[63..0]

BI

FB_DBI

FBE_DBI[7..0]

IN

FB_EDC

FBE_EDC[7..0]

OUT

FBE_D0

0

FBE_D1

1

FBE_D2

2

FBE_D3

3

FBE_D4

4

FBE_D5

5

FBE_D6

6

FBE_D7

7

FBE_D8

8

FBE_D9

9

FBE_D10

10

FBE_D11

11

FBE_D12

12

FBE_D13

13

FBE_D14

14

FBE_D15

15

FBE_D16

16

FBE_D17

17

FBE_D18

18

FBE_D19

19

FBE_D20

20

FBE_D21

21

FBE_D22

22

FBE_D23

23

FBE_D24

24

FBE_D25

25

FBE_D26

26

FBE_D27

27

FBE_D28

28

FBE_D29

29

FBE_D30

30

FBE_D31

31

FBE_D32

32

FBE_D33

33

FBE_D34

34

FBE_D35

35

FBE_D36

36

FBE_D37

37

FBE_D38

38

FBE_D39

39

FBE_D40

40

FBE_D41

41

FBE_D42

42

FBE_D43

43

FBE_D44

44

FBE_D45

45

FBE_D46

46

FBE_D47

47

FBE_D48

48

FBE_D49

49

FBE_D50

50

FBE_D51

51

FBE_D52

52

FBE_D53

53

FBE_D54

54

FBE_D55

55

FBE_D56

56

FBE_D57

57

FBE_D58

58

FBE_D59

59

FBE_D60

60

FBE_D61

61

FBE_D62

62

FBE_D63

63

FBE_DBI0

0

FBE_DBI1

1

FBE_DBI2

2

FBE_DBI3

3

FBE_DBI4

4

FBE_DBI5

5

FBE_DBI6

6

FBE_DBI7

7

FBE_EDC0

0

FBE_EDC1

1

FBE_EDC2

2

FBE_EDC3

3

FBE_EDC4

4

FBE_EDC5

5

FBE_EDC6

6

FBE_EDC7

7

G1F

@digital.u_gpu_gb3c_384(sym_6):page14_i599
BGA2397
COMMON

6/24 FBE

AF11

FBE_D0

AF8

FBE_D1

AF10

FBE_D2

AF9

FBE_D3

AF4

FBE_D4

AF3

FBE_D5

AF1

FBE_D6

AF2

FBE_D7

AD3

FBE_D8

AD1

FBE_D9

AD4

FBE_D10

AD2

FBE_D11

AD7

FBE_D12

AE7

FBE_D13

AD9

FBE_D14

AE8

FBE_D15

Y2

FBE_D16

Y1

FBE_D17

Y4

FBE_D18

Y3

FBE_D19

Y8

FBE_D20

Y9

FBE_D21

Y11

FBE_D22

Y10

FBE_D23

AA8

FBE_D24

AA7

FBE_D25

AB9

FBE_D26

AB7

FBE_D27

AB4

FBE_D28

AB2

FBE_D29

AB3

FBE_D30

AB1

FBE_D31

F2

FBE_D32

F4

FBE_D33

F1

FBE_D34

F3

FBE_D35

D3

FBE_D36

D1

FBE_D37

C2

FBE_D38

D2

FBE_D39

H5

FBE_D40

J7

FBE_D41

H4

FBE_D42

J6

FBE_D43

G3

FBE_D44

G4

FBE_D45

G6

FBE_D46

H3

FBE_D47

R5

FBE_D48

R4

FBE_D49

R7

FBE_D50

R6

FBE_D51

N5

FBE_D52

M5

FBE_D53

N7

FBE_D54

P7

FBE_D55

R11

FBE_D56

N11

FBE_D57

R10

FBE_D58

P10

FBE_D59

M8

FBE_D60

M10

FBE_D61

N10

FBE_D62

M11

FBE_D63

AF5

FBE_DQM0

AD5

FBE_DQM1

Y7

FBE_DQM2

AB5

FBE_DQM3

E3

FBE_DQM4

G1

FBE_DQM5

N4

FBE_DQM6

M7

FBE_DQM7

AF6

FBE_DQS_WP0

AD6

FBE_DQS_WP1

Y5

FBE_DQS_WP2

AB6

FBE_DQS_WP3

E4

FBE_DQS_WP4

H6

FBE_DQS_WP5

R8

FBE_DQS_WP6

M6

FBE_DQS_WP7

FBE_CMD0
FBE_CMD1
FBE_CMD2
FBE_CMD3
FBE_CMD4
FBE_CMD5
FBE_CMD6
FBE_CMD7
FBE_CMD8

FBE_CMD9
FBE_CMD10
FBE_CMD11
FBE_CMD12
FBE_CMD13
FBE_CMD14
FBE_CMD15
FBE_CMD16
FBE_CMD17
FBE_CMD18
FBE_CMD19
FBE_CMD20
FBE_CMD21
FBE_CMD22
FBE_CMD23
FBE_CMD24
FBE_CMD25
FBE_CMD26
FBE_CMD27
FBE_CMD28
FBE_CMD29
FBE_CMD30
FBE_CMD31
FBE_CMD32
FBE_CMD33
FBE_CMD34
FBE_CMD35

FBE_CLK0
FBE_CLK0
FBE_CLK1
FBE_CLK1

FBE_WCK01

FBE_WCK01
FBE_WCKB01
FBE_WCKB01

FBE_WCK23

FBE_WCK23
FBE_WCKB23
FBE_WCKB23

FBE_WCK45

FBE_WCK45
FBE_WCKB45
FBE_WCKB45

FBE_WCK67

FBE_WCK67
FBE_WCKB67
FBE_WCKB67

FBE_PLL_AVDD
FBE_PLL_AVDD
FBE_PLL_AVDD

FB_CMD

FBE_CMD0

W1

FBE_CMD1

V2

FBE_CMD2

V1

FBE_CMD3

V3

FBE_CMD4

U2

FBE_CMD5

U3

FBE_CMD6

T2

FBE_CMD7

T1

FBE_CMD8

R3

FBE_CMD9

R2

FBE_CMD10

P1

FBE_CMD11

V6

FBE_CMD12

V4

FBE_CMD13

V7

FBE_CMD14

V8

FBE_CMD15

V9

FBE_CMD16

H1

FBE_CMD17

H2

FBE_CMD18

J3

FBE_CMD19

K3

FBE_CMD20

K2

FBE_CMD21

K1

FBE_CMD22

L2

FBE_CMD23

M3

FBE_CMD24

M1

FBE_CMD25

M2

FBE_CMD26

N3

FBE_CMD27

U6

FBE_CMD28

U4

FBE_CMD29

U7

FBE_CMD30

U8

FBE_CMD31

U9
P2
P3

FBE_DEBUG0

V5

FBE_DEBUG1

U5

FBE_CLK0

V11

FBE_CLK0*

V10

FBE_CLK1

U11

FBE_CLK1*

U10

FBE_WCK01

AD10

FBE_WCK01*

AD11
AE11
AE10

FBE_WCK23

AB11

FBE_WCK23*

AB10
AA11
AA10

FBE_WCK45

L5

FBE_WCK45*

L4
L7
L6

FBE_WCK67

L8

FBE_WCK67*

K8
L10
L9

1V8_FB_PLL_REF 1V8_FB_PLL_REF

AC11
AC12
AC13

C1152

0.1uF

16V

10%
X7R
0402
COMMON

GND

FBE_CMD[31..0]

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

R871 60.4ohm/NC

0402 COMMON

1 %

FBE_CLK0 FB_CLK

FBE_WCK23 FB_WCK

FBE_WCK23 FB_WCK

FBE_WCK45 FB_WCK

FBE_WCK45 FB_WCK

FBE_CMD13

FBE_CMD29

FBE_CMD1
FBE_CMD17

R870 60.4ohm/NC

0402 COMMON

FB_CLKFBE_CLK0

FB_CLKFBE_CLK1

FB_CLKFBE_CLK1

FB_WCKFBE_WCK01

FB_WCKFBE_WCK01

FB_WCKFBE_WCK67

FB_WCKFBE_WCK67

IN

1 %

nv_res

nv_res

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

C E

BI

FBVDDQ

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

{4,9,14,29}

R337
10k

5 %
0402
COMMON

R338
10k

5 %
0402
COMMON

ASSEMBLY

PAGE DETAIL

FBVDDQ

nv_res

R359
10k

5 %
0402
COMMON

nv_res

R339
10k

5 %
0402
COMMON

GND

<ASSEMBLY_DESCRIPTION>

MEMORY: GPU PARTITION E/F

{15,16}BI{17,18}

GDDR5X CMD Mapping

CMD

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

CMD31

CMD32

CMD33

CMD34

CMD35

{15}
{15}
{16}
{16}

{15}
{15}

{15}
{15}

{16}
{16}

{16}
{16}

{17,18}

{17,18}

CAS*

RST*

RAS*

A1_A9

A0_A10

A12_A13

ABI*

A6_A11

A7_A8

A4_BA2

A5_BA1

A3_BA3

A2_BA0

CKE*

A14_A15

WE*

DBG0

DBG1

32..630..31

CAS*

RST*

RAS*

A1_A9

A0_A10

A12_A13

ABI*

A6_A11

A7_A8

A4_BA2

A5_BA1

A3_BA3

A2_BA0

CKE*

A14_A15

WE*

DBG0

DBG1

FBF_CMD13

FBF_CMD29

FBF_CMD1
FBF_CMD17

IN

OUT

FB_DATA

FBF_D[63..0]

FB_DBI

FBF_DBI[7..0]

FB_EDC

FBF_EDC[7..0]

nv_res

nv_res

R340
10k

5 %
0402
COMMON

R341
10k

5 %
0402
COMMON

FBVDDQ

G1G

@digital.u_gpu_gb3c_384(sym_7):page14_i600
BGA2397
COMMON

AW11

AW10

7/24 FBF

BH2

FBF_D0

BH4

FBF_D1

BH1

FBF_D2

BH3

FBF_D3

BK3

FBF_D4

BK1

FBF_D5

BL2

FBF_D6

BK2

FBF_D7

BF5

FBF_D8

BE7

FBF_D9

BF4

FBF_D10

BE6

FBF_D11

BG3

FBF_D12

BG4

FBF_D13

BG6

FBF_D14

BF3

FBF_D15

AW5

FBF_D16

AW4

FBF_D17

AW7

FBF_D18

AW6

FBF_D19

BA5

FBF_D20

BB5

FBF_D21

BA7

FBF_D22

AY7

FBF_D23
FBF_D24

BA11

FBF_D25
FBF_D26

AY10

FBF_D27

BB8

FBF_D28

BB10

FBF_D29

BA10

FBF_D30

BB11

FBF_D31

AH11

FBF_D32

AH8

FBF_D33

AH10

FBF_D34

AH9

FBF_D35

AH4

FBF_D36

AH3

FBF_D37

AH1

FBF_D38

AH2

FBF_D39

AK3

FBF_D40

AK1

FBF_D41

AK4

FBF_D42

AK2

FBF_D43

AK7

FBF_D44

AJ7

FBF_D45

AK9

FBF_D46

AJ8

FBF_D47

AP2

FBF_D48

AP1

FBF_D49

AP4

FBF_D50

AP3

FBF_D51

AP8

FBF_D52

AP9

FBF_D53

AP11

FBF_D54

AP10

FBF_D55

AN8

FBF_D56

AN7

FBF_D57

AM9

FBF_D58

AM7

FBF_D59

AM4

FBF_D60

AM2

FBF_D61

AM3

FBF_D62

AM1

FBF_D63

BJ3

FBF_DQM0

BG1

FBF_DQM1

BA4

FBF_DQM2

BB7

FBF_DQM3

AH5

FBF_DQM4

AK5

FBF_DQM5

AP7

FBF_DQM6

AM5

FBF_DQM7

BJ4

FBF_DQS_WP0

BF6

FBF_DQS_WP1

AW8

FBF_DQS_WP2

BB6

FBF_DQS_WP3

AH6

FBF_DQS_WP4

AK6

FBF_DQS_WP5

AP5

FBF_DQS_WP6

AM6

FBF_DQS_WP7

FBF_CMD0
FBF_CMD1
FBF_CMD2
FBF_CMD3
FBF_CMD4
FBF_CMD5
FBF_CMD6
FBF_CMD7
FBF_CMD8

FBF_CMD9
FBF_CMD10
FBF_CMD11
FBF_CMD12
FBF_CMD13
FBF_CMD14
FBF_CMD15
FBF_CMD16
FBF_CMD17
FBF_CMD18
FBF_CMD19
FBF_CMD20
FBF_CMD21
FBF_CMD22
FBF_CMD23
FBF_CMD24
FBF_CMD25
FBF_CMD26
FBF_CMD27
FBF_CMD28
FBF_CMD29
FBF_CMD30
FBF_CMD31
FBF_CMD32
FBF_CMD33
FBF_CMD34
FBF_CMD35

FBF_CLK0
FBF_CLK0
FBF_CLK1
FBF_CLK1

FBF_WCK01
FBF_WCK01

FBF_WCKB01
FBF_WCKB01

FBF_WCK23
FBF_WCK23

FBF_WCKB23
FBF_WCKB23

FBF_WCK45
FBF_WCK45

FBF_WCKB45
FBF_WCKB45

FBF_WCK67
FBF_WCK67

FBF_WCKB67
FBF_WCKB67

FBF_PLL_AVDD
FBF_PLL_AVDD
FBF_PLL_AVDD

FBF_D0

0

FBF_D1

1

FBF_D2

2

FBF_D3

3

FBF_D4

4

FBF_D5

5

FBF_D6

6

FBF_D7

7

FBF_D8

8

FBF_D9

9

FBF_D10

10

FBF_D11

11

FBF_D12

12

FBF_D13

13

FBF_D14

14

FBF_D15

15

FBF_D16

16

FBF_D17

17

FBF_D18

18

FBF_D19

19

FBF_D20

20

FBF_D21

21

FBF_D22

22

FBF_D23

23

FBF_D24

24

FBF_D25

25

FBF_D26

26

FBF_D27

27

FBF_D28

28

FBF_D29

29

FBF_D30

30

FBF_D31

31

FBF_D32

32

FBF_D33

33

FBF_D34

34

FBF_D35

35

FBF_D36

36

FBF_D37

37

FBF_D38

38

FBF_D39

39

FBF_D40

40

FBF_D41

41

FBF_D42

42

FBF_D43

43

FBF_D44

44

FBF_D45

45

FBF_D46

46

FBF_D47

47

FBF_D48

48

FBF_D49

49

FBF_D50

50

FBF_D51

51

FBF_D52

52

FBF_D53

53

FBF_D54

54

FBF_D55

55

FBF_D56

56

FBF_D57

57

FBF_D58

58

FBF_D59

59

FBF_D60

60

FBF_D61

61

FBF_D62

62

FBF_D63

63

FBF_DBI0

0

FBF_DBI1

1

FBF_DBI2

2

FBF_DBI3

3

FBF_DBI4

4

FBF_DBI5

5

FBF_DBI6

6

FBF_DBI7

7

FBF_EDC0

0

FBF_EDC1

1

FBF_EDC2

2

FBF_EDC3

3

FBF_EDC4

4

FBF_EDC5

5

FBF_EDC6

6

FBF_EDC7

7

nv_res

R342
10k

5 %
0402
COMMON

nv_res

R343
10k

5 %
0402
COMMON

GND

FDBA

FBF_CMD0

BF1

FBF_CMD1

BF2

FBF_CMD2

BE3

FBF_CMD3

BD3

FBF_CMD4

BD2

FBF_CMD5

BD1

FBF_CMD6

BC2

FBF_CMD7

BB3

FBF_CMD8

BB1

FBF_CMD9

BB2

FBF_CMD10

BA3

FBF_CMD11

AU6

FBF_CMD12

AU4

FBF_CMD13

AU7

FBF_CMD14

AU8

FBF_CMD15

AU9

FBF_CMD16

AR1

FBF_CMD17

AT2

FBF_CMD18

AT1

FBF_CMD19

AT3

FBF_CMD20

AU2

FBF_CMD21

AU3

FBF_CMD22

AV2

FBF_CMD23

AV1

FBF_CMD24

AW3

FBF_CMD25

AW2

FBF_CMD26

AY1

FBF_CMD27

AT6

FBF_CMD28

AT4

FBF_CMD29

AT7

FBF_CMD30

AT8

FBF_CMD31

AT9
AY3
AY2

FBF_DEBUG0

AU5

FBF_DEBUG1

AT5

FBF_CLK0

AU11

FBF_CLK0*

AU10

FBF_CLK1

AT11

FBF_CLK1*

AT10

FBF_WCK01

BC5

FBF_WCK01*

BC4
BC7
BC6

FBF_WCK23

BD8

FBF_WCK23*

BC8
BC9
BC10

FBF_WCK45

AK10

FBF_WCK45*

AK11
AJ11
AJ10

FBF_WCK67

AM11

FBF_WCK67*

AM10
AN11
AN10

AL11
AL12
AL13

C1151

0.1uF

16V

10%
X7R
0402
COMMON

GND

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

G

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

R872 60.4ohm/NC

0402 COMMON

1 %

FBF_CLK0 FB_CLK

FBF_CLK0 FB_CLK

FBF_CLK1 FB_CLK

FBF_CLK1 FB_CLK

FB_CMD

FBF_CMD[31..0]

FBVDDQ

R873 60.4ohm/NC

0402 COMMON

1 %

FB_WCKFBF_WCK01

FB_WCKFBF_WCK01

FB_WCKFBF_WCK23

FB_WCKFBF_WCK23

FB_WCKFBF_WCK45

FB_WCKFBF_WCK45

FB_WCKFBF_WCK67

FB_WCKFBF_WCK67

IN

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

MEMORY: GPU Partition E/F

MEMORY: GPU Partition E/F

MEMORY: GPU Partition E/F

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

{4,9,14,29}

Neston V10

Neston V10

Neston V10

14 52Friday, March 03, 2017

14 52Friday, March 03, 2017

14 52Friday, March 03, 2017

H

{17,18}

{17}
{17}
{18}
{18}

{17}
{17}

{17}
{17}

{18}
{18}

{18}
{18}

1

2

3

4

5

A B C D E F G H

Page15: MEMORY: FBE Partition 31..0

{14}

BI

1

2

{14}
{14}

3

FBE_D[31..0]

M2D

@memory.u_mem_gddr5x_x32(sym_2):page15_i510
BGA190_MIRR
COMMON

MIRRORED

x32

FBE_D0

0

FBE_D1

1

FBE_D2

2

FBE_D3

3

FBE_D4

4

FBE_D5

5

FBE_D6

6

FBE_D7

7

FBE_EDC0

FBE_DBI0

FBE_D8

8

FBE_D9

9

FBE_D10

10

FBE_D11

11

FBE_D12

12

FBE_D13

13

FBE_D14

14

FBE_D15

15

FBE_EDC1
FBE_DBI1

FBE_WCK01

IN

FBE_WCK01*

IN

x16

V4

DQ0

NC

V3

DQ1

NC

U4

DQ2

NC

U3

DQ3

NC

P4

DQ4

NC

P3

DQ5

NC

N4

DQ6

NC

N3

DQ7

NC

T3

EDC0

NC

R3

DBI0

NC

V11

DQ8

V12

DQ9

U11

DQ10

U12

DQ11

P11

DQ12

P12

DQ13

N11

DQ14

N12

DQ15

T12

EDC1

R12

DBI1

T4

WCK01

T5

WCK01

{14}
{14}

{5,7,10,12,17,27}

IN

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

FBE_D16
FBE_D17

FBE_D18
FBE_D19
FBE_D20

FBE_D21
FBE_D22

FBE_D23

FBE_EDC2

FBE_DBI2

FBE_D24

FBE_D25
FBE_D26

FBE_D27
FBE_D28
FBE_D29

FBE_D30
FBE_D31

FBE_EDC3
FBE_DBI3

FBE_WCK23

IN

FBE_WCK23*

IN

GPIO10_FBVREF_SEL

M2A

@memory.u_mem_gddr5x_x32(sym_4):page15_i546
BGA190_MIRR
COMMON

MIRRORED

x32

x16

B11

DQ16

B12

DQ17

C11

DQ18

C12

DQ19

F11

DQ20

F12

DQ21

G11

DQ22

G12

DQ23

D12

EDC2

GND

E12

DBI2

B4

DQ24

B3

DQ25

C4

DQ26

C3

DQ27

F4

DQ28

F3

DQ29

G4

DQ30

G3

DQ31

D3

EDC3

E3

DBI3

D4

WCK23

D5

WCK23

1G1D1S

D

Q5

@discrete.q_fet_n_enh(sym_2):page15_i587
SOT323_1G1D1S

G

1

COMMON

S

SOT23

GND

NC

NC

NC

NC

NC

NC

NC

NC

NC

3

2

30V

0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V

1.2A

0.2W
12V

AO3416L

{14,16}

{14}
{14}

FBE_VREF_Q

0.300

FBVDDQ

M2B

FBE_CMD[31..0]

IN

FBE_CLK0

IN

FBE_CLK0*

IN

R34
549ohm

1 %
0402
COMMON

R39

R33

1.33k

931ohm

1 %

1 %
0402

0402

COMMON

COMMON

GND

0.300

C63
820pF

50V

10%
X7R
0402
COMMON

GND GND GND

FBE_CMD2

2

FBE_CMD0

0

FBE_CMD15

15

FBE_CMD6

6

FBE_CMD4

4

FBE_CMD3

3

FBE_CMD12

12

FBE_CMD11

11

FBE_CMD9

9

FBE_CMD10

10

FBE_CMD7

7

FBE_CMD8

8

FBE_CMD5

5

FBE_CMD14

14

FBE_CMD1

1

FBE_CMD13

13

OUT

FBE_VREFC

0.140A

FBE_ZQ_1

R35

121ohm

COMMON

0402

1 %

@memory.u_mem_gddr5x_x32(sym_5):page15_i571
BGA190_MIRR
COMMON

M4

RAS

H4

CAS

H11

WE

K4

ABI

L4

A0_A10

L5

A1_A9

L11

A2_BA0

L10

A3_BA3

J11

A4_BA2

J10

A5_BA1

J5

A6_A11

J4

A7_A8

K5

A12_A13

K12

A15_A14

K2

RESET

M11

CKE

K11

CLK

K10

CLK

M2

TCK

M13

TDI

A12

TDO

H2

TMS

{16}

K13

VREFC

H13

ZQ

M2C

@memory.u_mem_gddr5x_x32(sym_7):page15_i573

BGA190_MIRR

COMMON

Mirrored

A10

VSS

A5

VSS

B1

VSS

B14

VSS

D1

VSS

D11

VSS

D14

VSS

F1

VSS

F14

VSS

H1

VSS

H14

VSS

J12

VSS

J3

VSS

K1

VSS

K14

VSS

K3

VSS

L12

VSS

L3

VSS

M1

VSS

M14

VSS

P1

VSS

P14

VSS

T1

VSS

T11

VSS

T14

VSS

V1

VSS

V14

VSS

W10

VSS

W5

VSS

B13

VSSQ

B2

VSSQ

C10

VSSQ

C5

VSSQ

D13

VSSQ

D2

VSSQ

E10

VSSQ

E5

VSSQ

F13

VSSQ

F2

VSSQ

G10

VSSQ

G5

VSSQ

N10

VSSQ

N5

VSSQ

P13

VSSQ

P2

VSSQ

R10

VSSQ

R5

VSSQ

T13

VSSQ

T2

VSSQ

U10

VSSQ

U5

VSSQ

V13

VSSQ

V2

VSSQ

add 1k to VDD

FBVDDQ

W12

MF

A1

VDD

A11

VDD

A14

VDD

A4

VDD

D10

VDD

G1

VDD

G14

VDD

H10

VDD

H5

VDD

J1

VDD

J14

VDD

L1

VDD

L14

VDD

M10

VDD

M5

VDD

N1

VDD

N14

VDD

T10

VDD

W1

VDD

W11

VDD

W14

VDD

W4

VDD

A13

VDDQ

A2

VDDQ

B10

VDDQ

B5

VDDQ

C1

VDDQ

C13

VDDQ

C14

VDDQ

C2

VDDQ

E1

VDDQ

E11

VDDQ

E13

VDDQ

E14

VDDQ

E2

VDDQ

E4

VDDQ

F10

VDDQ

F5

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

J13

VDDQ

J2

VDDQ

L13

VDDQ

L2

VDDQ

M12

VDDQ

M3

VDDQ

N13

VDDQ

N2

VDDQ

P10

VDDQ

P5

VDDQ

R1

VDDQ

R11

VDDQ

R13

VDDQ

R14

VDDQ

R2

VDDQ

R4

VDDQ

U1

VDDQ

U13

VDDQ

U14

VDDQ

U2

VDDQ

V10

VDDQ

V5

VDDQ

W13

VDDQ

W2

VDDQ

A3

VPP

W3

VPP

1V8_AON

1

2

3

4

FBVDDQ

C1338
10uF

4V

20%
X6S
0603
COMMON

FBVDDQ

C1302
22uF

4V

20%
X6S
0603W
COMMON

5

{14,16}

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

IN

C1327
10uF

4V

20%
X6S
0603
COMMON

C1345
22uF

4V

20%
X6S
0603W
COMMON

FB_DBI

FBE_DBI[7..0]

CLOSE DRAM

C1230
10uF

4V

20%
X6S
0603
COMMON

AROUND DRAM

C1342
22uF

4V

20%
X6S
0603W
COMMON

C1276
10uF

4V

20%
X6S
0603
COMMON

C1258
22uF

4V

20%
X6S
0603W
COMMON

C1300

C1249

C1240

C1320

C1244

1uF

1uF

1uF

1uF

6.3V

6.3V

6.3V

10%

10%

X6S

X6S
0402

0402
COMMON

COMMON

C1241

C1280

22uF

10uF

4V

4V

20%

20%

X6S

X6S

0603W

0603

COMMON

COMMON

{14,16}

FBE_DBI0

0

FBE_DBI1

1

FBE_DBI2

2

FBE_DBI3

3

FBE_DBI4

4

FBE_DBI5

5

FBE_DBI6

6

FBE_DBI7

7

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

C1333
10uF

4V

20%
X6S
0603
COMMON

GND

IN

1uF

6.3V

10%
X6S
0402
COMMON

FBVDDQ

UNDER DRAM FOR X32

C1229
1uF

6.3V

10%
X6S
0402
COMMON

FB_EDC

FBE_EDC[7..0]

C1238
1uF

6.3V

10%
X6S
0402
COMMON

C1307
1uF

6.3V

10%
X6S
0402
COMMON

C1288
1uF

6.3V

10%
X6S
0402
COMMON

C1313
1uF

6.3V

10%
X6S
0402
COMMON

C1275

C1270

C1255

1uF

1uF

6.3V

10%
X6S
0402
COMMON

C1254
1uF

6.3V

10%
X6S
0402
COMMON

FBE_EDC0

0

FBE_EDC1

1

FBE_EDC2

2

FBE_EDC3

3

FBE_EDC4

4

FBE_EDC5

5

FBE_EDC6

6

FBE_EDC7

7

6.3V

10%
X6S
0402
COMMON

C1287
1uF

6.3V

10%
X6S
0402
COMMON

1uF

6.3V

10%
X6S
0402
COMMON

GND

C1232

C1292

C1328

1uF

1uF

6.3V

10%
X6S
0402
COMMON

6.3V

10%
X6S
0402
COMMON

1uF

6.3V

10%
X6S
0402
COMMON

GND

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

MEMORY: FBE PARTITION[31:0]

1V8_AON

C278

C279

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S

0402

0402

COMMON

COMMON

GND

4

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

FDBA

G

Galaxy Microsystems (HK) Ltd.

MEMORY: FBE Partition 31..0

MEMORY: FBE Partition 31..0

MEMORY: FBE Partition 31..0

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

Neston V10

Neston V10

Neston V10

15 52Friday, March 03, 2017

15 52Friday, March 03, 2017

15 52Friday, March 03, 2017

H

A B C D E F G H

Page16: MEMORY: FBE Partition 63..32

{14}

1

2

3

FBE_D[63..32]

BI

M1D

@memory.u_mem_gddr5x_x32(sym_1):page16_i467
BGA190
COMMON

FBE_D32

32

FBE_D33

33

FBE_D34

34

FBE_D35

35

FBE_D36

36

FBE_D37

37

FBE_D38

38

FBE_D39

39

FBE_EDC4
FBE_DBI4

FBE_D40

40

FBE_D41

41

FBE_D42

42

FBE_D43

43

FBE_D44

44

FBE_D45

45

FBE_D46

46

FBE_D47

47

FBE_EDC5

FBE_DBI5

{14}
{14}

FBE_WCK45

IN

FBE_WCK45*

IN

NORMAL

B4

DQ0

B3

DQ1

C4

DQ2

C3

DQ3

F4

DQ4

F3

DQ5

G4

DQ6

G3

DQ7

D3

EDC0

E3

DBI0

x32

x16

B11

DQ8

NC

B12

DQ9

NC

C11

DQ10

NC

C12

DQ11

NC

F11

DQ12

NC

F12

DQ13

NC

G11

DQ14

NC

G12

DQ15

NC

D12

EDC1

GND

E12

DBI1

NC

D4

WCK01

D5

WCK01

{14}
{14}

FBE_D48

48

FBE_D49

49

FBE_D50

50

FBE_D51

51

FBE_D52

52

FBE_D53

53

FBE_D54

54

FBE_D55

55

FBE_EDC6
FBE_DBI6

FBE_D56

56

FBE_D57

57

FBE_D58

58

FBE_D59

59

FBE_D60

60

FBE_D61

61

FBE_D62

62

FBE_D63

63

FBE_EDC7

FBE_DBI7

FBE_WCK67

IN

FBE_WCK67*

IN

M1A

@memory.u_mem_gddr5x_x32(sym_3):page16_i501
BGA190
COMMON

NORMAL

V11

DQ16

V12

DQ17

U11

DQ18

U12

DQ19

P11

DQ20

P12

DQ21

N11

DQ22

N12

DQ23

T12

EDC2

R12

DBI2

x32

V4

DQ24

V3

DQ25

U4

DQ26

U3

DQ27

P4

DQ28

P3

DQ29

N4

DQ30

N3

DQ31

T3

EDC3

R3

DBI3

T4

WCK23

T5

WCK23

{14,15}

x16

NC

NC

NC

NC

NC

NC

NC

NC

{14}
{14}

NC

NC

{15}

IN

IN

IN

IN

FBE_CMD[31..0]

FBE_CLK1
FBE_CLK1*

C61
820pF

50V

10%
X7R
0402
COMMON

GND GND

M1B

@memory.u_mem_gddr5x_x32(sym_5):page16_i495
BGA190

FBE_CMD18

18

FBE_CMD16

16

FBE_CMD31

31

FBE_CMD22

22

FBE_CMD20

20

FBE_CMD19

19

FBE_CMD28

28

FBE_CMD27

27

FBE_CMD25

25

FBE_CMD26

26

FBE_CMD23

23

FBE_CMD24

24

FBE_CMD21

21

FBE_CMD30

30

FBE_CMD17

17

FBE_CMD29

29

FBE_VREFC

R38

0402

FBE_ZQ_2

121ohm

COMMON

1 %

COMMON

H4

RAS

M4

CAS

M11

WE

K4

ABI

J4

A0_A10

J5

A1_A9

J11

A2_BA0

J10

A3_BA3

L11

A4_BA2

L10

A5_BA1

L5

A6_A11

L4

A7_A8

K5

A12_A13

K12

A15_A14

K2

RESET

H11

CKE

K11

CLK

K10

CLK

M2

TCK

M13

TDI

A12

TDO

H2

TMS

K13

VREFC

H13

ZQ

GND

M1C

@memory.u_mem_gddr5x_x32(sym_6):page16_i522

BGA190

COMMON

Normal

W12

MF

add 1k to VSS

A10

VSS

A5

VSS

B1

VSS

B14

VSS

D1

VSS

D11

VSS

D14

VSS

F1

VSS

F14

VSS

H1

VSS

H14

VSS

J12

VSS

J3

VSS

K1

VSS

K14

VSS

K3

VSS

L12

VSS

L3

VSS

M1

VSS

M14

VSS

P1

VSS

P14

VSS

T1

VSS

T11

VSS

T14

VSS

V1

VSS

V14

VSS

W10

VSS

W5

VSS

B13

VSSQ

B2

VSSQ

C10

VSSQ

C5

VSSQ

D13

VSSQ

D2

VSSQ

E10

VSSQ

E5

VSSQ

F13

VSSQ

F2

VSSQ

G10

VSSQ

G5

VSSQ

N10

VSSQ

N5

VSSQ

P13

VSSQ

P2

VSSQ

R10

VSSQ

R5

VSSQ

T13

VSSQ

T2

VSSQ

U10

VSSQ

U5

VSSQ

V13

VSSQ

V2

VSSQ

FBVDDQ

1

A1

VDD

A11

VDD

A14

VDD

A4

VDD

D10

VDD

G1

VDD

G14

VDD

H10

VDD

H5

VDD

J1

VDD

J14

VDD

L1

VDD

L14

VDD

M10

VDD

M5

VDD

N1

VDD

N14

VDD

T10

VDD

W1

VDD

W11

VDD

W14

VDD

W4

VDD

A13

VDDQ

A2

VDDQ

B10

VDDQ

B5

VDDQ

C1

VDDQ

C13

VDDQ

C14

VDDQ

C2

VDDQ

E1

VDDQ

E11

VDDQ

E13

VDDQ

E14

VDDQ

E2

VDDQ

E4

VDDQ

F10

VDDQ

F5

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

J13

VDDQ

J2

VDDQ

L13

VDDQ

L2

VDDQ

M12

VDDQ

M3

VDDQ

N13

VDDQ

N2

VDDQ

P10

VDDQ

P5

VDDQ

R1

VDDQ

R11

VDDQ

R13

VDDQ

R14

VDDQ

R2

VDDQ

R4

VDDQ

U1

VDDQ

U13

VDDQ

U14

VDDQ

U2

VDDQ

V10

VDDQ

V5

VDDQ

W13

VDDQ

W2

VDDQ

A3

VPP

W3

VPP

1V8_AON

2

3

4

FBVDDQ

C1247
10uF

4V

20%
X6S
0603
COMMON

FBVDDQ

C1228
22uF

4V

20%
X6S
0603W
COMMON

5

{14,15}

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY

CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL

IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

IN

C1337
10uF

4V

20%
X6S
0603
COMMON

C1332
22uF

4V

20%
X6S
0603W
COMMON

FB_DBI

FBE_DBI[7..0]

CLOSE DRAM

C1231
10uF

4V

20%
X6S
0603
COMMON

C1250
22uF

4V

20%
X6S
0603W
COMMON

C1272
10uF

4V

20%
X6S
0603
COMMON

C1341
22uF

4V

20%
X6S
0603W
COMMON

C1237

C1293

C1284

C1312

C1277

1uF

1uF

6.3V

10%
X6S
0402
COMMON

C1315
10uF

4V

20%
X6S
0603
COMMON

{14,15}

1uF

6.3V

10%
X6S
0402
COMMON

C1234
10uF

4V

20%
X6S
0603
COMMON

GND

6.3V

10%
X6S
0402
COMMON

C1306
22uF

4V

20%
X6S
0603W
COMMON

FBE_DBI0

0

FBE_DBI1

1

FBE_DBI2

2

FBE_DBI3

3

FBE_DBI4

4

FBE_DBI5

5

FBE_DBI6

6

FBE_DBI7

7

1uF

6.3V

10%
X6S
0402
COMMON

C1266
1uF

6.3V

10%
X6S
0402
COMMON

FBVDDQ

UNDER DRAM FOR X32AROUND DRAM

C1299
1uF

6.3V

10%
X6S
0402
COMMON

FB_EDC

FBE_EDC[7..0]

IN

1uF

6.3V

10%
X6S
0402
COMMON

C1263
1uF

6.3V

10%
X6S
0402
COMMON

C1261
1uF

6.3V

10%
X6S
0402
COMMON

C1246
1uF

6.3V

10%
X6S
0402
COMMON

C1253
1uF

6.3V

10%
X6S
0402
COMMON

C1297
1uF

6.3V

10%
X6S
0402
COMMON

C1311
1uF

6.3V

10%
X6S
0402
COMMON

GND

C1265

C1283
1uF

6.3V

10%
X6S
0402
COMMON

C1314
1uF

6.3V

10%
X6S
0402
COMMON

GND

1uF

6.3V

10%
X6S
0402
COMMON

C1269
1uF

6.3V

10%
X6S
0402
COMMON

C1331
1uF

6.3V

10%
X6S
0402
COMMON

FBE_EDC0

0

FBE_EDC1

1

FBE_EDC2

2

FBE_EDC3

3

FBE_EDC4

4

FBE_EDC5

5

FBE_EDC6

6

FBE_EDC7

7

C E

ASSEMBLY

PAGE DETAIL

<ASSEMBLY_DESCRIPTION>

MEMORY: FBE PARTITION[63:32]

1V8_AON

C280

C281

1uF

1uF

6.3V

6.3V

10%

10%

X6S

X6S
0402

0402

COMMON

COMMON

GND

4

5

Galaxy Microsystems (HK) Ltd.

Galaxy Microsystems (HK) Ltd.

Page Name:

Page Name:

Page Name:

Size Project Name: Rev

Size Project Name: Rev

Size Project Name: Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and

PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

property to Galaxy Microsystems (HK) Ltd.

FDBA

G

Galaxy Microsystems (HK) Ltd.

MEMORY: FBE Partition 63..32

MEMORY: FBE Partition 63..32

MEMORY: FBE Partition 63..32

Design By:

Design By:

P25Z

P25Z

P25Z

Design By:

H

Neston V10

Neston V10

Neston V10

16 52Friday, March 03, 2017

16 52Friday, March 03, 2017

16 52Friday, March 03, 2017