ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDF
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
Table of Contents
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
EC
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Table of Contents
Table of Contents
Table of Contents
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
141Tuesday, June 21, 2016
141Tuesday, June 21, 2016
141Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page2: Block Diagram
1
Power Supply
NVVDD-PH1
PEX_12V Finger
DYNAMIC OPTION
1
Power Supply
NVVDD-PH2
Power Supply
2
2-WAY SLI
NVVDD-PH3
Power Supply
C
MEM
D
HI
QD:DP
HDMI/
MEM
3
D
LO
MEM
LO
DP
MEM
FB X32
GP104
C
HI
MEM
LO
B
MEM
B
HI
MEM
A
LO
NVVDD-PH4
Power Supply
NVVDD-PH5
Power Supply
NVVDD-PH6
Power Supply
MEM
DVI-D
A
HI
DPDP
4
QD:STEREO
5V Switcher
Power Supply
FBVDD
PEX_VDD
POWERED BY 3V3 or 5V
EXT_12V 2x4
(NORTH)
QD:EXT_12V 2x4
(EAST)
PEX_12V Finger
PEX_12V 2x4 PWR
PEX_3V3 Finger
2
3
4
QUADRO OPTIONS SHOWN IN YELLOW
and prefix "QD:"
Fan
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
Block Diagram
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Block Diagram
Block Diagram
Block Diagram
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
241Tuesday, June 21, 2016
241Tuesday, June 21, 2016
241Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page3: PCI Express
12V
C43
4.7uF/NC
16V
10%
X5R
0603
DNI
1
FUTURE USE
Approved in PCIE SIG
{40}
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C1079
4.7uF/NC
16V
10%
X5R
0603
DNI
OUT
PLACE 0603 4.7UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
10uF
4V
20%
X6S
0603
COMMON
C144
10uF
4V
20%
X6S
0603
COMMON
C153
10uF
4V
20%
X6S
0603
COMMON
C685
10uF
4V
20%
X6S
0603
COMMON
C690
10uF
4V
20%
X6S
0603
COMMON
C733
10uF
4V
20%
X6S
0603
COMMON
C679
22uF
4V
20%
X6S
0603W
COMMON
C676
22uF
4V
20%
X6S
0603W
COMMON
C154
C151
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
GND
CE
C1308
1uF
6.3V
10%
X6S
0402
COMMON
C680
22uF
4V
20%
X6S
0603W
COMMON
C1309
1uF
6.3V
10%
FBVDD
X6S
0402
COMMON
GND
C709
1uF
6.3V
10%
X6S
0402
COMMON
C686
1uF
6.3V
10%
X6S
0402
COMMON
ASSEMBLY
PAGE DETAIL
C697
1uF
6.3V
10%
X6S
0402
COMMON
C704
C720
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
<ASSEMBLY_DESCRIPTION>
MEMORY: FBA[31:0]
C731
1uF
6.3V
10%
X6S
0402
COMMON
C721
1uF
6.3V
10%
X6S
0402
COMMON
MEM_VPP
C1225
C1226
1uF
6.3V
10%
X6S
0402
COMMON
C1227
1uF
6.3V
10%
X6S
0402
COMMON
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBA[31:0]
MEMORY: FBA[31:0]
MEMORY: FBA[31:0]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
5
541Tuesday, June 21, 2016
541Tuesday, June 21, 2016
541Tuesday, June 21, 2016
of
of
of
4.7uF
6.3V
C727
1uF
6.3V
10%
X6S
0402
COMMON
GND
20%
OPTION
X6S
0603
COMMON
UNDER DRAM
FDBA
ABCDEFGH
Page6: MEMORY: FBA Partition 63..32
FBA_D[63..32]
{4}
{4}
{4,5}
{4,5}
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
FBVDD
C725
1uF
6.3V
10%
X6S
0402
COMMON
0402
0402
FBVDD
C691
10uF
4V
20%
X6S
0603
COMMON
0603
0603
1
2
BI
3
4
5
FB_DBI
FBA_DBI[7..0]
BI
FB_EDC
FBA_EDC[7..0]
BI
M8D
@memory.u_mem_gddr5x_x32(sym_1):page6_i139
BGA190
COMMON
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_EDC4
FBA_DBI4
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_EDC5
FBA_DBI5
FBA_WCK45
IN
FBA_WCK45*FBA_WCK67
IN
C138
C131
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
C146
C150
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
B11
DQ8
B12
DQ9
C11
DQ10
C12
DQ11
F11
DQ12
F12
DQ13
G11
DQ14
G12
DQ15
D12
EDC1
E12
DBI1
D4
WCK01
D5
WCK01
BGA_0190_P065_100X140
C121
C703
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C695
C683
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
FBA_DBI0
0
FBA_DBI1
1
FBA_DBI2
2
FBA_DBI3
3
FBA_DBI4
4
FBA_DBI5
5
FBA_DBI6
6
FBA_DBI7
7
FBA_EDC0
0
FBA_EDC1
1
FBA_EDC2
2
FBA_EDC3
3
FBA_EDC4
4
FBA_EDC5
5
FBA_EDC6
6
FBA_EDC7
7
48
49
50
51
52
53
54
55
x16
NC
NC
NC
NC
NC
NC
NC
NC
GND
NC
C133
C736
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C712
10uF
4V
20%
X6S
0603
COMMON
0603
0402
C158
22uF
4V
20%
X6S
0603W
COMMON
C0603
C0603
C143
1uF
6.3V
10%
X6S
0402
COMMON
56
57
58
59
60
61
62
63
{4}
{4}
C722
1uF
6.3V
10%
X6S
0402
COMMON
0402
C142
C677
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
M8C
@memory.u_mem_gddr5x_x32(sym_6):page6_i215
BGA190
COMMON
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
{4,5}
M8A
@memory.u_mem_gddr5x_x32(sym_3):page6_i178
BGA190
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBA[63:32]
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBA[63:32]
MEMORY: FBA[63:32]
MEMORY: FBA[63:32]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
641Tuesday, June 21, 2016
641Tuesday, June 21, 2016
641Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page7: MEMORY: FBB Partition 31..0
1
BI
2
3
{4}
{4}
4
FBB_D[31..0]
FBB_D0
0
FBB_D1
1
FBB_D2
2
FBB_D3
3
FBB_D4
4
FBB_D5
5
FBB_D6
6
FBB_D7
7
FBB_D8
8
FBB_D9
9
FBB_D10
10
FBB_D11
11
FBB_D12
12
FBB_D13
13
FBB_D14
14
FBB_D15
15
IN
IN
FBB_EDC0
FBB_DBI0
FBB_EDC1
FBB_DBI1
FBB_WCK01
FBB_WCK01*
{4,8}
{4,8}
M5D
@memory.u_mem_gddr5x_x32(sym_2):page7_i151
BGA190_MIRR
COMMON
MIRRORED
x32
x16
V4
DQ0
V3
DQ1
U4
DQ2
U3
DQ3
P4
DQ4
P3
DQ5
N4
DQ6
N3
DQ7
T3
EDC0
R3
DBI0
V11
DQ8
V12
DQ9
U11
DQ10
U12
DQ11
P11
DQ12
P12
DQ13
N11
DQ14
N12
DQ15
T12
EDC1
R12
DBI1
T4
WCK01
T5
WCK01
BGA_0190_P065_100X140
{5,10,12,22}
FB_DBI
FBB_DBI[7..0]
BI
FB_EDC
FBB_EDC[7..0]
BI
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
{4}
{4}
GPIO10_FBVREF_SEL
IN
FBB_DBI0
0
FBB_DBI1
1
FBB_DBI2
2
FBB_DBI3
3
FBB_DBI4
4
FBB_DBI5
5
FBB_DBI6
6
FBB_DBI7
7
FBB_EDC0
0
FBB_EDC1
1
FBB_EDC2
2
FBB_EDC3
3
FBB_EDC4
4
FBB_EDC5
5
FBB_EDC6
6
FBB_EDC7
7
FBB_D16
16
FBB_D17
17
FBB_D18
18
FBB_D19
19
FBB_D20
20
FBB_D21
21
FBB_D22
22
FBB_D23
23
FBB_D24
24
FBB_D25
25
FBB_D26
26
FBB_D27
27
FBB_D28
28
FBB_D29
29
FBB_D30
30
FBB_D31
31
FBB_EDC3
FBB_DBI3
FBB_WCK23
IN
FBB_WCK23*
IN
1G1D1S
G
1
FBB_EDC2
FBB_DBI2
3
D
Q12
@discrete.q_fet_n_enh(sym_2):page7_i200
SOT23_1G1D1S
COMMON
S
2
20V
6.5A
22mohm@10V / 22mohm@4.5V / 22mohm@2.5V
6.5A
1.4W
8V
AO3416L
SOT23
GND
B11
B12
C11
C12
F11
F12
G11
G12
D12
E12
B4
B3
C4
C3
F4
F3
G4
G3
D3
E3
D4
D5
0.350
{4,8}
M5A
@memory.u_mem_gddr5x_x32(sym_4):page7_i202
BGA190_MIRR
COMMON
MIRRORED
x32
x16
DQ16
NC
DQ17
NC
DQ18
NC
DQ19
NC
DQ20
NC
DQ21
NC
DQ22
NC
DQ23
NC
EDC2
GND
DBI2
NC
{4}
{4}
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
BGA_0190_P065_100X140
1.05V
FBB_VREF_Q
FBVDD
0402
0402
R50
549ohm
1 %
0402
COMMON
R51
1.33k
1 %
0402
COMMON
GND
FBB_CMD[31..0]
IN
FBB_CLK0
IN
FBB_CLK0*
IN
0.350 1.05V
C109
R53
820pF
931ohm
50V
1 %
0402
10%
COMMON
X7R
0402
COMMON
0402
0402
GND
2
0
15
6
4
3
12
11
9
10
7
8
5
14
1
13
OUT
R778 121ohm
0402
COMMON
1 %
0402
FBB_CMD2
FBB_CMD0
FBB_CMD15
FBB_CMD6
FBB_CMD4
FBB_CMD3
FBB_CMD12
FBB_CMD11
FBB_CMD9
FBB_CMD10
FBB_CMD7
FBB_CMD8
FBB_CMD5
FBB_CMD14
FBB_CMD1
FBB_CMD13
FBB_ZQ_1_B
FBB_VREFC
GND
M4
H4
H11
K4
L4
L5
L11
L10
J11
J10
J5
J4
K5
K12
K2
M11
K11
K10
M2
M13
A12
H2
{8}
K13
H13
M5B
@memory.u_mem_gddr5x_x32(sym_5):page7_i213
BGA190_MIRR
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
0603
COMMON
0603
10uF
4V
20%
X6S
0603
COMMON
0603
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C801
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C110
C108
1uF
6.3V
10%
X6S
0402
COMMON
0402
C772
22uF
4V
20%
X6S
0603W
COMMON
C0603
C101
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C104
C105
C751
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
C779
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMMON
COMMON
C0603
C0603
GND
CE
ASSEMBLY
PAGE DETAIL
FBVDD
C768
1uF
6.3V
10%
X6S
0402
COMMON
0402
0402
<ASSEMBLY_DESCRIPTION>
MEMORY: FBB[31:0]
C759
1uF
6.3V
10%
X6S
0402
COMMON
MEM_VPP
C1242
C1243
1uF
6.3V
10%
X6S
0402
COMMON
C1276
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
C770
1uF
6.3V
10%
X6S
0402
COMMON
0402
C774
C762
C765
C756
1uF
1uF
6.3V
10%
X6S
0402
COMMON
0402
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C760
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
4.7uF
6.3V
20%
OPTION
X6S
0603
COMMON
0603
0402
UNDER DRAM
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBB[31:0]
MEMORY: FBB[31:0]
MEMORY: FBB[31:0]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
741Tuesday, June 21, 2016
741Tuesday, June 21, 2016
741Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page8: MEMORY: FBB Partition 63..32
{4,7}
1
{4,7}
FBB_D[63..32]
2
3
4
5
BI
{4}
{4}
FB_DBI
FBB_DBI[7..0]
BI
FB_EDC
FBB_EDC[7..0]
BI
FBB_D32
32
FBB_D33
33
FBB_D34
34
FBB_D35
35
FBB_D36
36
FBB_D37
37
FBB_D38
38
FBB_D39
39
40
41
42
43
44
45
46
47
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_EDC4
FBB_DBI4
FBB_EDC5
FBB_DBI5
FBB_WCK45
IN
FBB_WCK45*
IN
FBVDD
C723
C137
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
0402
FBVDD
C155
C696
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
0603
FBB_DBI0
0
FBB_DBI1
1
FBB_DBI2
2
FBB_DBI3
3
FBB_DBI4
4
FBB_DBI5
5
FBB_DBI6
6
FBB_DBI7
7
FBB_EDC0
0
FBB_EDC1
1
FBB_EDC2
2
FBB_EDC3
3
FBB_EDC4
4
FBB_EDC5
5
FBB_EDC6
6
FBB_EDC7
7
M6D
@memory.u_mem_gddr5x_x32(sym_1):page8_i142
BGA190
COMMON
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
B11
DQ8
B12
DQ9
C11
DQ10
C12
DQ11
F11
DQ12
F12
DQ13
G11
DQ14
G12
DQ15
D12
EDC1
E12
DBI1
D4
WCK01
D5
WCK01
BGA_0190_P065_100X140
C115
C141
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
C152
C148
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
1
M6C
@memory.u_mem_gddr5x_x32(sym_6):page8_i215
BGA190
COMMON
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
GND
BGA_0190_P065_100X140
C1280
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
C716
1uF
6.3V
10%
X6S
0402
COMMON
0402
M6B
@memory.u_mem_gddr5x_x32(sym_5):page8_i186
BGA190
COMMON
H4
RAS
M4
CAS
M11
WE
K4
ABI
J4
A0_A10
J5
A1_A9
J11
A2_BA0
J10
A3_BA3
L11
A4_BA2
L10
A5_BA1
L5
A6_A11
L4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
H11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
K13
VREFC
H13
ZQ
BGA_0190_P065_100X140
C698
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
C687
1uF
6.3V
10%
X6S
0402
COMMON
MEM_VPP
C1183
C1184
4.7uF
1uF
6.3V
6.3V
10%
20%
OPTION
0603
UNDER DRAM
X6S
0603
COMMON
X6S
0402
COMMON
0402
{4,7}
M6A
@memory.u_mem_gddr5x_x32(sym_3):page8_i180
BGA190
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBB[63:32]
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBB[63:32]
MEMORY: FBB[63:32]
MEMORY: FBB[63:32]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
841Tuesday, June 21, 2016
841Tuesday, June 21, 2016
841Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page9: MEMORY: GPU Partition C/D
1
FB_DATA
{10,11}
2
3
{10,11}
{10,11}
4
FBC_D[63..0]
BI
FB_DBI
FBC_DBI[7..0]
BI
FB_EDC
FBC_EDC[7..0]
IN
FBC_D0
0
FBC_D1
1
FBC_D2
2
FBC_D3
3
FBC_D4
4
FBC_D5
5
FBC_D6
6
FBC_D7
7
FBC_D8
8
FBC_D9
9
FBC_D10
10
FBC_D11
11
FBC_D12
12
FBC_D13
13
FBC_D14
14
FBC_D15
15
FBC_D16
16
FBC_D17
17
FBC_D18
18
FBC_D19
19
FBC_D20
20
FBC_D21
21
FBC_D22
22
FBC_D23
23
FBC_D24
24
FBC_D25
25
FBC_D26
26
FBC_D27
27
FBC_D28
28
FBC_D29
29
FBC_D30
30
FBC_D31
31
FBC_D32
32
FBC_D33
33
FBC_D34
34
FBC_D35
35
FBC_D36
36
FBC_D37
37
FBC_D38
38
FBC_D39
39
FBC_D40
40
FBC_D41
41
FBC_D42
42
FBC_D43
43
FBC_D44
44
FBC_D45
45
FBC_D46
46
FBC_D47
47
FBC_D48
48
FBC_D49
49
FBC_D50
50
FBC_D51
51
FBC_D52
52
FBC_D53
53
FBC_D54
54
FBC_D55
55
FBC_D56
56
FBC_D57
57
FBC_D58
58
FBC_D59
59
FBC_D60
60
FBC_D61
61
FBC_D62
62
FBC_D63
63
FBC_DBI0
0
FBC_DBI1
1
FBC_DBI2
2
FBC_DBI3
3
FBC_DBI4
4
FBC_DBI5
5
FBC_DBI6
6
FBC_DBI7
7
FBC_EDC0
0
FBC_EDC1
1
FBC_EDC2
2
FBC_EDC3
3
FBC_EDC4
4
FBC_EDC5
5
FBC_EDC6
6
FBC_EDC7
7
GND
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
G1D
@digital.u_gpu_gb4_256(sym_4):page9_i2072
BGA2152
COMMON
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: GPU Partition C/D
MEMORY: GPU Partition C/D
MEMORY: GPU Partition C/D
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
941Tuesday, June 21, 2016
941Tuesday, June 21, 2016
941Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page10: MEMORY: FBC Partition 31..0
FB_DBI
1
{9,11}
{9,11}
{9}
2
BI
3
FBC_D[31..0]
FBC_D0
0
FBC_D1
1
FBC_D2
2
FBC_D3
3
FBC_D4
4
FBC_D5
5
FBC_D6
6
FBC_D7
7
FBC_D8
8
FBC_D9
9
FBC_D10
10
FBC_D11
11
FBC_D12
12
FBC_D13
13
FBC_D14
14
FBC_D15
15
{9}
{9}
IN
IN
FBC_EDC0
FBC_DBI0
FBC_EDC1
FBC_DBI1
FBC_WCK01
FBC_WCK01*
V4
V3
U4
U3
P4
P3
N4
N3
T3
R3
V11
V12
U11
U12
P11
P12
N11
N12
T12
R12
T4
T5
4
FBVDD
C79
C86
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C78
C84
1uF
6.3V
10%
X6S
0402
COMMON
0402
C991
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
FBVDD
C1024
C81
10uF
4V
20%
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
X6S
0603
COMMON
0603
C77
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C1022
C1023
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
FBC_DBI[7..0]
BI
FB_EDC
FBC_EDC[7..0]
BI
M3D
@memory.u_mem_gddr5x_x32(sym_2):page10_i153
BGA190_MIRR
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
0603
C819
C91
C942
1uF
1uF
1uF
6.3V
6.3V
10%
X6S
0402
COMMON
0402
C94
10uF
4V
20%
X6S
0603
COMMON
0603
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C97
C820
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C99
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C818
C941
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C940
C943
1uF
6.3V
10%
X6S
0402
COMMON
0402
C893
22uF
4V
20%
X6S
0603W
COMMON
C0603
C90
1uF
6.3V
10%
X6S
0402
COMMON
0402
C846
22uF
4V
20%
X6S
0603W
COMMON
C0603
C98
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C96
C95
22uF
4V
20%
X6S
0603W
COMMON
C0603
C920
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
GND
CE
FBVDD
0402
ASSEMBLY
PAGE DETAIL
C858
1uF
6.3V
10%
X6S
0402
COMMON
C862
1uF
6.3V
10%
X6S
0402
COMMON
0402
0402
<ASSEMBLY_DESCRIPTION>
MEMORY: FBC[63:32]
C865
1uF
6.3V
10%
X6S
0402
COMMON
BGA_0190_P065_100X140
MEM_VPP
C887
C861
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C897
C886
1uF
6.3V
10%
X6S
0402
COMMON
0402
C881
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C1190
C1302
1uF
6.3V
10%
X6S
0402
COMMON
C1303
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBC[63:32]
MEMORY: FBC[63:32]
MEMORY: FBC[63:32]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
4.7uF
6.3V
20%
OPTION
X6S
0603
COMMON
0603
0402
UNDER DRAM
FDBA
4
1141Tuesday, June 21, 2016
1141Tuesday, June 21, 2016
1141Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page12: MEMORY: FBD Partition 31..0
1
BI
2
3
4
FBD_D[31..0]
{9}
{9}
FB_DBI
{9,13}
{9,13}
FBD_D0
0
FBD_D1
1
FBD_D2
2
FBD_D3
3
FBD_D4
4
FBD_D5
5
FBD_D6
6
FBD_D7
7
FBD_EDC0
FBD_DBI0
FBD_D8
8
FBD_D9
9
FBD_D10
10
FBD_D11
11
FBD_D12
12
FBD_D13
13
FBD_D14
14
FBD_D15
15
FBD_EDC1
FBD_DBI1
FBD_WCK01
IN
FBD_WCK01*
IN
FBD_DBI[7..0]
BI
FB_EDC
FBD_EDC[7..0]
BI
M2D
@memory.u_mem_gddr5x_x32(sym_2):page12_i154
BGA190_MIRR
COMMON
MIRRORED
x32
x16
V4
DQ0
NC
V3
DQ1
NC
U4
DQ2
NC
U3
DQ3
NC
P4
DQ4
NC
P3
DQ5
NC
N4
DQ6
NC
N3
DQ7
NC
T3
EDC0
NC
R3
DBI0
NC
V11
DQ8
V12
DQ9
U11
DQ10
U12
DQ11
P11
DQ12
P12
DQ13
N11
DQ14
N12
DQ15
T12
EDC1
R12
DBI1
T4
WCK01
T5
WCK01
BGA_0190_P065_100X140
{5,7,10,22}
FBD_DBI0
0
FBD_DBI1
1
FBD_DBI2
2
FBD_DBI3
3
FBD_DBI4
4
FBD_DBI5
5
FBD_DBI6
6
FBD_DBI7
7
FBD_EDC0
0
FBD_EDC1
1
FBD_EDC2
2
FBD_EDC3
3
FBD_EDC4
4
FBD_EDC5
5
FBD_EDC6
6
FBD_EDC7
7
M2A
@memory.u_mem_gddr5x_x32(sym_4):page12_i194
BGA190_MIRR
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
0603
COMMON
COMMON
0603
0603
C1056
C75
1uF
6.3V
10%
X6S
0402
COMMON
0402
C49
10uF
4V
20%
X6S
0603
COMMON
0603
C52
C1063
C1039
1uF
1uF
6.3V
10%
X6S
0402
COMMON
0402
C1038
10uF
4V
20%
X6S
0603
COMMON
0603
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1062
C1072
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C1032
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1073
C51
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
C1044
C59
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C61
C50
C66
22uF
4V
20%
X6S
0603W
COMMON
C0603
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
GND
FBVDD
0402
CE
C1046
1uF
6.3V
10%
X6S
0402
COMMON
ASSEMBLY
PAGE DETAIL
C1066
1uF
6.3V
10%
X6S
0402
COMMON
0402
C1059
1uF
6.3V
10%
X6S
0402
COMMON
0402
0402
<ASSEMBLY_DESCRIPTION>
MEMORY: FBD[31:0]
C1068
1uF
6.3V
10%
X6S
0402
COMMON
MEM_VPP
C1043
C1034
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1036
C1054
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C1304
C1305
1uF
6.3V
10%
X6S
0402
COMMON
C1306
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBD[31:0]
MEMORY: FBD[31:0]
MEMORY: FBD[31:0]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
1241Tuesday, June 21, 2016
1241Tuesday, June 21, 2016
1241Tuesday, June 21, 2016
of
of
of
4.7uF
6.3V
20%
OPTION
X6S
0603
COMMON
0603
0402
UNDER DRAM
FDBA
ABCDEFGH
Page13: MEMORY: FBD Partition 63..32
1
FBD_D[63..32]
2
BI
3
{9}
{9}
{9,12}
{9,12}
FBD_D32
32
FBD_D33
33
FBD_D34
34
FBD_D35
35
FBD_D36
36
FBD_D37
37
FBD_D38
38
FBD_D39
39
FBD_D40
40
FBD_D41
41
FBD_D42
42
FBD_D43
43
FBD_D44
44
FBD_D45
45
FBD_D46
46
FBD_D47
47
IN
IN
FBD_EDC4
FBD_DBI4
FBD_EDC5
FBD_DBI5
FBD_WCK45
FBD_WCK45*
FB_DBI
FBD_DBI[7..0]
BI
FB_EDC
FBD_EDC[7..0]
BI
M1D
@memory.u_mem_gddr5x_x32(sym_1):page13_i142
BGA190
COMMON
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
x16
B11
DQ8
B12
DQ9
C11
DQ10
C12
DQ11
F11
DQ12
F12
DQ13
G11
DQ14
G12
DQ15
D12
EDC1
GND
E12
DBI1
D4
WCK01
D5
WCK01
BGA_0190_P065_100X140
M1C
@memory.u_mem_gddr5x_x32(sym_6):page13_i215
BGA190
COMMON
FBD_DBI0
0
FBD_DBI1
1
FBD_DBI2
2
FBD_DBI3
3
FBD_DBI4
4
FBD_DBI5
5
FBD_DBI6
6
FBD_DBI7
7
FBD_EDC0
0
FBD_EDC1
1
FBD_EDC2
2
FBD_EDC3
3
FBD_EDC4
4
FBD_EDC5
5
FBD_EDC6
6
FBD_EDC7
7
M1A
@memory.u_mem_gddr5x_x32(sym_3):page13_i188
BGA190
COMMON
FBD_D48
48
FBD_D49
49
FBD_D50
50
FBD_D51
51
FBD_D52
52
FBD_D53
53
FBD_D54
54
FBD_D55
55
FBD_EDC6
NC
NC
NC
NC
NC
NC
NC
NC
NC
{9}
{9}
FBD_DBI6
FBD_D56
56
FBD_D57
57
FBD_D58
58
FBD_D59
59
FBD_D60
60
FBD_D61
61
FBD_D62
62
FBD_D63
63
FBD_EDC7
FBD_DBI7
FBD_WCK67
IN
FBD_WCK67*
IN
V11
V12
U11
U12
P11
P12
N11
N12
T12
R12
x32
V4
V3
U4
U3
P4
P3
N4
N3
T3
R3
T4
T5
BGA_0190_P065_100X140
NORMAL
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
EDC2
DBI2
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
x16
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
{9,12}
{9}
{9}
{12}
IN
IN
IN
IN
0402
GNDGND
C1053
820pF
50V
10%
X7R
0402
COMMON
FBD_CMD[31..0]
FBD_CLK1
FBD_CLK1*
18
16
31
22
20
19
28
27
25
26
23
24
21
30
17
29
R867 121ohm
COMMON0402
1 %
0402
FBD_CMD18
FBD_CMD16
FBD_CMD31
FBD_CMD22
FBD_CMD20
FBD_CMD19
FBD_CMD28
FBD_CMD27
FBD_CMD25
FBD_CMD26
FBD_CMD23
FBD_CMD24
FBD_CMD21
FBD_CMD30
FBD_CMD17
FBD_CMD29
FBD_ZQ_2B
FBD_VREFC
M1B
@memory.u_mem_gddr5x_x32(sym_5):page13_i213
BGA190
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
FBVDD
0402
FBVDD
0603
C64
1uF
6.3V
10%
X6S
0402
COMMON
C1060
10uF
4V
20%
X6S
0603
COMMON
C1031
C1040
C65
C1057
1uF
1uF
6.3V
10%
X6S
0402
COMMON
0402
C58
10uF
4V
20%
X6S
0603
COMMON
0603
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1065
C57
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C62
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1033
C1069
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C1042
C68
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C47
C1077
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
C70
C74
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C48
C1075
C1076
22uF
22uF
4V
20%
X6S
0603W
COMMON
C0603
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
GND
CE
FBVDD
0402
ASSEMBLY
PAGE DETAIL
C1067
1uF
6.3V
10%
X6S
0402
COMMON
C1052
1uF
6.3V
10%
X6S
0402
COMMON
0402
<ASSEMBLY_DESCRIPTION>
MEMORY: FBD[63:32]
BGA_0190_P065_100X140
4
MEM_VPP
C1048
C1058
1uF
6.3V
10%
X6S
0402
COMMON
0402
C1037
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1055
C1047
1uF
6.3V
10%
X6S
0402
COMMON
0402
C1035
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C1307
C1223
1uF
6.3V
10%
X6S
0402
COMMON
C1224
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBD[63:32]
MEMORY: FBD[63:32]
MEMORY: FBD[63:32]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
1341Tuesday, June 21, 2016
1341Tuesday, June 21, 2016
1341Tuesday, June 21, 2016
of
of
of
4.7uF
6.3V
20%
OPTION
X6S
0603
COMMON
0603
0402
UNDER DRAM
FDBA
ABCDEFGH
Page14: GPU PWR and GND
G1F
@digital.u_gpu_gb4_256(sym_16):page14_i109
BGA2152
COMMON
16/23 GND_1/3
A2
GND
A26
GND
A29
GND
A3
1
2
3
4
5
GND
A32
GND
A50
GND
A51
GND
AA49
GND
AA8
GND
AB10
GND
AB14
GND
AB15
GND
AB16
GND
AB17
GND
AB18
GND
AB19
GND
AB2
GND
AB20
GND
AB21
GND
AB22
GND
AB23
GND
AB24
GND
AB25
GND
AB26
GND
AB27
GND
AB28
GND
AB29
GND
AB30
GND
AB31
GND
AB32
GND
AB33
GND
AB34
GND
AB35
GND
AB36
GND
AB37
GND
AB38
GND
AB39
GND
AB4
GND
AB43
GND
AB45
GND
AB47
GND
AB49
GND
AB51
GND
AB6
GND
AB8
GND
AD14
GND
AD15
GND
AD16
GND
AD17
GND
AD18
GND
AD19
GND
AD20
GND
AD21
GND
AD22
GND
AD23
GND
AD24
GND
AD25
GND
AD26
GND
AD27
GND
AD28
GND
AD29
GND
AD30
GND
AD31
GND
AD32
GND
AD33
GND
AD34
GND
AD35
GND
AD36
GND
AD37
GND
AD38
GND
AD39
GND
AD44
GND
AE10
GND
AE2
GND
AE4
GND
AE43
GND
AE45
GND
AE47
GND
AE49
GND
AE51
GND
AE6
GND
AE8
GND
AF1
GND
AF19
GND
AF20
GND
AF21
GND
AF22
GND
AF23
GND
AF27
GND
AF28
GND
AF29
GND
AF35
GND
AF36
GND
AF37
GND
AF38
GND
AF39
GND
AF45
GND
AF5
GND
AG14
GND
AG15
GND
AG16
GND
AG17
GND
AG18
GND
AG24
GND
AG25
GND
AG26
GND
AG3
GND
AG30
GND
AG31
GND
AG32
GND
AG33
GND
AG34
GND
AG44
GND
AH10
GND
AH2
GND
AH4
GND
AH43
GND
AH45
GND
AH47
GND
AH49
GND
AH51
GND
AH6
GND
AH8
GND
AJ14
GND
AJ15
GND
AJ16
GND
AJ17
GND
AJ18
GND
AJ19
GND
AJ2
GND
AJ20
GND
AJ21
GND
AJ22
GND
AJ23
GND
AJ24
GND
AJ25
GND
AJ26
GND
AJ27
GND
AJ28
GND
AJ29
GND
AJ30
GND
AJ31
GND
AJ32
GND
AJ33
GND
AJ34
GND
AJ35
GND
AJ36
GND
AJ37
GND
AJ38
GND
AJ39
GND
AJ9
GND
AK1
GND
AK44
GND
AK47
GND
AL10
GND
AL14
GND
AL15
GND
AL16
GND
AL17
GND
AL18
GND
AL19
GND
AL2
GND
AL20
GND
AL21
GND
AL22
GND
AL23
GND
AL24
GND
AL25
GND
AL26
GND
AL27
GND
AL28
GND
AL29
GND
AL30
GND
AL31
GND
AL32
GND
AL33
GND
AL34
GND
AL35
GND
AL36
GND
AL37
GND
AL38
GND
AL39
GND
AL4
GND
AL43
GND
AL45
GND
AL47
GND
AL49
GND
AL51
GND
AL6
GND
AL8
GND
AM4
GND
AM9
GND
AN14
GND
AN15
GND
AN16
GND
AN17
GND
AN18
GND
AN19
GND
AN20
GND
AN21
GND
AN22
GND
AN23
GND
AN24
GND
AN25
GND
AN26
GND
AN27
GND
AN28
GND
AN29
GND
AN30
GND
AN31
GND
AN32
GND
AN33
GND
AN34
GND
AN35
GND
AN36
GND
AN37
GND
AN38
GND
AN39
GND
AN4
GND
AN5
GND
AN8
GND
AP10
GND
AP2
GND
AP4
GND
AP43
GND
AP45
GND
AP47
GND
AP49
GND
AP51
GND
AP6
GND
AP8
GND
AR14
GND
AR15
GND
AR16
GND
AR17
GND
AR18
GND
AR19
GND
BL37
GND
BD24
GND
BC24
GND
G1G
@digital.u_gpu_gb4_256(sym_17):page14_i110
BGA2152
COMMON
17/23 GND_2/3
AR20
GND
AR21
GND
AR22
GND
AR23
GND
AR24
GND
AR25
GND
AR26
GND
AR27
GND
AR28
GND
AR29
GND
AR30
GND
AR31
GND
AR32
GND
AR33
GND
AR34
GND
AR35
GND
AR36
GND
AR37
GND
AR38
GND
AR39
GND
AR4
GND
AR52
GND
AR9
GND
AT4
GND
AT5
GND
AT51
GND
AT52
GND
AT8
GND
AU10
GND
AU14
GND
AU15
GND
AU16
GND
AU17
GND
AU18
GND
AU19
GND
AU2
GND
AU20
GND
AU21
GND
AU22
GND
AU23
GND
AU24
GND
AU25
GND
AU26
GND
AU27
GND
AU28
GND
AU29
GND
AU30
GND
AU31
GND
AU32
GND
AU33
GND
AU34
GND
AU35
GND
AU36
GND
AU37
GND
AU38
GND
AU39
GND
AU4
GND
AU45
GND
AU47
GND
AU49
GND
AU51
GND
AU6
GND
AU8
GND
AV4
GND
AV45
GND
AV9
GND
AW14
GND
AW15
GND
AW16
GND
AW17
GND
AW18
GND
AW19
GND
AW20
GND
AW21
GND
AW22
GND
AW23
GND
AW24
GND
AW25
GND
AW26
GND
AW27
GND
AW28
GND
AW29
GND
AW30
GND
AW31
GND
AW32
GND
AW33
GND
AW34
GND
AW35
GND
AW36
GND
AW37
GND
AW38
GND
AW39
GND
AW4
GND
AW46
GND
AW5
GND
AW52
GND
AW8
GND
AY10
GND
AY2
GND
AY4
GND
AY47
GND
AY49
GND
AY51
GND
AY6
GND
AY8
GND
B1
GND
B10
GND
B13
GND
B16
GND
B19
GND
B2
GND
B22
GND
B25
GND
B28
GND
B31
GND
B34
GND
B37
GND
B40
GND
B43
GND
B46
GND
B48
GND
B52
GND
B7
GND
BA48
GND
BB49
GND
BC13
GND
BC16
GND
BC19
GND
BC2
GND
BC22
GND
BC25
GND
BC28
GND
BC31
GND
BC34
GND
BC37
GND
BC4
GND
BC51
GND
BC6
GND
BC8
GND
BD26
GND
BD29
GND
BD32
GND
BD35
GND
BD38
GND
BD52
GND
BE10
GND
BE13
GND
BE15
GND
BE16
GND
BE18
GND
BE19
GND
BE21
GND
BE22
GND
BE24
GND
BE25
GND
BE27
GND
BE28
GND
BE30
GND
BE31
GND
BE33
GND
BE34
GND
BE36
GND
BE37
GND
BE39
GND
BE40
GND
BF2
GND
BF4
GND
BF41
GND
BF6
GND
BG10
GND
BG13
GND
BG16
GND
BG19
GND
BG22
GND
BG25
GND
BG28
GND
BG31
GND
BG34
GND
BG37
GND
BG40
GND
BG42
GND
BG7
GND
BH15
GND
BH18
GND
BH2
GND
BH21
GND
BH24
GND
BH27
GND
BH30
GND
BH33
GND
BH36
GND
BH39
GND
BH42
GND
BH5
GND
BJ10
GND
BJ12
GND
BJ13
GND
BJ14
GND
BJ15
GND
BJ16
GND
BJ17
GND
BJ18
GND
BJ19
GND
BJ20
GND
BJ21
GND
BJ22
GND
BJ23
GND
BJ24
GND
BJ25
GND
BJ26
GND
BJ27
GND
BJ28
GND
BJ29
GND
BJ30
GND
BJ31
GND
BJ32
GND
BJ33
GND
BJ34
GND
BJ35
GND
BJ36
GND
BJ37
GND
BJ38
GND
BJ39
GND
BJ40
GND
BJ41
GND
BJ42
GND
BJ43
GND
BJ7
GND
BK1
GND
BL1
GND
BL10
GND
BL13
GND
BL16
GND
BL19
GND
BL2
GND
BL22
GND
BL25
GND
BL28
GND
BL31
GND
BL34
GND
B5
GND
B51
GND
GNDGND GNDGND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
G1H
@digital.u_gpu_gb4_256(sym_22):page14_i111
BGA2152
COMMON
22/23 GND_3/3
BL43
GND
BL5
GND
BL7
GND
BM2
GND
BM3
GND
C1
GND
C29
GND
C33
GND
C5
GND
C51
GND
C52
GND
D10
GND
D12
GND
D13
GND
D16
GND
D19
GND
D22
GND
D24
GND
D25
GND
D28
GND
D30
GND
D31
GND
D34
GND
D37
GND
D4
GND
D40
GND
D43
GND
D46
GND
D49
GND
D7
GND
E2
GND
E4
GND
E48
GND
E5
GND
E51
GND
E8
GND
F10
GND
F13
GND
F16
GND
F17
GND
F19
GND
F21
GND
F22
GND
F25
GND
F28
GND
F31
GND
F34
GND
F35
GND
F37
GND
F40
GND
F43
GND
F44
GND
F46
GND
F52
GND
F7
GND
G2
GND
G38
GND
G4
GND
G47
GND
G49
GND
G51
GND
G6
GND
H1
GND
H10
GND
H13
GND
H16
GND
H19
GND
H22
GND
H25
GND
H28
GND
H31
GND
H34
GND
H37
GND
H40
GND
H43
GND
J1
GND
J12
GND
J17
GND
J20
GND
J38
GND
J49
GND
J52
GND
K13
GND
K16
GND
K19
GND
K2
GND
K22
GND
K25
GND
K28
GND
K31
GND
K34
GND
K37
GND
K4
GND
K40
GND
K45
GND
K47
GND
K49
GND
K51
GND
K6
GND
K8
GND
M52
GND
M6
GND
N10
GND
N2
GND
N4
GND
N43
GND
N45
GND
N47
GND
N49
GND
N51
GND
BL40
GND
N6
GND
N8
GND
P14
GND
P15
GND
P16
GND
P17
GND
P18
GND
P19
GND
P20
GND
P21
GND
P22
GND
P23
GND
P24
GND
P25
GND
P26
GND
P27
GND
P28
GND
P29
GND
P30
GND
P31
GND
P32
GND
P33
GND
P34
GND
P35
GND
P36
GND
P37
GND
P38
GND
P39
GND
P51
GND
R49
GND
R52
GND
T10
GND
T14
GND
T15
GND
T16
GND
T17
GND
T18
GND
T19
GND
T2
GND
T20
GND
T21
GND
T22
GND
T23
GND
T24
GND
T25
GND
T26
GND
T27
GND
T28
GND
T29
GND
T30
GND
T31
GND
T32
GND
T33
GND
T34
GND
T35
GND
T36
GND
T37
GND
T38
GND
T39
GND
T4
GND
T43
GND
T45
GND
T47
GND
T49
GND
T51
GND
T6
GND
T8
GND
U7
GND
U9
GND
V14
GND
V15
GND
V16
GND
V17
GND
V18
GND
V19
GND
V20
GND
V21
GND
V22
GND
V23
GND
V24
GND
V25
GND
V26
GND
V27
GND
V28
GND
V29
GND
V30
GND
V31
GND
V32
GND
V33
GND
V34
GND
V35
GND
V36
GND
V37
GND
V38
GND
V39
GND
V49
GND
V52
GND
W10
GND
W2
GND
W4
GND
W43
GND
W45
GND
GNDGND
CE
G1I
@digital.u_gpu_gb4_256(sym_18):page14_i112
BGA2152
COMMON
NVVDDNVVDD
18/21 VDD_1/2
AA14
VDD
AA15
VDD
AA16
VDD
AA17
VDD
AA18
VDD
AA19
VDD
AA20
VDD
AA21
VDD
AA22
VDD
AA23
VDD
AA24
VDD
AA25
VDD
AA26
VDD
AA27
VDD
AA28
VDD
AA29
VDD
AA30
VDD
AA31
VDD
AA32
VDD
AA33
VDD
AA34
VDD
AA35
VDD
AA36
VDD
AA37
VDD
AA38
VDD
AA39
VDD
AB13
VDD
AB40
VDD
AC19
VDD
AC20
VDD
AC21
VDD
AC22
VDD
AC23
VDD
AC30
VDD
AC31
VDD
AC32
VDD
AC33
VDD
AC34
VDD
AE14
VDD
AE15
VDD
AE16
VDD
AE17
VDD
AE18
VDD
AE19
VDD
AE20
VDD
AE21
VDD
AE22
VDD
AE23
VDD
AE24
VDD
AE25
VDD
AE26
VDD
AE27
VDD
AE28
VDD
AE29
VDD
AE30
VDD
AE31
VDD
AE32
VDD
AE33
VDD
AE34
VDD
AE35
VDD
AE36
VDD
AE37
VDD
AE38
VDD
AE39
VDD
AF13
VDD
AF30
VDD
AF31
VDD
AF32
VDD
AF33
VDD
AF34
VDD
AF40
VDD
AG13
VDD
AG19
VDD
AG20
VDD
AG21
VDD
BG45
VDD
BG46
VDD
BG47
VDD
BG48
VDD
BG49
VDD
BG50
VDD
BG51
VDD
BG52
VDD
BH44
VDD
BH45
VDD
BH47
VDD
BH48
VDD
BH49
VDD
BH50
VDD
BH51
VDD
BH52
VDD
BJ44
VDD
BJ45
VDD
BJ46
VDD
BJ47
VDD
BJ48
VDD
BJ49
VDD
BJ50
VDD
BJ51
VDD
BJ52
VDD
BK47
VDD
BK48
VDD
BK49
VDD
BK50
VDD
BK51
VDD
ASSEMBLY
PAGE DETAIL
AG22
VDD
AG23
VDD
AG40
VDD
AH14
VDD
AH15
VDD
AH16
VDD
AH17
VDD
AH18
VDD
AH19
VDD
AH20
VDD
AH21
VDD
AH22
VDD
AH23
VDD
AH24
VDD
AH25
VDD
AH26
VDD
AH27
VDD
AH28
VDD
AH29
VDD
AH30
VDD
AH31
VDD
AH32
VDD
AH33
VDD
AH34
VDD
AH35
VDD
AH36
VDD
AH37
VDD
AH38
VDD
AH39
VDD
AK19
VDD
AK20
VDD
AK21
VDD
AK22
VDD
AK23
VDD
AK30
VDD
AK31
VDD
AK32
VDD
AK33
VDD
AK34
VDD
AL13
VDD
AL40
VDD
AM14
VDD
AM15
VDD
AM16
VDD
AM17
VDD
AM18
VDD
AM19
VDD
AM20
VDD
AM21
VDD
AM22
VDD
AM23
VDD
AM24
VDD
AM25
VDD
AM26
VDD
AM27
VDD
AM28
VDD
AM29
VDD
AM30
VDD
AM31
VDD
AM32
VDD
AM33
VDD
AM34
VDD
AM35
VDD
AM36
VDD
AM37
VDD
AM38
VDD
AM39
VDD
AP19
VDD
AP20
VDD
BK52
VDD
BL46
VDD
BL47
VDD
BL48
VDD
BL49
VDD
BL50
VDD
BL51
VDD
BL52
VDD
BM47
VDD
BM48
VDD
BM49
VDD
BM50
VDD
BM51
VDD
N14
VDD
N18
VDD
N22
VDD
N26
VDD
N27
VDD
N31
VDD
N35
VDD
N39
VDD
P13
VDD
P40
VDD
R19
VDD
R20
VDD
R21
VDD
R22
VDD
R23
VDD
R30
VDD
R31
VDD
R32
VDD
R33
VDD
R34
VDD
U14
VDD
U15
VDD
<ASSEMBLY_DESCRIPTION>
GPU PWR and GND
G1J
@digital.u_gpu_gb4_256(sym_19):page14_i113
BGA2152
COMMON
NVVDDNVVDD
19/23 VDD_2/2
AW13
AW40
AW42
AW43
AW44
AW45
AP21
VDD
AP22
VDD
AP23
VDD
AP30
VDD
AP31
VDD
AP32
VDD
AP33
VDD
AP34
VDD
AR13
VDD
AR40
VDD
AT14
VDD
AT15
VDD
AT16
VDD
AT17
VDD
AT18
VDD
AT19
VDD
AT20
VDD
AT21
VDD
AT22
VDD
AT23
VDD
AT24
VDD
AT25
VDD
AT26
VDD
AT27
VDD
AT28
VDD
AT29
VDD
AT30
VDD
AT31
VDD
AT32
VDD
AT33
VDD
AT34
VDD
AT35
VDD
AT36
VDD
AT37
VDD
AT38
VDD
AT39
VDD
AT42
VDD
AU43
VDD
AV19
VDD
AV20
VDD
AV21
VDD
AV22
VDD
AV23
VDD
AV30
VDD
AV31
VDD
AV32
VDD
AV33
VDD
AV34
VDD
AV42
VDD
AV43
VDD
AV44
VDD
VDD
VDD
VDD
VDD
VDD
VDD
AY14
VDD
AY18
VDD
AY22
VDD
AY26
VDD
AY27
VDD
AY31
VDD
AY35
VDD
AY39
VDD
AY43
VDD
AY45
VDD
BA43
VDD
BA44
VDD
BA45
VDD
BA46
VDD
BA47
VDD
BB38
VDD
BB39
VDD
NVVDD_SENSE
GND_SENSE
BB45
VDD
BB46
VDD
BB47
VDD
BB48
VDD
BC38
VDD
BC39
VDD
BC40
VDD
BC41
VDD
BC45
VDD
BC47
VDD
BC49
VDD
BD39
VDD
BD41
VDD
BD46
VDD
BD47
VDD
BD48
VDD
BD49
VDD
BD50
VDD
BD51
VDD
BE41
VDD
BE42
VDD
BE43
VDD
BE46
VDD
BE47
VDD
BE48
VDD
BE49
VDD
BE50
VDD
BE51
VDD
BE52
VDD
BF42
VDD
BF44
VDD
BF45
VDD
BF47
VDD
BF49
VDD
BF51
VDD
BG43
VDD
BG44
VDD
U16
VDD
U17
VDD
U18
VDD
U19
VDD
U20
VDD
U21
VDD
U22
VDD
U23
VDD
U24
VDD
U25
VDD
U26
VDD
U27
VDD
U28
VDD
U29
VDD
U30
VDD
U31
VDD
U32
VDD
U33
VDD
U34
VDD
U35
VDD
U36
VDD
U37
VDD
U38
VDD
U39
VDD
V13
VDD
V40
VDD
W19
VDD
W20
VDD
W21
VDD
W22
VDD
W23
VDD
W30
VDD
W31
VDD
W32
VDD
W33
VDD
W34
VDD
GPU_NVVDD_SENSE
BK45
GPU_NVVDD_FBRTN
BL45
85OHM_NETCLASS3
DP_NVVDD_SENSE
G1K
@digital.u_gpu_gb4_256(sym_23):page14_i114
BGA2152
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
NVVDD
C747
560uF
COMMON
20%
6.3V
TA-Polymer
0mA@-3.1degC,0Hz
0.035ohm
SMD_7343
C113
470uF
COMMON
20%
2V@105degC
AL-Polymer
3.5A@105degC,100KHz
0.006ohm
SMD_7343
NVVDD
C189
470uF
COMMON
20%
2V@105degC
AL-Polymer
3.5A@105degC,100KHz
0.006ohm
SMD_7343
GND
C766
47uF
4V
20%
X5R
0805LP
COMMON
C873
10uF
4V
20%
X6S
0603
COMMON
C809
1uF
6.3V
10%
X6S
0402
COMMON
C810
1uF
6.3V
10%
X6S
0402
COMMON
C913
1uF
6.3V
10%
X6S
0402
COMMON
C835
1uF
6.3V
10%
X6S
0402
COMMON
C848
1uF
6.3V
10%
X6S
0402
COMMON
C785
22uF
6.3V
20%
X5R
0805LP
COMMON
C877
10uF
4V
20%
X6S
0603
COMMON
C917
1uF
6.3V
10%
X6S
0402
COMMON
C849
1uF
6.3V
10%
X6S
0402
COMMON
C916
1uF
6.3V
10%
X6S
0402
COMMON
C850
1uF
6.3V
10%
X6S
0402
COMMON
C956
1uF
6.3V
10%
X6S
0402
COMMON
C776
47uF
4V
20%
X5R
0805LP
COMMON
C870
10uF
4V
20%
X6S
0603
COMMON
C836
1uF
6.3V
10%
X6S
0402
COMMON
C814
1uF
6.3V
10%
X6S
0402
COMMON
C926
1uF
6.3V
10%
X6S
0402
COMMON
C888
1uF
6.3V
10%
X6S
0402
COMMON
C901
1uF
6.3V
10%
X6S
0402
COMMON
CE
C773
22uF
6.3V
20%
X5R
0805LP
COMMON
C871
10uF
4V
20%
X6S
0603
COMMON
C838
1uF
6.3V
10%
X6S
0402
COMMON
C827
1uF
6.3V
10%
X6S
0402
COMMON
C828
1uF
6.3V
10%
X6S
0402
COMMON
C853
1uF
6.3V
10%
X6S
0402
COMMON
C797
1uF
6.3V
10%
X6S
0402
COMMON
ASSEMBLY
PAGE DETAIL
C771
22uF
6.3V
20%
X5R
0805LP
COMMON
C869
10uF
4V
20%
X6S
0603
COMMON
C907
1uF
6.3V
10%
X6S
0402
COMMON
C829
1uF
6.3V
10%
X6S
0402
COMMON
C837
1uF
6.3V
10%
X6S
0402
COMMON
C831
1uF
6.3V
10%
X6S
0402
COMMON
C951
1uF
6.3V
10%
X6S
0402
COMMON
GND
<ASSEMBLY_DESCRIPTION>
GPU Decoupling
NVVDD
C925
1uF
6.3V
10%
X6S
0402
COMMON
GND
C764
560uF
COMMON
20%
6.3V
TA-Polymer
0mA@-3.1degC,0Hz
0.035ohm
SMD_7343
C929
1uF
6.3V
10%
X6S
0402
COMMON
C808
1uF
6.3V
10%
X6S
0402
COMMON
NVVDD
C737
47uF
4V
20%
X5R
0805LP
COMMON
GND
C955
1uF
6.3V
10%
X6S
0402
COMMON
C878
10uF
4V
20%
X6S
0603
COMMON
C795
1uF
6.3V
10%
X6S
0402
COMMON
C868
10uF
4V
20%
X6S
0603
COMMON
C811
1uF
6.3V
10%
X6S
0402
COMMON
C874
10uF
4V
20%
X6S
0603
COMMON
C794
1uF
6.3V
10%
X6S
0402
COMMON
C872
10uF
4V
20%
X6S
0603
COMMON
1
GND
C796
1uF
6.3V
10%
X6S
0402
COMMON
GND
C805
22uF
6.3V
20%
X5R
0805LP
COMMON
GND
C875
C876
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
GND
C904
C851
C812
C914
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C892
1uF
6.3V
10%
X6S
0402
COMMON
GND
C839
C830
C905
C931
C889
1uF
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
GND
C933
C915
C952
C891
1uF
6.3V
10%
X6S
0402
COMMON
C890
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C928
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C906
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C908
1uF
6.3V
10%
X6S
0402
COMMON
C852
1uF
6.3V
10%
X6S
0402
COMMON
GND
C935
1uF
6.3V
10%
X6S
0402
COMMON
1V8_AON
1V8_AON
GND
place 1 0.1uf cap for BB14 and BC14 to share
FDBA
C954
C930
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
place 1 0.1uF cap near BA10
C1007
4.7uF
4V
10%
X6S
0603
COMMON
C989
1uF
6.3V
10%
X6S
0402
COMMON
NVVDD
NVVDD
C932
1uF
6.3V
10%
X6S
0402
COMMON
STUFF C902 OR
C918,C919,C898,C899
C902
560uF
COMMON
20%
6.3V
TA-Polymer
0mA@-3.1degC,0Hz
0.035ohm
SMD_7343
STUFF C842 OR
C843,C844,C826,C825
C842
560uF
COMMON
20%
6.3V
TA-Polymer
0mA@-3.1degC,0Hz
0.035ohm
SMD_7343
C969
0.1uF
16V
10%
X7R
0402
COMMON
C815
C934
C813
C798
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
C927
1uF
6.3V
10%
X6S
0402
COMMON
2
GND
C918
C919
C898
1uF/NC
6.3V
10%
X6S
0402
COMMON
1uF/NC
6.3V
10%
X6S
0402
COMMON
10uF/NC
4V
20%
X6S
0603
COMMON
C899
10uF/NC
4V
20%
X6S
0603
COMMON
3
GND
C843
C844
C826
C825
10uF/NC
4V
20%
X6S
0603
COMMON
10uF/NC
4V
20%
X6S
0603
COMMON
1uF/NC
6.3V
10%
X6S
0402
COMMON
1uF/NC
6.3V
10%
X6S
0402
COMMON
4
GND
VDD18
1V8
C970
0.1uF
16V
10%
X7R
0402
COMMON
GND
G
C984
C860
0.1uF
16V
10%
X7R
0402
COMMON
C840
0.1uF
16V
10%
X7R
0402
COMMON
0.1uF
16V
10%
X7R
0402
COMMON
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
GPU Decoupling
GPU Decoupling
GPU Decoupling
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
1541Tuesday, June 21, 2016
1541Tuesday, June 21, 2016
1541Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page16: IFPAB DVI-D-DL
1
{17,19,23}
2
PEX_VDD
C975
4.7uF
6.3V
20%
X5R
0603
3
COMMON
1V8_GPC_SP_VID_PLL
IN
C950
1uF
6.3V
10%
X5R
0402
COMMON
3V3_PROT
1
G
Q540
@discrete.q_fet_n_enh(sym_6):page16_i68
SOT23_1G1D1S
COMMON
D
2S3
R874
G1N
@digital.u_gpu_gb4_256(sym_7):page16_i78
BGA2152
COMMON
7/23 IFPAB
IFPAB_RSET
R793
1k
COMMON
0402
1 %
GND
C946
4.7uF
6.3V
20%
X5R
0603
COMMON
C910
0.1uF
16V
10%
X7R
0402
COMMON
GND
BD23
IFPAB_RSET
BD21
BB17
BB15
BB18
BB20
IFPAB_PLLVDD
IFP_IOVDD
IFP_IOVDD
IFP_IOVDD
IFP_IOVDD
IFPAB
C903
0.1uF
16V
10%
X7R
0402
COMMON
GND
C911
0.1uF
16V
10%
X7R
0402
COMMON
DL-DVI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
TXD3
TXD3
TXD4
TXD4
TXD5
TXD5
DPDVI/HDMI
IFPA_AUX_SDA
BH11
IFPA_AUX
SDA
IFPA_AUX
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
IFPB_AUX
SDA
IFPB_AUX
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
IFPA_L3
IFPA_L3
IFPA_L2
IFPA_L2
IFPA_L1
IFPA_L1
IFPA_L0
IFPA_L0
IFPB_L3
IFPB_L3
IFPB_L2
IFPB_L2
IFPB_L1
IFPB_L1
IFPB_L0
IFPB_L0
IFPA_AUX_SCL
BG11
BF21
IFPA_L3*
BG21
IFPA_L3
BG23
IFPA_L2*
BH23
IFPA_L2
BF23
IFPA_L1*
BE23
IFPA_L1
IFPA_L0*
BF24
IFPA_L0
BG24
BG12
BH12
BL18
BK18
IFPB_L2*
BK20
IFPB_L2
BL20
IFPB_L1*
BM20
IFPB_L1
BM21
IFPB_L0*
BL21
IFPB_L0
BK21
IFPAB_TXC
IFPAB_TXC
IFPAB_TXD0
IFPAB_TXD0
IFPAB_TXD1
IFPAB_TXD1
IFPAB_TXD2
IFPAB_TXD2
IFPAB_TXD3
IFPAB_TXD3
IFPAB_TXD4
IFPAB_TXD4
IFPAB_TXD5
IFPAB_TXD5
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
3V3_PROT
C1095 0.1uF
C1092 0.1uF
C1086 0.1uF
C1082
C1088 0.1uF
C1084 0.1uF
C1090
COMMON
COMMON
0.1uF
COMMON
COMMON
10k
5 %
0402
COMMON
R33
10k
5 %
0402
COMMON
COMMON
COMMON
0.1uF
COMMON
C1094 0.1uF
C1093 0.1uF
C1087 0.1uF
C1083 0.1uF
C1089
C1085 0.1uF
C1091 0.1uF
COMMON
COMMON
COMMON
COMMON
0.1uF
COMMON
COMMON
COMMON
2S3
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
1
G
Q9
@discrete.q_fet_n_enh(sym_6):page16_i65
SOT23_1G1D1S
COMMON
D
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
R880
2.2k
5 %
0402
COMMON
R30
2.2k
5 %
0402
COMMON
DDC_5V
C22
1uF/NC
6.3V
10%
X5R
0402
DNI
GND
IFPAB_TXD2_C
IFPAB_TXD3_C
IFPAB_TXD4_C*
IFPA_AUX_SCL_DVI
IFPA_AUX_SDA_DVI
IFPAB_TXC_C*
DVIA_HPD_C
DDC_5V
SHIELD1
25
SHIELD2
26
SHIELD3
27
SHIELD4
28
TX0-
17
TX0+
18
TX1-
9
TX1+
10
TX2-
1
TX2+
2
SHLD24
3
SHLD13
11
SHLD05
19
TX3-
12
TX3+
13
TX4-
4
TX4+
5
20
TX5-
21
TX5+
DDCC
6
DDCD
7
VDDC
14
15
GND
SHLDC
22
TXC-
24
TXC+
23
VSYNC
8
HPD
16
SHIELD5
29
SHIELD6
30
SHIELD7
31
SHIELD8
32
33
SHIELD9
J7
@electro_mechanic.con_dvi_d(sym_5):page16_i71
1
917
DVI_D_TALL_SHLD
DVI_D_TALL_SHLD
COMMON
816
24
1
2
3
1V8_AON
R896
10k
5 %
0402
{22}
OUT
GPIO14_IFPA_HPD
4
COMMON
3
Q547
@discrete.q_npn(sym_1):page16_i13
SOT23_1B1C1E
COMMON
2
GND
C
E
1B1C1E
B
1
MMBT2222A
R900
R920
100k
5 %
0402
COMMON
GNDGNDGND
100k
0402 COMMON
5 %
DVIA_HPD_RDVIA_HPD_R_Q
C1099
220pF
50V
5%
C0G
0402
COMMON
PLACE CLOSE
TO CONNECTOR
R905
0603
0.05 ohm
0ohm
COMMON
C1098
220pF/NC
50V
5%
C0G
0402
DNI
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
IFPAB DVI-D-DL
IFPAB DVI-D-DL
IFPAB DVI-D-DL
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
1641Tuesday, June 21, 2016
1641Tuesday, June 21, 2016
1641Tuesday, June 21, 2016
of
of
of
Page17: IFPE DP
1
2
3
4
ABCDEFGH
[R_AUX_CONN_PD_DP]
85DIFF_NETCLASS1
85DIFF_NETCLASS1
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
C1138
220pF
50V
5%
C0G
0402
COMMON
GND
COMMON
COMMON
R18
100k
5 %
0402
R19
100k
5 %
0402
DP_PWR_EF
GND
PLACE CLOSE
TO CONNECTOR
R967 0ohm
0603
0.05 ohm
[D_AUX_CLAMP*_DP]
D2
@discrete.d_3pin_ac(sym_1):page17_i81
3
0.1A
100V
SOT23
DNI
D_3PIN_AC/NC
12
GND
[D_AUX_CLAMP_DP]
D3
@discrete.d_3pin_ac(sym_1):page17_i75
3
0.1A
100V
SOT23
DNI
D_3PIN_AC/NC
12
IFPE_AUX_C
IFPE_AUX_C
COMMON
GND
GND
IFPE_C_HPD_C
IFPE_AUX_C*
IFPE_AUX_C
IFPE_L3_C*
IFPE_L3_C
IFPE_L2_C*
IFPE_L2_C
IFPE_L1_C*
IFPE_L1_C
IFPE_L0_C*
IFPE_L0_C
C1136
220pF/NC
50V
5%
C0G
0402
DNI
IFPE_MODE
[C_AUX_GATE_DP]
C1142
10nF
16V
10%
X7R
0402
COMMON
[C_AUX_CLAMP*_DP]
C25
0.1uF/NC
16V
10%
X7R
0402
DNI
GND
NV12V
[R_MODE_BJT_PU1_DP]
R938
10k
5 %
0402
COMMON
18
17
15
12
10
9
7
6
4
3
1
[Q_MODE_BJT2_DP]
3
Q565
@discrete.q_npn(sym_1):page17_i80
SOT23_1B1C1E
COMMON
2
GND
RECEPTACLE
DPORT_26P_0_7MM
COMMON
HPD
AUXN
AUXP
LANE_3N
LANE_3P
LANE_2N
LANE_2P
LANE_1N
LANE_1P
LANE_0N
LANE_0P
DPORT_26P_0_7MM
C
E
27
B
1
MMBT2222A
20
18
16
14
12
10
8
6
4
2
J3
1B1C1E
19
17
15
13
11
9
7
5
3
1
IFPE_MODE*
@discrete.q_npn(sym_1):page17_i90
SOT23_1B1C1E
SHIELD6
SHIELD5
SHIELD4
PWR
PWR_RET
GND
CEC
MODE
GND
GND
GND
GND
SHIELD3
SHIELD2
SHIELD1
NV3V3
[R_MODE_BJT_PU2_DP]
R981
4.7k
5 %
0402
COMMON
Q561
COMMON
GND
21
23
25
20
19
16
14
13
11
8
5
2
22
24
26
[Q_MODE_BJT1_DP]
3
C
E
2
B
1
MMBT2222A
DP_PWR_EF
GND
1B1C1E
IFPE_MODE_R
IFPE_MODE_C
DP_PWR_EF
{16,19,23}
{22}
IN
PEX_VDD
OUT
R795
COMMON
GND
1V8_GPC_SP_VID_PLL
C976
4.7uF
6.3V
20%
X5R
0603
COMMON
GPIO18_IFPE_HPD
Two cases to be considered:
1. DP AUX to DP connector: AUX AC coupled
2. DP AUX to DP-DVI dongle: AUX pass through
[C_AUX_COUP*_DP]
C20
0.1uF
16V0402
10%
X7R
IFPE_AUX_BYP*
D
2S3
[Q_AUX_FET1*_DP]
COMMON
G
@discrete.q_fet_n_enh(sym_6):page17_i48
Q552
SOT23_1G1D1S
1
2N7002HG
[Q_AUX_FET1_DP]
SOT23_1G1D1S
1
G
Q549
@discrete.q_fet_n_enh(sym_6):page17_i47
COMMON
D
2S3
IFPE_AUX_BYP
2N7002HG
[R_AUX_PD*_DP]
R16
100k
5 %
IFPE_AUX_C
IFPE_AUX_C
0402
COMMON
85DIFF_NETCLASS1
85DIFF_NETCLASS1
GND
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
G1O
@digital.u_gpu_gb4_256(sym_10):page17_i97
BGA2152
COMMON
10/23 IFPE
IFPEF_RSET
1k
0402
1 %
C884
1uF
6.3V
10%
X5R
0402
COMMON
BD17
IFPEF_RSET
BD15
C947
0.1uF
16V
10%
X7R
0402
COMMON
GND
C938
0.1uF
16V
10%
X7R
0402
COMMON
GND
IFPEF_PLLVDD
IFPE
BC18
IFP_IOVDD
BC20
IFP_IOVDD
DVI/HDMI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
DP
IFPE_AUX
IFPE_AUX
IFPE_L3
IFPE_L3
IFPE_L2
IFPE_L2
IFPE_L1
IFPE_L1
IFPE_L0
IFPE_L0
IFPE_AUX*
BL8
IFPE_AUX
BK8
IFPE_L3*
BG14
IFPE_L3
BH14
IFPE_L2*
BF14
IFPE_L2
BE14
IFPE_L1*
BF15
IFPE_L1
BG15
IFPE_L0*
BG17
IFPE_L0
BH17
1V8_AON
R969
10k
5 %
0402
COMMON
@discrete.q_npn(sym_1):page17_i31
SOT23_1B1C1E
COMMON
GND
Q567
GND
[R_AUX_PD_DP]
R15
100k/NC
5 %
0402
DNI
C26
C28
C32 0.1uF
C34 0.1uF
3
C
E
2
MMBT2222A
0.1uF
COMMON
0.1uF
COMMON
COMMON
COMMON
1
1B1C1E
B
COMMON
85DIFF_NETCLASS1
85DIFF_NETCLASS1
[C_AUX_COUP_DP]
C21
0.1uF
0402
16V
10%
X7R
COMMON
C27
0.1uF
COMMON
C29
0.1uF
COMMON
C33
0.1uF
COMMON
C35
0.1uF
COMMON
Hotplug Detection
R980
100k
5 %
0402
COMMON
GND
G
2N7002HG
G
2N7002HG
R976
0402 COMMON
5 %
[R_AUX_CONN_PU*_DP]
S3D
2
[Q_AUX_FET2*_DP]
COMMON
SOT23_1G1D1S
@discrete.q_fet_n_enh(sym_7):page17_i53
Q1
1
[Q_AUX_FET2_DP]
1
Q3
@discrete.q_fet_n_enh(sym_7):page17_i52
SOT23_1G1D1S
COMMON
S3D
2
IFPE_C_HPD_RIFPE_C_HPD_R_Q
100k
[R_MODE_DP]
GND
R963
0402
C1133
0.1uF/NC
16V
10%
X7R
0402
DNI
1
4.7k
COMMON
5 %
2
R964
1M
5 %
0402
COMMON
GND
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
IFPE DP
Fused DP_PWR
3V3_F
C1097
0.1uF
16V
10%
X7R
0402
COMMON
GND
DP-SKU
U4
@analog.u_sw_pwr_tps2031(sym_1):page17_i55
SO8
COMMON
2
IN
3
IN
4
EN
5
OC*
FDBA
3.3V
1.0A
8
OUT
OUT
OUT
GND
0.406
7
R968
GND
4.7k
5 %
0402
COMMON
C1131
0.1uF
16V
10%
X7R
0402
COMMON
GNDGND
6
1
GND
DP_PWR_EF
C5
C1135
220uF
22uF
COMMON
6.3V
20%
20%
6.3V@105degC
X5R
AL-Polymer
0805LP
4.7A@105.05degC,100KHz
COMMON
0.008ohm
TH_D63P25
CAP_SMD_7343
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
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Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
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Date:Sheet
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PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
IFPE DP
IFPE DP
IFPE DP
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
1741Tuesday, June 21, 2016
1741Tuesday, June 21, 2016
1741Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page18: IFPF DP
R27
100k
5 %
0402
COMMON
[R_AUX_CONN_PD_DP]
R25
100k
5 %
0402
COMMON
IFPF_HPD_C
IFPF_AUX_C*
IFPF_AUX_C
IFPF_L3_C*
IFPF_L3_C
IFPF_L2_C*
IFPF_L2_C
IFPF_L1_C*
IFPF_L1_C
IFPF_L0_C*
IFPF_L0_C
DP_PWR_EF
GND
IFPF_AUX_C
IFPF_AUX_C
[D_AUX_CLAMP*_DP]
D5
@discrete.d_3pin_ac(sym_1):page18_i39
3
0.1A
100V
SOT23
DNI
D_3PIN_AC/NC
12
GND
[D_AUX_CLAMP_DP]
D4
@discrete.d_3pin_ac(sym_1):page18_i36
3
0.1A
100V
SOT23
DNI
D_3PIN_AC/NC
12
85DIFF_NETCLASS1
85DIFF_NETCLASS1
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
GND
IFPF_MODE
[C_AUX_GATE_DP]
C1137
10nF
16V
10%
X7R
0402
COMMON
[C_AUX_CLAMP*_DP]
GND
C1080
0.1uF/NC
16V
10%
X7R
0402
DNI
NV12V
[R_MODE_BJT_PU1_DP]
R975
10k
5 %
0402
COMMON
[Q_MODE_BJT2_DP]
@discrete.q_npn(sym_1):page18_i55
SOT23_1B1C1E
COMMON
GNDGND
RECEPTACLE
COMMON
HPD
18
AUXN
17
AUXP
15
LANE_3N
12
LANE_3P
10
LANE_2N
9
LANE_2P
7
LANE_1N
6
LANE_1P
4
LANE_0N
3
LANE_0P
1
DPORT_26P_0_7MM
3
Q564
2
DPORT_26P_0_7MM
C
1
E
MMBT2222A
20
18
16
14
12
10
27
1
NV3V3
[R_MODE_BJT_PU2_DP]
R979
4.7k
5 %
0402
IFPF_MODE*
@discrete.q_npn(sym_1):page18_i58
SOT23_1B1C1E
SHIELD6
SHIELD5
SHIELD4
PWR
PWR_RET
GND
CEC
MODE
GND
GND
GND
GND
SHIELD3
SHIELD2
SHIELD1
COMMON
COMMON
Q566
21
23
25
20
19
16
14
13
11
8
5
2
22
24
26
[Q_MODE_BJT1_DP]
3
C
E
2
MMBT2222A
1B1C1E
B
1
IFPF_MODE_R
DP_PWR_EF
IFPF_MODE_C
[R_MODE_DP]
DP_PWR_EF
GND
R966
0402
[C_DP_PWR_DP]
C1132
0.1uF/NC
16V
10%
X7R
0402
DNI
4.7k
COMMON
5 %
2
3
[R_MODE_PD_DP]
R965
1M
5 %
0402
COMMON
GND
1B1C1E
B
J4
19
17
15
13
11
9
8
7
6
5
4
3
2
1
GND
4
1
2
G1P
@digital.u_gpu_gb4_256(sym_6):page18_i64
BGA2152
COMMON
C923
0.1uF
16V
10%
X7R
0402
COMMON
6/23 IFPF
BC21
IFP_IOVDD
BC23
IFP_IOVDD
DVI/HDMI
IFPF
{22}
DP
BM9
BM8
BK11
BL11
BM11
BM12
BL12
BK12
BK14
BL14
GPIO24_IFPF_HPD
IFPF_AUX*
IFPF_AUX
IFPF_L3*
IFPF_L3
IFPF_L2*
IFPF_L2
IFPF_L1*
IFPF_L1
IFPF_L0*
IFPF_L0
IFPF_AUX
SDA
IFPF_AUX
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
IFPF_L3
IFPF_L3
IFPF_L2
IFPF_L2
IFPF_L1
IFPF_L1
IFPF_L0
IFPF_L0
OUT
PEX_VDD
3
GND
4
Two cases to be considered:
1. DP AUX to DP connector: AUX AC coupled
2. DP AUX to DP-DVI dongle: AUX pass through
[R_AUX_PD*_DP]
R888
100k
5 %
0402
COMMON
GND
IFPF_AUX_C
85DIFF_NETCLASS1
IFPF_AUX_C
85DIFF_NETCLASS1
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
3
2
C
E
MMBT2222A
1B1C1E
B
1
DP_SIGNALS
Hotplug Detection
GND
1V8_AON
R939
10k
5 %
0402
COMMON
Q560
@discrete.q_npn(sym_1):page18_i8
SOT23_1B1C1E
COMMON
GND
R956
100k
5 %
0402
COMMON
2S3
G
1
2N7002HG
1
G
2S3
2N7002HG
R943
0402
IFPF_AUX_BYP*
D
[Q_AUX_FET1*_DP]
COMMON
@discrete.q_fet_n_enh(sym_6):page18_i30
Q543
SOT23_1G1D1S
[Q_AUX_FET1_DP]
SOT23_1G1D1S
Q542
@discrete.q_fet_n_enh(sym_6):page18_i29
COMMON
D
IFPF_AUX_BYP
[R_AUX_PD_DP]
R889
100k/NC
5 %
0402
DNI
GND
C36
0.1uF
COMMON
C38
0.1uF
COMMON
C40
0.1uF
COMMON
C30
0.1uF
COMMON
100k
COMMON
5 %
[R_AUX_CONN_PU*_DP]
[C_AUX_COUP*_DP]
C45
0.1uF
16V0402
10%
X7R
COMMON
85DIFF_NETCLASS1
85DIFF_NETCLASS1
[C_AUX_COUP_DP]
C46
0402
C37
0.1uF
COMMON
C39
0.1uF
COMMON
C41
0.1uF
COMMON
C31
0.1uF
COMMON
IFPF_HPD_RIFPF_HPD_R_Q
C1128
220pF
50V
5%
C0G
0402
COMMON
GND
0.1uF
16V
10%
X7R
COMMON
R978
0603
0.05 ohm
PLACE CLOSE
TO CONNECTOR
2N7002HG
2N7002HG
0ohm
COMMON
S3D
G
1
1
G
S3D
2
[Q_AUX_FET2*_DP]
COMMON
SOT23_1G1D1S
@discrete.q_fet_n_enh(sym_7):page18_i34
Q6
[Q_AUX_FET2_DP]
Q5
@discrete.q_fet_n_enh(sym_7):page18_i32
SOT23_1G1D1S
COMMON
2
C1139
220pF/NC
50V
5%
C0G
0402
DNI
GND
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
IFPEF DP
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
IFPEF DP
IFPEF DP
IFPEF DP
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
1841Tuesday, June 21, 2016
1841Tuesday, June 21, 2016
1841Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page19: IFPC HDMI 2.0/DP
1
2
3
{16,17,23}
4.7uF and 1.0uF caps are for
IFPC and IFPD IFP_IOVDD pins
IN
1V8_GPC_SP_VID_PLL
PEX_VDD
C977
4.7uF
6.3V
20%
X5R
0603
COMMON
FOR ESD DIODES
IFPC_ESD
C16
0.1uF/NC
16V
10%
X7R
0402
DNI
DVI/HDMI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
1V8_AON
R936
10k
5 %
0402
COMMON
3
C
Q558
B
@discrete.q_npn(sym_1):page19_i20
1
COMMON
E
2
MMBT2222A
GND
GND
DP
IFPC_AUX
IFPC_AUX
IFPC_L3
IFPC_L3
IFPC_L2
IFPC_L2
IFPC_L1
IFPC_L1
IFPC_L0
IFPC_L0
1B1C1E
R977
100k
5 %
0402
COMMON
GND
Place near ESD diodes
G1Q
@digital.u_gpu_gb4_256(sym_8):page19_i143
BGA2152
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
X7R
0402
COMMON
GND
DP-SKU
U1
@analog.u_sw_pwr_tps2031(sym_1):page19_i9
SO8
COMMON
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
ABCDEFGH
Page20: IFPD DP
R902
COMMON
R921
COMMON
DP_D_HPD_C
IFPD_AUX_C*
IFPD_AUX_C
IFPD_L3_C*
IFPD_L3_C
IFPD_L2_C*
IFPD_L2_C
IFPD_L1_C*
IFPD_L1_C
IFPD_L0_C*
IFPD_L0_C
DP_PWR
1
100k
5 %
0402
100k
5 %
0402
3
3
GND
D511
@discrete.d_3pin_ac(sym_1):page20_i47
0.1A
100V
SOT23
DNI
D_3PIN_AC/NC
12
GND
D512
@discrete.d_3pin_ac(sym_1):page20_i44
0.1A
100V
SOT23
DNI
12
D_3PIN_AC/NC
85DIFF_NETCLASS1
85DIFF_NETCLASS1
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
C1081
0.1uF/NC
16V
10%
X7R
0402
DNI
GND
NV12V
R931
10k
5 %
0402
DP_MODE
C1109
10nF
16V
10%
X7R
0402
COMMON
GND
COMMON
3
C
Q563
@discrete.q_npn(sym_1):page20_i53
1
SOT23_1B1C1E
COMMON
E
2
MMBT2222A
GNDGND
RECEPTACLE
DPORT_26P_0_7MM
COMMON
20
HPD
18
17
15
12
10
AUXN
AUXP
LANE_3N
LANE_3P
LANE_2N
9
LANE_2P
7
LANE_1N
6
LANE_1P
4
LANE_0N
3
LANE_0P
1
DPORT_26P_0_7MM
18
16
14
12
10
8
6
4
2
27
NV3V3
R970
4.7k
5 %
DP_MODE*
@discrete.q_npn(sym_1):page20_i60
SOT23_1B1C1E
SHIELD6
SHIELD5
SHIELD4
PWR
PWR_RET
GND
CEC
MODE
GND
GND
GND
GND
SHIELD3
SHIELD2
SHIELD1
COMMON
0402
COMMON
3
1B1C1E
C
Q562
B
1
DP_MODE_R
E
2
MMBT2222A
DP_PWR
21
23
25
20
19
16
14
13
DP_MODE_C
11
8
5
2
22
24
26
DP_PWR
GND
R971 4.7k
5 %
C1130
0.1uF/NC
16V
10%
X7R
0402
DNI
COMMON0402
2
3
R972
1M
5 %
0402
COMMON
GND
1B1C1E
B
J1
19
17
15
13
11
9
7
5
3
1
GND
4
Two cases to be considered:
1
2
IFPD_AUX_C
IFPD_AUX_C
R897
COMMON
85DIFF_NETCLASS1
85DIFF_NETCLASS1
G1R
@digital.u_gpu_gb4_256(sym_9):page20_i64
BGA2152
COMMON
9/23 IFPD
DVI/HDMI
3
IFPD
PEX_VDD
BC15
IFP_IOVDD
BC17
C944
0.1uF
16V
10%
X7R
0402
COMMON
IFP_IOVDD
DP
IFPD_AUX*
BF11
IFPD_AUX
SDA
IFPD_AUX
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
IFPD_L3
IFPD_L3
IFPD_L2
IFPD_L2
IFPD_L1
IFPD_L1
IFPD_L0
IFPD_L0
IFPD_AUX
BE11
IFPD_L3*
BM14
IFPD_L3
BM15
IFPD_L2*
BL15
IFPD_L2
BK15
IFPD_L1*
BK17
IFPD_L1
BL17
IFPD_L0*
BM17
IFPD_L0
BM18
GND
4
{22}
GPIO17_IFPD_HPD
OUT
1. DP AUX to DP connector: AUX AC coupled
2. DP AUX to DP-DVI dongle: AUX pass through
100k
5 %
0402
GND
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
DP_SIGNALS
SOT23_1B1C1E
D
2S3
COMMON
G
@discrete.q_fet_n_enh(sym_6):page20_i31
Q546
SOT23_1G1D1S
1
2N7002HG
SOT23_1G1D1S
1
G
Q551
@discrete.q_fet_n_enh(sym_6):page20_i30
COMMON
D
2S3
2N7002HG
GND
1V8_AON
R8
10k
5 %
0402
COMMON
3
C
Q2
B
@discrete.q_npn(sym_1):page20_i7
1
COMMON
E
2
MMBT2222A
GND
C1096 0.1uF
0402
16V
10%
X7R
C15
C8
C10
C12
85DIFF_NETCLASS1
85DIFF_NETCLASS1
C1101
0402
0.1uF
COMMON
0.1uF
COMMON
0.1uF
COMMON
0.1uF
COMMON
R2
0402
COMMON
0.1uF
16V
10%
X7R
COMMON
DP_D_HPD_RDP_D_HPD_R_Q
100k
COMMON
5 %
C3
220pF
50V
5%
C0G
0402
COMMON
0603
IFPD_AUX_BYP*
IFPD_AUX_BYP
R901
100k/NC
5 %
0402
DNI
C14
0.1uF
COMMON
C7
0.1uF
COMMON
C9
0.1uF
COMMON
C11
0.1uF
COMMON
Hotplug Detection
1B1C1E
R1
100k
5 %
0402
COMMON
GNDGNDGND
2N7002HG
2N7002HG
R3
0.05 ohm
S3D
2
COMMON
SOT23_1G1D1S
G
@discrete.q_fet_n_enh(sym_7):page20_i35
Q545
1
1
G
Q550
@discrete.q_fet_n_enh(sym_7):page20_i33
SOT23_1G1D1S
COMMON
S3D
2
0ohm
COMMON
C4
220pF/NC
50V
5%
C0G
0402
DNI
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
IFPD DP
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
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PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
BI
ASSEMBLY
PAGE DETAIL
MIO_SIGNALS
MIOB_D[11..0]
0
1
2
3
4
5
6
7
8
9
10
11
MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
MIO_SIGNALS
50OHM_NETCLASS1
GPIO21_RASTER_SYNC0
GPIO22_SWAPRDY_IN
50OHM_NETCLASS1
<ASSEMBLY_DESCRIPTION>
MIOA/B Interface and Frame Lock
CN2A
@design_lib.con_mio_26(sym_10):page21_i96
NONPHY_DUAL_6GND
COMMON
SLI - EMI SHIELD
1/2
A2
0
1
2
3
5
6
8
9
10
11
MIOB_D4
4
MIOB_D7
7
DR<0>
B4
DR<1>
A4
DR<2>
A5
DR<3>
B6
DR<4>
A6
DR<5>
A8
DR<6>
B9
DR<7>
B10
DR<8>
A10
DR<9>
B12
DR<10>
A12
DR<11>
A13
DR<12>
B5
DR<13>
A9
DR<14>
B13
DR_CMD
B8
DR_CLK
A1
RSTR_SYNC
B1
SWAP_RDY
B2
EXT_REFCLK
SLI_LED
SLI_LED
A7
B3
GND
B7
GND
B11
GND
A3
GND
A11
GND
1
GND
2
GND
3
GND
IN
C1111
0.1uF
16V
10%
X7R
0402
COMMON
GND
GND
{40}
GND
R20
0402 COMMON
0.05 ohm
R9
33ohm
COMMON
0402
0ohm
5 %
MIOB_SWAPRDY_FL_INT2
MIOB_RASTER_SYNC0
FDBA
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MIOA/B Interface and Frame Lock
MIOA/B Interface and Frame Lock
MIOA/B Interface and Frame Lock
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
2141Tuesday, June 21, 2016
2141Tuesday, June 21, 2016
2141Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page22: MISC1: Fan, Thermal, JTAG, GPIO, STEREO
NV3V3
NV3V3
R26
R885
10k
10k
5 %
5 %
0402
0402
COMMON
COMMON
C1071
2.2nF/NC
16V
10%
X7R
0402
DNI
THERM_DP
PLACE NEAR U505
GND
THERM_DN
JTAG_TRST*
R42
10k
5 %
0402
COMMON
G1U
@digital.u_gpu_gb4_256(sym_13):page22_i128
BGA2152
COMMON
PROPERTY NOTE: This document contains information confidential and
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property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
2
1
2
3
3
44556
CON3
6
6-pin OC Button Connector
INPUT_BU
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MISC1; Fan, Thermal, JTAG, GPIO, Stereo
MISC1; Fan, Thermal, JTAG, GPIO, Stereo
MISC1; Fan, Thermal, JTAG, GPIO, Stereo
P45Z
P45Z
P45Z
4
5
6
OUT
Design By:
Design By:
Design By:
NestonV10
NestonV10
NestonV10
2241Tuesday, June 21, 2016
2241Tuesday, June 21, 2016
2241Tuesday, June 21, 2016
of
of
of
{38}
OUT
{3}
{3}
{26,28,36,38,41}
{26,28,36,38,41}
{26,28,36,41}
{26,28,36,41}
{38}
{5,7,10,12}
12V_F
12V_PEX8_F1
R523
R543
0ohm/NC
0ohm
0.05 ohm
0.05 ohm
0805
0805
COMMON
COMMON
GPIO16_FAN_PWM
0.635
C518
820pF
50V
10%
X7R
0402
COMMON
GPIO16_FAN_PWMGPIO16_FAN_PWM_BU
3
ABCDEFGH
Page23: MISC2: ROM, XTAL, Straps
STRAP2
L
L
1
L
H
H
ROM_SO
L
L
L
L
H
2
H
H
L
L
L
L
H
STRAP1
L
H
H
H
H
ROM_SI
L
L
H
H
L
LH
H
H
L
M
M
H
L
H
H
HHM
3
STRAP5
M
M
M
M
L
L
L
L
4
H
H
STRAP4
H
H
L
L
H
M
M
L
H
H
HL
H
L
L
L
L
H=High :Tied to 1.8V
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
M=Middle:Tied to 0.9V
L=Low :Tied to 0V
L
H
H
L
L
STRAP0
RAMCFG[4:0]
L
L
H
L
ROM_SCLK
SOR_EXPOSED[3:0]
L
H
L
H
L
H
L
H
M
L
H
M
M
LM
HM
STRAP3
SMB_ALT_ADDR
H
L
H
L
M
H
L
M
H
L
H10
L
H
L
H
L
1:SMB_ALT_ADDR ENABLE
0:SMB_ALT_ADDR DISABLE
1:DEVID_SEL REBRAND
0:DEVID_SEL ORIGNAL
00000
00010
00011
00110
00111H
1111 DEFAULT
SOR0/1/2/3 ENABLE
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
DEVID_SEL
11
11
1
1
11
1
1
0
0
01
1
0
0
1
10
0
0
1
0
00
0
0
0
0
1:ENABLE 0:DISABLE
PCIE_CFG
VGA_DEVICE
11
1
0
0
1
00
11
1
0
10
0
0
11
10
01
0
1
1
0
0
1:PCIE_CFG LOW POWER
0:PCIE_CFG HIGH POWER
1:VGA_DEVICE ENABLE
0:VGA_DEVICE DISABLE
CE
0
1
0
1 DEFAULT
0
ASSEMBLY
PAGE DETAIL
GROUP0GROUP2GROUP1
R832
100k/NC
1 %
0402
STRAP0
STRAP1
STRAP2
COMMON
R833
100k
1 %
0402
COMMON
R830
100k/NC
1 %
0402
DNI
R831
100k
1 %
0402
COMMON
1V8_AON
GND
R836
100k/NC
1 %
0402
DNI
R837
100k
1 %
0402
COMMON
CFG[3:0] Config Width Vendor
0000 256Mx32 256-bit Micron
0001 Reserved
0010 Reserved
0011 Reserved
0100 Reserved
0101 Reserved
0110 Reserved
0111 Reserved
1V8
LB502
BEAD_0603
<ASSEMBLY_DESCRIPTION>
MISC2: ROM, XTAL, Straps
COMMON
30ohm
GND
1V8_GPC_SP_VID_PLL
C986
22uF
6.3V
20%
X5R
0805LP
COMMON
C985
0.1uF
16V
10%
X7R
0402
COMMON
C1041
18pF/NC
1.8V
C885
0.1uF
16V
10%
X7R
0402
COMMON
1V8_AON
R847
XTALSSIN_GPU
R853
10k/NC
5 %
0402
DNI
FL_REFCLK_T
50V
5%
C0G
0402
DNI
100k
0402 COMMON
5 %
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
STRAP5
OUT
C981
0.1uF
16V
10%
X7R
0402
COMMON
C971
0.1uF
16V
10%
X7R
0402
COMMON
R852
10k/NC
5 %
0402
DNI
GND
1V8_AON
R839
R864
R866
100k/NC
1 %
0402
COMMON
R865
100k
1 %
0402
COMMON
Y1
INS16809425
SMD_60X35
27MHz
COMMON
123
4
XTAL_4P_S
Y5022
INS16809442
SMD_60X35
27MHz/NC
COMMON
123
4
XTAL_4P_6X3_5MM
GND
R36
100k/NC
1 %
0402
COMMON
R37
100k
1 %
0402
COMMON
ROM_CS
ROM_SO
ROM_SCLK
BUFRST
XTALOUTBUFF
XTALOUT
50OHM_NETCLASS1
GND
ROM_SI
STRAP3
STRAP4
STRAP5
ROM_CS*ROM_CS_R
BJ4
ROM_SIROM_SI_R
BK2
ROM_SO
BK4
ROM_SCLKROM_SCLK_R
BK3
BF9
XTALOUTBUFF
BK6
BM6
XTALOUT
C54
18pF
50V
5%
C0G
0402
COMMON
GND
100k/NC
1 %
0402
COMMON
ROM_SI
ROM_SO
ROM_SCLK
R861
100k
1 %
0402
COMMON
G1W
@digital.u_gpu_gb4_256(sym_15):page23_i66
BGA2152
COMMON
15/23 MISC 2
BL3
STRAP0
BL4
STRAP1
BM4
STRAP2
BM5
STRAP3
BK5
STRAP4
BJ5
STRAP5
G1V
@digital.u_gpu_gb4_256(sym_14):page23_i67
BGA2152
COMMON
14/23 XTAL/PLL
{16,17,19}
BD12
BC12
U42
AF11
BB24
BJ6
BL6
50OHM_NETCLASS1
XTALIN
C55
18pF
50V
5%
C0G
0402
COMMON
GND
SP_PLLVDD
VID_PLLVDD
GPCPLL_AVDD0
GPCPLL_AVDD1
XS_PLLVDD
XTALSSIN
XTALIN
co-layout
GND
FDBA
C982
0.1uF
16V
10%
X7R
0402
COMMON
GND
C787
0.1uF
16V
10%
X7R
0402
COMMON
GND
100k
1 %
0402
COMMON
R840
100k/NC
1 %
0402
DNI
R829 33ohm
0402 COMMON
5 %
R827 33ohm
0402 COMMON
5 %
R828
33ohm
0402 COMMON
5 %
R849 49.9k
0402 COMMON
1 %
R848
49.9k
1 %
0402
COMMON
GND
G
1V8_AON
R842
R844
100k/NC
100k/NC
1 %
1 %
0402
0402
DNI
DNI
R843
R845
100k
100k
1 %
1 %
0402
0402
COMMON
COMMON
GND
1V8_AON
R24
10k
5 %
0402
COMMON
1V8_AON
1.8V0V
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property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
U3
@memory.u_mem_fl_ser_512kx8(sym_1):page23_i63
SO_8
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
PS: 1V8, 1V8_AON
Galaxy Microsystems (HK) Ltd.
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ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
PS: 5V, PEX_VDD
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
Vout = Vref * A * (D*(R2//B)/(R1+R2//B)+(R1//B)/(R2+R1//B))
Vmin = Vout(D=0);Vmax = Vout(D=1)
Vboot = Vref * A * B/(R2+B)
Vstb = Vref * A * (Rstb//B)/(R2+Rstb//B)
{27}
{27}
{27}
{27}
{27}
{27}
{27}
{27}
C1186
50pF/NC
50V
X7R
C0402
GND
150pF/NC
PS_FB_COMP_C
C0402
50V
C0G
16V
X7R
C0402
R211
0ohm
CHANGE BOM
R0402
GND
0ohmR592
PS_FB_DRVH3_R
0.125
R0603
R0402
PS_FB_DRVL3
R206
49.9k/NC
R0402
GND
GND
R0402
GND
R1004
100k/NC
C0402
0ohm/NCR293
C1172
1nF/NC
50V
X7R
0ohm/NCR1013
C168
1nF
50V
X7R
C0402
R0402
LFPAK
G
4
DFN55X6_1_27MM
LFPAK
G
4
{22,28,36,38,41}
{22,28,36,38,41}
{22,28,36,41}
{22,28,36,41}
R0402
CHANGE BOM
12V_PEX8_F2
5
D
Q573
MDU2657
S
1
30V
38A
2
0.014R@4.5V,0.009R@10V
100A
3
3.5W@25C
+/-20V
5
D
Q572
MDU2653
S
1
30V
86.3A
2
0.005R@4.5V,0.0034R@10V
100A
3
3.5W@25C
+/-20V
DFN55X6_1_27MM
GNDGND
270 ohmR294
R0402
R0402
2kR295
SENSE_GND
100 ohmR291
0ohmR126
Remote Sense
0ohmR301
100ohmR73
PS_FB_SENSE_R
R0402
PS_FB_SENSE_RC
C1173
0.1uF
16V
X7R
C0603
IN
IN
IN
IN
R0402
PS_FBVDD_SENSE_RTN
R0402
PS_FBVDD_SENSE
C1177
1nF/NC
50V
X7R
C0402
I2CC_SCL_R
I2CC_SDA_R
I2CB_SCL_R
I2CB_SDA_R
C1174
10uF
16V
X5R
C1206
FBVDD Power Supply 35A@1.04V
5V
R871
2.2R
R0603
2.2R
R857
C376
R869
0.1UF
R0402
R0402
C0402
R0402
0/NC
R805
R0402
0/NC
R799
R0402
0
R801
R0402
0
R800
GND
OUT
OUT
FBVDD
820pFC1195
C0402
50V
X7R
CHANGE BOM
C1176
C1178
10uF
10uF
16V
16V
X5R
X5R
C1206
C1206
GND
0.220uH
L6
DIP_COIL_11_3X6_8MM
C1179
2200pF
50V
X7R
C0402
PS_FB_RC3
R589
1ohm
R1206
GND
U708
1
8
FBVDDQ_FB_S
VCC
OUT
2
7
BUS_S
NC
10K/NC
3
6
GND
NCC
5
I2C_SDA_R
SDA4SCL
UP1804A
SOT23_8P
I2C_SCL_R
FBVDD Control
{14}
{14}
FBVDD=1.6V@40A
C1196
270UF
2.5V
OSCON
6.1A
0.007R
DIP_ECAPD8MM
FBVDD
C1197
C1203
C1180
C1207
1200uF
2.5V
OCCAP
3.6A@105C
0.010R
DIP_ECAPD8MM
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C1205
10uF
10uF
10uF
10uF
6.3V
6.3V
6.3V
6.3V
X5R
X5R
X5R
X5R
C0805
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
PS: FBVDD
PS: FBVDD
PS: FBVDD
P45Z
P45Z
P45Z
C0805
Design By:
Design By:
Design By:
C0805
C0805
+
C1192
470UF/2V
C2818
C2818
GND
NestonV10
NestonV10
NestonV10
2641Tuesday, June 21, 2016
2641Tuesday, June 21, 2016
2641Tuesday, June 21, 2016
of
of
of
+
470UF/2V
C1191
12V_F
R717
10k
R0402
PS_FBVDD_EN*
3
1B1C1E
C
Q47
B
MMDT3904
1
SOT23
E
2
C589
0.1uF
16V
X7R
GND
R0402
1V8_AON
R0402
R96 0ohm/NC
R0402
1V8_AON
R74
12.4k
R0402
C0805
C159
10UF
6.3V
X5R
R1101 0ohm
R76
R0402
10k/NC
R0402
GND
VCC_NV_PWM
C145
C161
4.7UF
0.1UF
6.3V
16V
X5R
X7R
C0603
C0402
GND
FBVDD
+
+
C566
C574
C568
470UF/2V
470UF/2V
C2818
C2818
GND
1B1C1E
C592
10nF
16V
X7R
R0402
GND
NV3V3
R85
10k
R0402
R100
10k/NC
R0402
GND
GPIO12_LOW_PERF*
3
PS_FBVDD_EN_IN
C
Q48
B
MMDT3904
1
SOT23
E
2
GND
~300KHz
91K for UP1642
500K for RT8813
R86
10k/NC
1V8_AON
NV3V3
NV3V3
R87
10k/NC
R0402
OUT
R214
10K/NC
R0402
{22,40}
12V_F
R1016
0ohm
R0402
C1204
R118
1uF
300k
X7R
16V
R0402
C0402
R288
GND
39.2k/NC
R0402
GND
R213
10K
R0402
GND
PS_FBVDD_EN_IN
PS_FBVDD_VID
PS_FB_VREF_RSTB
R3
(R_BOOT)
R220
0
R0402
Co-Layout
R4
R205
4.99k
C188
4.7nF
25V
R0402
X7R
C0402
SENSE_GND
Frequency Selection
PS_FB_REFIN
R218
0/NC
R0805
R0805
C_REFIN
C163
0.1uF/NC
X7R
16V
C0402
0.1uF/NCC173
16V
X7R
R0402
R2
C0402
0ohmR207
R0402
C164
4.7nF/NC
25V
X7R
C0402
VCC_NV_PWM
R1002
0ohm/NC
R0603
C165
1uF/NC
16V
X5R
C0603
GND
PS_FB_FREQ
1V8_AONNV3V3
R128
10k
R0402
PS_FB_VREF_R2
0ohmR209
R0402
SENSE_GND
PS_FB_REFADJ_R1
R1
R1=(R_REFADJ)(R831+R200)
For 3 Active Phase
10K FOR RT8813
VCC_NV_PWM
ONSEMI NCP81172:external 5V
RichtekRT8811: 5V Internal regulated
UP1641: 5V Internal regulated
BCD:AP3598:
ANPEC:APW8732
PS_FB_VCC
R125
10k/NC
R0402
PS_FB_PGOOD
787Ω
PS_FB_VREF
787R122
1uFC166
C0402
6.3V
C_VREF
X5R
20kR1003
PS_FB_REFADJ
R0402
R0402
R0402
499R1011
30k/NCR1018
R0402
PS_FB_TSNS
R210
1k/NC
R0402
GND
GNDGND
VCC_NV_PWM
GND
15
9
16
3
4
5
8
7
6
R996
1k/NC
14
13
22
25
GND
NTC For 2 Phase
R0402
R1006
10K/NC
R0402
R0402
C175
1uF/NC
16V
For 3 Active Phase
U8
UP9509
OPENVREG
VCC
FS
PGOOD
EN
PSI
VID
VREF
REFIN
REFADJ
TALERT
TSNS
GND
THERM/GND
qfn24p_0_5mm_ep
0ohmR1017
C1210
R1028
1K/NCR1029
R0402
10K FOR RT8813
For 3 Active Phase
U9_PWM
1uF/NC
R0402
C0603
U9_PWM
499R1000
PVCC
HGATE2
GNDSNS
10K FOR RT8813
U9_UG3
U9_BOOT3
C0402
X7R
16V
2.2/NC
RT8813:R922=10K
UP1642:R922=5.6K
HGATE1
BOOT1
PHASE1
LGATE1
BOOT2
PHASE2
LGATE2
VSNS
COMP
499R995
ABCDEFGH
Page27: PS_ FBVDD_PHASE1-2
C1158
1nF/NC
50V
10%
X7R
COMMON
0402
C1157
10uF
16V
10%
X5R
COMMON
1206
C1159
1nF/NC
50V
10%
X7R
COMMON
0402
12V_PEX8_F2
Iripple= 6.84A @ 36A, 1.05V
0.220uHL505
COMMON
DIP_COIL_11_3X6_8MM
C1167
270UF
COMMON
20%
2.5V
OSCON
6.1A
0.007R
DIP_ECAPD8MM
Iripple= 9.6A @ 51A, 1.05V
C1166
270UF
COMMON
20%
2.5V
OSCON
6.1A
0.007R
DIP_ECAPD8MM
Co-Layout two caps
FBVDD=1.6V@40A
C1165
10uF
6.3V
20%
X5R
C0805
COMMON
0805
FBVDD
GND
C1169
1200uF
20%
2.5V
OCCAP
3.6A@105C
0.010R
DIP_ECAPD8MM
R189
R190
0/NC
0/NC
+0.05R
+0.05R
R0805
R0805
GND
C1161
2200pF
50V
10%
X7R
C0402
COMMON
0402
PS_FB_RC1
R990
1ohm
5 %
1206
R1206
COMMON
GND
C1163
C1160
10uF
10uF
16V
16V
10%
10%
X5R
X5R
COMMON
COMMON
1206
1206
C1206
C1206
GND
0.220uHL506
COMMON
C1162
2200pF
50V
10%
X7R
C0402
COMMON
0402
C0402
PS_FB_RC2
R601
1ohm
5 %
R1206
1206
COMMON
DIP_COIL_11_3X6_8MM
FBVDD=1.6V@40A
C1164
10uF
6.3V
20%
X5R
COMMON
0805
C0805
Co-Layout
GND
C1171
1200uF
20%
2.5V
OCCAP
3.6A@105C
0.010R
DIP_ECAPD8MM
GND
1
{26}
{26}
2
{26}
{26}
PS_FB_DRVH1
BI
0.125
PS_FB_BOOT1
BI
0.125
PS_FB_PH1
BI
PS_FB_DRVL1
BI
0.125
R984
0402 COMMON
0.05 ohm
2.2ohm
R985
PS_FB_BOOT1_R
R0603
0ohm
0402 COMMON
0.05 ohm
0.125
R0603
OCP SETTING
NCP81172: 49.9K disable OCP
Close to PWM
PS_FB_DRVH1_R
0.125
0.1uFC1149
0402
16V
10%
X7R
COMMON
C0603
R986
13K
1 %
0402
COMMON
R0402
R991
100k/NC
1 %
0402
R0402
COMMON
C1151
1nF/NC
50V
10%
X7R
C0402
COMMON
0402
GND
GND
3
{26}
{26}
{26}
{26}
PS_FB_DRVH2
BI
0.125
PS_FB_BOOT2
BI
0.125
PS_FB_PH2
BI
PS_FB_DRVL2
BI
0.125
R306
2.2ohm
0402 COMMON
0.05 ohm
R596
0402 COMMON
0.05 ohm
PS_FB_BOOT2_R
R0603
0.125
OCP SETTING
0ohm
Close to PWM
PS_FB_DRVH2_R
R0603
0.125
0.1uFC1148
C0603
0402
16V
10%
X7R
COMMON
R308
40.2k/NC
1 %
R0402
0402
COMMON
GND
R993
100k/NC
1 %
R0402
0402
COMMON
C1150
1nF/NC
50V
10%
X7R
COMMON
0402
GND
12V_F
R307
R305
0/NC
0/NC
+0.05R
+0.05R
R0805
R0805
C1152
C1153
0.1uF
10uF
16V
16V
10%
10%
X7R
X5R
C0603
LFPAK
LFPAK
D
G
4
S
DFN55X6_1_27MM
D
G
4
S
5
Q568
COMMON
1
2
3
5
Q569
COMMON
1
2
3
MDU2657
MDU2653
30V
38A
0.014R@4.5V,0.009R@10V
100A
3.5W@25C
+/-20V
30V
86.3A
0.005R@4.5V,0.0034R@10V
100A
3.5W@25C
+/-20V
DFN55X6_1_27MM
COMMON
0603
C1206
COMMON
1206
GNDGND
12V_PEX8_F2
C160
0.1uF
16V
10%
30V
38A
0.014R@4.5V,0.009R@10V
100A
3.5W@25C
+/-20V
DFN55X6_1_27MM
30V
86.3A
0.005R@4.5V,0.0034R@10V
100A
3.5W@25C
+/-20V
DFN55X6_1_27MM
X7R
COMMON
0603
C0603
5
LFPAK
D
Q570
MDU2657
G
4
COMMON
S
1
2
3
5
LFPAK
D
Q571
MDU2653
G
4
COMMON
S
1
2
3
C0402
GND
J19(1-2PIN:PCE-12V,2-3PIN:8P-F3)
1
3
1
3
2
2
J19
CON3
dip_head1x3_2mm
C1154
C1156
10uF
10uF
16V
16V
10%
10%
X5R
X5R
C1206
C1206
COMMON
COMMON
1206
1206
C1155
10uF
16V
10%
X5R
COMMON
1206
C1206
C0402
C1206
GND
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
PS: Blank Page
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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Custom
Date:Sheet
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PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
PS_ FBVDD_PHASE1-2
PS_ FBVDD_PHASE1-2
PS_ FBVDD_PHASE1-2
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
2741Tuesday, June 21, 2016
2741Tuesday, June 21, 2016
2741Tuesday, June 21, 2016
of
of
of
Page27: PS: NVVDD Controller
VID Table
1
GPIO4
VID_5
0
00
0
0
0
0
0
0
0
0
0
0
0
0
01
10
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
SOFT START (VR11)
1. Ramp 0V to 1.10V in ~2mS
2. Hold at 1.10V for 170uS
3. Read VID
4. VID set to 0.9V during GPIO tri-state
VID[5:1]=11001 to set 0.9V
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
PS: NVVDD Phase 1-4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
PS: NVVDD Phase 5 & 6
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
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Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
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PROPERTY NOTE: This document contains information confidential and
FDBA
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PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
PS: NVVDD Phase 11 & 12
PS: NVVDD Phase 11 & 12
PS: NVVDD Phase 11 & 12
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
3441Tuesday, June 21, 2016
3441Tuesday, June 21, 2016
3441Tuesday, June 21, 2016
ABCDEFGH
Page32: PS: DR_5V SWITCHER
1
DEFAULT IS 12V_F
12V_PEX8_F1
2
R171
0
+0.05R
R0603
COMMON
12V_F
R313
0/NC
+0.05R
R0603
COMMON
DR_5V_VIN_DN
D7
12
DIODE_SMD_SMA
40V
3A
COMMON
MBRA340T3 3.0A 12V_D_SCHOTTKY
10K
R300
R0402 COMMON
5%
DR_5V_VIN_D
C227
10UF
16V
10%
X5R
C0805
COMMON
DR_5V SWITCHER
C372
Co-Layout
R197
12.1K
1%
R0402
COMMON
GND
0.1UF/NC
16V
10%
X7R
C0402
COMMON
GND
Rb
C374
47PF
C0402 50V
5%
C0G
COMMON
R216
0/NC
R0805
+0.05R
R0805
DR_5V_FB_RC
R199
Vout = 0.8 * (1 + (R1/R2))
6.12V = 0.8 * (1 + (66.5K/12.1K))
VOUT=5.19V
U21
SOP8_1_27MM_3_8MM
COMMON
2
VIN
6
C244
0.1UF
16V
10%
X7R
C0402
COMMON
GND
DR_5V_EN
EN
1
PGND
3
AGND
APW7142-0.8V
GND
COMP
DR_5V_PHASE
7
LX
8
LX
DR_5V_ADJ
4
FB
DR_5V_COMP
5
C254
82PF
50V
5%
C0G
C0402
COMMON
R173
24.9K
1%
R0402
COMMON
DR_5V_COMP_R
C385
1500PF
50V
10%
X7R
C0402
COMMON
GND
R198
R0402 COMMON
Rt
66.5K
R0402 COMMON
1%
3.3uH M 4.1AL26
COMMONCOIL_5_4X6mm
0
+0.05R
C373
10UF/16V
16V
20%
X5R
C0805
COMMON
DR_5V_FB_R
C375
4.7UF/16V
16V
20%
X5R
C0603
COMMON
R200
R0402 COMMON
DR_5V
3A
0.400
C384
0.1UF/16V
16V
10%
X7R
C0402
COMMON
GND
0
+0.05R
C171
10UF/16V
16V
20%
X5R
C0805
COMMON
C170
4.7UF/16V
16V
20%
X5R
C0603
COMMON
DR_5V
C172
0.1UF/16V
16V
10%
X7R
COMMON
C0402
GND
3
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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PS: Dynamic Power Balance Phases
4
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PS: DR_5V SWITCHER
PS: DR_5V SWITCHER
PS: DR_5V SWITCHER
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
3541Tuesday, June 21, 2016
3541Tuesday, June 21, 2016
3541Tuesday, June 21, 2016
of
of
of
ABCDEFGH
1
GND
2
PLACEMENT IN PCB : (TOP VIEW)
FROM LEFT TO RIGHT : GND,I2C_DATA,I2C_CLK,VCC_3V3
3
41-PS_VIN-VOUT-LE
TEST HOLES
I2C_DATAI2C_CLK
1
2
3
GND
I2C_DATA
Test4P_SN
Test4P_SN
VCC_3V3
GND
VCC_3V3
4
TP1
I2C_CLK
VCC_3V3
R1024
0
5%
COMMON
R0402
R1025
5%
COMMON
R0402
EEPROMA2I2CC_SDA_R
0/NC
D
J20
4
3
2
1
GND1
VERTICAL
COMMON
MALE
2.0MM
dip_head1x4_2mm_90
HDR_1X4_2.00mm 90 DEGREE DIP
EXTERNAL PROGRAMMING HEARDER
5 pin 90 Degree Connector
VCC_3V3
I2C_CLK
I2C_DATA
GND
EEPROMA0
EEPROMA1
EEPROMA2
U800
1
A0
2
A1
3
A2
6
SCL
7
WP
FT24C02A-USR
(DEPENDS ON I2C BUS PULL UP VOLTAGE)
(TO SELECT 3.3V OR 5V)
3V3_F
R1023
0
5%
R0805
D800
R886
2.2K
5%
R0402
COMMON
12
SM_SOD123
COMMON
R997
2.2K
5%
R0402
COMMON
30VR
0.5A
C953
0.1UF
COMMON
X7R
16V
C0402
8
5
SDA
VCC
GND
4
GND
10%
GND
R858
0
COMMONR0603
R876
0
COMMONR0603
COMMON
R999
10K
5%
R0402
COMMON
R1015
100K
5%
R0402
COMMON
GND
R877
0/NC
I2CC_SCL_R
OUT
COMMONR0603
+0.05R
R878
0/NC
+0.05R
R879
0
I2CB_SCL_R
+0.05R
R882
0
I2CB_SDA_R
+0.05R
BI
COMMONR0603
OUT
COMMONR0603
BI
COMMONR0603
{22,26,28,38,41}
{22,26,28,38,41}
{22,26,28,41}
{22,26,28,41}
12V_PEX8_F1
R855
10K
1%
R0402
COMMON
1V8_AON
R1091
100ohm
1%
R0402
COMMON
60V
0.3A
2R@10V
0.8A
0.35W
+/-20V
1G1D1S
3
S
Q575
2N7002
SOT23
SOT23
G
1
D
2
GND
3V3_F
R1092
150ohm
1%
R0402
COMMON
LED_0603
3
C
Q579
B
MMBT3904A
1
SOT23
COMMON
E
2
GND
DR_5V3V3_F
R846
0ohm
1%
R0402
COMMON
D1
12V
Blue
LED_0603
D803
Blue
1V8
R854
750ohm
1%
R0603
COMMON
MEM_VPP
R1081
100ohm
1%
R0402
COMMON
5V
R872
1.8K
1%
R0603
COMMON
D8
5VDR_V3V3
Blue
LED_0603
GND
3V3_F
3
C
Q577
B
MMBT3904A
1
SOT23
COMMON
E
2
GND
R1082
150ohm
1%
R0402
COMMON
LED_0603
DR_5V
R835
1.8K
1%
R0603
COMMON
D9
Blue
LED_0603
FBVDD
D801
Blue
R838
100ohm
1%
R0402
COMMON
3V3_F
R812
330ohm
1%
R0402
COMMON
D10
Blue
LED_0603
GNDGND
3V3_F
R841
150ohm
1%
R0402
COMMON
D12
Blue
LED_0603
3
C
Q574
MMBT3904A
COMMON
2
DDR_VM_VPP
SOT23
GND
B
1
E
VCC_3V3
R1019
0/NC
VCC_3V3
5%
COMMON
R0402
R1020
5%
COMMON
R0402
R1021
5%
COMMON
R0402
R1022
5%
COMMON
R0402
EEPROMA1
0
PEX_VDD
1
1
PCI_V
TP_OCT2MM_DIP
5V
1
1
5V
TP_OCT2MM_DIP
GND
1
1
GND
TP_OCT2MM_DIP
MEM_VPP
1
1
M_VPP
TP_OCT2MM_DIP
1V8_AON
1
1
1V8
TP_OCT2MM_DIP
FBVDD
NVVDD
0/NC
EEPROMA0
0
1
1
GPU_V
TP_OCT2MM_DIP
1
1
DDR_V
TP_OCT2MM_DIP
NVVDD
R862
100ohm
1%
R0402
COMMON
4
GND
5
GND
3V3_F
R863
150ohm
1%
R0402
COMMON
D11
Blue
LED_0603
3
2
COMMON
GPU_V
SOT23
GND
C
Q576
B
MMBT3904A
1
E
PEX_VDD
R1083
100ohm
1%
R0402
COMMON
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Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
PEX_RST*
IN
1V8_AON
C76
0.1uF
16V
10%
X7R
0402
GND
1
2
3
SC70_5
GND
U5
@logic.u_and_2in(sym_1):page34_i111
4
U_AND_2IN/NC
PEX_RST_BUF*
R43
10k/NC
5 %
0402
GND
OUT
{3}
CE
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
PS: NV3V3, NV12V
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
PS: NV3V3, NV12V
PS: NV3V3, NV12V
PS: NV3V3, NV12V
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
3741Tuesday, June 21, 2016
3741Tuesday, June 21, 2016
3741Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page35: PS: Inputs, Filtering, and Monitoring
3V3_F
C275
0.1uF
I2CC_SCL_R
I2CC_SDA_R
R233
10k
5 %
0402
COMMON
0.05 ohm
R215
16V
10%
X7R
0402
COMMON
GND
INA3221_VPU
0ohm
1
{22,26,28,36,41}
{22,26,28,36,41}
{39}
{40}
OUT
IN
PS_PCIE_GOOD
INA3221_LOW_PERF*
IN
BI
3V3_F
R0402
0402 COMMON
R0402
2
R0402
U19
@digital.u_pwrmtr_ina3221(sym_1):page35_i159
QFN16
COMMON
4
VS
6
SCL
7
SDA
5
A0
GND
10
PV
13
TC
16
VPU
3
GND
TP
PAD
I2C Address:(1000 000b)
GND
QFN016Q_P065_0047_T022X022
U_PWRMTR_INA3221
place caps close to INA3221
INA3221_VIN1P
C263
VIN1P
VIN1N
VIN2P
VIN2N
VIN3P
VIN3N
WARN
12
11
15
14
2
1
8
CRIT
9
10uF/16V
16V
10%
X7R
0805
INA3221_VIN1N
COMMON
R0805
INA3221_VIN2P
C271
10uF/16V
16V
10%
X7R
0805
INA3221_VIN2N
COMMON
R0805
INA3221_VIN3P
C278
10uF/16V
16V
10%
X7R
0805
INA3221_VIN3N
COMMON
R0805
INA3221_WARNOC_CRIT*
GPIO9_THERM_ALERT_R*
R204
0402
R0402
R1049
0402
R0402
R203
R212 20ohm
R1051
0402
R0402
R208
R224
R1052
0402
R0402
R225 20ohm
R237
R246
R998 0ohm/NC
R234
R235
R1047
20ohm
COMMON
1 %
665k
COMMON
1 %
20ohm
COMMON
0402
1 %
R0402
COMMON
0402
1 %
R0402
665k
COMMON
1 %
20ohm
0402
COMMON
1 %
R0402
20ohm
COMMON
0402
1 %
R0402
665k
COMMON
1 %
COMMON
0402
1 %
R0402
0ohm/NC
DNI0402
0.05 ohm
R0402
0ohm/NC
0402
DNI
0.05 ohm
R0402
DNI0402
0.05 ohm
R0402
0ohm/NC
DNI0402
0.05 ohm
R0402
0ohm/NC
0402
COMMON
0.05 ohm
R0402
0ohm
COMMON0402
0.05 ohm
R0402
GND
GND
GND
12V_INP
12V_INN
12V_MISC_1_INP
12V_MISC_1_INN
12V_PEX8_2_INP
GPIO9_THERM_ALERT*
PULLED-UP TO 3.3V ON GPIO PAGE
12V_PEX8_2_INN
GPIO28_OC_WARN
PEX 3V3 INPUT - 10W
3V3
3V3
C72
0.1uF
16V
10%
X7R
0402
COMMON
R0402
GND
PEX_12V INPUT - 66W
12V
12
OUT
OUT
OUT
{39}
{22}
{22}
C507
0.1uF
16V
10%
X7R
0402
COMMON
R0402
C174
C506
1uF
16V
10%
X5R
0603
COMMON
R0603
10uF
25V
10%
X5R
C1206
COMMON
CE29
+
270UF/16V
DIP_ECAPD8MM
GND
INPUT_BU
R299
R0805
R0805
12V_INP
12V_INN
Alternate
L20.47uH
SMD
COIL_2_77MM_S
J11
DIP_HEAD1X2_2MM
1
2
RS50.002R
DIP_HEAD1X2_2MM
5
D
0
+0.05R
DFN55X6_1_27MM
Q45
MDU3603
DFN55X6_1_27MM
5
D
DFN55X6_1_27MM
4
G
4
COMMONR25121%
1
2
3
Q44
S
MDU3603
DFN55X6_1_27MM
G
1
2
3
S
PLACE 0603 10UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT
<VOLTAGE>
5.5A
12V_IN_R
0.400
3.3V
3A
0.400
C60
C67
10uF
10uF/NC
16V
6.3V
20%
20%
X5R
X5R
0603
0805
DNI
R0805
Alternate
COIL_2_77MM_S
COMMON
0.470uHL21
R0603
3V3_F
C53
C56
1uF
0.1uF
16V
16V
10%
10%
X7R
X5R
0402
0402
COMMON
COMMON
R0402
R0402
GND
12V_F
12V
5.5A
0.400
C208
10UF
16V
20%
X5R
C1206
COMMON
GND
1
2
3
MALE
J9
4.2MM
COMMON
PCI_Express Power
90
9
10
12V
1
12V
2
12V
3
12V_PEX8_VIN1
56748
DIP_POWERCON_8P_R
4
GND
J13
PCI_Express Power
COMMON 4.2MM
INPUT_PEX8_DT1*
MALE
90
9
10
12V
1
12V
2
12V
3
0.008
PEX8 INPUT 2 - 2x4 PCIE CON 150W
12V_PEX8_VIN2
56748
DIP_POWERCON_8P_R
5
GND
INPUT_PEX8_DT2*
0.008
I2C Address:(1000 000b)
PEX8 INPUT 1 - 2x4 PCIE CON 150W
TRUE
0.010
12V 6.25A
C206
C203
1UF
0.1UF
16V
16V
10%
10%
X5R
X7R
C0603
C0402
COMMON
COMMON
OUT
{39}
TRUE
<VOLTAGE>
0.010
12.5A
C222
C221
0.1UF
1UF
16V
16V
10%
10%
X7R
X5R
C0402
C0603
COMMON
COMMON
{22}
OUT
{39}
12V_MISC_1_INP
12V_MISC_1_INN
C204
10UF
16V
20%
X5R
C1206
COMMON
GND
C220
10uF
25V
10%
X5R
C1206
COMMON
GNDGND
WARN AND CRIT ARE PULLED-UP TO 3.3V ON GPIO PAGE
0
R311
INPUT_BU
R0805
+0.05R
R0805
12V_PEX8_2_INP
12V_PEX8_2_INN
0
R312
INPUT_BU
IN
R0805
+0.05R
R0805
RS30.002R
5
D
DFN55X6_1_27MM
Q22
MDU3603
DFN55X6_1_27MM
5
D
DFN55X6_1_27MM
RS40.002R
Q42
MDU3603
DFN55X6_1_27MM
5
D
Q43
DFN55X6_1_27MM
MDU3603
DFN55X6_1_27MM
5
D
DFN55X6_1_27MM
J6
DIP_HEAD1X2_2MM
1
2
0.010
DIP_HEAD1X2_2MM
S
MDU3603
DFN55X6_1_27MM
G
4
1
2
3
S
G
4
J10
DIP_HEAD1X2_2MM
1
2
S
G
4
S
G
4
COMMONR25121%
1
2
3
Q24
DIP_HEAD1X2_2MM
R2512
1
2
3
1
2
3
0.470uHL19
COIL_2_77MM_S
L1
L18
0.470uH
COIL_2_77MM_S
L1/L2 CO LAYOUT
L1 STUFFED FOR DESKTOP
L2 STUFFED FOR 2x4 EAST CONNECTOR STUFFED
12V_PEX8_F1
C207
10UF
16V
20%
X5R
C1206
COMMON
GND
12V_PEX8_F2
12V
15A
C230
10UF
16V
20%
X5R
C1206
COMMON
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
PS: Inputs, Filtering, and Monitoring
PS: Inputs, Filtering, and Monitoring
PS: Inputs, Filtering, and Monitoring
Design By:
Design By:
Design By:
NestonV10
NestonV10
P45Z
P45Z
P45Z
NestonV10
3
4
3841Tuesday, June 21, 2016
3841Tuesday, June 21, 2016
3841Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page36: PS: Shutdown and Sequencing
1
2
3V3_F
{38}
{38}
INPUT_PEX8_DT1*
IN
3V3
INPUT_PEX8_DT2*
IN
R0402
R504
1k
1 %
0402
COMMON
12
R518
1k
PEX Input Present 1
R522 1k
0402
COMMON
1 %
CHANGE TO C0402
1kR519
R0402
GND
C0402
GND
0.254
C513
0.1uF
25V
10%
X7R
0603
COMMON
C0402
0.400
INPUT_PEX8_DT2_R*
C509
0.1uF
16V
X7R
INPUT_PEX8_DT1_R*
D501
INS16840857
30V
0.2A
3
BAT54C
SOT23
{40}
{40}
IN
INPUT_HOT_UNPLUG_N
THERM_OVERT*
R520
10k
5 %
0402
INPUT_HOT_UNPLUG_R
COMMON0402
R537
10k
COMMON
5 %
0402COMMON
1B1C1E
C519
0.1uF
16V
10%
X7R
0402
COMMON
GND
POWER CONNECTOR HOT-UNPLUG DETECT
INPUT_HOTUNPLUG*
3
1B1C1E
R521
5 %
B
10k
C
1
E
MMBT2222A-7-F
INPUT_HOT_UNPLUG_DT_R
INPUT_HOT_UNPLUG_Q
3
Q508
@discrete.q_npn(sym_1):page36_i236
SOT23_1B1C1E
COMMON
2
GND
INPUT_NVVDD_EN_HPD
C521
0.1uF
16V
10%
X7R
0402
COMMON
GND
3V3_F
R536
10k
5 %
0402
COMMON
B
1B1C1E
B
1G1D1S
G
1
C
Q511
@discrete.q_npn(sym_1):page36_i240
1
SOT23_1B1C1E
COMMON
E
2
MMBT2222A-7-F
INPUT_EN_HPD
3
C
Q509
@discrete.q_npn(sym_1):page36_i239
1
SOT23_1B1C1E
COMMON
E
2
MMBT2222A-7-F
INPUT_EN_HPD_Q
3
D
Q510
@discrete.q_fet_n_enh(sym_2):page36_i235
SOT23_1G1D1S
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
NVVDD ENABLE
R640
0ohm
0.05 ohm
0402
COMMON
0.1uF
GND
16V
10%
X7R
COMMON
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
PS: Shutdown and Sequencing
C537
10nF
25V
10%
X7R
0402
COMMON
GNDGND
1V8_MAIN_PGOOD
PS_NVVDD_EN
R580
10k/NC
5 %
0402
COMMON
3
OUT
{28}
4
OUT
{37}
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
PS: Shutdown and Sequencing
PS: Shutdown and Sequencing
PS: Shutdown and Sequencing
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
3941Tuesday, June 21, 2016
3941Tuesday, June 21, 2016
3941Tuesday, June 21, 2016
of
of
of
ABCDEFGH
Page37: PS: 12V Current Steering, PSI Control, and LED
PEX Input - 12V Current Steering FETs
12V_PEX8_F1
4.7uF
1
1k/NC
INPUT_PEX8_DT2_R*
INPUT_PEX8_DT1_R*
R314
COMMON
0402
1 %
1k
R240
COMMON
0402
1 %
2
3
C281
0805
R242
INPUT_PEX8_DT1_RC*
12V_F
16V
10%
X5R
COMMON
5 %
R243
100k
COMMON0402
C280
0402
12V_PEX8_F1_STEER_RC
1G1D1S
G
1
4.7uF
16V0805
10%
X5R
COMMON
100k
COMMON
5 %
3
D
Q41
@discrete.q_fet_n_enh(sym_2):page37_i72
SOT23_1G1D1S
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CE
R1063
NC/10K
R0402
R1072
0603
R0402
R7681k
0402
R1071 1k
0402
R0402
R1038 1k
0402
R1068
R1066
R1067
NC/1K
10K
0ohm
R0402
R0402
R0402
12
C180
NC/0.1uF
16V
X7R
C0402
GND
R1070
C0402
0ohm
0603
3
VCC
RGB_SDA
RGB_SCL
R0402
1
R0402
3V3_F
12
C179
0.1uF
16V
X7R
C0402
GND
U700
C0402
14
NC1
EN
13
LED4
VDD
12
LED3
SCL
11
LED2
SDA
10
LED1
RSTb
9
VSS
NC
8
OSC
DATAOUT
6062V
ssop14p_0_65mm_6_4x5mm
IMP809S
U701
SOT23
RESET
GND
1
GND
R1074
R10730ohm
R0402
R0402
R10750ohm
R10760ohm
R0402
R0402
3
G
1
2
Q_FET_N_ENH
GND
3
Q16
D
[Q_AUX_FET2*_DP]
INS17203636
G
SOT23_1G1D1S
S
2
Q_FET_N_ENH
GND
3
G
1
2
Q_FET_N_ENH
GND
ASSEMBLY
PAGE DETAIL
1
2
3
4
5
6
7
2
0ohm
I2CB_SDA_R
I2CB_SCL_R
I2CC_SCL_R
I2CC_SDA_R
Q14
D
[Q_AUX_FET2*_DP]
INS17203333
SOT23_1G1D1S
S
Q17
D
[Q_AUX_FET2*_DP]
INS17203810
SOT23_1G1D1S
S
LEDG1
GND
BI
OUT
OUT
BI
LEDB1
LEDR1
<ASSEMBLY_DESCRIPTION>
MECH: Bracket/Thermal
0805
R0402
LED_4
ONBAORD_GPIO
R1097
R1096
R0402
R0402
R1030
0ohm
0805
R0402
{22,26,28,36}
{22,26,28,36,38}
0ohm
0 OHM
R1031
0ohm
0805
R0402
{22,26,28,36}
{22,26,28,36,38}
5V_LED
R0805
NEW ADD R1107
R1107
R1098
R0402
R0402
GPIO20_RGB
GPIO29_RGB
1
10
LED0
SCL
2
9
LED1
SDA
3
8
LED2
NC2
4
7
INIT
NC1
6
VCC5NC
GND
AW2013DNR
R1050
0ohm
NEW ADD U702
11
4-pin GPU fansink
LEDG1
LEDR1
LEDB1LED_4
R1039
R1040
0ohm
R1041
0ohm
0805
0ohm
0805
0805
R0402
R0402
R0402
PWM
1
TACH
2
12V
3
GND
4
CON_WAFER232_004_TH_ST_P020
HDR_1X4
J14
INS17243440
MALE
2.0MM
VERTICAL
GPU
5V_LED
12V_LED
R1048
NC/0
R1042
0805
0ohm
R0805
R0805
12
12
C176
C177
0.1uF
10uF
16V
16V
X7R
X5R
C0402
0805
C0402
R0805
GND
1
U702
R1032
0ohm
0805
R0402
LED_BLED_GLED_R
2
3V3
R1093
NC/10K
R1095 NC/0 OHM
ONBAORD_GPIO
R1065 1k
0402
R0402
R0402
GND
C0402
{22}
{22}
3V3_F
R1056
R1057
NC/0
0ohm
0805
0805
R0805
R1064
10k
0ohm/NC
0402
R0402
0ohm
OUT
OUT
R1094 NC/1K
R0402
R0402
12
1
C178
0.1uF
16V
X7R
C0402
1
3
G
2
Q_FET_N_ENH
GND
G
Q_FET_N_ENH
GND
Q19
D
[Q_AUX_FET2*_DP]
INS17204130
SOT23_1G1D1S
S
3
Q20
D
[Q_AUX_FET2*_DP]
INS17204216
SOT23_1G1D1S
S
2
12
C80
NC/0.1UF
16V
10%
X7R
C0402
COMMON
GND
3
1G1D1S
D
Q49
2N7002
SOT23
G
1
COMMON
S
2
60V
0.26A@25C
3R
0.31A
0.3W@25C
+/-20V
GND
LEDB1
3
LEDG1
4
LEDR1
3
Q21
D
[Q_AUX_FET2*_DP]
INS17204302
G
SOT23_1G1D1S
1
S
2
Q_FET_N_ENH
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date:Sheet
Date:Sheet
Date:Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MECH: Bracket/Thermal
MECH: Bracket/Thermal
MECH: Bracket/Thermal
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
NestonV10
NestonV10
NestonV10
4141Tuesday, June 21, 2016
4141Tuesday, June 21, 2016
4141Tuesday, June 21, 2016
of
of
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