Nvidia GeForce GTX 1080 Schematics
A B
D
HGFEC
P45ZV10
GP104 - 8GB GDDR5X, 256b, 256Mx32
1
Tall DVI-D + DP + DP + DP/HDMI + DP
TABLE OF CONTENTS
Page
2
Description
1
Table of Contents
Block Diagram
2
PCI Express
3
4
MEMORY: GPU Partition A/B
MEMORY: FBA[31:0]
5
6
MEMORY: FBA[63:32]
MEMORY: FBB[31:0]
7
8
MEMORY: FBB[63:32]
9
MEMORY: GPU Partition C/D
10
MEMORY: FBC[31:0]
MEMORY: FBC[63:32]
11
12
MEMORY: FBD[31:0]
13
MEMORY: FBD[63:32]
Page
GPU PWR and GND14
GPU Decoupling
3
4
15
IFPAB DVI-D-DL
16
IFPE DP
17
IFPEF DP
18
19
IFPC HDMI 2.0/DP
20
IFPD DP
21
MIOA/B Interface and Frame Lock
22
MISC1; Fan, Thermal, JTAG, GPIO, Stereo
23
MISC2: ROM, XTAL, Straps
24
PS: 1V8, 1V8_AON
25
PS: 5V, PEX_VDD
Description
26
PS: FBVDD
PS_ FBVDD_PHASE1-2
27
28
PS: Blank Page
PS: NVVDD Phase 1-4
29
30
PS: NVVDD Phase 5 & 6
31
PS: Blank Page
32
PS: Dynamic Power Balance Phases
33
PS: Dynamic Power Balance Logic
34
PS: NV3V3, NV12V
35
PS: Inputs, Filtering, and Monitoring
36
PS: Shutdown and Sequencing
37
PS: 12V Current Steering PSI Control and LED
MECH: Bracket/Thermal
38
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A B D F
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
Table of Contents
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
EC
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Table of Contents
Table of Contents
Table of Contents
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
141Tuesday, June 21, 2016
141Tuesday, June 21, 2016
141Tuesday, June 21, 2016
of
of
of
A B C D E F G H
Page2: Block Diagram
1
Power Supply
NVVDD-PH1
PEX_12V Finger
DYNAMIC OPTION
1
Power Supply
NVVDD-PH2
Power Supply
2
2-WAY SLI
NVVDD-PH3
Power Supply
C
MEM
D
HI
QD:DP
HDMI/
MEM
3
D
LO
MEM
LO
DP
MEM
FB X32
GP104
C
HI
MEM
LO
B
MEM
B
HI
MEM
A
LO
NVVDD-PH4
Power Supply
NVVDD-PH5
Power Supply
NVVDD-PH6
Power Supply
MEM
DVI-D
A
HI
DP DP
4
QD:STEREO
5V Switcher
Power Supply
FBVDD
PEX_VDD
POWERED BY 3V3 or 5V
EXT_12V 2x4
(NORTH)
QD:EXT_12V 2x4
(EAST)
PEX_12V Finger
PEX_12V 2x4 PWR
PEX_3V3 Finger
2
3
4
QUADRO OPTIONS SHOWN IN YELLOW
and prefix "QD:"
Fan
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
Block Diagram
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Block Diagram
Block Diagram
Block Diagram
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
241Tuesday, June 21, 2016
241Tuesday, June 21, 2016
241Tuesday, June 21, 2016
of
of
of
A B C D E F G H
Page3: PCI Express
12V
C43
4.7uF/NC
16V
10%
X5R
0603
DNI
1
FUTURE USE
Approved in PCIE SIG
{40}
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C1079
4.7uF/NC
16V
10%
X5R
0603
DNI
OUT
PLACE 0603 4.7UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT
C44
4.7uF
16V
10%
X5R
0805
COMMON
3V3
C1049
4.7uF
6.3V
20%
X5R
0603
COMMON
GND
POWER_BRAKE*
C1078
4.7uF
16V
10%
X5R
0805LP
COMMON
C1045
0.1uF
16V
10%
X7R
0402
COMMON
PEX_CLKREQ*
R834
0ohm/NC
0.05 ohm
0402
DNI
R983
0ohm/NC
0.05 ohm
0402
DNI
RSVD4_POWER_BRAKE
GND
C1064
0.1uF
16V
10%
X7R
0402
COMMON
PEX_PRSNT*
CN1NONPHY-X16
CON_X16
COMMON
@electro_mechanic.con_pci_express(sym_1):page3_i662
B1
+12V
B2
+12V
A2
+12V
A3
+12V
B3
+12V/RSVD
B8
+3V3
A9
+3V3
A10
+3V3
B10
+3V3AUX
A1
PRSNT1
B17
PRSNT2
B12
RSVD
B4
GND
A4
GND
B7
GND
A12
GND
B13
GND
A15
GND
B16
GND
B18
GND
A18
GND
GND
GND
GND
GND
END OF X1
B31
PRSNT2
A19
RSVD
B30
RSVD
A32
RSVD
A20
GND
B21
GND
B22
GND
A23
GND
A24
GND
B25
GND
B26
GND
A27
GND
A28
GND
B29
GND
A31
GND
B32
GND
END OF X4
B48
PRSNT2
A33
RSVD
A34
GND
B35
GND
B36
GND
A37
GND
A38
GND
B39
GND
B40
GND
A41
GND
A42
GND
B43
GND
B44
GND
A45
GND
A46
GND
B47
GND
B49
GND
A49
GND
END OF X8
B81
PRSNT2
A50
RSVD
B82
RSVD
A51
GND
B52
GND
B53
GND
A54
GND
A55
GND
B56
GND
B57
GND
A58
GND
A59
GND
B60
GND
B61
GND
A62
GND
A63
GND
B64
GND
B65
GND
A66
GND
A67
GND
B68
GND
B69
GND
A70
GND
A71
GND
B72
GND
B73
GND
A74
GND
A75
GND
B76
GND
B77
GND
A78
GND
A79
GND
B80
GND
A82
GND
END OF X16
TRST* JTAG1
TCLK JTAG2
TDI JTAG3
TDO JTAG4
TMS JTAG5
SMCLK
SMDAT
PERST
REFCLK
REFCLK
PERP0
PERN0
PETP0
PETN0
PERP1
PERN1
PETP1
PETN1
PERP2
PERN2
PETP2
PETN2
PERP3
PERN3
PETP3
PETN3
PERP4
PERN4
PETP4
PETN4
PERP5
PERN5
PETP5
PETN5
PERP6
PERN6
PETP6
PETN6
PERP7
PERN7
PETP7
PETN7
PERP8
PERN8
PETP8
PETN8
PERP9
PERN9
PETP9
PETN9
PERP10
PERN10
PETP10
PETN10
PERP11
PERN11
PETP11
PETN11
PERP12
PERN12
PETP12
PETN12
PERP13
PERN13
PETP13
PETN13
PERP14
PERN14
PETP14
PETN14
PERP15
PERN15
PETP15
PETN15
R875
0ohm
0402
0.05 ohm
PEX_RST*
PEX_REFCLK
PEX_REFCLK*
PEX_TXX0
PEX_TXX0*
PEX_RX0
PEX_RX0*
PEX_TXX1
PEX_TXX1*
PEX_RX1
PEX_RX1*
PEX_TXX2
PEX_TXX2*
PEX_RX2
PEX_RX2*
PEX_TXX3
PEX_TXX3*
PEX_RX3
PEX_RX3*
PEX_TXX4
PEX_TXX4*
PEX_RX4
PEX_RX4*
PEX_TXX5
PEX_TXX5*
PEX_RX5
PEX_RX5*
PEX_TXX6
PEX_TXX6*
PEX_RX6
PEX_RX6*
PEX_TXX7
PEX_TXX7*
PEX_RX7
PEX_RX7*
PEX_TXX8
PEX_TXX8*
PEX_RX8
PEX_RX8*
PEX_TXX9
PEX_TXX9*
PEX_RX9
PEX_RX9*
PEX_TXX10
PEX_TXX10*
PEX_RX10
PEX_RX10*
PEX_TXX11
PEX_TXX11*
PEX_RX11
PEX_RX11*
PEX_TXX12
PEX_TXX12*
PEX_RX12
PEX_RX12*
PEX_TXX13
PEX_TXX13*
PEX_RX13
PEX_RX13*
PEX_TXX14
PEX_TXX14*
PEX_RX14
PEX_RX14*
PEX_TXX15
PEX_TXX15*
PEX_RX15
PEX_RX15*
COMMON
PEX_REFCLK
PEX_REFCLK
PEX_RX0
PEX_RX0
PEX_RX1
PEX_RX1
PEX_RX2
PEX_RX2
PEX_RX3
PEX_RX3
PEX_RX4
PEX_RX4
PEX_RX5
PEX_RX5
PEX_RX6
PEX_RX6
PEX_RX7
PEX_RX7
PEX_RX8
PEX_RX8
PEX_RX9
PEX_RX9
PEX_RX10
PEX_RX10
PEX_RX11
PEX_RX11
PEX_RX12
PEX_RX12
PEX_RX13
PEX_RX13
PEX_RX14
PEX_RX14
PEX_RX15
PEX_RX15
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
{37}
C1026
0.22uF
C1027
0402 6.3V
10%
COMMON
X7R
C0402
0402 6.3V
X7R
C0402
0402
X7R
C0402
0402 6.3V
X7R
C0402
0402
X7R
C0402
0402
X7R
C0402
0402
X7R
C0402
0402
X7R
C0402
0402
X7R
C0402
X7R
C0402
0402
X7R
C0402
0402 6.3V
X7R
C0402
X7R
C0402
0402
X7R
C0402
0402
X7R
C0402
X7R
C0402
0.22uF
10%
0.22uF
6.3V
10%
0.22uF
10%
6.3V
10%
0.22uF
6.3V
10%
0.22uF
6.3V
10%
0.22uF
6.3V
10%
0.22uF
6.3V
10%
0.22uF
6.3V0402
10%
0.22uF
6.3V
10%
0.22uF
10%
0.22uF
6.3V0402
10%
6.3V
10%
0.22uF
6.3V
10%
0.22uF
6.3V0402
10%
C0402
C1018
C0402
C998
C0402
C988
C0402
C936
0402
C0402
C909
C0402
C883
0402
C0402
C863 0.22uF
C0402
C847
0402
C0402
C823
C0402
C799
0402
C0402
C777
C0402
C767
C0402
C761
0402
C0402
C750
C0402
C744
C0402
C1017
COMMON
C997
COMMON
C987
COMMON
C945 0.22uF
COMMON
C912
COMMON
C895
COMMON
C879
COMMON
C854
COMMON
C833
COMMON
C806
COMMON
C780
COMMON
C775
COMMON
C763 0.22uF
COMMON
C755
COMMON
C746
COMMON
OUT
B9
A5
A6
PEX_TDI
PEX_TDO
A7
A8
PEX_SMCLK
B5
PEX_SMDAT
B6
B11
WAKE
A11
A13
A14
A16
A17
B14
B15
A21
A22
B19
B20
A25
A26
B23
B24
A29
A30
B27
B28
A35
A36
B33
B34
A39
A40
B37
B38
A43
A44
B41
B42
A47
A48
B45
B46
A52
A53
B50
B51
A56
A57
B54
B55
A60
A61
B58
B59
A64
A65
B62
B63
A68
A69
B66
B67
A72
A73
B70
B71
A76
A77
B74
B75
A80
A81
B78
B79
C E
3V3 3V3
0.22uF
10%
6.3V0402
X7R
0.22uF
10%
6.3V0402
X7R
0.22uF
10%
6.3V0402
X7R
0.22uF
10%
6.3V0402
X7R
0.22uF
10%
6.3V
X7R
0.22uF
10%
6.3V0402
X7R
0.22uF
10%
6.3V
X7R
10%
6.3V0402
X7R
0.22uF
10%
6.3V
X7R
0.22uF
10%
6.3V0402
X7R
0.22uF
10%
6.3V
X7R
0.22uF
10%
6.3V0402
X7R
0.22uF
10%
6.3V0402
X7R
0.22uF
10%
6.3V
X7R
0.22uF
10%
6.3V0402
X7R
0.22uF
10%
6.3V0402
X7R
ASSEMBLY
PAGE DETAIL
R884
100k/NC
5 %
0402
COMMON
{37}
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
R28
100k/NC
5 %
0402
COMMON
PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
PEX_TX4
PEX_TX4*
PEX_TX5
PEX_TX5*
PEX_TX6
PEX_TX6*
PEX_TX7
PEX_TX7*
PEX_TX8
PEX_TX8*
PEX_TX9
PEX_TX9*
PEX_TX10
PEX_TX10*
PEX_TX11
PEX_TX11*
PEX_TX12
PEX_TX12*
PEX_TX13
PEX_TX13*
PEX_TX14
PEX_TX14*
PEX_TX15
PEX_TX15*
<ASSEMBLY_DESCRIPTION>
PCI Express
12V
NET VOLTAGE MAX_CURRENT MIN_WIDTH
12V
NV3V3
1
G
Q541
@discrete.q_fet_n_enh(sym_7):page3_i870
SOT23_1G1D1S
COMMON
Q_FET_N_ENH/NC
S3D
2
NV3V3
1
G
S3D
G1A
@digital.u_gpu_gb4_256(sym_1):page3_i902
BGA2152
COMMON
PEX_RST_BUF*
IN
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
BK26
BL26
BM26
BM27
BG26
BH26
BL27
BK27
BF26
BE26
BK29
BL29
BF27
BG27
BM29
BM30
BG29
BH29
BL30
BK30
BF29
BE29
BK32
BL32
BF30
BG30
BM32
BM33
BG32
BH32
BL33
BK33
BF32
BE32
BK35
BL35
BF33
BG33
BM35
BM36
BG35
BH35
BL36
BK36
BF35
BE35
BK38
BL38
BF36
BG36
BM38
BM39
BG38
BH38
BL39
BK39
BF38
BE38
BK41
BL41
BF39
BG39
BM41
BM42
BH41
BG41
BL42
BK42
Q7
@discrete.q_fet_n_enh(sym_7):page3_i874
SOT23_1G1D1S
COMMON
I2CS_SDA
2
Q_FET_N_ENH/NC
1/23 PCI_EXPRESS
PEX_RST
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
I2CS_SCL
OUT
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_PLL_HVDD
PEX_TERMP
3V3
3V3
GND
{22}
GND
BI
{22}
Place under GPU
BB33
BB35
BB36
BC33
BC35
BC36
BD33
BD36
BB26
BB27
BB29
BB32
BC26
BC27
BC29
BC30
BC32
BD27
BD30
C822
1uF
6.3V
10%
X5R
0402
COMMON
C857
1uF
6.3V
10%
X5R
0402
COMMON
C841
1uF
6.3V
10%
X5R
0402
COMMON
C880
1uF
6.3V
10%
X5R
0402
COMMON
1V8
BB30
C855
0.1uF
16V
10%
X7R
0402
COMMON
GND
50OHM_NETCLASS2
PEX_TERMP
BL44
R785 2.49k
0402
1 %
COMMON
GND
FDBA
C817
1uF
6.3V
10%
X5R
0402
COMMON
C866
1uF
6.3V
10%
X5R
0402
COMMON
C832
1uF
6.3V
10%
X5R
0402
COMMON
C867
1uF
6.3V
10%
X5R
0402
COMMON
12V
5.5A 0.400
3.3V
3.0A 0.400
C754
4.7uF
6.3V
20%
X5R
0603
COMMON
C979
4.7uF
6.3V
20%
X5R
0603
COMMON
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
C112
4.7uF
6.3V
20%
X5R
0603
COMMON
C845
4.7uF
6.3V
20%
X5R
0603
COMMON
0.4008.5A0V
Place between
GPU and PS
C106
10uF
6.3V
20%
X5R
0805LP
COMMON
C1029
10uF
6.3V
20%
X5R
0805LP
COMMON
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
PCI Express
PCI Express
PCI Express
P45Z
P45Z
P45Z
Design By:
Design By:
Design By:
C1028
10uF
6.3V
20%
X5R
0805LP
COMMON
PEX_VDD
C748
22uF
6.3V
20%
X5R
0805LP
COMMON
GND
1V8
C1021
22uF
6.3V
20%
X5R
0805LP
COMMON
GND
Neston V10
Neston V10
Neston V10
341Tuesday, June 21, 2016
341Tuesday, June 21, 2016
341Tuesday, June 21, 2016
of
of
of
A B C D E F G H
Page4: MEMORY: GPU Partition A/B
1
FB_DATA
{5,6}
2
3
{5,6}
{5,6}
4
{4,9}
5
FBA_D[63..0]
BI
FB_DBI
FBA_DBI[7..0]
BI
FB_EDC
FBA_EDC[7..0]
IN
1V8_FB_PLL
IN
C783
0.1uF
16V
10%
X7R
0402
COMMON
C859
0.1uF
16V
10%
X7R
0402
COMMON
FBA_D0
0
FBA_D1
1
FBA_D2
2
FBA_D3
3
FBA_D4
4
FBA_D5
5
FBA_D6
6
FBA_D7
7
FBA_D8
8
FBA_D9
9
FBA_D10
10
FBA_D11
11
FBA_D12
12
FBA_D13
13
FBA_D14
14
FBA_D15
15
FBA_D16
16
FBA_D17
17
FBA_D18
18
FBA_D19
19
FBA_D20
20
FBA_D21
21
FBA_D22
22
FBA_D23
23
FBA_D24
24
FBA_D25
25
FBA_D26
26
FBA_D27
27
FBA_D28
28
FBA_D29
29
FBA_D30
30
FBA_D31
31
FBA_D32
32
FBA_D33
33
FBA_D34
34
FBA_D35
35
FBA_D36
36
FBA_D37
37
FBA_D38
38
FBA_D39
39
FBA_D40
40
FBA_D41
41
FBA_D42
42
FBA_D43
43
FBA_D44
44
FBA_D45
45
FBA_D46
46
FBA_D47
47
FBA_D48
48
FBA_D49
49
FBA_D50
50
FBA_D51
51
FBA_D52
52
FBA_D53
53
FBA_D54
54
FBA_D55
55
FBA_D56
56
FBA_D57
57
FBA_D58
58
FBA_D59
59
FBA_D60
60
FBA_D61
61
FBA_D62
62
FBA_D63
63
FBA_DBI0
0
FBA_DBI1
1
FBA_DBI2
2
FBA_DBI3
3
FBA_DBI4
4
FBA_DBI5
5
FBA_DBI6
6
FBA_DBI7
7
FBA_EDC0
0
FBA_EDC1
1
FBA_EDC2
2
FBA_EDC3
3
FBA_EDC4
4
FBA_EDC5
5
FBA_EDC6
6
FBA_EDC7
7
GND
G1B
@digital.u_gpu_gb4_256(sym_2):page4_i1943
BGA2152
COMMON
2/23 FBA
U51
FBA_D0
U48
FBA_D1
U50
FBA_D2
U49
FBA_D3
R51
FBA_D4
R50
FBA_D5
R47
FBA_D6
U46
FBA_D7
V46
FBA_D8
Y45
FBA_D9
Y47
FBA_D10
Y46
FBA_D11
V50
FBA_D12
V47
FBA_D13
U52
FBA_D14
V51
FBA_D15
AJ44
FBA_D16
AG48
FBA_D17
AJ45
FBA_D18
AG49
FBA_D19
AF46
FBA_D20
AF47
FBA_D21
AF48
FBA_D22
AD47
FBA_D23
AD49
FBA_D24
AD48
FBA_D25
AC46
FBA_D26
AC47
FBA_D27
AA47
FBA_D28
AA46
FBA_D29
AA45
FBA_D30
Y44
FBA_D31
AW51
FBA_D32
BA52
FBA_D33
AW50
FBA_D34
BA51
FBA_D35
BA50
FBA_D36
BB50
FBA_D37
BA49
FBA_D38
AW49
FBA_D39
AV48
FBA_D40
AT49
FBA_D41
AT47
FBA_D42
AT48
FBA_D43
AT46
FBA_D44
AV51
FBA_D45
AV52
FBA_D46
AV49
FBA_D47
AJ48
FBA_D48
AJ46
FBA_D49
AJ47
FBA_D50
AK49
FBA_D51
AM47
FBA_D52
AM46
FBA_D53
AN48
FBA_D54
AN49
FBA_D55
AM44
FBA_D56
AM45
FBA_D57
AN45
FBA_D58
AN46
FBA_D59
AR48
FBA_D60
AN47
FBA_D61
AR47
FBA_D62
AR46
FBA_D63
U47
FBA_DQM0
Y48
FBA_DQM1
AG47
FBA_DQM2
AC48
FBA_DQM3
BB51
FBA_DQM4
AV50
FBA_DQM5
AM48
FBA_DQM6
AR49
FBA_DQM7
R48
FBA_DQS_WP0
V48
FBA_DQS_WP1
AF44
FBA_DQS_WP2
AA48
FBA_DQS_WP3
BB52
FBA_DQS_WP4
AT50
FBA_DQS_WP5
AK48
FBA_DQS_WP6
AR51
FBA_DQS_WP7
W47
GND
W49
GND
W51
GND
W6
GND
W8
GND
Y14
GND
Y15
GND
Y16
GND
AF42
FB_REFPLL_AVDD0
L29
FB_REFPLL_AVDD1
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32
FBA_CMD33
FBA_CMD34
FBA_CMD35
FBA_DBG_RFU1
FBA_DBG_RFU2
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
FBA_WCK01
FBA_WCK01
FBA_WCKB01
FBA_WCKB01
FBA_WCK23
FBA_WCK23
FBA_WCKB23
FBA_WCKB23
FBA_WCK45
FBA_WCK45
FBA_WCKB45
FBA_WCKB45
FBA_WCK67
FBA_WCK67
FBA_WCKB67
FBA_WCKB67
FBA_PLL_AVDD
Y51
Y52
Y49
AA52
AA51
AA50
AC50
AC51
AC52
AC49
AD52
AD51
AD50
AF50
AF51
AF52
AN50
AN51
AN52
AM49
AM52
AM51
AM50
AK50
AK51
AK52
AJ49
AJ52
AJ51
AJ50
AG50
AG51
AG52
AF49
Y50
AR50
AA44
AN44
AG45
AG46
AK46
AK45
U45
U44
V45
V44
AC45
AC44
AD46
AD45
AV47
AV46
AW48
AW47
AR45
AR44
AT45
AT44
AN42
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_DEBUG0
FBA_DEBUG1
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_WCK01
FBA_WCK01*
FBA_WCK23
FBA_WCK23*
FBA_WCK45
FBA_WCK45*
FBA_WCK67
FBA_WCK67*
C924
0.1uF
16V
10%
X7R
0402
COMMON
R779 60.4ohm/NC
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
1.0V
GND
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0402 DNI
1 %
FBA_WCK01
FBA_WCK01
FBA_WCK23
FBA_WCK23
FBA_WCK45
FBA_WCK45
FBA_WCK67
FBA_WCK67
1V8
C949
22uF
6.3V
20%
X5R
0805LP
COMMON
FBA_CMD13
FBA_CMD29
FBA_CMD1
FBA_CMD17
FB_CMD
FBA_CMD[31..0]
LB501
30ohm
COMMON
BEAD_0603
1V8_FB_PLL
R780
60.4ohm/NC
0402
1 %
FB_CLK
FB_CLK
FB_CLK
FB_CLK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
R759
10k
5 %
0402
COMMON
R764
10k
5 %
0402
COMMON
GND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
DNI
OUT
OUT
OUT
OUT
OUT
ASSEMBLY
PAGE DETAIL
BI
FBVDD
FBVDD
GND
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
R760
10k
5 %
0402
COMMON
R770
10k
5 %
0402
COMMON
<ASSEMBLY_DESCRIPTION>
MEMORY: GPU Partition A/B
{5,6}
{7,8}
GDDR5x CMD Mapping
CMD
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21 A12_A13
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30
CMD31
{5}
{5}
{6}
{6}
{5}
{5}
{5}
{5}
{6}
{6}
{7,8}
{6}
{6}
{7,8}
{4,9}
FBB_CMD13
FBB_CMD29
FBB_CMD1
FBB_CMD17
CAS*
RST*
RAS*
A1_A9
A0_A10
A12_A13
ABI*
A6_A11
A7_A8
A4_BA2
A5_BA1
A3_BA3
A2_BA0
CKE*
A14_A15
WE*
R787
10k
5 %
0402
COMMON
R775
10k
5 %
0402
COMMON
G1C
@digital.u_gpu_gb4_256(sym_3):page4_i1944
BGA2152
FB_DATA
FBB_D[63..0]
BI
32..630..31
CAS*
RST*
RAS*
A1_A9
A0_A10
ABI*
A6_A11
A7_A8
A4_BA2
A5_BA1
A3_BA3
A2_BA0
CKE*
A14_A15
WE*
FB_DBI
FBB_DBI[7..0]
BI
FB_EDC
FBB_EDC[7..0]
IN
FBB_D0
0
FBB_D1
1
FBB_D2
2
FBB_D3
3
FBB_D4
4
FBB_D5
5
FBB_D6
6
FBB_D7
7
FBB_D8
8
FBB_D9
9
FBB_D10
10
FBB_D11
11
FBB_D12
12
FBB_D13
13
FBB_D14
14
FBB_D15
15
FBB_D16
16
FBB_D17
17
FBB_D18
18
FBB_D19
19
FBB_D20
20
FBB_D21
21
FBB_D22
22
FBB_D23
23
FBB_D24
24
FBB_D25
25
FBB_D26
26
FBB_D27
27
FBB_D28
28
FBB_D29
29
FBB_D30
30
FBB_D31
31
FBB_D32
32
FBB_D33
33
FBB_D34
34
FBB_D35
35
FBB_D36
36
FBB_D37
37
FBB_D38
38
FBB_D39
39
FBB_D40
40
FBB_D41
41
FBB_D42
42
FBB_D43
43
FBB_D44
44
FBB_D45
45
FBB_D46
46
FBB_D47
47
FBB_D48
48
FBB_D49
49
FBB_D50
50
FBB_D51
51
FBB_D52
52
FBB_D53
53
FBB_D54
54
FBB_D55
55
FBB_D56
56
FBB_D57
57
FBB_D58
58
FBB_D59
59
FBB_D60
60
FBB_D61
61
FBB_D62
62
FBB_D63
63
FBB_DBI0
0
FBB_DBI1
1
FBB_DBI2
2
FBB_DBI3
3
FBB_DBI4
4
FBB_DBI5
5
FBB_DBI6
6
FBB_DBI7
7
FBB_EDC0
0
FBB_EDC1
1
FBB_EDC2
2
FBB_EDC3
3
FBB_EDC4
4
FBB_EDC5
5
FBB_EDC6
6
FBB_EDC7
7
FBVDD
R758
10k
5 %
0402
COMMON
R788
10k
5 %
0402
COMMON
GND
H32
D32
A33
B32
E32
G32
J30
F32
H36
G36
J36
F36
F33
D33
J32
G33
E45
D45
F45
G45
D42
E42
F42
H41
E41
F39
E39
D39
F38
E38
D36
E36
M50
P48
M51
M49
P47
P52
R46
P46
L50
L51
L52
L49
M46
L47
M48
M47
D48
C50
C48
C49
E49
E50
F49
F48
F50
D52
J50
H48
H51
J51
H49
H52
C32
E33
E44
G39
P49
L48
D50
H50
B33
E35
G44
H38
P50
J48
D51
F51
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
COMMON
3/23 FBB
FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7
FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7
GND
GND
GND
GND
GND
GND
GND
GND
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32
FBB_CMD33
FBB_CMD34
FBB_CMD35
FBB_DBG_RFU1
FBB_DBG_RFU2
FBB_CLK0
FBB_CLK0
FBB_CLK1
FBB_CLK1
FBB_WCK01
FBB_WCK01
FBB_WCKB01
FBB_WCKB01
FBB_WCK23
FBB_WCK23
FBB_WCKB23
FBB_WCKB23
FBB_WCK45
FBB_WCK45
FBB_WCKB45
FBB_WCKB45
FBB_WCK67
FBB_WCK67
FBB_WCKB67
FBB_WCKB67
FBB_PLL_AVDD
FBB_CMD0
B35
FBB_CMD1
A35
FBB_CMD2
D35
FBB_CMD3
A36
FBB_CMD4
B36
FBB_CMD5
C36
FBB_CMD6
C38
FBB_CMD7
B38
FBB_CMD8
A38
FBB_CMD9
D38
FBB_CMD10
A39
FBB_CMD11
B39
FBB_CMD12
C39
FBB_CMD13
C41
FBB_CMD14
B41
FBB_CMD15
A41
FBB_CMD16
B49
FBB_CMD17
A49
FBB_CMD18
A48
FBB_CMD19
D47
FBB_CMD20
A47
FBB_CMD21
B47
FBB_CMD22
C47
FBB_CMD23
C45
FBB_CMD24
B45
FBB_CMD25
A45
FBB_CMD26
D44
FBB_CMD27
A44
FBB_CMD28
B44
FBB_CMD29
C44
FBB_CMD30
C42
FBB_CMD31
B42
A42
D41
FBB_DEBUG0
C35
FBB_DEBUG1
B50
J35
J41
FBB_CLK0
H42
FBB_CLK0*
G42
FBB_CLK1
F47
FBB_CLK1*
E47
FBB_WCK01
J33
FBB_WCK01*
H33
G35
H35
FBB_WCK23
J39
FBB_WCK23*
H39
F41
G41
FBB_WCK45
L46
FBB_WCK45*
L45
M44
M45
FBB_WCK67
H47
FBB_WCK67*
H46
J47
J46
1V8_FB_PLL
L38
C800
0.1uF
16V
10%
X7R
0402
COMMON
GND
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R791 60.4ohm/NC
0402
FBB_CLK0
FBB_CLK0
FBB_CLK1
FBB_CLK1
FBB_WCK01
FBB_WCK01
FBB_WCK23
FBB_WCK23
FBB_WCK45
FBB_WCK45
FBB_WCK67
FBB_WCK67
IN
1 %
FB_CMD
FBB_CMD[31..0]
DNI
FB_CLK
FB_CLK
FB_CLK
FB_CLK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
R784 60.4ohm/NC
DNI0402
1 %
{4,9}
OUT
{7,8}
FBVDD
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
{7}
{7}
{8}
{8}
{7}
{7}
{7}
{7}
{8}
{8}
{8}
{8}
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: GPU Partition A/B
MEMORY: GPU Partition A/B
MEMORY: GPU Partition A/B
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
441Tuesday, June 21, 2016
441Tuesday, June 21, 2016
441Tuesday, June 21, 2016
of
of
of
A B C D E F G H
Page5: MEMORY: FBA Partition 31..0
1
{4}
2
3
4
FBA_D[31..0]
BI
{4}
{4}
FB_DBI
{4,6}
{4,6}
FBA_D0
0
FBA_D1
1
FBA_D2
2
FBA_D3
3
FBA_D4
4
FBA_D5
5
FBA_D6
6
FBA_D7
7
8
9
10
11
12
13
14
15
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_EDC0
FBA_DBI0
FBA_EDC1
FBA_DBI1
FBA_WCK01
IN
FBA_WCK01*
IN
BI
BI
M7D
@memory.u_mem_gddr5x_x32(sym_2):page5_i156
BGA190_MIRR
COMMON
MIRRORED
x32
V4
DQ0
V3
DQ1
U4
DQ2
U3
DQ3
P4
DQ4
P3
DQ5
N4
DQ6
N3
DQ7
T3
EDC0
R3
DBI0
V11
DQ8
V12
DQ9
U11
DQ10
U12
DQ11
P11
DQ12
P12
DQ13
N11
DQ14
N12
DQ15
T12
EDC1
R12
DBI1
T4
WCK01
T5
WCK01
{7,10,12,22}
FBA_DBI[7..0]
FB_EDC
FBA_EDC[7..0]
x16
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IN
GPIO10_FBVREF_SEL
GND
M7C
@memory.u_mem_gddr5x_x32(sym_7):page5_i237
BGA190_MIRR
COMMON
Mirrored
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
add 1k to VDD
FBVDD
W12
MF
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VPP
VPP
FBVDD
A13
A2
B10
B5
C1
C13
C14
C2
E1
E11
E13
E14
E2
E4
F10
F5
G13
G2
H12
H3
J13
J2
L13
L2
M12
M3
N13
N2
P10
P5
R1
R11
R13
R14
R2
R4
U1
U13
U14
U2
V10
V5
W13
W2
MEM_VPP
A3
W3
1
2
3
4
FBA_DBI0
0
FBA_DBI1
1
FBA_DBI2
2
FBA_DBI3
3
FBA_DBI4
4
FBA_DBI5
5
FBA_DBI6
6
FBA_DBI7
7
FBA_EDC0
0
FBA_EDC1
1
FBA_EDC2
2
FBA_EDC3
3
FBA_EDC4
4
FBA_EDC5
5
FBA_EDC6
6
FBA_EDC7
7
M7B
M4
H4
H11
K4
L4
L5
L11
L10
J11
J10
J5
J4
K5
K12
K2
M11
K11
K10
M2
M13
A12
H2
{6}
K13
H13
@memory.u_mem_gddr5x_x32(sym_5):page5_i218
BGA190_MIRR
COMMON
RAS
CAS
WE
ABI
A0_A10
A1_A9
A2_BA0
A3_BA3
A4_BA2
A5_BA1
A6_A11
A7_A8
A12_A13
A15_A14
RESET
CKE
CLK
CLK
TCK
TDI
TDO
TMS
VREFC
ZQ
{4,6}
M7A
@memory.u_mem_gddr5x_x32(sym_4):page5_i205
BGA190_MIRR
COMMON
MIRRORED
x32
FBA_D16
16
FBA_D17
17
FBA_D18
18
FBA_D19
19
FBA_D20
20
FBA_D21
21
FBA_D22
22
FBA_D23
23
24
25
26
27
28
29
30
31
{4}
{4}
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
1G1D1S
IN
IN
FBA_EDC2
FBA_DBI2
FBA_EDC3
FBA_DBI3
FBA_WCK23
FBA_WCK23*
3
D
Q11
@discrete.q_fet_n_enh(sym_2):page5_i202
SOT23_1G1D1S
G
1
COMMON
S
2
20V
6.5A
22mohm@10V / 22mohm@4.5V / 22mohm@2.5V
6.5A
1.4W
8V
GND
AO3416L
x16
B11
DQ16
NC
B12
DQ17
NC
C11
DQ18
NC
C12
DQ19
NC
F11
DQ20
NC
F12
DQ21
NC
G11
DQ22
NC
G12
DQ23
NC
D12
EDC2
GND
E12
DBI2
NC
{4}
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
{4}
FBVDD
R54
549ohm
1 %
0402
COMMON
R52
1.33k
1 %
0402
COMMON
GND
FBA_VREF_Q
B4
B3
C4
C3
F4
F3
G4
G3
D3
E3
D4
D5
1.05V
0.350
FBA_CMD[31..0]
IN
FBA_CLK0
IN
FBA_CLK0*
IN
0.350 1.05V
R55
C123
931ohm
820pF
50V
1 %
0402
10%
COMMON
X7R
0402
COMMON
GND
2
0
15
6
4
3
12
11
9
10
7
8
5
14
1
13
OUT
R763 121ohm
COMMON0402
1 %
FBA_CMD2
FBA_CMD0
FBA_CMD15
FBA_CMD6
FBA_CMD4
FBA_CMD3
FBA_CMD12
FBA_CMD11
FBA_CMD9
FBA_CMD10
FBA_CMD7
FBA_CMD8
FBA_CMD5
FBA_CMD14
FBA_CMD1
FBA_CMD13
FBA_VREFC
FBA_ZQ_1_B
GND
FBVDD
C724
1uF
6.3V
10%
X6S
0402
COMMON
C714
1uF
6.3V
10%
X6S
0402
COMMON
C129
1uF
6.3V
10%
X6S
0402
COMMON
C694
1uF
6.3V
10%
X6S
0402
COMMON
C136
1uF
6.3V
10%
X6S
0402
COMMON
C128
1uF
6.3V
10%
X6S
0402
COMMON
C735
1uF
6.3V
10%
X6S
0402
COMMON
C116
1uF
6.3V
10%
X6S
0402
COMMON
C120
1uF
6.3V
10%
X6S
0402
COMMON
C139
1uF
6.3V
10%
X6S
0402
COMMON
FBVDD
C701
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
10uF
4V
20%
X6S
0603
COMMON
C144
10uF
4V
20%
X6S
0603
COMMON
C153
10uF
4V
20%
X6S
0603
COMMON
C685
10uF
4V
20%
X6S
0603
COMMON
C690
10uF
4V
20%
X6S
0603
COMMON
C733
10uF
4V
20%
X6S
0603
COMMON
C679
22uF
4V
20%
X6S
0603W
COMMON
C676
22uF
4V
20%
X6S
0603W
COMMON
C154
C151
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
GND
C E
C1308
1uF
6.3V
10%
X6S
0402
COMMON
C680
22uF
4V
20%
X6S
0603W
COMMON
C1309
1uF
6.3V
10%
FBVDD
X6S
0402
COMMON
GND
C709
1uF
6.3V
10%
X6S
0402
COMMON
C686
1uF
6.3V
10%
X6S
0402
COMMON
ASSEMBLY
PAGE DETAIL
C697
1uF
6.3V
10%
X6S
0402
COMMON
C704
C720
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
<ASSEMBLY_DESCRIPTION>
MEMORY: FBA[31:0]
C731
1uF
6.3V
10%
X6S
0402
COMMON
C721
1uF
6.3V
10%
X6S
0402
COMMON
MEM_VPP
C1225
C1226
1uF
6.3V
10%
X6S
0402
COMMON
C1227
1uF
6.3V
10%
X6S
0402
COMMON
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBA[31:0]
MEMORY: FBA[31:0]
MEMORY: FBA[31:0]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
5
541Tuesday, June 21, 2016
541Tuesday, June 21, 2016
541Tuesday, June 21, 2016
of
of
of
4.7uF
6.3V
C727
1uF
6.3V
10%
X6S
0402
COMMON
GND
20%
OPTION
X6S
0603
COMMON
UNDER DRAM
FDBA
A B C D E F G H
Page6: MEMORY: FBA Partition 63..32
FBA_D[63..32]
{4}
{4}
{4,5}
{4,5}
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
FBVDD
C725
1uF
6.3V
10%
X6S
0402
COMMON
0402
0402
FBVDD
C691
10uF
4V
20%
X6S
0603
COMMON
0603
0603
1
2
BI
3
4
5
FB_DBI
FBA_DBI[7..0]
BI
FB_EDC
FBA_EDC[7..0]
BI
M8D
@memory.u_mem_gddr5x_x32(sym_1):page6_i139
BGA190
COMMON
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_EDC4
FBA_DBI4
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_EDC5
FBA_DBI5
FBA_WCK45
IN
FBA_WCK45* FBA_WCK67
IN
C138
C131
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
C146
C150
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
B11
DQ8
B12
DQ9
C11
DQ10
C12
DQ11
F11
DQ12
F12
DQ13
G11
DQ14
G12
DQ15
D12
EDC1
E12
DBI1
D4
WCK01
D5
WCK01
BGA_0190_P065_100X140
C121
C703
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C695
C683
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
FBA_DBI0
0
FBA_DBI1
1
FBA_DBI2
2
FBA_DBI3
3
FBA_DBI4
4
FBA_DBI5
5
FBA_DBI6
6
FBA_DBI7
7
FBA_EDC0
0
FBA_EDC1
1
FBA_EDC2
2
FBA_EDC3
3
FBA_EDC4
4
FBA_EDC5
5
FBA_EDC6
6
FBA_EDC7
7
48
49
50
51
52
53
54
55
x16
NC
NC
NC
NC
NC
NC
NC
NC
GND
NC
C133
C736
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C712
10uF
4V
20%
X6S
0603
COMMON
0603
0402
C158
22uF
4V
20%
X6S
0603W
COMMON
C0603
C0603
C143
1uF
6.3V
10%
X6S
0402
COMMON
56
57
58
59
60
61
62
63
{4}
{4}
C722
1uF
6.3V
10%
X6S
0402
COMMON
0402
C142
C677
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
M8C
@memory.u_mem_gddr5x_x32(sym_6):page6_i215
BGA190
COMMON
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
{4,5}
M8A
@memory.u_mem_gddr5x_x32(sym_3):page6_i178
BGA190
COMMON
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_EDC6
FBA_DBI6
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_EDC7
FBA_DBI7
IN
FBA_WCK67*
IN
C117
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
C678
C682
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
GND
NORMAL
V11
V12
U11
U12
P11
P12
N11
N12
T12
R12
x32
V4
V3
U4
U3
P4
P3
N4
N3
T3
R3
T4
T5
BGA_0190_P065_100X140
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
EDC2
DBI2
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
x16
NC
NC
NC
{4}
NC
{4}
NC
NC
NC
NC
NC
NC
{5}
IN
FBVDD
C717
C719
1uF
6.3V
10%
X6S
0402
COMMON
0402
C730
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
IN
IN
IN
0402
GND GND
C708
1uF
6.3V
10%
X6S
0402
COMMON
0402
C126
820pF
50V
10%
X7R
0402
COMMON
0402
FBA_CMD[31..0]
FBA_CLK1
FBA_CLK1*
C729
1uF
6.3V
10%
X6S
0402
COMMON
M8B
@memory.u_mem_gddr5x_x32(sym_5):page6_i213
BGA190
FBA_CMD18
18
FBA_CMD16
16
FBA_CMD31
31
FBA_CMD22
22
FBA_CMD20
20
FBA_CMD19
19
FBA_CMD28
28
FBA_CMD27
27
FBA_CMD25
25
FBA_CMD26
26
FBA_CMD23
23
FBA_CMD24
24
FBA_CMD21
21
FBA_CMD30
30
FBA_CMD17
17
FBA_CMD29
29
FBA_VREFC
121ohm
COMMON
FBA_ZQ_2B
C688
C706
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
R762
0402
1 %
0402
C699
1uF
6.3V
10%
X6S
0402
COMMON
0402
COMMON
H4
RAS
M4
CAS
M11
WE
K4
ABI
J4
A0_A10
J5
A1_A9
J11
A2_BA0
J10
A3_BA3
L11
A4_BA2
L10
A5_BA1
L5
A6_A11
L4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
H11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
K13
VREFC
H13
ZQ
BGA_0190_P065_100X140
MEM_VPP
C1228
C1229
1uF
6.3V
10%
X6S
0402
COMMON
C1241
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
4.7uF
6.3V
20%
OPTION
X6S
0603
COMMON
0603
0402
UNDER DRAM
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
GND
BGA_0190_P065_100X140
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VPP
VPP
FBVDD
A1
A11
A14
A4
D10
G1
G14
H10
H5
J1
J14
L1
L14
M10
M5
N1
N14
T10
W1
W11
W14
W4
FBVDD
A13
A2
B10
B5
C1
C13
C14
C2
E1
E11
E13
E14
E2
E4
F10
F5
G13
G2
H12
H3
J13
J2
L13
L2
M12
M3
N13
N2
P10
P5
R1
R11
R13
R14
R2
R4
U1
U13
U14
U2
V10
V5
W13
W2
MEM_VPP
A3
W3
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBA[63:32]
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBA[63:32]
MEMORY: FBA[63:32]
MEMORY: FBA[63:32]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
641Tuesday, June 21, 2016
641Tuesday, June 21, 2016
641Tuesday, June 21, 2016
of
of
of
A B C D E F G H
Page7: MEMORY: FBB Partition 31..0
1
BI
2
3
{4}
{4}
4
FBB_D[31..0]
FBB_D0
0
FBB_D1
1
FBB_D2
2
FBB_D3
3
FBB_D4
4
FBB_D5
5
FBB_D6
6
FBB_D7
7
FBB_D8
8
FBB_D9
9
FBB_D10
10
FBB_D11
11
FBB_D12
12
FBB_D13
13
FBB_D14
14
FBB_D15
15
IN
IN
FBB_EDC0
FBB_DBI0
FBB_EDC1
FBB_DBI1
FBB_WCK01
FBB_WCK01*
{4,8}
{4,8}
M5D
@memory.u_mem_gddr5x_x32(sym_2):page7_i151
BGA190_MIRR
COMMON
MIRRORED
x32
x16
V4
DQ0
V3
DQ1
U4
DQ2
U3
DQ3
P4
DQ4
P3
DQ5
N4
DQ6
N3
DQ7
T3
EDC0
R3
DBI0
V11
DQ8
V12
DQ9
U11
DQ10
U12
DQ11
P11
DQ12
P12
DQ13
N11
DQ14
N12
DQ15
T12
EDC1
R12
DBI1
T4
WCK01
T5
WCK01
BGA_0190_P065_100X140
{5,10,12,22}
FB_DBI
FBB_DBI[7..0]
BI
FB_EDC
FBB_EDC[7..0]
BI
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
{4}
{4}
GPIO10_FBVREF_SEL
IN
FBB_DBI0
0
FBB_DBI1
1
FBB_DBI2
2
FBB_DBI3
3
FBB_DBI4
4
FBB_DBI5
5
FBB_DBI6
6
FBB_DBI7
7
FBB_EDC0
0
FBB_EDC1
1
FBB_EDC2
2
FBB_EDC3
3
FBB_EDC4
4
FBB_EDC5
5
FBB_EDC6
6
FBB_EDC7
7
FBB_D16
16
FBB_D17
17
FBB_D18
18
FBB_D19
19
FBB_D20
20
FBB_D21
21
FBB_D22
22
FBB_D23
23
FBB_D24
24
FBB_D25
25
FBB_D26
26
FBB_D27
27
FBB_D28
28
FBB_D29
29
FBB_D30
30
FBB_D31
31
FBB_EDC3
FBB_DBI3
FBB_WCK23
IN
FBB_WCK23*
IN
1G1D1S
G
1
FBB_EDC2
FBB_DBI2
3
D
Q12
@discrete.q_fet_n_enh(sym_2):page7_i200
SOT23_1G1D1S
COMMON
S
2
20V
6.5A
22mohm@10V / 22mohm@4.5V / 22mohm@2.5V
6.5A
1.4W
8V
AO3416L
SOT23
GND
B11
B12
C11
C12
F11
F12
G11
G12
D12
E12
B4
B3
C4
C3
F4
F3
G4
G3
D3
E3
D4
D5
0.350
{4,8}
M5A
@memory.u_mem_gddr5x_x32(sym_4):page7_i202
BGA190_MIRR
COMMON
MIRRORED
x32
x16
DQ16
NC
DQ17
NC
DQ18
NC
DQ19
NC
DQ20
NC
DQ21
NC
DQ22
NC
DQ23
NC
EDC2
GND
DBI2
NC
{4}
{4}
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
BGA_0190_P065_100X140
1.05V
FBB_VREF_Q
FBVDD
0402
0402
R50
549ohm
1 %
0402
COMMON
R51
1.33k
1 %
0402
COMMON
GND
FBB_CMD[31..0]
IN
FBB_CLK0
IN
FBB_CLK0*
IN
0.350 1.05V
C109
R53
820pF
931ohm
50V
1 %
0402
10%
COMMON
X7R
0402
COMMON
0402
0402
GND
2
0
15
6
4
3
12
11
9
10
7
8
5
14
1
13
OUT
R778 121ohm
0402
COMMON
1 %
0402
FBB_CMD2
FBB_CMD0
FBB_CMD15
FBB_CMD6
FBB_CMD4
FBB_CMD3
FBB_CMD12
FBB_CMD11
FBB_CMD9
FBB_CMD10
FBB_CMD7
FBB_CMD8
FBB_CMD5
FBB_CMD14
FBB_CMD1
FBB_CMD13
FBB_ZQ_1_B
FBB_VREFC
GND
M4
H4
H11
K4
L4
L5
L11
L10
J11
J10
J5
J4
K5
K12
K2
M11
K11
K10
M2
M13
A12
H2
{8}
K13
H13
M5B
@memory.u_mem_gddr5x_x32(sym_5):page7_i213
BGA190_MIRR
COMMON
RAS
CAS
WE
ABI
A0_A10
A1_A9
A2_BA0
A3_BA3
A4_BA2
A5_BA1
A6_A11
A7_A8
A12_A13
A15_A14
RESET
CKE
CLK
CLK
TCK
TDI
TDO
TMS
VREFC
ZQ
BGA_0190_P065_100X140
GND
M5C
@memory.u_mem_gddr5x_x32(sym_7):page7_i234
BGA190_MIRR
COMMON
Mirrored
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
BGA_0190_P065_100X140
add 1k to VDD
FBVDD
W12
MF
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VPP
VPP
FBVDD
A13
A2
B10
B5
C1
C13
C14
C2
E1
E11
E13
E14
E2
E4
F10
F5
G13
G2
H12
H3
J13
J2
L13
L2
M12
M3
N13
N2
P10
P5
R1
R11
R13
R14
R2
R4
U1
U13
U14
U2
V10
V5
W13
W2
MEM_VPP
A3
W3
1
2
3
4
FBVDD
C102
C107
C111
C804
C741
C743
1uF
1uF
6.3V
10%
X6S
0402
COMMON
0402
1uF
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C742
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
FBVDD
C103
C803
C100
C739
C802
10uF
10uF
4V
20%
X6S
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
0603
COMMON
0603
10uF
4V
20%
X6S
0603
COMMON
0603
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C801
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C110
C108
1uF
6.3V
10%
X6S
0402
COMMON
0402
C772
22uF
4V
20%
X6S
0603W
COMMON
C0603
C101
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C104
C105
C751
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
C779
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMMON
COMMON
C0603
C0603
GND
C E
ASSEMBLY
PAGE DETAIL
FBVDD
C768
1uF
6.3V
10%
X6S
0402
COMMON
0402
0402
<ASSEMBLY_DESCRIPTION>
MEMORY: FBB[31:0]
C759
1uF
6.3V
10%
X6S
0402
COMMON
MEM_VPP
C1242
C1243
1uF
6.3V
10%
X6S
0402
COMMON
C1276
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
C770
1uF
6.3V
10%
X6S
0402
COMMON
0402
C774
C762
C765
C756
1uF
1uF
6.3V
10%
X6S
0402
COMMON
0402
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C760
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
4.7uF
6.3V
20%
OPTION
X6S
0603
COMMON
0603
0402
UNDER DRAM
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBB[31:0]
MEMORY: FBB[31:0]
MEMORY: FBB[31:0]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
741Tuesday, June 21, 2016
741Tuesday, June 21, 2016
741Tuesday, June 21, 2016
of
of
of
A B C D E F G H
Page8: MEMORY: FBB Partition 63..32
{4,7}
1
{4,7}
FBB_D[63..32]
2
3
4
5
BI
{4}
{4}
FB_DBI
FBB_DBI[7..0]
BI
FB_EDC
FBB_EDC[7..0]
BI
FBB_D32
32
FBB_D33
33
FBB_D34
34
FBB_D35
35
FBB_D36
36
FBB_D37
37
FBB_D38
38
FBB_D39
39
40
41
42
43
44
45
46
47
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_EDC4
FBB_DBI4
FBB_EDC5
FBB_DBI5
FBB_WCK45
IN
FBB_WCK45*
IN
FBVDD
C723
C137
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
0402
FBVDD
C155
C696
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
0603
FBB_DBI0
0
FBB_DBI1
1
FBB_DBI2
2
FBB_DBI3
3
FBB_DBI4
4
FBB_DBI5
5
FBB_DBI6
6
FBB_DBI7
7
FBB_EDC0
0
FBB_EDC1
1
FBB_EDC2
2
FBB_EDC3
3
FBB_EDC4
4
FBB_EDC5
5
FBB_EDC6
6
FBB_EDC7
7
M6D
@memory.u_mem_gddr5x_x32(sym_1):page8_i142
BGA190
COMMON
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
B11
DQ8
B12
DQ9
C11
DQ10
C12
DQ11
F11
DQ12
F12
DQ13
G11
DQ14
G12
DQ15
D12
EDC1
E12
DBI1
D4
WCK01
D5
WCK01
BGA_0190_P065_100X140
C115
C141
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
C152
C148
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
1
M6C
@memory.u_mem_gddr5x_x32(sym_6):page8_i215
BGA190
COMMON
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
GND
BGA_0190_P065_100X140
C1280
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
C716
1uF
6.3V
10%
X6S
0402
COMMON
0402
M6B
@memory.u_mem_gddr5x_x32(sym_5):page8_i186
BGA190
COMMON
H4
RAS
M4
CAS
M11
WE
K4
ABI
J4
A0_A10
J5
A1_A9
J11
A2_BA0
J10
A3_BA3
L11
A4_BA2
L10
A5_BA1
L5
A6_A11
L4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
H11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
K13
VREFC
H13
ZQ
BGA_0190_P065_100X140
C698
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
C687
1uF
6.3V
10%
X6S
0402
COMMON
MEM_VPP
C1183
C1184
4.7uF
1uF
6.3V
6.3V
10%
20%
OPTION
0603
UNDER DRAM
X6S
0603
COMMON
X6S
0402
COMMON
0402
{4,7}
M6A
@memory.u_mem_gddr5x_x32(sym_3):page8_i180
BGA190
COMMON
FBB_D48
48
FBB_D49
49
FBB_D50
50
FBB_D51
51
FBB_D52
52
FBB_D53
53
FBB_D54
54
FBB_D55
55
{4}
{4}
C0603
C135
1uF
6.3V
10%
X6S
0402
COMMON
C681
22uF
4V
20%
X6S
0603W
COMMON
56
57
58
59
60
61
62
63
C715
1uF
6.3V
10%
X6S
0402
COMMON
0402
C156
22uF
4V
20%
X6S
0603W
COMMON
C0603
x16
NC
NC
NC
NC
NC
NC
NC
NC
GND
NC
C130
C702
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
0402
C684
C689
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
FBB_EDC6
FBB_DBI6
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63
FBB_EDC7
FBB_DBI7
FBB_WCK67
IN
FBB_WCK67*
IN
C734
C119
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C675
C674
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
V11
V12
U11
U12
P11
P12
N11
N12
T12
R12
V4
V3
U4
U3
P4
P3
N4
N3
T3
R3
T4
T5
C0603
GND
NORMAL
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
EDC2
DBI2
x32
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
BGA_0190_P065_100X140
{7}
C732
22uF
4V
20%
X6S
0603W
COMMON
x16
NC
NC
NC
NC
{4}
NC
{4}
NC
NC
NC
NC
NC
IN
FBVDD
0402
IN
IN
IN
0402
GND GND
C726
1uF
6.3V
10%
X6S
0402
COMMON
FBB_CMD[31..0]
FBB_CMD18
18
FBB_CMD16
16
FBB_CMD31
31
FBB_CMD22
22
FBB_CMD20
20
FBB_CMD19
19
FBB_CMD28
28
FBB_CMD27
27
FBB_CMD25
25
FBB_CMD26
26
FBB_CMD23
23
FBB_CMD24
24
FBB_CMD21
21
FBB_CMD30
30
FBB_CMD17
17
FBB_CMD29
FBB_CLK1
FBB_CLK1*
C124
820pF
50V
10%
X7R
0402
COMMON
C728
1uF
6.3V
10%
X6S
0402
COMMON
0402
29
FBB_VREFC
COMMON
C718
1uF
6.3V
10%
X6S
0402
COMMON
FBB_ZQ_2B
C705
1uF
6.3V
10%
X6S
0402
COMMON
0402
0402
R761
121ohm
0402
1 %
0402
C707
1uF
6.3V
10%
X6S
0402
COMMON
0402
0402
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VPP
VPP
FBVDD
A1
A11
A14
A4
D10
G1
G14
H10
H5
J1
J14
L1
L14
M10
M5
N1
N14
T10
W1
W11
W14
W4
FBVDD
A13
A2
B10
B5
C1
C13
C14
C2
E1
E11
E13
E14
E2
E4
F10
F5
G13
G2
H12
H3
J13
J2
L13
L2
M12
M3
N13
N2
P10
P5
R1
R11
R13
R14
R2
R4
U1
U13
U14
U2
V10
V5
W13
W2
MEM_VPP
A3
W3
2
3
4
ASSEMBLY
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C E
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
MEMORY: FBB[63:32]
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBB[63:32]
MEMORY: FBB[63:32]
MEMORY: FBB[63:32]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
841Tuesday, June 21, 2016
841Tuesday, June 21, 2016
841Tuesday, June 21, 2016
of
of
of
A B C D E F G H
Page9: MEMORY: GPU Partition C/D
1
FB_DATA
{10,11}
2
3
{10,11}
{10,11}
4
FBC_D[63..0]
BI
FB_DBI
FBC_DBI[7..0]
BI
FB_EDC
FBC_EDC[7..0]
IN
FBC_D0
0
FBC_D1
1
FBC_D2
2
FBC_D3
3
FBC_D4
4
FBC_D5
5
FBC_D6
6
FBC_D7
7
FBC_D8
8
FBC_D9
9
FBC_D10
10
FBC_D11
11
FBC_D12
12
FBC_D13
13
FBC_D14
14
FBC_D15
15
FBC_D16
16
FBC_D17
17
FBC_D18
18
FBC_D19
19
FBC_D20
20
FBC_D21
21
FBC_D22
22
FBC_D23
23
FBC_D24
24
FBC_D25
25
FBC_D26
26
FBC_D27
27
FBC_D28
28
FBC_D29
29
FBC_D30
30
FBC_D31
31
FBC_D32
32
FBC_D33
33
FBC_D34
34
FBC_D35
35
FBC_D36
36
FBC_D37
37
FBC_D38
38
FBC_D39
39
FBC_D40
40
FBC_D41
41
FBC_D42
42
FBC_D43
43
FBC_D44
44
FBC_D45
45
FBC_D46
46
FBC_D47
47
FBC_D48
48
FBC_D49
49
FBC_D50
50
FBC_D51
51
FBC_D52
52
FBC_D53
53
FBC_D54
54
FBC_D55
55
FBC_D56
56
FBC_D57
57
FBC_D58
58
FBC_D59
59
FBC_D60
60
FBC_D61
61
FBC_D62
62
FBC_D63
63
FBC_DBI0
0
FBC_DBI1
1
FBC_DBI2
2
FBC_DBI3
3
FBC_DBI4
4
FBC_DBI5
5
FBC_DBI6
6
FBC_DBI7
7
FBC_EDC0
0
FBC_EDC1
1
FBC_EDC2
2
FBC_EDC3
3
FBC_EDC4
4
FBC_EDC5
5
FBC_EDC6
6
FBC_EDC7
7
GND
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
G1D
@digital.u_gpu_gb4_256(sym_4):page9_i2072
BGA2152
COMMON
4/23 FBC
C6
FBC_D0
D6
FBC_D1
A6
FBC_D2
B6
FBC_D3
B4
FBC_D4
A4
FBC_D5
B3
FBC_D6
C4
FBC_D7
D9
FBC_D8
C9
FBC_D9
E9
FBC_D10
B9
FBC_D11
B8
FBC_D12
A8
FBC_D13
F6
FBC_D14
E6
FBC_D15
F18
FBC_D16
G18
FBC_D17
E18
FBC_D18
H18
FBC_D19
D15
FBC_D20
E15
FBC_D21
G17
FBC_D22
H17
FBC_D23
J15
FBC_D24
H15
FBC_D25
E14
FBC_D26
F14
FBC_D27
H11
FBC_D28
G11
FBC_D29
F11
FBC_D30
E11
FBC_D31
J29
FBC_D32
F30
FBC_D33
H29
FBC_D34
G30
FBC_D35
B30
FBC_D36
A30
FBC_D37
H30
FBC_D38
C30
FBC_D39
D27
FBC_D40
J26
FBC_D41
F27
FBC_D42
G27
FBC_D43
C27
FBC_D44
B27
FBC_D45
A27
FBC_D46
G29
FBC_D47
H20
FBC_D48
D18
FBC_D49
G20
FBC_D50
E20
FBC_D51
F23
FBC_D52
E21
FBC_D53
D21
FBC_D54
E23
FBC_D55
G24
FBC_D56
H26
FBC_D57
F24
FBC_D58
G26
FBC_D59
F26
FBC_D60
D26
FBC_D61
B26
FBC_D62
C26
FBC_D63
A5
FBC_DQM0
C8
FBC_DQM1
J18
FBC_DQM2
F12
FBC_DQM3
D29
FBC_DQM4
E27
FBC_DQM5
F20
FBC_DQM6
E26
FBC_DQM7
D5
FBC_DQS_WP0
D8
FBC_DQS_WP1
E17
FBC_DQS_WP2
E12
FBC_DQS_WP3
E30
FBC_DQS_WP4
B29
FBC_DQS_WP5
G21
FBC_DQS_WP6
E24
FBC_DQS_WP7
Y25
GND
Y26
GND
Y27
GND
Y28
GND
Y29
GND
Y30
GND
Y31
GND
Y32
GND
FB_CMD
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
FBC_CMD32
FBC_CMD33
FBC_CMD34
FBC_CMD35
FBC_DBG_RFU1
FBC_DBG_RFU2
FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1
FBC_WCK01
FBC_WCK01
FBC_WCKB01
FBC_WCKB01
FBC_WCK23
FBC_WCK23
FBC_WCKB23
FBC_WCKB23
FBC_WCK45
FBC_WCK45
FBC_WCKB45
FBC_WCKB45
FBC_WCK67
FBC_WCK67
FBC_WCKB67
FBC_WCKB67
FBC_PLL_AVDD
FBC_CMD0
C11
FBC_CMD1
B11
FBC_CMD2
A11
FBC_CMD3
D11
FBC_CMD4
A12
FBC_CMD5
B12
FBC_CMD6
C12
FBC_CMD7
C14
FBC_CMD8
B14
FBC_CMD9
A14
FBC_CMD10
D14
FBC_CMD11
A15
FBC_CMD12
B15
FBC_CMD13
C15
FBC_CMD14
C17
FBC_CMD15
B17
FBC_CMD16
B24
FBC_CMD17
A24
FBC_CMD18
D23
FBC_CMD19
A23
FBC_CMD20
B23
FBC_CMD21
C23
FBC_CMD22
C21
FBC_CMD23
B21
FBC_CMD24
A21
FBC_CMD25
D20
FBC_CMD26
A20
FBC_CMD27
B20
FBC_CMD28
C20
FBC_CMD29
C18
FBC_CMD30
B18
FBC_CMD31
A18
D17
A17
FBC_DEBUG0
A9
FBC_DEBUG1
C24
J14
J23
FBC_CLK0
G15
FBC_CLK0*
F15
FBC_CLK1
H21
FBC_CLK1*
J21
FBC_WCK01
F8
FBC_WCK01*
G8
G9
F9
FBC_WCK23
H12
FBC_WCK23*
G12
G14
H14
FBC_WCK45
J27
FBC_WCK45*
H27
E29
F29
FBC_WCK67
G23
FBC_WCK67*
H23
H24
J24
1V8_FB_PLL 1V8_FB_PLL
L17
FBC_CMD[31..0]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R802
60.4ohm/NC R823 60.4ohm/NC
R792
DNI0402
1 %
0402
1 %
FBC_CLK0
FB_CLK
FBC_CLK0
FB_CLK
FBC_CLK1
FB_CLK
FBC_CLK1
FB_CLK
FBC_WCK01
FB_WCK
FBC_WCK01
FB_WCK
FBC_WCK23
FB_WCK
FBC_WCK23
FB_WCK
FBC_WCK45
FB_WCK
FBC_WCK45
FB_WCK
FBC_WCK67
FB_WCK
FBC_WCK67
FB_WCK
IN
C789
0.1uF
16V
10%
X7R
0402
COMMON
GND
R825
10k
5 %
0402
FBC_CMD13
FBC_CMD29
FBC_CMD1
FBC_CMD17
COMMON
R790
10k
5 %
0402
COMMON
C E
60.4ohm/NC
DNI
OUT
OUT
OUT
OUT
{4,9}
ASSEMBLY
PAGE DETAIL
OUT
FBVDD
GND
FBVDD
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
R789
10k
5 %
0402
COMMON
R826
10k
5 %
0402
COMMON
{10,11}
{12,13}
GDDR5x CMD Mapping
CMD
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15 WE*
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30
CMD31
{10}
{10}
{11}
{11}
{10}
{10}
{10}
{10}
{11}
{11}
{12,13}
{11}
{11}
{12,13}
FBD_CMD13
FBD_CMD29
FBD_CMD1
FBD_CMD17
<ASSEMBLY_DESCRIPTION>
MEMORY: GPU Partition C/D
0..31
CAS*
RST*
RAS*
A1_A9
A0_A10
A12_A13
ABI*
A6_A11
A7_A8
A4_BA2
A5_BA1
A3_BA3
A2_BA0
CKE*
A14_A15
R870
10k
5 %
0402
COMMON
R860
10k
5 %
0402
COMMON
32..63
CAS*
RST*
RAS*
A1_A9
A0_A10
A12_A13
ABI*
A6_A11
A7_A8
A4_BA2
A5_BA1
A3_BA3
A2_BA0
CKE*
A14_A15
WE*
G1E
@digital.u_gpu_gb4_256(sym_5):page9_i2073
BGA2152
FB_DATA
FBD_D[63..0]
BI
FB_DBI
FBD_DBI[7..0]
BI
FB_EDC
FBD_EDC[7..0]
IN
FBD_D0
0
FBD_D1
1
FBD_D2
2
FBD_D3
3
FBD_D4
4
FBD_D5
5
FBD_D6
6
FBD_D7
7
FBD_D8
8
FBD_D9
9
FBD_D10
10
FBD_D11
11
FBD_D12
12
FBD_D13
13
FBD_D14
14
FBD_D15
15
FBD_D16
16
FBD_D17
17
FBD_D18
18
FBD_D19
19
FBD_D20
20
FBD_D21
21
FBD_D22
22
FBD_D23
23
FBD_D24
24
FBD_D25
25
FBD_D26
26
FBD_D27
27
FBD_D28
28
FBD_D29
29
FBD_D30
30
FBD_D31
31
FBD_D32
32
FBD_D33
33
FBD_D34
34
FBD_D35
35
FBD_D36
36
FBD_D37
37
FBD_D38
38
FBD_D39
39
FBD_D40
40
FBD_D41
41
FBD_D42
42
FBD_D43
43
FBD_D44
44
FBD_D45
45
FBD_D46
46
FBD_D47
47
FBD_D48
48
FBD_D49
49
FBD_D50
50
FBD_D51
51
FBD_D52
52
FBD_D53
53
FBD_D54
54
FBD_D55
55
FBD_D56
56
FBD_D57
57
FBD_D58
58
FBD_D59
59
FBD_D60
60
FBD_D61
61
FBD_D62
62
FBD_D63
63
FBD_DBI0
0
FBD_DBI1
1
FBD_DBI2
2
FBD_DBI3
3
FBD_DBI4
4
FBD_DBI5
5
FBD_DBI6
6
FBD_DBI7
7
FBD_EDC0
0
FBD_EDC1
1
FBD_EDC2
2
FBD_EDC3
3
FBD_EDC4
4
FBD_EDC5
5
FBD_EDC6
6
FBD_EDC7
7
FBVDD
R873
10k
5 %
0402
COMMON
R859
10k
5 %
0402
COMMON
GND
AK8
AK4
AK2
AK3
AK5
AK6
AK9
AK7
AG4
AF9
AG6
AG7
AJ4
AJ5
AJ6
AG5
AA6
AA5
AC5
AC4
AD7
AC6
AF6
AD6
AF7
AF8
AF2
AF3
AJ1
AG1
AA7
AD5
AJ3
AG2
AA9
AF4
Y33
Y34
Y35
Y36
Y37
Y38
Y39
Y6
Y5
V5
Y4
F4
E1
F3
F5
D2
D1
C3
C2
J5
J4
L8
J2
F1
F2
H4
H5
V7
V8
V6
V9
U4
R5
R6
U8
P6
R9
P4
P5
L7
L6
L4
L5
D3
H3
U5
M9
E3
H2
U6
M5
Y9
COMMON
5/23 FBD
FBD_D0
FBD_D1
FBD_D2
FBD_D3
FBD_D4
FBD_D5
FBD_D6
FBD_D7
FBD_D8
FBD_D9
FBD_D10
FBD_D11
FBD_D12
FBD_D13
FBD_D14
FBD_D15
FBD_D16
FBD_D17
FBD_D18
FBD_D19
FBD_D20
FBD_D21
FBD_D22
FBD_D23
FBD_D24
FBD_D25
FBD_D26
FBD_D27
FBD_D28
FBD_D29
FBD_D30
FBD_D31
FBD_D32
FBD_D33
FBD_D34
FBD_D35
FBD_D36
FBD_D37
FBD_D38
FBD_D39
FBD_D40
FBD_D41
FBD_D42
FBD_D43
FBD_D44
FBD_D45
FBD_D46
FBD_D47
FBD_D48
FBD_D49
FBD_D50
FBD_D51
FBD_D52
FBD_D53
FBD_D54
FBD_D55
FBD_D56
FBD_D57
FBD_D58
FBD_D59
FBD_D60
FBD_D61
FBD_D62
FBD_D63
FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQM4
FBD_DQM5
FBD_DQM6
FBD_DQM7
FBD_DQS_WP0
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_DQS_WP4
FBD_DQS_WP5
FBD_DQS_WP6
FBD_DQS_WP7
GND
GND
GND
GND
GND
GND
GND
GND
GP104
FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
FBD_CMD5
FBD_CMD6
FBD_CMD7
FBD_CMD8
FBD_CMD9
FBD_CMD10
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD19
FBD_CMD20
FBD_CMD21
FBD_CMD22
FBD_CMD23
FBD_CMD24
FBD_CMD25
FBD_CMD26
FBD_CMD27
FBD_CMD28
FBD_CMD29
FBD_CMD30
FBD_CMD31
FBD_CMD32
FBD_CMD33
FBD_CMD34
FBD_CMD35
FBD_DBG_RFU1
FBD_DBG_RFU2
FBD_CLK0
FBD_CLK0
FBD_CLK1
FBD_CLK1
FBD_WCK01
FBD_WCK01
FBD_WCKB01
FBD_WCKB01
FBD_WCK23
FBD_WCK23
FBD_WCKB23
FBD_WCKB23
FBD_WCK45
FBD_WCK45
FBD_WCKB45
FBD_WCKB45
FBD_WCK67
FBD_WCK67
FBD_WCKB67
FBD_WCKB67
FBD_PLL_AVDD
FBD_CMD1
AD1
FBD_CMD2
AD4
FBD_CMD3
AC1
FBD_CMD4
AC2
FBD_CMD5
AC3
FBD_CMD6
AA3
FBD_CMD7
AA2
FBD_CMD8
AA1
FBD_CMD9
AA4
FBD_CMD10
Y1
FBD_CMD11
Y2
FBD_CMD12
Y3
FBD_CMD13
V3
FBD_CMD14
V2
FBD_CMD15
V1
FBD_CMD16
L3
FBD_CMD17
L2
FBD_CMD18
L1
FBD_CMD19
M4
FBD_CMD20
M1
FBD_CMD21
M2
FBD_CMD22
M3
FBD_CMD23
P3
FBD_CMD24
P2
FBD_CMD25
P1
FBD_CMD26
R4
FBD_CMD27
R1
FBD_CMD28
R2
FBD_CMD29
R3
FBD_CMD30
U3
FBD_CMD31
U2
U1
V4
FBD_DEBUG0
AD3
FBD_DEBUG1
J3
AC9
P9
FBD_CLK0
Y8
FBD_CLK0*
Y7
FBD_CLK1
R8
FBD_CLK1*
R7
FBD_WCK01
AJ8
FBD_WCK01*
AJ7
AG8
AG9
FBD_WCK23
AD8
FBD_WCK23*
AD9
AC7
AC8
FBD_WCK45
J6
FBD_WCK45*
J7
H7
H6
FBD_WCK67
P8
FBD_WCK67*
P7
M7
M8
V11
C958
0.1uF
16V
10%
X7R
0402
COMMON
FBD_CMD0
AD2
GND
GP106
UNUSED
FBD
FBD_CLK0
FBD_CLK0
FBD_CLK1
FBD_CLK1
FBD_WCK01
FBD_WCK01
FBD_WCK23
FBD_WCK23
FBD_WCK45
FBD_WCK45
FBD_WCK67
FBD_WCK67
IN
FB_CMD
FBD_CMD[31..0]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
DNI
0402
1 %
FB_CLK
FB_CLK
FB_CLK
FB_CLK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
FB_WCK
R824 60.4ohm/NC
DNI0402
1 %
OUT
FBVDD
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
{4,9}
{12,13}
{12}
{12}
{13}
{13}
{12}
{12}
{12}
{12}
{13}
{13}
{13}
{13}
1
2
3
4
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
FDBA
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: GPU Partition C/D
MEMORY: GPU Partition C/D
MEMORY: GPU Partition C/D
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
941Tuesday, June 21, 2016
941Tuesday, June 21, 2016
941Tuesday, June 21, 2016
of
of
of
A B C D E F G H
Page10: MEMORY: FBC Partition 31..0
FB_DBI
1
{9,11}
{9,11}
{9}
2
BI
3
FBC_D[31..0]
FBC_D0
0
FBC_D1
1
FBC_D2
2
FBC_D3
3
FBC_D4
4
FBC_D5
5
FBC_D6
6
FBC_D7
7
FBC_D8
8
FBC_D9
9
FBC_D10
10
FBC_D11
11
FBC_D12
12
FBC_D13
13
FBC_D14
14
FBC_D15
15
{9}
{9}
IN
IN
FBC_EDC0
FBC_DBI0
FBC_EDC1
FBC_DBI1
FBC_WCK01
FBC_WCK01*
V4
V3
U4
U3
P4
P3
N4
N3
T3
R3
V11
V12
U11
U12
P11
P12
N11
N12
T12
R12
T4
T5
4
FBVDD
C79
C86
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C78
C84
1uF
6.3V
10%
X6S
0402
COMMON
0402
C991
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
FBVDD
C1024
C81
10uF
4V
20%
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
X6S
0603
COMMON
0603
C77
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C1022
C1023
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
FBC_DBI[7..0]
BI
FB_EDC
FBC_EDC[7..0]
BI
M3D
@memory.u_mem_gddr5x_x32(sym_2):page10_i153
BGA190_MIRR
COMMON
MIRRORED
x32
x16
DQ0
NC
DQ1
NC
DQ2
NC
DQ3
NC
DQ4
NC
DQ5
NC
DQ6
NC
DQ7
NC
EDC0
NC
DBI0
NC
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
EDC1
DBI1
WCK01
WCK01
BGA_0190_P065_100X140
{5,7,12,22}
C1025
C992
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C990
10uF
4V
20%
X6S
0603
COMMON
0603
C0603
C1015
22uF
4V
20%
X6S
0603W
COMMON
FBC_DBI0
0
FBC_DBI1
1
FBC_DBI2
2
FBC_DBI3
3
FBC_DBI4
4
FBC_DBI5
5
FBC_DBI6
6
FBC_DBI7
7
FBC_EDC0
0
FBC_EDC1
1
FBC_EDC2
2
FBC_EDC3
3
FBC_EDC4
4
FBC_EDC5
5
FBC_EDC6
6
FBC_EDC7
7
FBC_D16
16
FBC_D17
17
FBC_D18
18
FBC_D19
19
FBC_D20
20
FBC_D21
21
FBC_D22
22
FBC_D23
23
FBC_EDC2
FBC_DBI2
FBC_D24
24
FBC_D25
25
FBC_D26
26
FBC_D27
27
FBC_D28
28
FBC_D29
29
FBC_D30
30
FBC_D31
31
FBC_EDC3
FBC_DBI3
{9}
{9}
GPIO10_FBVREF_SEL
IN
C993
C88
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C82
C83
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
FBC_WCK23
IN
FBC_WCK23*
IN
1G1D1S
1
C87
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
C996
22uF
4V
20%
X6S
0603W
COMMON
C0603
C0603
GND
3
D
Q10
@discrete.q_fet_n_enh(sym_2):page10_i201
SOT23_1G1D1S
G
COMMON
S
2
20V
6.5A
22mohm@10V / 22mohm@4.5V / 22mohm@2.5V
6.5A
1.4W
8V
SOT23
GND
C1020
22uF
4V
20%
X6S
0603W
COMMON
AO3416L
B11
B12
C11
C12
F11
F12
G11
G12
D12
E12
B4
B3
C4
C3
F4
F3
G4
G3
D3
E3
D4
D5
{9,11}
M3A
@memory.u_mem_gddr5x_x32(sym_4):page10_i202
BGA190_MIRR
COMMON
MIRRORED
x32
x16
DQ16
NC
DQ17
NC
DQ18
NC
DQ19
NC
DQ20
NC
DQ21
NC
DQ22
NC
DQ23
NC
EDC2
GND
{9}
DBI2
NC
{9}
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
BGA_0190_P065_100X140
1.05V
0.350
C E
FBVDD
0402
ASSEMBLY
PAGE DETAIL
FBC_VREF_Q
C1013
1uF
6.3V
10%
X6S
0402
COMMON
FBVDD
0402
0402
R47
549ohm
1 %
0402
COMMON
R48
1.33k
1 %
0402
COMMON
GND
0402
IN
IN
IN
R49
931ohm
1 %
0402
COMMON
0402
C1002
C1004
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
<ASSEMBLY_DESCRIPTION>
MEMORY: FBC[31:0]
FBC_CMD[31..0]
0.350 1.05V
0402
GND
0402
FBC_CLK0
FBC_CLK0*
C85
820pF
50V
10%
X7R
0402
COMMON
C1008
1uF
6.3V
10%
X6S
0402
COMMON
GND
0402
2
0
15
6
4
3
12
11
9
10
7
8
5
14
1
13
OUT
R803 121ohm
0402 COMMON
1 %
0402
C1016
1uF
6.3V
10%
X6S
0402
COMMON
0402
FBC_CMD2
FBC_CMD0
FBC_CMD15
FBC_CMD6
FBC_CMD4
FBC_CMD3
FBC_CMD12
FBC_CMD11
FBC_CMD9
FBC_CMD10
FBC_CMD7
FBC_CMD8
FBC_CMD5
FBC_CMD14
FBC_CMD1
FBC_CMD13
C999
1uF
6.3V
10%
X6S
0402
COMMON
0402
FBC_VREFC
FBC_ZQ_1_B
C1010
1uF
6.3V
10%
X6S
0402
COMMON
M4
H4
H11
K4
L4
L5
L11
L10
J11
J10
J5
J4
K5
K12
K2
M11
K11
K10
M2
M13
A12
H2
{11}
K13
H13
C1014
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
M3B
@memory.u_mem_gddr5x_x32(sym_5):page10_i213
BGA190_MIRR
COMMON
RAS
CAS
WE
ABI
A0_A10
A1_A9
A2_BA0
A3_BA3
A4_BA2
A5_BA1
A6_A11
A7_A8
A12_A13
A15_A14
RESET
CKE
CLK
CLK
TCK
TDI
TDO
TMS
VREFC
ZQ
BGA_0190_P065_100X140
1
M3C
@memory.u_mem_gddr5x_x32(sym_7):page10_i234
BGA190_MIRR
COMMON
Mirrored
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
GND
BGA_0190_P065_100X140
MEM_VPP
C1300
C1301
C1189
1uF
6.3V
10%
X6S
0402
COMMON
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
G
4.7uF
6.3V
20%
OPTION
X6S
0603
COMMON
0603
0402
UNDER DRAM
FDBA
MF
add 1k to VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VPP
VPP
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Custom
Custom
Custom
FBVDD
W12
A1
A11
A14
A4
D10
G1
G14
H10
H5
J1
J14
L1
L14
M10
M5
N1
N14
T10
W1
W11
W14
W4
FBVDD
A13
A2
B10
B5
C1
C13
C14
C2
E1
E11
E13
E14
E2
E4
F10
F5
G13
G2
H12
H3
J13
J2
L13
L2
M12
M3
N13
N2
P10
P5
R1
R11
R13
R14
R2
R4
U1
U13
U14
U2
V10
V5
W13
W2
MEM_VPP
A3
W3
2
3
4
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBC[31:0]
MEMORY: FBC[31:0]
MEMORY: FBC[31:0]
Design By:
Design By:
Design By:
Neston V10
Neston V10
P45Z
P45Z
P45Z
Neston V10
10 41Tuesday, June 21, 2016
10 41Tuesday, June 21, 2016
10 41Tuesday, June 21, 2016
of
of
of
A B C D E F G H
Page11: MEMORY: FBC Partition 63..32
1
BI
FBC_D[63..32]
2
3
{9,10}
{9,10}
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
{9}
{9}
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
IN
IN
FBC_EDC4
FBC_DBI4
FBC_EDC5
FBC_DBI5
FBC_WCK45
FBC_WCK45*
BI
BI
FB_DBI
FBC_DBI[7..0]
FB_EDC
FBC_EDC[7..0]
M4D
@memory.u_mem_gddr5x_x32(sym_1):page11_i140
BGA190
COMMON
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
x16
B11
DQ8
NC
B12
DQ9
NC
C11
DQ10
NC
C12
DQ11
NC
F11
DQ12
NC
F12
DQ13
NC
G11
DQ14
NC
G12
DQ15
NC
D12
EDC1
GND
E12
DBI1
NC
D4
WCK01
D5
WCK01
BGA_0190_P065_100X140
FBC_DBI0
0
FBC_DBI1
1
FBC_DBI2
2
FBC_DBI3
3
FBC_DBI4
4
FBC_DBI5
5
FBC_DBI6
6
FBC_DBI7
7
FBC_EDC0
0
FBC_EDC1
1
FBC_EDC2
2
FBC_EDC3
3
FBC_EDC4
4
FBC_EDC5
5
FBC_EDC6
6
FBC_EDC7
7
FBC_D48
48
FBC_D49
49
FBC_D50
50
FBC_D51
51
FBC_D52
52
FBC_D53
53
FBC_D54
54
FBC_D55
55
FBC_EDC6
FBC_DBI6
FBC_D56
56
FBC_D57
57
FBC_D58
58
FBC_D59
59
FBC_D60
60
FBC_D61
61
FBC_D62
62
FBC_D63
63
FBC_EDC7
FBC_DBI7
{9}
{9}
FBC_WCK67
IN
FBC_WCK67*
IN
V11
V12
U11
U12
P11
P12
N11
N12
T12
R12
M4A
@memory.u_mem_gddr5x_x32(sym_3):page11_i178
BGA190
COMMON
NORMAL
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
EDC2
DBI2
x32
x16
V4
DQ24
NC
V3
DQ25
NC
U4
DQ26
NC
U3
DQ27
NC
P4
DQ28
NC
P3
DQ29
NC
N4
DQ30
NC
N3
DQ31
NC
T3
EDC3
NC
R3
DBI3
NC
T4
WCK23
T5
WCK23
BGA_0190_P065_100X140
{10}
{9,10}
{9}
{9}
IN
IN
IN
IN
0402
GND GND
C93
820pF
50V
10%
X7R
0402
COMMON
FBC_CMD[31..0]
FBC_CLK1
FBC_CLK1*
18
16
31
22
20
19
28
27
25
26
23
24
21
30
17
29
R796 121ohm
COMMON
0402
1 %
0402
FBC_CMD18
FBC_CMD16
FBC_CMD31
FBC_CMD22
FBC_CMD20
FBC_CMD19
FBC_CMD28
FBC_CMD27
FBC_CMD25
FBC_CMD26
FBC_CMD23
FBC_CMD24
FBC_CMD21
FBC_CMD30
FBC_CMD17
FBC_CMD29
FBC_VREFC
FBC_ZQ_2B
M4B
@memory.u_mem_gddr5x_x32(sym_5):page11_i184
BGA190
COMMON
H4
RAS
M4
CAS
M11
WE
K4
ABI
J4
A0_A10
J5
A1_A9
J11
A2_BA0
J10
A3_BA3
L11
A4_BA2
L10
A5_BA1
L5
A6_A11
L4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
H11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
K13
VREFC
H13
ZQ
BGA_0190_P065_100X140
GND
M4C
@memory.u_mem_gddr5x_x32(sym_6):page11_i215
BGA190
COMMON
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
FBVDD
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VPP
VPP
FBVDD
A13
A2
B10
B5
C1
C13
C14
C2
E1
E11
E13
E14
E2
E4
F10
F5
G13
G2
H12
H3
J13
J2
L13
L2
M12
M3
N13
N2
P10
P5
R1
R11
R13
R14
R2
R4
U1
U13
U14
U2
V10
V5
W13
W2
MEM_VPP
A3
W3
1
2
3
4
FBVDD
C92
C89
1uF
6.3V
10%
X6S
0402
COMMON
0402
FBVDD
C816
10uF
4V
20%
X6S
0603
COMMON
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
0603
C819
C91
C942
1uF
1uF
1uF
6.3V
6.3V
10%
X6S
0402
COMMON
0402
C94
10uF
4V
20%
X6S
0603
COMMON
0603
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C97
C820
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C99
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C818
C941
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C940
C943
1uF
6.3V
10%
X6S
0402
COMMON
0402
C893
22uF
4V
20%
X6S
0603W
COMMON
C0603
C90
1uF
6.3V
10%
X6S
0402
COMMON
0402
C846
22uF
4V
20%
X6S
0603W
COMMON
C0603
C98
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C96
C95
22uF
4V
20%
X6S
0603W
COMMON
C0603
C920
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
GND
C E
FBVDD
0402
ASSEMBLY
PAGE DETAIL
C858
1uF
6.3V
10%
X6S
0402
COMMON
C862
1uF
6.3V
10%
X6S
0402
COMMON
0402
0402
<ASSEMBLY_DESCRIPTION>
MEMORY: FBC[63:32]
C865
1uF
6.3V
10%
X6S
0402
COMMON
BGA_0190_P065_100X140
MEM_VPP
C887
C861
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C897
C886
1uF
6.3V
10%
X6S
0402
COMMON
0402
C881
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C1190
C1302
1uF
6.3V
10%
X6S
0402
COMMON
C1303
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBC[63:32]
MEMORY: FBC[63:32]
MEMORY: FBC[63:32]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
4.7uF
6.3V
20%
OPTION
X6S
0603
COMMON
0603
0402
UNDER DRAM
FDBA
4
11 41Tuesday, June 21, 2016
11 41Tuesday, June 21, 2016
11 41Tuesday, June 21, 2016
of
of
of
A B C D E F G H
Page12: MEMORY: FBD Partition 31..0
1
BI
2
3
4
FBD_D[31..0]
{9}
{9}
FB_DBI
{9,13}
{9,13}
FBD_D0
0
FBD_D1
1
FBD_D2
2
FBD_D3
3
FBD_D4
4
FBD_D5
5
FBD_D6
6
FBD_D7
7
FBD_EDC0
FBD_DBI0
FBD_D8
8
FBD_D9
9
FBD_D10
10
FBD_D11
11
FBD_D12
12
FBD_D13
13
FBD_D14
14
FBD_D15
15
FBD_EDC1
FBD_DBI1
FBD_WCK01
IN
FBD_WCK01*
IN
FBD_DBI[7..0]
BI
FB_EDC
FBD_EDC[7..0]
BI
M2D
@memory.u_mem_gddr5x_x32(sym_2):page12_i154
BGA190_MIRR
COMMON
MIRRORED
x32
x16
V4
DQ0
NC
V3
DQ1
NC
U4
DQ2
NC
U3
DQ3
NC
P4
DQ4
NC
P3
DQ5
NC
N4
DQ6
NC
N3
DQ7
NC
T3
EDC0
NC
R3
DBI0
NC
V11
DQ8
V12
DQ9
U11
DQ10
U12
DQ11
P11
DQ12
P12
DQ13
N11
DQ14
N12
DQ15
T12
EDC1
R12
DBI1
T4
WCK01
T5
WCK01
BGA_0190_P065_100X140
{5,7,10,22}
FBD_DBI0
0
FBD_DBI1
1
FBD_DBI2
2
FBD_DBI3
3
FBD_DBI4
4
FBD_DBI5
5
FBD_DBI6
6
FBD_DBI7
7
FBD_EDC0
0
FBD_EDC1
1
FBD_EDC2
2
FBD_EDC3
3
FBD_EDC4
4
FBD_EDC5
5
FBD_EDC6
6
FBD_EDC7
7
M2A
@memory.u_mem_gddr5x_x32(sym_4):page12_i194
BGA190_MIRR
COMMON
MIRRORED
x32
x16
FBD_EDC2
FBD_DBI2
FBD_EDC3
FBD_DBI3
FBD_WCK23
FBD_WCK23*
1G1D1S
B11
DQ16
B12
DQ17
C11
DQ18
C12
DQ19
F11
DQ20
F12
DQ21
G11
DQ22
G12
DQ23
D12
EDC2
E12
DBI2
B4
DQ24
B3
DQ25
C4
DQ26
C3
DQ27
F4
DQ28
F3
DQ29
G4
DQ30
G3
DQ31
D3
EDC3
E3
DBI3
D4
WCK23
D5
WCK23
BGA_0190_P065_100X140
3
D
Q8
@discrete.q_fet_n_enh(sym_2):page12_i182
SOT23_1G1D1S
G
1
COMMON
S
2
20V
6.5A
22mohm@10V / 22mohm@4.5V / 22mohm@2.5V
6.5A
1.4W
8V
SOT23
AO3416L
GND
NC
NC
NC
NC
NC
NC
NC
NC
GND
NC
FBD_D16
16
FBD_D17
17
FBD_D18
18
FBD_D19
19
FBD_D20
20
FBD_D21
21
FBD_D22
22
FBD_D23
23
FBD_D24
24
FBD_D25
25
FBD_D26
26
FBD_D27
27
FBD_D28
28
FBD_D29
29
FBD_D30
30
FBD_D31
31
{9}
{9}
IN
IN
IN
GPIO10_FBVREF_SEL
{9,13}
{9}
{9}
FBVDD
R32
549ohm
1 %
0402
COMMON
0402
R34
1.33k
1 %
0402
COMMON
0402
FBD_VREF_Q
GND
1.05V
0.350
FBD_CMD[31..0]
IN
FBD_CLK0
IN
FBD_CLK0*
IN
0.350 1.05V
R31
C71
931ohm
820pF
50V
1 %
0402
10%
COMMON
X7R
0402
0402
COMMON
0402
GND
2
0
15
6
4
3
12
11
9
10
7
8
5
14
1
13
OUT
R868 121ohm
COMMON
0402
1 %
0402
FBD_CMD2
FBD_CMD0
FBD_CMD15
FBD_CMD6
FBD_CMD4
FBD_CMD3
FBD_CMD12
FBD_CMD11
FBD_CMD9
FBD_CMD10
FBD_CMD7
FBD_CMD8
FBD_CMD5
FBD_CMD14
FBD_CMD1
FBD_CMD13
FBD_VREFC
FBD_ZQ_1_B
GND
M4
H4
H11
K4
L4
L5
L11
L10
J11
J10
J5
J4
K5
K12
K2
M11
K11
K10
M2
M13
A12
H2
{13}
K13
H13
M2B
@memory.u_mem_gddr5x_x32(sym_5):page12_i232
BGA190_MIRR
COMMON
RAS
CAS
WE
ABI
A0_A10
A1_A9
A2_BA0
A3_BA3
A4_BA2
A5_BA1
A6_A11
A7_A8
A12_A13
A15_A14
RESET
CKE
CLK
CLK
TCK
TDI
TDO
TMS
VREFC
ZQ
BGA_0190_P065_100X140
GND
M2C
@memory.u_mem_gddr5x_x32(sym_7):page12_i234
BGA190_MIRR
COMMON
Mirrored
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
BGA_0190_P065_100X140
add 1k to VDD
FBVDD
W12
MF
A1
VDD
A11
VDD
A14
VDD
A4
VDD
D10
VDD
G1
VDD
G14
VDD
H10
VDD
H5
VDD
J1
VDD
J14
VDD
L1
VDD
L14
VDD
M10
VDD
M5
VDD
N1
VDD
N14
VDD
T10
VDD
W1
VDD
W11
VDD
W14
VDD
W4
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VPP
VPP
FBVDD
A13
A2
B10
B5
C1
C13
C14
C2
E1
E11
E13
E14
E2
E4
F10
F5
G13
G2
H12
H3
J13
J2
L13
L2
M12
M3
N13
N2
P10
P5
R1
R11
R13
R14
R2
R4
U1
U13
U14
U2
V10
V5
W13
W2
MEM_VPP
A3
W3
1
2
3
4
FBVDD
C69
C73
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
FBVDD
C1070
C63
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
0603
COMMON
COMMON
0603
0603
C1056
C75
1uF
6.3V
10%
X6S
0402
COMMON
0402
C49
10uF
4V
20%
X6S
0603
COMMON
0603
C52
C1063
C1039
1uF
1uF
6.3V
10%
X6S
0402
COMMON
0402
C1038
10uF
4V
20%
X6S
0603
COMMON
0603
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1062
C1072
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C1032
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1073
C51
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
C1044
C59
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C61
C50
C66
22uF
4V
20%
X6S
0603W
COMMON
C0603
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
GND
FBVDD
0402
C E
C1046
1uF
6.3V
10%
X6S
0402
COMMON
ASSEMBLY
PAGE DETAIL
C1066
1uF
6.3V
10%
X6S
0402
COMMON
0402
C1059
1uF
6.3V
10%
X6S
0402
COMMON
0402
0402
<ASSEMBLY_DESCRIPTION>
MEMORY: FBD[31:0]
C1068
1uF
6.3V
10%
X6S
0402
COMMON
MEM_VPP
C1043
C1034
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1036
C1054
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C1304
C1305
1uF
6.3V
10%
X6S
0402
COMMON
C1306
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBD[31:0]
MEMORY: FBD[31:0]
MEMORY: FBD[31:0]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
12 41Tuesday, June 21, 2016
12 41Tuesday, June 21, 2016
12 41Tuesday, June 21, 2016
of
of
of
4.7uF
6.3V
20%
OPTION
X6S
0603
COMMON
0603
0402
UNDER DRAM
FDBA
A B C D E F G H
Page13: MEMORY: FBD Partition 63..32
1
FBD_D[63..32]
2
BI
3
{9}
{9}
{9,12}
{9,12}
FBD_D32
32
FBD_D33
33
FBD_D34
34
FBD_D35
35
FBD_D36
36
FBD_D37
37
FBD_D38
38
FBD_D39
39
FBD_D40
40
FBD_D41
41
FBD_D42
42
FBD_D43
43
FBD_D44
44
FBD_D45
45
FBD_D46
46
FBD_D47
47
IN
IN
FBD_EDC4
FBD_DBI4
FBD_EDC5
FBD_DBI5
FBD_WCK45
FBD_WCK45*
FB_DBI
FBD_DBI[7..0]
BI
FB_EDC
FBD_EDC[7..0]
BI
M1D
@memory.u_mem_gddr5x_x32(sym_1):page13_i142
BGA190
COMMON
NORMAL
B4
DQ0
B3
DQ1
C4
DQ2
C3
DQ3
F4
DQ4
F3
DQ5
G4
DQ6
G3
DQ7
D3
EDC0
E3
DBI0
x32
x16
B11
DQ8
B12
DQ9
C11
DQ10
C12
DQ11
F11
DQ12
F12
DQ13
G11
DQ14
G12
DQ15
D12
EDC1
GND
E12
DBI1
D4
WCK01
D5
WCK01
BGA_0190_P065_100X140
M1C
@memory.u_mem_gddr5x_x32(sym_6):page13_i215
BGA190
COMMON
FBD_DBI0
0
FBD_DBI1
1
FBD_DBI2
2
FBD_DBI3
3
FBD_DBI4
4
FBD_DBI5
5
FBD_DBI6
6
FBD_DBI7
7
FBD_EDC0
0
FBD_EDC1
1
FBD_EDC2
2
FBD_EDC3
3
FBD_EDC4
4
FBD_EDC5
5
FBD_EDC6
6
FBD_EDC7
7
M1A
@memory.u_mem_gddr5x_x32(sym_3):page13_i188
BGA190
COMMON
FBD_D48
48
FBD_D49
49
FBD_D50
50
FBD_D51
51
FBD_D52
52
FBD_D53
53
FBD_D54
54
FBD_D55
55
FBD_EDC6
NC
NC
NC
NC
NC
NC
NC
NC
NC
{9}
{9}
FBD_DBI6
FBD_D56
56
FBD_D57
57
FBD_D58
58
FBD_D59
59
FBD_D60
60
FBD_D61
61
FBD_D62
62
FBD_D63
63
FBD_EDC7
FBD_DBI7
FBD_WCK67
IN
FBD_WCK67*
IN
V11
V12
U11
U12
P11
P12
N11
N12
T12
R12
x32
V4
V3
U4
U3
P4
P3
N4
N3
T3
R3
T4
T5
BGA_0190_P065_100X140
NORMAL
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
EDC2
DBI2
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
x16
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
{9,12}
{9}
{9}
{12}
IN
IN
IN
IN
0402
GND GND
C1053
820pF
50V
10%
X7R
0402
COMMON
FBD_CMD[31..0]
FBD_CLK1
FBD_CLK1*
18
16
31
22
20
19
28
27
25
26
23
24
21
30
17
29
R867 121ohm
COMMON0402
1 %
0402
FBD_CMD18
FBD_CMD16
FBD_CMD31
FBD_CMD22
FBD_CMD20
FBD_CMD19
FBD_CMD28
FBD_CMD27
FBD_CMD25
FBD_CMD26
FBD_CMD23
FBD_CMD24
FBD_CMD21
FBD_CMD30
FBD_CMD17
FBD_CMD29
FBD_ZQ_2B
FBD_VREFC
M1B
@memory.u_mem_gddr5x_x32(sym_5):page13_i213
BGA190
COMMON
H4
RAS
M4
CAS
M11
WE
K4
ABI
J4
A0_A10
J5
A1_A9
J11
A2_BA0
J10
A3_BA3
L11
A4_BA2
L10
A5_BA1
L5
A6_A11
L4
A7_A8
K5
A12_A13
K12
A15_A14
K2
RESET
H11
CKE
K11
CLK
K10
CLK
M2
TCK
M13
TDI
A12
TDO
H2
TMS
K13
VREFC
H13
ZQ
BGA_0190_P065_100X140
GND
Normal
W12
MF
add 1k to VSS
A10
VSS
A5
VSS
B1
VSS
B14
VSS
D1
VSS
D11
VSS
D14
VSS
F1
VSS
F14
VSS
H1
VSS
H14
VSS
J12
VSS
J3
VSS
K1
VSS
K14
VSS
K3
VSS
L12
VSS
L3
VSS
M1
VSS
M14
VSS
P1
VSS
P14
VSS
T1
VSS
T11
VSS
T14
VSS
V1
VSS
V14
VSS
W10
VSS
W5
VSS
B13
VSSQ
B2
VSSQ
C10
VSSQ
C5
VSSQ
D13
VSSQ
D2
VSSQ
E10
VSSQ
E5
VSSQ
F13
VSSQ
F2
VSSQ
G10
VSSQ
G5
VSSQ
N10
VSSQ
N5
VSSQ
P13
VSSQ
P2
VSSQ
R10
VSSQ
R5
VSSQ
T13
VSSQ
T2
VSSQ
U10
VSSQ
U5
VSSQ
V13
VSSQ
V2
VSSQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VPP
VPP
FBVDD
A1
A11
A14
A4
D10
G1
G14
H10
H5
J1
J14
L1
L14
M10
M5
N1
N14
T10
W1
W11
W14
W4
FBVDD
A13
A2
B10
B5
C1
C13
C14
C2
E1
E11
E13
E14
E2
E4
F10
F5
G13
G2
H12
H3
J13
J2
L13
L2
M12
M3
N13
N2
P10
P5
R1
R11
R13
R14
R2
R4
U1
U13
U14
U2
V10
V5
W13
W2
MEM_VPP
A3
W3
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
FBVDD
0402
FBVDD
0603
C64
1uF
6.3V
10%
X6S
0402
COMMON
C1060
10uF
4V
20%
X6S
0603
COMMON
C1031
C1040
C65
C1057
1uF
1uF
6.3V
10%
X6S
0402
COMMON
0402
C58
10uF
4V
20%
X6S
0603
COMMON
0603
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1065
C57
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C62
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1033
C1069
10uF
10uF
4V
4V
20%
20%
X6S
X6S
0603
0603
COMMON
COMMON
0603
0603
C1042
C68
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C47
C1077
22uF
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
C70
C74
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C48
C1075
C1076
22uF
22uF
4V
20%
X6S
0603W
COMMON
C0603
22uF
4V
4V
20%
20%
X6S
X6S
0603W
0603W
COMMON
COMMON
C0603
C0603
GND
C E
FBVDD
0402
ASSEMBLY
PAGE DETAIL
C1067
1uF
6.3V
10%
X6S
0402
COMMON
C1052
1uF
6.3V
10%
X6S
0402
COMMON
0402
<ASSEMBLY_DESCRIPTION>
MEMORY: FBD[63:32]
BGA_0190_P065_100X140
4
MEM_VPP
C1048
C1058
1uF
6.3V
10%
X6S
0402
COMMON
0402
C1037
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
C1055
C1047
1uF
6.3V
10%
X6S
0402
COMMON
0402
C1035
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
0402
0402
GND
C1307
C1223
1uF
6.3V
10%
X6S
0402
COMMON
C1224
1uF
6.3V
10%
X6S
0402
COMMON
0402
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PROPERTY NOTE: This document contains information confidential and
PROPERTY NOTE: This document contains information confidential and
G
PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
MEMORY: FBD[63:32]
MEMORY: FBD[63:32]
MEMORY: FBD[63:32]
Design By:
Design By:
P45Z
P45Z
P45Z
Design By:
Neston V10
Neston V10
Neston V10
13 41Tuesday, June 21, 2016
13 41Tuesday, June 21, 2016
13 41Tuesday, June 21, 2016
of
of
of
4.7uF
6.3V
20%
OPTION
X6S
0603
COMMON
0603
0402
UNDER DRAM
FDBA
Loading...