ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
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PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
Table of Contents
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5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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Galaxy Microsystems (HK) Ltd.
Table of Contents
Table of Contents
Table of Contents
Design By:
Design By:
P85C
P85C
P85C
Design By:
James LeeV10
James LeeV10
James LeeV10
121Wednesday, April 05, 2017
121Wednesday, April 05, 2017
121Wednesday, April 05, 2017
HFD
of
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Page 2
A
Block Diagram
B
CD
E
FGH
1
1
NVVDD PH1/2
2
2
FBVDDQ
DP
HDMI
LINK B
FBA LO
PEX_VDD
PEX_12V
1V8
GP108
3
FBA HI
FAN
3
DVI-I
LINK A
DP
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
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<ASSEMBLY_DESCRIPTION>
Block Diagram
DP POWER
E
FD
G
PEX_3V3
Galaxy Microsystems (HK) Ltd.
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property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Block Diagram
Block Diagram
Block Diagram
Design By:
Design By:
P85C
P85C
P85C
Design By:
James LeeV10
James LeeV10
James LeeV10
221Wednesday, April 05, 2017
221Wednesday, April 05, 2017
221Wednesday, April 05, 2017
H
4
5
Page 3
A
B
CD
E
FGH
PCI Express
12V_PEX
PLACE DECOUPLING CAPS NEAR PCI-E CONN FINGERS
C91
10uF
16V
10%
X6S
0805
GND
3V3_PEX
OUT
NO STUFF
C678
10uF
16V
10%
X6S
0805
NO STUFF
POWER_BRAKE*
1
2
12V_PEX
GND
nv_cap
C94
1uF
16V
20%
X6S
0603W
COMMON
C93
10uF
16V
10%
X6S
0805
NO STUFF
C96
1uF
16V
10%
X7R
0603
COMMON
12
R970ohm
0402NO STUFF
GND
R94
0402
0.05 ohm
C90
1uF
16V
20%
X6S
0603W
COMMON
GND
0.05 ohm
nv_cap
C695
1uF
16V
10%
X7R
0603
COMMON
C682
0.1uF
16V
10%
X7R
0402
COMMON
0ohm
NO STUFF
CO-LAY WITH 0805 CAP
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
C83
0.1uF
16V
10%
X7R
0402
COMMON
5A
1A
PEX_PRSNT*
PEX_B12
GND
PEX_B30
GND
GND
GND
CN1
NONPHY-X16
CON_X16
@electro_mechanic.con_pci_express(sym_1):page3_i2
NO STUFF
B1
+12V
B2
+12V
A2
+12V
A3
+12V
B3
+12V/RSVD
B8
+3V3
A9
+3V3
A10
+3V3
B10
+3V3AUX
A1
PRSNT1
B12
RSVD
B4
GND
A4
GND
B7
GND
A12
GND
B13
GND
A15
GND
B16
GND
B18
GND
A18
GND
END OF X1
B30
RSVD
A20
GND
B22
GND
A24
GND
B26
GND
A28
GND
B29
GND
A31
GND
B32
GND
END OF X4
A34
GND
B36
GND
A38
GND
B40
GND
A42
GND
B44
GND
A46
GND
B47
GND
B49
GND
A49
GND
END OF X8
B81
PRSNT2
A51
GND
B53
GND
A54
GND
B56
GND
A58
GND
B60
GND
A62
GND
B64
GND
A66
GND
B68
GND
A70
GND
B72
GND
A74
GND
B76
GND
A78
GND
B80
GND
A82
GND
END OF X16
B
TRST* JTAG1
TCLK JTAG2
TDI JTAG3
TDO JTAG4
TMS JTAG5
SMCLK
SMDAT
PERST
REFCLK
REFCLK
PERP0
PERN0
PETP0
PETN0
PERP1
PERN1
PETP1
PETN1
PERP2
PERN2
PETP2
PETN2
PERP3
PERN3
PETP3
PETN3
PERP4
PERN4
PETP4
PETN4
PERP5
PERN5
PETP5
PETN5
PERP6
PERN6
PETP6
PETN6
PERP7
PERN7
PETP7
PETN7
PERP8
PERN8
PETP8
PETN8
PERP9
PERN9
PETP9
PETN9
PERP10
PERN10
PETP10
PETN10
PERP11
PERN11
PETP11
PETN11
PERP12
PERN12
PETP12
PETN12
PERP13
PERN13
PETP13
PETN13
PERP14
PERN14
PETP14
PETN14
PERP15
PERN15
PETP15
PETN15
R136
0ohm
0402
COMMON
0.05 ohm
PEX_TRST*
B9
PEX_TCLK
A5
PEX_TDI
A6
PEX_TDO
A7
PEX_TMS
A8
PEX_SMCLK
B5
PEX_SMDAT
B6
PEX_RST*PEX_RST_BUF*
A11
PEX_REFCLK
A13
PEX_REFCLK*
A14
PEX_TXX0
A16
PEX_TXX0*
A17
PEX_RX0
B14
PEX_RX0*
B15
PEX_TXX1
A21
PEX_TXX1*
A22
PEX_RX1
B19
PEX_RX1*
B20
PEX_TXX2
A25
PEX_TXX2*
A26
PEX_RX2
B23
PEX_RX2*
B24
PEX_TXX3
A29
PEX_TXX3*
A30
PEX_RX3
B27
PEX_RX3*
B28
SNN_PEX_TXX4
A35
SNN_PEX_TXX4*
A36
SNN_PEX_RXX4
B33
SNN_PEX_RXX4*
B34
SNN_PEX_TXX5
A39
SNN_PEX_TXX5*
A40
SNN_PEX_RXX5
B37
SNN_PEX_RXX5*
B38
SNN_PEX_TXX6
A43
SNN_PEX_TXX6*
A44
SNN_PEX_RXX6
B41
SNN_PEX_RXX6*
B42
SNN_PEX_TXX7
A47
SNN_PEX_TXX7*
A48
SNN_PEX_RXX7
B45
SNN_PEX_RXX7*
B46
SNN_PEX_TXX8
A52
SNN_PEX_TXX8*
A53
SNN_PEX_RXX8
B50
SNN_PEX_RXX8*
B51
SNN_PEX_TXX9
A56
SNN_PEX_TXX9*
A57
SNN_PEX_RXX9
B54
SNN_PEX_RXX9*
B55
SNN_PEX_TXX10
A60
SNN_PEX_TXX10*
A61
SNN_PEX_RXX10
B58
SNN_PEX_RXX10*
B59
SNN_PEX_TXX11
A64
SNN_PEX_TXX11*
A65
SNN_PEX_RXX11
B62
SNN_PEX_RXX11*
B63
SNN_PEX_TXX12
A68
SNN_PEX_TXX12*
A69
SNN_PEX_RXX12
B66
SNN_PEX_RXX12*
B67
SNN_PEX_TXX13
A72
SNN_PEX_TXX13*
A73
SNN_PEX_RXX13
B70
SNN_PEX_RXX13*
B71
SNN_PEX_TXX14
A76
SNN_PEX_TXX14*
A77
SNN_PEX_RXX14
B74
SNN_PEX_RXX14*
B75
SNN_PEX_TXX15
A80
SNN_PEX_TXX15*
A81
SNN_PEX_RXX15
B78
SNN_PEX_RXX15*
B79
3V3_PEX
R88
R89
100k
100k
5 %
5 %
0402
0402
NO STUFF
DIFFPAIR
PEX_REFCLK
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
NO STUFF
OUT
BI
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
12
R133
R134
R132
R135
R131
0ohm
0402
NO STUFF
0.05 ohm
0ohm
NO STUFF
0402
0.05 ohm
0ohm
NO STUFF
0402
0.05 ohm
0ohm
12
NO STUFF
0402
0.05 ohm
0ohm
0402
NO STUFF
0.05 ohm
C677
0.1uF
16V
10%
X7R
12
0402
COMMON
GND
R1144
0ohm
0402
NO STUFF
0.05 ohm
C676 0.22uF
0402
COMMON
C674 0.22uF
0402 16V
COMMON
C672 0.22uF
0402
COMMON
C663
0402
COMMON
C
JTAG_TRST*
JTAG_TCLK
JTAG_TDI
JTAG_TDO
JTAG_TMS
16V
16V
0.22uF
16V
ASSEMBLY
PAGE DETAIL
1V8
5
1
2
3
GND
IN
IN
IN
OUT
IN
U502
@logic.u_and_2in(sym_1):page3_i54
4
SC70-5
COMMON
GND
C675
0.22uF
0402
16V
COMMON
C673
0.22uF
0402 16V
COMMON
C671
0.22uF
0402
16V
COMMON
C662 0.22uF
0402 16V
COMMON
<ASSEMBLY_DESCRIPTION>
PCI Express
R541
100k
5 %
0402
COMMON
12
12
12
12
SNN_GPU_PEX_CLKREQ*
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
PEXGEN3_SIGNALS
12V_PEX
0.400
C84
C86
1uF
16V
10%
X7R
0603
COMMON
C693
1uF
16V
10%
X7R
0603
COMMON
1uF
16V
10%
X7R
0603
COMMON
GNDGNDGNDGND
G1A
@digital.u_gpu_gb2c_64(sym_1):page3_i108
BGA595
COMMON
1/14 PCI_EXPRESS
AC7
PEX_RST
AC6
AE8
AD8
AC9
AB9
AG6
AG7
AB10
AC10
AE7
AD11
AC11
AE9
AC12
AB12
AG9
AG10
AB13
AC13
AF10
AE10
AD14
AC14
AE12
AF12
AC15
AB15
AG12
AG13
AB16
AC16
AF13
AE13
AD17
AC17
AE15
AF15
AC18
AB18
AG15
AG16
AB19
AC19
AF16
AE16
AD20
AC20
AE18
AF18
AC21
AB21
AG18
AG19
AD23
AE23
AF19
AE19
AF24
AE24
AE21
AF21
AG24
AG25
AG21
AG22
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
AF7
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
AF9
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
SNN_PEX_TX4
SNN_PEX_TX4*
SNN_PEX_RX4
SNN_PEX_RX4*
SNN_PEX_TX5
SNN_PEX_TX5*
SNN_PEX_RX5
SNN_PEX_RX5*
SNN_PEX_TX6
SNN_PEX_TX6*
SNN_PEX_RX6
SNN_PEX_RX6*
SNN_PEX_TX7
SNN_PEX_TX7*
SNN_PEX_RX7
SNN_PEX_RX7*
SNN_PEX_TX8
SNN_PEX_TX8*
SNN_PEX_RX8
SNN_PEX_RX8*
SNN_PEX_TX9
SNN_PEX_TX9*
SNN_PEX_RX9
SNN_PEX_RX9*
SNN_PEX_TX10
SNN_PEX_TX10*
SNN_PEX_RX10
SNN_PEX_RX10*
SNN_PEX_TX11
SNN_PEX_TX11*
SNN_PEX_RX11
SNN_PEX_RX11*
SNN_PEX_TX12
SNN_PEX_TX12*
SNN_PEX_RX12
SNN_PEX_RX12*
SNN_PEX_TX13
SNN_PEX_TX13*
SNN_PEX_RX13
SNN_PEX_RX13*
SNN_PEX_TX14
SNN_PEX_TX14*
SNN_PEX_RX14
SNN_PEX_RX14*
SNN_PEX_TX15
SNN_PEX_TX15*
SNN_PEX_RX15
SNN_PEX_RX15*
E
NETNETNV_NETCLASSNV_NETCLASS
C694
1uF
16V
10%
X7R
0603
COMMON
3V3_PEX
0.400
C684
C681
C679
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
GNDGNDGNDGND
AA22
PEX_DVDD
AB23
PEX_DVDD
AC24
PEX_DVDD
AD25
PEX_DVDD
AE26
PEX_DVDD
AE27
PEX_DVDD
AA10
PEX_HVDD
AA12
PEX_HVDD
AA13
PEX_HVDD
AA16
PEX_HVDD
AA18
PEX_HVDD
AA19
PEX_HVDD
AA20
PEX_HVDD
AA21
PEX_HVDD
AB22
PEX_HVDD
AC23
PEX_HVDD
AD24
PEX_HVDD
AE25
PEX_HVDD
AF26
PEX_HVDD
AF27
PEX_HVDD
PEX_PLL_HVDD
PEX_PLL_HVDD
AA8
AA9
1uF
16V
10%
X7R
0603
NO STUFF
C683
1uF
16V
10%
X7R
0603
NO STUFF
C549
1uF
6.3V
10%
X6S
0402
COMMON
PLACE UNDER GPU
C581
1uF
6.3V
10%
X6S
0402
COMMON
PLACE UNDER GPU
35mA
PLACE UNDER GPU
C577
1uF
6.3V
10%
X6S
0402
COMMON
1V8
GND
C605
1uF
6.3V
10%
X6S
0402
COMMON
C600
0.1uF
16V
10%
X7R
0402
COMMON
135mA
C148
4.7uF
6.3V
20%
X6S
0603
COMMON
PLACE NEAR GPUMIDWAY BETWEEN GPU AND PS
C588
C583
1uF
1uF
6.3V
6.3V
10%
10%
X6S
X6S
0402
0402
COMMON
COMMON
C149
4.7uF
6.3V
20%
X6S
0603
COMMON
188mA
C565
4.7uF
6.3V
20%
X6S
0603
COMMON
PLACE NEAR GPU
CO-LAYOUT 0805 AND 0603
C612
4.7uF
6.3V
20%
X6S
0603
COMMON
C569
22uF
4V
20%
X6S
0603W
NO STUFF
C542
10uF
6.3V
10%
X6S
0805
COMMON
C609
10uF
6.3V
10%
X6S
0805
COMMON
MIDWAY BETWEEN GPU AND PS
CO-LAYOUT 0805 AND 0603
C610
22uF
4V
20%
X6S
0603W
NO STUFF
C567
22uF
4V
20%
X6S
0603W
NO STUFF
C568
10uF
6.3V
10%
X6S
0805
COMMON
GND
PEX_VDD
GND
C629
10uF
6.3V
10%
X6S
0805
COMMON
C543
22uF
4V
20%
X6S
0603W
NO STUFF
C570
22uF
6.3V
20%
X6S
0805
NO STUFF
C627
22uF
4V
20%
X6S
0603W
NO STUFF
1
2
1V8
C626
22uF
6.3V
20%
X6S
0805
COMMON
GND
C628
22uF
4V
20%
X6S
0603W
NO STUFF
GND
3
4
PEX LA NES 15 - 4 ARE DEFEATURED
5
PEX_TERMP
FD
PEX_TERMP
AF25
50OHM_NETCLASS1
R514
2.49k
0402
COMMON
1 %
GND
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date :Sheetof
Date :Sheetof
Date :Sheetof
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUTLIMITATION, THE WARRANTIES OF DESI GN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
B
C
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
GPU Frame Buffer
CO-LAYOUT 0805 AND 0603
5
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@memory.u_mem_sd_ddr5_x32(sym_1):page5_i76
BGA170
COMMON
FBA_D0
0
FBA_D1
FB_DBI
FBA_DBI[7..0]
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUTLIMITATION, THE WARRANTIES OF DESI GN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
BI
OUT
FB_EDC
FBA_EDC[7..0]
A
4,6
FBA_DBI0
0
FBA_DBI1
1
FBA_DBI2
2
FBA_DBI3
3
FBA_DBI4
4
FBA_DBI5
5
FBA_DBI6
6
FBA_DBI7
7
4,6
FBA_EDC0
0
FBA_EDC1
1
FBA_EDC2
2
FBA_EDC3
3
FBA_EDC4
4
FBA_EDC5
5
FBA_EDC6
6
FBA_EDC7
7
B
1
FBA_D2
2
FBA_D3
3
FBA_D4
4
FBA_D5
5
FBA_D6
6
FBA_D7
7
8
9
10
11
12
13
14
15
IN
IN
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_EDC0
FBA_DBI0
FBA_EDC1
FBA_DBI1
FBA_WCK01
4
FBA_WCK01*
4
C
NORMA L
A4
DQ0
A2
DQ1
B4
DQ2
B2
DQ3
E4
DQ4
E2
DQ5
F4
DQ6
F2
DQ7
C2
EDC0
D2
DBI0
x32
A11
DQ8
A13
DQ9
B11
DQ10
B13
DQ11
E11
DQ12
E13
DQ13
F11
DQ14
F13
DQ15
C13
EDC1
D13
DBI1
D4
WCK01
D5
WCK01
SNN_FBA_VREFD_1SNN_FBA_VREFD_2
A10
VREFD
x16
NC
NC
NC
NC
NC
NC
NC
NC
GND
NC
ASSEMBLY
PAGE DETAIL
IN
IN
FBA_D16
16
FBA_D17
17
FBA_D18
18
FBA_D19
19
FBA_D20
20
FBA_D21
21
FBA_D22
22
FBA_D23
23
24
25
26
27
28
29
30
31
<ASSEMBLY_DESCRIPTION>
FBA bits 31..00
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_WCK23
4
FBA_WCK23*
4
FBA_EDC2
FBA_DBI2
FBA_EDC3
FBA_DBI3
M1C
@memory.u_mem_sd_ddr5_x32(sym_3):page5_i97
BGA170
COMMON
NORMA L
V11
DQ16
V13
DQ17
T11
DQ18
T13
DQ19
N11
DQ20
N13
DQ21
M11
DQ22
M13
DQ23
R13
EDC2
P13
DBI2
x32
V4
DQ24
V2
DQ25
T4
DQ26
T2
DQ27
N4
DQ28
N2
DQ29
M4
DQ30
M2
DQ31
R2
EDC3
P2
DBI3
P4
WCK23
P5
WCK23
E
VREFD
GND
PLACE Around DRAM
4
V10
x16
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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Date :Sheetof
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ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUTLIMITATION, THE WARRANTIES OF DESI GN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
4,5
FBA_DBI0
0
FBA_DBI1
1
FBA_DBI2
2
FBA_DBI3
3
FBA_DBI4
4
FBA_DBI5
5
FBA_DBI6
6
FBA_DBI7
7
4,5
FBA_EDC0
0
FBA_EDC1
1
FBA_EDC2
2
FBA_EDC3
3
FBA_EDC4
4
FBA_EDC5
5
FBA_EDC6
6
FBA_EDC7
7
FBA_WCK45
IN
FBA_WCK45*
IN
B
4
M2A
@memory.u_mem_sd_ddr5_x32(sym_2):page6_i66
BGA170_MIRR
COMMON
MIRRORED
FBA_D32
32
FBA_D33
33
FBA_D34
34
FBA_D35
35
FBA_D36
36
FBA_D37
37
FBA_D38
38
FBA_D39
39
FBA_D40
40
FBA_D41
41
FBA_D42
42
FBA_D43
43
FBA_D44
44
FBA_D45
45
FBA_D46
46
FBA_D47
47
4
4
FBA_EDC4
FBA_DBI4
FBA_EDC5
FBA_DBI5
V11
V13
T11
T13
N11
N13
M11
M13
R13
P13
V4
V2
T4
T2
N4
N2
M4
M2
R2
P2
P4
P5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
EDC0
DBI0
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
EDC1
DBI1
WCK01
WCK01
x16x32
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
SNN_FBA_VREFD_3SNN_FBA_VREFD_4
V10
VREFD
C
ASSEMBLY
PAGE DETAIL
FBA_D48
48
FBA_D49
49
FBA_D50
50
FBA_D51
51
FBA_D52
52
FBA_D53
53
FBA_D54
54
FBA_D55
55
FBA_D56
56
FBA_D57
57
FBA_D58
58
FBA_D59
59
FBA_D60
60
FBA_D61
61
FBA_D62
62
FBA_D63
63
IN
IN
<ASSEMBLY_DESCRIPTION>
FBA bits 63..32
FBA_WCK67
FBA_WCK67*
4
4
FBA_EDC6
FBA_DBI6
FBA_EDC7
FBA_DBI7
M2C
@memory.u_mem_sd_ddr5_x32(sym_4):page6_i88
BGA170_MIRR
COMMON
MIRRORED
x32x16
A11
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
EDC2
DBI2
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
EDC3
DBI3
WCK23
WCK23
VREFD
NC
NC
NC
NC
NC
NC
NC
NC
GND
NC
A13
B11
B13
E11
E13
F11
F13
C13
D13
A4
A2
B4
B2
E4
E2
F4
F2
C2
D2
D4
D5
E
FBVDDQ
C167
10uF
4V
20%
X6S
0603
COMMON
C164
10uF
4V
20%
X6S
0603
COMMON
C165
22uF
4V
20%
X6S
0603W
COMMON
C166
22uF
4V
20%
X6S
0603W
COMMON
GND
PLACE Around DRAM
4
A10
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
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Size Project Name: Rev
Size Project Name: Rev
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Custom
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Date :Sheetof
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PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FD
G
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
FBA bits 31..00
FBA bits 31..00
FBA bits 31..00
Design By:
Design By:
P85C
P85C
P85C
Design By:
James LeeV10
James LeeV10
James LeeV10
H
621Wednesday, April 05, 2017
621Wednesday, April 05, 2017
621Wednesday, April 05, 2017
Page 7
A
B
CD
E
FGH
NVVVD Decoupling
G1D
NVVDD
@digital.u_gpu_gb2c_64(sym_7):page7_i55
BGA595
COMMON
NVVDD
1
PLACE UNDER GPU
C576
10uF
6.3V
20%
X6S
0603
COMMON
C580
10uF
6.3V
20%
X6S
0603
2
GND
COMMON
PLACE NEAR GPU
C634
C635
22uF
22uF
10V
4V
10%
20%
X7R
X6S
0805
0603W
COMMON
NO STUFF
C647
C648
10uF
3
16V
10%
X6S
0805
NO STUFF
22uF
4V
20%
X6S
0603W
NO STUFF
C584
1uF
6.3V
10%
X6S
0402
COMMON
C587
10uF
6.3V
20%
X6S
0603
COMMON
C592
10uF
6.3V
20%
X6S
0603
COMMON
CO-Layout 0603 and 0805
C638
22uF
10V
10%
X7R
0805
COMMON
C653
10uF
16V
10%
X6S
0805
NO STUFF
C639
22uF
4V
20%
X6S
0603W
NO STUFF
C652
22uF
4V
20%
X6S
0603W
NO STUFF
C575
1uF
6.3V
10%
X6S
0402
COMMON
C604
10uF
6.3V
20%
X6S
0603
COMMON
C597
10uF
6.3V
20%
X6S
0603
COMMON
C636
22uF
10V
10%
X7R
0805
COMMON
C139
10uF
16V
10%
X6S
0805
NO STUFF
C586
1uF
6.3V
10%
X6S
0402
COMMON
C582
10uF
6.3V
20%
X6S
0603
COMMON
C602
10uF
6.3V
20%
X6S
0603
COMMON
C637
22uF
4V
20%
X6S
0603W
NO STUFF
C120
22uF
4V
20%
X6S
0603W
NO STUFF
C615
10uF
6.3V
20%
X6S
0603
COMMON
GND
C649
22uF
10V
10%
X7R
0805
NO STUFF
C146
10uF
16V
10%
X6S
0805
NO STUFF
C650
22uF
4V
20%
X6S
0603W
NO STUFF
C145
22uF
4V
20%
X6S
0603W
NO STUFF
C608
10uF
6.3V
20%
X6S
0603
COMMON
C566
1uF
6.3V
10%
X6S
0402
COMMON
C598
10uF
6.3V
20%
X6S
0603
COMMON
C655
10uF
16V
10%
X6S
0805
NO STUFF
C138
10uF
16V
10%
X6S
0805
NO STUFF
C585
1uF
6.3V
10%
X6S
0402
COMMON
C578
10uF
6.3V
20%
X6S
0603
COMMON
C654
22uF
4V
20%
X6S
0603W
NO STUFF
C137
22uF
4V
20%
X6S
0603W
NO STUFF
7/14 VDDS
L11
VDDS
L17
VDDS
M14
VDDS
P10
VDDS
P12
VDDS
P16
VDDS
P18
VDDS
T14
VDDS
U11
VDDS
U17
VDDS
GM108
RSVD
RSVD
G1C
@digital.u_gpu_gb2c_64(sym_11):page7_i54
BGA595
COMMON
11/14 NVVDD
K10
VDD
K12
VDD
K14
VDD
K16
VDD
K18
VDD
L13
VDD
L15
VDD
M10
VDD
M12
VDD
M16
VDD
M18
VDD
N11
VDD
N13
VDD
N15
VDD
N17
VDD
P14
VDD
R11
VDD
R13
VDD
R15
VDD
R17
VDD
T10
VDD
T12
VDD
T16
VDD
T18
VDD
U13
VDD
U15
VDD
V10
VDD
V12
VDD
V14
VDD
V16
VDD
V18
VDD
VDDS_SENSE
GNDS_SENSE
VDD_SENSE
GND_SENSE
F4
F3
GPU_NVVDD_VSENSE_L
F2
GPU_NVVDD_GNDSNS_L
F1
GPU_NVDS_VSENSE
GPU_GND_S_GSENSE
R122
R117
1
GPU_NVVDD_VSENSE
nv_res
R524
0ohm
NO STUFF
0402
0.05 ohm
nv_res
R525
0ohm
GPU_NVVDD_GNDSNS
NO STUFF
0402
0.05 ohm
2
nv_res
0ohm
COMMON
0402
0.05 ohm
nv_res
0ohm
0402
COMMON
0.05 ohm
19
19
OUT
3
OUT
C144
C143
10uF
22uF
16V
4V
10%
20%
X6S
X6S
0805
0603W
NO STUFF
NO STUFF
C119
C140
22uF
22uF
6.3V
4V
20%
20%
X6S
X6S
0805
0603W
NO STUFF
4
C644
330uF
NO STUFF
20%
2V@105degC
AL-Polymer
3.5A@105degC,100KHz
0.006ohm
SMD_7343
NO STUFF
C642
22uF
4V
20%
X6S
0603W
NO STUFF
C136
10uF
16V
10%
X6S
0805
NO STUFF
C132
22uF
6.3V
20%
X6S
0805
NO STUFF
C643
22uF
6.3V
20%
X6S
0805
COMMON
C135
22uF
4V
20%
X6S
0603W
NO STUFF
C131
22uF
4V
20%
X6S
0603W
NO STUFF
C646
22uF
6.3V
20%
X6S
0805
COMMON
C645
22uF
4V
20%
X6S
0603W
NO STUFF
CO-Layout 0603, 0805 and PO SCAP
C630
330uF
NO STUFF
20%
2V@105degC
AL-Polymer
3.5A@105degC,100KHz
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
0.006ohm
SMD_7343
GND
A
C623
10uF
16V
10%
X6S
0805
COMMON
C622
22uF
4V
20%
X6S
0603W
NO STUFF
C631
22uF
6.3V
20%
X6S
0805
COMMON
C632
22uF
4V
20%
X6S
0603W
NO STUFF
B
C142
10uF
16V
10%
X6S
0805
NO STUFF
C641
22uF
6.3V
20%
X6S
0805
COMMON
C141
22uF
4V
20%
X6S
0603W
NO STUFF
C640
22uF
4V
20%
X6S
0603W
NO STUFF
GND
C658
330uF
NO STUFF
20%
2V@105degC
AL-Polymer
3.5A@105degC,100KHz
0.006ohm
SMD_7343
C133
10uF
16V
10%
X6S
0805
NO STUFF
C129
22uF
6.3V
20%
X6S
0805
NO STUFF
C134
22uF
4V
20%
X6S
0603W
NO STUFF
C130
22uF
4V
20%
X6S
0603W
NO STUFF
C656
22uF
6.3V
20%
X6S
0805
NO STUFF
C657
22uF
4V
20%
X6S
0603W
NO STUFF
C128
10uF
16V
10%
X6S
0805
NO STUFF
C661
22uF
6.3V
20%
X6S
0805
NO STUFF
C127
22uF
4V
20%
X6S
0603W
NO STUFF
C660
22uF
4V
20%
X6S
0603W
NO STUFF
C
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
NVVVD Decoupling
NVVDDNVVDD
E
G1E
@digital.u_gpu_gb2c_64(sym_6):page7_i56
BGA595
COMMON
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
B
C603
0.1uF
16V
10%
X7R
0402
COMMON
GND
51mA
PLACE NEAR GPU
C
C616
1uF
6.3V
10%
X6S
0402
COMMON
C564
1uF
6.3V
10%
X6S
0402
COMMON
1V8
C614
4.7uF
6.3V
20%
X6S
0603
COMMON
GND
1V8
C611
4.7uF
6.3V
20%
X6S
0603
COMMON
GND
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
FBVDDQ and 1V8 Decoupling
G1I
@digital.u_gpu_gb2c_64(sym_5):page8_i36
BGA595
COMMON
5/14 NC
F5
F6
W5
GM1 08
NC
PEX_PLLVDD
NC
PEX_PLLVDD
NC
NC
PEX_SVDD_3V3
NC
NC
NC
PEX_TSTCLK*
NC
NC
NC
NC
PEX_TSTCLK
NC
NC
NC
NC
NC
NC
NC
NC
MLS_REF0
NC
GM108 COMPATIBLE
FOR THOSE SHOWN
FD
PINS
4
DESIGNS
FLOATINGLEAVE NC
EXCEPT
MUST
5
Galaxy Microsystems (HK) Ltd.
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Custom
Date :Sheetof
Date :Sheetof
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PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
G
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
FBVDDQ and 1V8 Decoupling
FBVDDQ and 1V8 Decoupling
FBVDDQ and 1V8 Decoupling
Design By:
Design By:
P85C
P85C
P85C
Design By:
H
James LeeV10
James LeeV10
James LeeV10
821Wednesday, April 05, 2017
821Wednesday, April 05, 2017
821Wednesday, April 05, 2017
SNN_GPU_NC_AA14
SNN_GPU_NC_AA15
SNN_GPU_NC_AB6
SNN_GPU_NC_AB8
SNN_GPU_NC_AD10
SNN_GPU_NC_AD7
SNN_GPU_NC_AE22
SNN_GPU_NC_AE3
SNN_GPU_NC_AE4
SNN_GPU_NC_AF2
SNN_GPU_NC_AF22
SNN_GPU_NC_AF3
SNN_GPU_NC_AF4
SNN_GPU_NC_AG3
SNN_GPU_NC_D10
SNN_GPU_NC_E10
SNN_GPU_NC_F10
SNN_GPU_NC_F5
SNN_GPU_NC_F6
SNN_GPU_NC_W5
E
AA14
AA15
AB6
AB8
AD10
AD7
AE22
AE3
AE4
AF22
AG3
D10
AF2
AF3
AF4
E10
F10
Page 9
A
B
CD
IFPAB DL DVI-D
1
DVI_HDMI_SIGNALS
2
G1J
@digital.u_gpu_gb2c_64(sym_4):page9_i136
BGA595
COMMON
4/14 IFPAB
1k
COMMON0402
C550
0.1uF
16V
10%
X7R
0402
COMMON
IFPAB_RSET
330mA
GND
PLACE NEAR BALL
C618
0.1uF
16V
10%
X7R
0402
COMMON
610mA
C613
0.1uF
16V
10%
X7R
0402
COMMON
AA6
W7
W6
Y6
IFPAB_RSET
IFPAB_PLLVDD
IFP_IOVDD
IFP_IOVDD
C548
1uF
6.3V
10%
X6S
0402
COMMON
R518
GPU_PLLVDD
PLACE NEAR BALLS
1 %
GND
IN
3
PEX_VDD
PLACE NEAR GPU
C551
4.7uF
6.3V
20%
X6S
0603
COMMON
GND
IFPAB
4
1V8
R577
10k
5 %
0402
GPIO14_IFPA_HPD
OUT
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
12
A
COMMON
3
C
Q512
@discrete.q_npn(sym_1):page9_i26
SOT23_1B1C1E
COMMON
E
2
GND
DVI HDMIDP
SL/DL
TXC/TXC
TXD0/0
TXD1/1
TXD2/2
TXC
TXD0/3
TXD1/4
TXD2/5
IFPA_L3
IFPA_L3
IFPA_L2
IFPA_L2
IFPA_L1
IFPA_L1
IFPA_L0
IFPA_L0
IFPA_AUX_SDA
IFPA_AUX_SCL
IFPB_L3
IFPB_L3
IFPB_L2
IFPB_L2
IFPB_L1
IFPB_L1
IFPB_L0
IFPB_L0
IFPB_AUX_SDA
IFPB_AUX_SCL
IFPA_TXC*
AC4
IFPA_TXC
AC3
IFPA_TXD0*
Y3
IFPA_TXD0
Y4
IFPA_TXD1*
AA2
IFPA_TXD1
AA3
IFPA_TXD2*
AA1
IFPA_TXD2
AB1
IFPA_AUX_SDA
AA5
IFPA_AUX_SCL
AA4
IFPB_TXC*
AB4
IFPB_TXC
AB5
AB2
AB3
AD2
AD3
AD1
AE1
IFPB_AUX_SDA
AD5
IFPB_AUX_SCL
AD4
(DEFEATURED 0N GM108)
1B1C1E
GPIO14_IFPA_HPD_R
B
1
R576
100k
5 %
0402
COMMON
GNDGNDGND
B
R600100k
0402
IFPA_HPD_R
COMMON
5 %
C733
220pF
50V
5%
C0G
0402
COMMON
C
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALSIFPA_L3
DVI_HDMI_SIGNALSIFPA_L3
DVI_HDMI_SIGNALSIFPA_L2
DVI_HDMI_SIGNALSIFPA_L2
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALSIFPB_L3
DVI_HDMI_SIGNALSIFPB_L3
DVI_HDMI_SIGNALSIFPB_AUX
DVI_HDMI_SIGNALSIFPB_AUX
R6010ohm
0402
0.05 ohm
COMMON
11
11
C746
220pF
50V
5%
C0G
0402
NO STUFF
IFPA_AUX
11
11
IFPA_AUX
IFPB_L2DVI_HDMI_SIGNALS
IFPB_L2DVI_HDMI_SIGNALS
IFPB_L1DVI_HDMI_SIGNALS
IFPB_L1DVI_HDMI_SIGNALS
IFPB_L0DVI_HDMI_SIGNALS
IFPB_L0DVI_HDMI_SIGNALS
OUT
OUT
IFPA_DVI_DP_HPD
NV3V3
R44
10k
5 %
0402
COMMON
GND
NV3V3
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
ASSEMBLY
PAGE DETAIL
R40
100k
5 %
0402
NO STUFF
R43
10k
5 %
0402
COMMON
GND
DVI
DP
DVI
R39
100k
5 %
0402
NO STUFF
IFPA_L1
IFPA_L1
IFPA_L0
IFPA_L0
1
G
Q590
2N7002LT1G
SOT23
S3D
2
1
G
Q589
2N7002LT1G
SOT23
S3D
2
DP
11
11
11
11
11
11
NV3V3
1G1D1S
G
1
IN
<ASSEMBLY_DESCRIPTION>
IFPAB DL-DVI
DP
IFPB_TXD0*
IFPB_TXD0
IFPB_TXD1*
IFPB_TXD1
IFPB_TXD2*
IFPB_TXD2
IFPAB_TERM_CM
3
D
Q514
@discrete.q_fet_n_enh(sym_2):page9_i28
SOT23_1G1D1S
COMMON
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
FD
G
BOM REV
A
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
IFPAB DL-DVI
IFPAB DL-DVI
IFPAB DL-DVI
P85C
P85C
P85C
J4
CON_DVI_D
DIP_DVI_D
90
COMMON
Design By:
Design By:
Design By:
H
James LeeV10
James LeeV10
James LeeV10
921Wednesday, April 05, 2017
921Wednesday, April 05, 2017
921Wednesday, April 05, 2017
1
2
3
4
5
Page 10
IFPA DP
A
B
CD
E
FGH
1
2
3
1
2
3
3V3_PEX
C37
0.1uF
16V
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
B
C
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
IFPB DP/HDMI
GND
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date :Sheetof
Date :Sheetof
Date :Sheetof
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
E
FD
G
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
IFPB DP_HDMI
IFPB DP_HDMI
IFPB DP_HDMI
Design By:
Design By:
P85C
P85C
P85C
Design By:
James LeeV10
James LeeV10
James LeeV10
H
1121Wednesday, April 05, 2017
1121Wednesday, April 05, 2017
1121Wednesday, April 05, 2017
Page 12
A
JTAG,GPIO&XTAL
B
CD
E
FGH
1
1V8
LB50230ohm
BEAD_0603 COMMON
C625
C624
22uF
22uF
4V
6.3V
20%
20%
X6S
X6S
0603W
0805
NO STUFF
COMMON
CO-LAYOUT 0805 AND 0603
GND
2
GPU_THERM_OVERT*
3
9
112mA
PLACE NEAR GPU
1V8
R113
10k
5 %
0402
COMMON
GPU_PLLVDD
C633
4.7uF
6.3V
20%
X6S
0603
COMMON
1
G
S3D
2
R111
0ohm
NO STUFF0402
0.05 ohm
G1K
@digital.u_gpu_gb2c_64(sym_8):page12_i134
BGA595
COMMON
8/14 MISC1
OUT
1V
C620
0.1uF
16V
10%
X7R
0402
COMMON
GND
Q22
@discrete.q_fet_n_enh(sym_6):page12_i144
SOT323_1G1D1S
COMMON
THERM_OVERT*
14
0.300
C619
0.1uF
16V
10%
X7R
0402
COMMON
PLACE UNDER GPU
OUT
C621
0.1uF
16V
10%
X7R
0402
COMMON
C617
0.1uF
16V
10%
X7R
0402
COMMON
G1L
@digital.u_gpu_gb2c_64(sym_9):page12_i132
BGA595
COMMON
9/14 XTAL_PLL
L6
XS_PLLVDD
M6
SP_PLLVDD
F11
GPCPLL_AVDD
N6
VID_PLLVDD
1V8
R119100k
0402COMMON
5 %
R5360ohm
0402
COMMON
5 %
R5400ohm
5 %
R128
100k
5 %
0402
NO STUFF
GND
I2CS_SCL_R
I2CS_SDA_R
COMMON0402
GENERIC_DEZ1
GND
NV3V3
C11
C109
27pF
50V
5%
C0G
0402
COMMON
R535
2.2k
5 %
0402
COMMON
A10
XTALSSIN
XTALIN
XTALIN
XTAL
@clocks.xtal(sym_1):page12_i56
NV3V3
R539
2.2k
5 %
0402
COMMON
TH_HC49S30ppm
NV3V3
2
G
S6D
1
GM108
PLLVDD
NC
NC
Y1
27MHz
COMMON
NV3V3
5
Q503A
@discrete.q_fet_n_enh(sym_6):page12_i107
SOT363
NO STUFF
S3D
4
XTALOUTBUFF
XTALOUT
XTALOUT
GENERIC_DEZ1
G
Q503B
@discrete.q_fet_n_enh(sym_6):page12_i108
SOT363
NO STUFF
PEX_SMCLK
3
PEX_SMDAT
C10
B10
XTAL
XTALOUTBUFFXTALSSIN
C110
27pF
50V
5%
C0G
0402
COMMON
GNDGND
OUT
BI
R127
100k
5 %
0402
COMMON
R120100k
0402
5 %
3
COMMON
R137
10k
5 %
0402
COMMON
GND
XTALOUTBUFF
GND
1V8
IN
IN
IN
IN
IN
Smart Fan
PU
MID
JTAG_TCLK
3
JTAG_TDI
3
JTAG_TDO
3
JTAG_TMS
3
JTAG_TRST*
3
NVJTAG_SEL
R517
10k
5 %
0402
COMMON
GPIO PWM %
66% HIGH
33% HIGH (2-PIN DEFAULT)
100% HIGHPD
G1M
@digital.u_gpu_gb2c_64(sym_3):page12_i133
BGA595
COMMON
3/14 JTAG
AE5
JTAG_TCK
AE6
JTAG_TDI
AF6
JTAG_TDO
AD6
JTAG_TMS
AG4
JTAG_TRST
AD9
NVJTAG_SEL
1
2
3
I2CS_SCL
A6
SNN_GPU_TS_VREF
SNN_GPU_THERM_DN
SNN_GPU_THERM_DP
4
AE2
E12
F12
OVERT
TS_VREF
THERMDN
THERMDP
I2CS_SDA
I2CC_SCL
I2CC_SDA
I2CB_SCL
I2CB_SDA
GM108
I2CA_SDA
I2CA_SCL
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
@discrete.q_fet_n_enh(sym_6):page12_i35
SOT323_1G1D1S
NO STUFF
E
R93
10k
5 %
0402
NO STUFF
POWER_BRAKE*
12V_PEXNV3V3
C201
2.2UF/16V,X5R
C0805
ns
GND
R167
10K
R0402
COMMON
+0.05R
NV3V3
C747
4.7uF
6.3V
20%
X6S
0603
NO STUFF
NV3V3
GND
R16
1k
5 %
0402
COMMON
C748
1nF
16V
10%
X7R
0402
NO STUFF
GND
NV3V3NV3V3
R564
10k
5 %
0402
NO STUFF
G
Q591
INS16805265
SOT323_1G1D1S
COMMON
3
FAN_PWM_4PIN
IN
R28
0ohm
NO STUFF0402
0.05 ohm
NV3V3
1
G
S3D
2
FD
R211
100K
R0402
COMMON
+0.05R
R166
100K
R0402
+0.05R
COMMON
GND
GND
CO-LAY WITH 0805 CAP
D502
3
@discrete.d_3pin_cc(sym_2):page12_i84
30V
0.2A
SOT23
NO STUFF
1
2
C699
1uF
16V
10%
X7R
0603
NO STUFF
GNDGNDGND
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date :Sheetof
Date :Sheetof
Date :Sheetof
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
C202
10uF/16V,X5R
C1206
COMMON
1
VOUT
2
VIN
3
EN
C200
1UF/10V,X5R
C0402
COMMON
P85C
P85C
P85C
VSET4NC1
C702
1nF
16V
10%
X7R
0402
NO STUFF
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
JTAG,GPIO&XTAL
JTAG,GPIO&XTAL
JTAG,GPIO&XTAL
GND
NC3
NC2
GND
GND1
U55
9
NCT3941S
COMMON
12V_PEX
Design By:
Design By:
Design By:
H
C203
10uF/16V,X5R
C1206
COMMON
0
+0.05R
R0805
NO STUFF
R154
0
+0.05R
R0402
COMMON
R168
8
7
6
5
GND
J5
1
2
MALE
3
2.00MM
0
4
DIP_FAN_4P
COMMON
James LeeV10
James LeeV10
James LeeV10
1221Wednesday, April 05, 2017
1221Wednesday, April 05, 2017
1221Wednesday, April 05, 2017
4
5
Page 13
A
ROM & STRAPS
B
CD
E
FGH
ROM_SO
L
1
L
L
L
H
H
H
L
L
L
2
L
H
H
H
H
STRAP2STRAP1
L
L
L
3
L
H
H
L
L
STRAP5
M
M
M
4
M
L
L
L
L
H
H
H
H
L
5
L
L
L
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ROM_SI
ROM_SCLKSOR_EXPOSED[3:0]
LL
L
H
H
L
H
L
H
L
HLH
STRAP0
L
H
M
L
H
M
M
L
H
M
RAMCFG[4:0]
H
H
L
M
M
H
L
M
M
H
LL
LH
H
H
L
H
LH
H
STRAP3
M
L
SMB_ALT_ADDR
L
M
STRAP4
HH
H
L
L
H
M
M
L
H
H
L0
L
L
H
L
M
H
L
M
H
L
H
L
HH
H
L
L
A
L
H
L
000 0
000 1
001 0
0011
011 0
011 1H
100 0
100 1
111 1
111 0
110 1
110 0
1011
101 0
100 1
100 0
011 1
011 0
010 1
010 0
0011
001 0
000 1
000 0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1:ENABLE 0:DISABLE
SOR0/1 ENABLEDEFAULT
H=High :Tied to 1.8V
M=Middle:Tied to 0.9V
L=Low :Tied to 0V
DEFAULT
DEVID_SEL
1
PCIE_CFG
1
1
1
0
10
0
0
0
0
1
1
1
1
0
0
1
1
01
1
0
10
10
0
0
00
B
VGA_DEVIC E
1
01
1
0
1
0
1
0
1
0
1
0
1
0
1 DEFAULT
0
C
1:SMB_ALT_ADDR ENABLE
0:SMB_ALT_ADDR DISABLE
1:DEVID_SEL REBRAND
0:DEVID_SEL ORIGNAL
1:PCIE_CFG LOW POWER
0:PCIE_CFG HIGH POWER
1:VGA_DEVICE ENABLE
0:VGA_DEVICE DISABLE
ASSEMBLY
PAGE DETAIL
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
STRAP5
STRAP2
STRAP1
STRAP0
<ASSEMBLY_DESCRIPTION>
ROM & STRAPS
R112
100k
5 %
0402
NO STUFF
R116
100k
5 %
0402
COMMON
G1N
@digital.u_gpu_gb2c_64(sym_10):page13_i37
BGA595
COMMON
10/14 MISC2
D1
STRAP0
D2
STRAP1
E4
STRAP2
E3
STRAP3
D3
STRAP4
C1
STRAP5
NC
1V8
R118
100k
5 %
0402
NO STUFF
R124
100k
5 %
0402
COMMON
R115
100k
5 %
0402
NO STUFF
R121
100k
5 %
0402
COMMON
GND
E
GM1 08
RESERVED
STRAP5
STRAP4
STRAP3
ROM_CS
ROM_SI
ROM_SO
ROM_SCLK
BUFRST
ROM_CS*ROM_CS_R*
D12
ROM_SI
B12
ROM_SO
A12
ROM_SO
ROM_SCLK
C12
ROM_SCLK
SNN_GPU_BUFRST*
D11
FD
R123
100k
5 %
0402
NO STUFF
R126
100k
5 %
0402
COMMON
R125
100k
5 %
0402
NO STUFF
R129
100k
5 %
0402
COMMON
R52133ohm
0402COMMON
R530
0402COMMON
R522
0402
R527
0402
1V8
R110
100k
5 %
0402
COMMON
R114
100k
5 %
0402
NO STUFF
GND
0.05 ohm
5 %
0.05 ohm
5 %
33ohm
0ohm
COMMON
33ohm
COMMON
R526
10k
5 %
0402
COMMON
ROM_SI_R
ROM_SO_R
ROM_SCLK_R
ROM_SO
ROM_SI
ROM_SCLK
1V8
U501
@memory.u_mem_fl_ser_512kx8(sym_1):page13_i31
SO_8
COMMON
7
HOLD*8VCC
3
WP*/NC
1
CS*
5
DIO
2
DO
6
G
GND
CLK
R523
100k
5 %
0402
NO STUFF
R520
100k
5 %
0402
COMMON
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date :Sheetof
Date :Sheetof
Date :Sheetof
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
4
R531
100k
5 %
0402
NO STUFF
R532
100k
5 %
0402
COMMON
1V8
C651
0.1uF
16V
10%
X7R
0402
COMMON
GND
1V8
R529
100k
5 %
0402
NO STUFF
R528
100k
5 %
0402
COMMON
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
ROM & STRAPS
ROM & STRAPS
ROM & STRAPS
Design By:
Design By:
P85C
P85C
P85C
Design By:
James LeeV10
James LeeV10
James LeeV10
H
1321Wednesday, April 05, 2017
1321Wednesday, April 05, 2017
1321Wednesday, April 05, 2017
1
2
3
4
5
Page 14
A
Power Sequence
B
CD
E
FGH
R545
1
D4
3
PS_NVVDD_S_EN
SOT23
PS_NVVDD_PG
PS_NV3V3_EN
NV3V3
R90
1k
5 %
0402
COMMON
18,19
16
R552
R548
0402
0402
0.05 ohm
Optional
PS_NVVDD_S_EN_R
0ohm
COMMON
0.05 ohm
0ohm
NO STUFF
NV3V3
R91
10k
5 %
0402
COMMON
THERM_OVERT*
IN
PS_1V8_PG
IN
2
3
12
15,16
@discrete.d_3pin_aa(sym_1):page14_i26
1
2
COMMON
IN
IN
3V3_PEX
5
1
2
3
GND
R550
0402NO STUFF
0.05 ohm
C692
10nF
0402
25V
10%
X7R
COMMON
U503
@logic.u_and_2in(sym_1):page14_i143
4
SC70-5
COMMON
0ohm
R549
0ohm
0402
NO STUFF
0.05 ohm
R5510ohm
0402COMMON
0.05 ohm
Optional
10k
0402COMMON
5 %
GND
PS_NVVDD_PEXVDD_EN
R553
0402
0.05 ohm
R554
10k
5 %
0402
NO STUFF
GND
19
GND
0ohm
COMMON
16
POWER D OWN CTL
PS_NVVDD_EN
C690
0.1uF
16V
10%
X7R
0402
COMMON
PS_PEXVDD_EN
17
C707
10nF
25V
10%
X7R
0402
NO STUFF
GND
PS_DW_CTL
OUT
OUT
OUT
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
B
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ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
Power Sequence
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
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Size Project Name: Rev
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Custom
Custom
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Date :Sheetof
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PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
E
FD
G
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Power Sequence
Power Sequence
Power Sequence
Design By:
Design By:
P85C
P85C
P85C
Design By:
James LeeV10
James LeeV10
James LeeV10
H
1421Wednesday, April 05, 2017
1421Wednesday, April 05, 2017
1421Wednesday, April 05, 2017
Page 15
A
B
CD
E
FGH
POWER:1V8 & 5V
12V_PEX
C106
0.1uF
16V
10%
X7R
0402
1
C105
0.1uF
16V
10%
X7R
0402
COMMON
14,16
3V3_PEX
R95
10k
5 %
0402
NO STUFF
0.250
PS_1V8_EN
R96
49.9k
1 %
0402
COMMON
R98
100k
1 %
0402
COMMON
GND
PS_1V8_SWTH_VDD
2
6
7
1
4
GND
3V3_PEX
R109
10k
1 %
0402
COMMON
INPUT_3V3_EN
R108
3.01k
1 %
0402
NO STUFF
GND
2
GND
C124
10nF
25V
10%
X7R
0402
NO STUFF
1B1C1E
B
6
C
Q21A
@discrete.q_npn(sym_1):page15_i76
2
SOT363
COMMON
E
1
GND
R107
10k
1 %
0402
COMMON
INPUT_12V_EN
12V_PEX
1B1C1E
12V_PEX
3
C
Q21B
B
@discrete.q_npn(sym_1):page15_i79
5
SOT363
COMMON
E
4
GND
R104
10k
1 %
0402
COMMON
GND
R105
3.83k
1 %
0402
COMMON
C107
1uF
6.3V
10%
X6S
0402
NO STUFF
GND
GND
PS_1V8_PG
OUT
COMMON
GND
U7
@power_supply.u_swreg_sot23_8hv(sym_1):page15_i92
RT7296
SOT23_8
COMMON
VIN
EN/FSYNC
VCC
MOD/PG
GND
MP147 5:316-0 470- 000
RT7296F :316-0 472-0 00
C97
C98
1uF
1uF
16V
16V
10%
10%
X7R
X7R
0603
0603
COMMON
COMMON
PS_1V8_BOOTPS_1V8_BOOT_R
R100
5
BOOT
SW
FB
3
8
0402
5 %
PS_1V8_SWTH_FB_U
R99
100ohm
1 %
0402
COMMON
PS_1V8_SWTH_FB
R101
10k
1 %
Rbot
0402
COMMON
4.7ohm
COMMON
PS_1V8_SW
C103
1uF
16V
10%
X7R
0603
COMMON
COMMON
0.400
R10212.7k
C104
1uF
16V
10%
X7R
0603
COMMON
C114
0402 50V
0402
1 %
Rtop
15pF
5%
C0G
C108
0402 16V
COMMON
0.1uF
10%
COMMON
X7R
0.03ohm
3.5A
L83A2.2uH
COMMONSMD_5X5
PS_1V8_SWTH_FB_MISC
R130
0ohm
0.05 ohm
0402
COMMON
1
C116
22uF
6.3V
20%
X6S
0805
COMMON
1V8
C122
22uF
4V
20%
X6S
0603W
NO STUFF
2
2.1A MAX
C121
C117
22uF
22uF
6.3V
4V
20%
20%
X6S
X6S
0805
0603W
COMMON
NO STUFF
GND
C125
22uF
6.3V
20%
X6S
0805
COMMON
GND
2.1A
C111
22uF
4V
20%
X6S
0603W
NO STUFF
1.8V
C112
22uF
6.3V
20%
X6S
0805
COMMON
GNDGND
C126
22uF
4V
20%
X6S
0603W
NO STUFF
Co-Layout 0805 and 0603
Vout = Vref * (1+Rtop/Rbo t)
GND
1.8V = 0.8V * (1+12.7K/10K)
3
DDC_5V
5V = 5V @ 120mA
12V_PEX
FR11.8ohm
COMMON
5 %
4
1206_F
0.400
PS_5V_PROT
12V
C35
1uF
16V
10%
X7R
0603
COMMON
GND
U1
@power_supply.u_vreg_3pin(sym_2):page15_i89
1.25V
GOI,IGOI,TO263
SOT223_GOI
COMMON
3
IN
GND/ADJ
1
OUT
TAB
PS_5V_ADJ
2
4
100mA
U504
@power_supply.u_vreg_3pin(sym_2):page15_i100
1.25V
GOI,IGOI,TO263
SOT223_GOI
COMMON
3
IN
PS_5VPVCC_ADJ
2
OUT
4
TAB
GND/ADJ
1
R557
340ohm
1 %
0402
COMMON
R556
1.02k
1 %
0402
COMMON
GND
R156 0ohm
NO STUFF0603
0.05 ohm
R27
340ohm
1 %
0402
COMMON
R29
1.02k
1 %
0402
COMMON
GND
0.12A
R155 0ohm
COMMON0603
0.05 ohm
GND
PS_5V_DDC_EN
5V
C4
0.1uF
16V
10%
X7R
0402
COMMON
DDC_5V
GND
C6
4.7uF
6.3V
20%
X6S
0603
COMMON
5
4
2
U37
INS16808441
SOT23_5B
COMMON
IN
EN
GND
OUT
1
SNN_5V_DDC_OC
3
OC*
12V_PEX
C711
0.1uF
16V
10%
X7R
0402
COMMON
GND
DDC_5V
5V
0.2A
0.400
C713
1uF
16V
10%
X7R
0603
COMMON
GND
R5630ohm
0.1A
0.05 ohm
GND
NO STUFF0402
C710
0.1uF
16V
10%
X7R
0402
COMMON
5V_PVCC
GND
C712
4.7uF
6.3V
20%
X6S
0603
COMMON
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
B
C
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
POWER:1V8 & 5V
GND
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date :Sheetof
Date :Sheetof
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PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
B
C
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
POWER: NV3V3, NV12V
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date :Sheetof
Date :Sheetof
Date :Sheetof
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
E
FD
G
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
POWER: NV3V3, NV12V
POWER: NV3V3, NV12V
POWER: NV3V3, NV12V
Design By:
Design By:
P85C
P85C
P85C
Design By:
James LeeV10
James LeeV10
James LeeV10
H
1621Wednesday, April 05, 2017
1621Wednesday, April 05, 2017
1621Wednesday, April 05, 2017
Page 17
A
POWER:PEX_VDD
B
CD
E
FGH
1
1
PEX_VDD
FBVDDQ
5V_PVCC
R1145
2R2ohm
0.05 ohm
0402
COMMON
C151
1uF
2
IN
PS_PEXVDD_EN
14
6.3V
10%
X6S
0402
COMMON
GND
SNN_PS_PEXVDD_PG
SNN_PS_PEXVDD_NC
3
4
2
1
5
U8
INS16810236
SOP8
COMMON
VIN
VCNTL
EN
POK
NC
C152
4.7uF
6.3V
20%
X6S
0603
COMMON
VOUT
GND
GND
FB
Vout = Vref * (1+Rtop/Rbot)
1.00V = 0.8V * (1+2.55k/10.2k)
3
6
7
9
8
GND
PS_PEX_LDO_FB
GND
PEX_VDD
C150
0.1uF
16V
10%
X7R
0402
COMMON
1.0V : 0.745A
0.745A1V0.400
R138
0ohm
0.05 ohm
0402
COMMON
C147
1nF
16V
10%
X7R
0402
COMMON
PS_PEX_LDO_FB_R
R139
2.55k
1 %
0402
COMMON
R140
10.2k
1 %
0402
COMMON
GND
2
PEX_VDD
C545
22uF
6.3V
20%
X6S
0805
NO STUFF
Co-Layout 0603 and 0805
Rt
Rb
C574
22uF
4V
20%
X6S
0603W
NO STUFF
C546
22uF
6.3V
20%
X6S
0805
COMMON
C547
22uF
4V
20%
X6S
0603W
NO STUFF
C571
22uF
6.3V
20%
X6S
0805
COMMON
C556
22uF
4V
20%
X6S
0603W
NO STUFF
C557
22uF
6.3V
20%
X6S
0805
COMMON
C544
22uF
4V
20%
X6S
0603W
NO STUFF
C573
22uF
6.3V
20%
X6S
0805
NO STUFF
GND
C572
22uF
4V
20%
X6S
0603W
NO STUFF
GND
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
B
C
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
POWER:PEX_VDD
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
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Custom
Custom
Custom
Date :Sheetof
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PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
B
C
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
POWER:FBVD DQ
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date :Sheetof
Date :Sheetof
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PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
B
C
ASSEMBLY
PAGE DETAIL
GND
<ASSEMBLY_DESCRIPTION>
POWER:NVVD D
R569
10k
1 %
0402
NO STUFF
4
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date :Sheetof
Date :Sheetof
Date :Sheetof
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
FD
G
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
POWER:NVVDD
POWER:NVVDD
POWER:NVVDD
Design By:
Design By:
P85C
P85C
P85C
Design By:
James LeeV10
James LeeV10
James LeeV10
H
2021Wednesday, April 05, 2017
2021Wednesday, April 05, 2017
2021Wednesday, April 05, 2017
Page 21
A
B
CD
E
FGH
Mechanical
BKT1
BRACKET
1
(DEPENDS ON I2C BUS PULL UP VOLTAGE)
(TO SELECT TO 3.3V OR 5V)
NV3V3
R1136
0
5%
R0805
5%
COMMON
R0402
5%
COMMON
R0402
COMMON
R1130
10K
5%
R0402
COMMON
R1131
100K
5%
R0402
COMMON
GND
0
COMMONR0603
0
COMMONR0603
I2CB_SCL_R
I2CB_SDA_R
OUT
BI
R1142
12
R1143
12
0/NC
EEPROMA0
0
2
C1918
0.1UF
COMMON
X7R
16V
C0402
U800
8
VCC_3V3
1
A0
2
A1
3
A2
6
SCL
7
WP
24C02/SO8
R1132
R1133
R1127
R1139
5%
COMMON
R0402
5%
COMMON
R0402
SDA
VCC
GND
4
GND
0
COMMONR0603
0
0/NC
0
EEPROMA0
J18
4
3
2
1
VERTICAL
COMMON
MALE
2.0MM
dip_head1x4_2mm_90
GND1
5 pin 90 Degree Connector
VCC_3V3
I2C_CLK
I2C_DATA
GND
EEPROMA1
EEPROMA2
EXTERNAL PROGRAMMING HEARDER
3
VCC_3V3
R1137
0
5%
COMMON
R0402
R1138
0/NC
5%
COMMON
4
GNDGNDGND
R0402
EEPROMA2
10%
GND
5
COMMONR0603
EEPROMA1
R1128
2.2K
5%
R0402
COMMON
D800
12
SM_SOD123
COMMON
R1129
2.2K
5%
R0402
COMMON
VCC_3V3
30VR
0.5A
R1134
R1135
NO STUFF
Mechanical
COOLING SOLUTION
4 connected mounting pins
123
4
GND
NVVDD
FBVDDQ
PEX_VDD PEX_VDD
DDC_5V
1V8
1
MECH. MOUNTING ALL
GPU_VTestP/NC
DDR_VTestP/NC
PCI_VTestP/NC
5VTestP/NC
1.8vTestP/NC
GND
nstp_oct2mm_dip
nstp_oct2mm_dip
nstp_oct2mm_dip
nstp_oct2mm_dip
nstp_oct2mm_dip
GNDTestP/NC
nst p_oct2mm_dip
MEC2
@mechanic.heatsink(sym_5):page21_i11
4PIN
COMMON
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAW INGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. N VIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO T HE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, W ITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A
B
C
ASSEMBLY
PAGE DETAIL
<ASSEMBLY_DESCRIPTION>
Mechanical
GND
5
Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Page Name:
Page Name:
Page Name:
Size Project Name: Rev
Size Project Name: Rev
Size Project Name: Rev
Custom
Custom
Custom
Date :Sheetof
Date :Sheetof
Date :Sheetof
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
PROPERTY NOTE: This doc ument contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
property to Galaxy Microsystems (HK) Ltd.
E
FD
G
property to Galaxy Microsystems (HK) Ltd.
Galaxy Microsystems (HK) Ltd.
Mechanical
Mechanical
Mechanical
Design By:
Design By:
P85C
P85C
P85C
Design By:
James LeeV10
James LeeV10
James LeeV10
H
2121Wednesday, April 05, 2017
2121Wednesday, April 05, 2017
2121Wednesday, April 05, 2017
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