Nuvoton CODEC User Manual

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CODEC Motherboard

Nuvoton Audio Codec

Motherboard

Evaluation Board User’s Guide

(For Nuvoton CODEC series: 8812, 8814, 8810, 88C10, 8811, 8820,

8822, 8822L, 88C22, 8401, 8402, 8501, and 8502.)

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Introduction

This system is a combination of hardware and software that enables fast and detailed evaluation of Nuvoton audio products. The hardware consists of a base evaluation board and a daughter card which contains the specific audio product to be evaluated. The daughter card system enables the use of the same base motherboard hardware and software to evaluate many different Nuvoton audio products. The software must be installed on a Windows based PC, and is compatible with most PC products and versions of the Windows operating system.

Summary Hardware Description

The motherboard includes a wide range of audio, power, and data input/output connectors that enable testing a very wide range of features and audio products. The motherboard kit includes a USB cable and the specific daughter card that was ordered with the system.

In most applications, the motherboard can be entirely powered via the included USB cable, and most testing can be done using only this cable as the power source. This system uses a large amount of USB power, and should NOT be used with longer or unknown quality USB cables. These can cause unreliable operation.

If additional daughter cards have been ordered with this system, it is strongly recommended to first install the software and test the system using the pre-installed daughter card. The motherboard and pre-installed daughter card have been carefully tested together, and it is best to fully verify the hardware/software system is working before changing to a different daughter card.

Summary Software Description

The supporting software includes many features that enable quick and thorough evaluation of the various supported Nuvoton audio products. The software includes easy-to-use predefined configurations, an intuitive GUI user interface, and also detailed register and bit manipulation controls to facilitate every technical level of device operation and evaluation.

Depending on how this system was ordered and delivered, software may either be provided on an included CD-ROM, or may be separately downloaded via the Internet. The software must be installed on a Windows based PC system. Downloaded versions of the software will require a Username and Password in order to start the installation process. Normally, this login information will have been provided in advance by a Nuvoton sales representative.

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TABLE OF CONTENTS

1. Hardware Overview ................................................................................................. 6

2. Software Installation and Set-Up ............................................................................. 7

3. PC Configuration ..................................................................................................... 8

4. Running the GUI Application ................................................................................... 9

5. Getting Started Using the GUI Application ............................................................. 10

5.1. DEMO Panel Status Indicators ...................................................................... 10

5.1.1. Device Attached/Detached Indicator ...................................................... 10

5.1.2. Power Up Indicator ................................................................................. 11

5.1.3. Busy Indicator ........................................................................................ 11

5.2. Introduction to Main Menu Bar ....................................................................... 11

5.2.1. Device ................................ ................................................................ .... 11

5.2.2. Mode ...................................................................................................... 11

5.2.3. Config .................................................................................................... 11

6. The Control Tabs ................................................................................................... 12

6.1. Demo Panel ................................................................................................... 12

6.1.1. Step 1: Configure ................................................................................... 13

6.1.2. Step 2: Load Settings ................................................................ ............. 13

6.1.3. Step 3: Evaluate ..................................................................................... 13

6.1.4. Demo Example for NAU8822 ................................................................. 14

6.2. Path View Control Panel ................................................................................ 14

6.2.1. Description of Special Icons in Path View............................................... 15

6.2.2. Path View Navigation Shortcuts ............................................................. 15

6.3. Device Control Panel ..................................................................................... 16

6.3.1. Device Settings ...................................................................................... 17

6.3.2. Board Settings ....................................................................................... 18

6.3.2.1. Command Interface ............................................................................ 18

6.3.2.1.1. External Control ........................................................................... 19

6.3.2.2. I2S Signal Connection ........................................................................ 19

6.3.2.2.1. Digital Audio Reset ...................................................................... 19

6.3.2.2.2. I2S Master ................................................................................... 19

6.3.2.2.2.1. On-Board USB ...................................................................... 19

6.3.2.2.2.2. Audio Precision I2S Master ................................................... 19

6.3.2.2.2.3. Digital Audio Master .............................................................. 20

6.3.2.2.3. I2S Slave ..................................................................................... 21

6.3.2.2.3.1. Audio Precision Slave Mode ................................................. 21

6.3.2.2.3.2. Digital Audio Slave ................................................................ 21

6.3.2.2.4. Direct Digital Audio Interface Header Enable ............................... 21

6.3.3. Power Management ............................................................................... 22

6.4. Input Path Control Panel ................................................................................ 23

6.4.1. Microphone Bias .................................................................................... 23

6.5. ADC/Filtering Control Panel ........................................................................... 24

6.6. Equalizer Control Panel ................................................................................. 25

6.7. Input Limiter and ALC Control Panel .............................................................. 26

6.8. DAC/PLL/Digital Audio Control Panel ............................................................ 27

6.8.1. DAC Control ........................................................................................... 28

6.8.1.1. Oversampling ..................................................................................... 28

6.8.2. PLL Control ............................................................................................ 29

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6.8.2.1. REFIMP ............................................................................................. 29

6.8.2.2. FS (Frame Sync) ................................................................................ 30

6.8.2.3. Clock Prescalers ................................................................................ 30

6.8.2.4. Config PLL ......................................................................................... 30

6.8.3. Digital Audio Control .............................................................................. 31

6.8.3.1. Clock Generation Control ................................................................... 31

6.8.3.1.1. CLKIOEN Master Mode ............................................................... 31

6.8.3.1.2. CLKM Master Clock ..................................................................... 32

6.8.3.1.3. BCLKSEL .................................................................................... 32

6.8.3.1.4. SMPLR Sample Rate ................................................................... 32

6.8.3.2. Companding Control .......................................................................... 32

6.8.3.2.1. PASSTHRU ................................................................................. 32

6.8.3.3. Audio Interface Control ....................................................................... 32

6.8.3.4. Jack Detect Bus Switching ................................................................. 32

6.9. Output Path Control Panel ............................................................................. 33

6.10. Register Map Control Panel ........................................................................... 34

6.10.1. Register Map Bit Control ........................................................................ 35

6.10.1.1. Register Map Update Bits (write-only bits) ...................................... 35

6.10.2. Audio Codec Register Control ................................................................ 35

6.11. Script Control Panel ....................................................................................... 36

6.11.1. Script Panel Structure ............................................................................ 36

6.11.2. Script Panel Syntax ................................................................................ 36

7. Daughter Card System .......................................................................................... 38

7.1. Changing Daughter Cards ............................................................................. 38

7.2. NAU8822 Daughter Card ............................................................................... 38

8. Jumpers and Connectors ....................................................................................... 40

8.1. Power Related Connectors and Options ........................................................ 40

8.1.1. Summary of Power Options and Limits .................................................. 41

8.1.2. Main 5Vdc Power ................................................................................... 41

8.1.3. Power LINK Jumpers ............................................................................. 42

8.2. Analog Inputs for NAU8822 ........................................................................... 43

8.3. Analog Outputs for NAU8822 ......................................................................... 44

8.3.1. Analog Output Options for NAU8822 ...................................................... 45

8.3.1.1. Headphone Detect ............................................................................. 46

8.3.1.2. Headphone Virtual Ground ................................................................. 46

8.3.1.3. DC Coupled Headphone Outputs ....................................................... 46

8.3.1.4. Ear Speaker Mode ............................................................................. 46

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8.4. Digital Audio Using the NAU8822 .................................................................. 47

8.4.1. NAU8822 Master Clock Requirement ..................................................... 47

8.4.2. Master Clock Selection ........................................................................... 47

8.4.3. Frame Sync (Sample Rate Clock) .......................................................... 47

8.4.4. Bit Clock (BLCK) .................................................................................... 47

8.5. Digital Audio Input .......................................................................................... 48

8.5.1. Formatted Digital Audio .......................................................................... 49

8.5.2. USB Audio ............................................................................................. 49

8.5.3. Unformatted Audio ................................................................................. 49

8.6. Digital Audio Output ....................................................................................... 50

8.6.1. Formatted Digital Audio .......................................................................... 50

8.6.2. USB Audio ............................................................................................. 50

8.6.3. Unformatted Audio ................................................................................. 50

8.7. Digital Audio Related Connector Options ....................................................... 51

8.8. USB and External Control CONNECTIONS ................................................... 52

8.8.1. Special Connectors ................................................................................ 52

8.9. Jumpers ......................................................................................................... 53

8.10. Table of Jumper Options ................................................................................ 54

8.11. Test Points ..................................................................................................... 55

8.12. Table of Test Points ....................................................................................... 56

9. NAU8822-EVB Schematics (High Resolution Images)........................................... 57

10. LIST OF FIGURES ............................................................................................ 65

11. LIST OF TABLES .............................................................................................. 65

12. VERSION HISTORY .......................................................................................... 65

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1 Hardware Overview

All instructions in this guide require some familiarity with the physical layout of the motherboard and daughter cards. This information is introduced as needed, so it is not necessary at first to memorize or understand the complete layout and functions of the hardware.

There are various daughter card can be used for the same motherboard. They are NAU8812, NAU8814, NAU8810, NAU88C10, NAU8811, NAU8820, WAU8822, NAU8822L, NAU88C22, NAU8401, NAU8402, NAU8501, and NAU8502.

However, to get started, a few basic inputs and outputs must be noted. The USB connector and external audio inputs/outputs are highlighted in this section.

Control and power are supplied via the USB connector. When first learning how to use this system, it is recommended to choose a simple audio input and output combination. One example would be to input audio from a line level source such as a CD-audio player into the Aux inputs, and to listen to the output on the headphone connector.

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Figure 1: CODEC Motherboard SYSTEM

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2 Software Installation and Set-Up

The software is installed using a standard PC installation software program that has been downloaded or supplied on a CD-ROM. The software installer is not an auto-start program, so it is necessary to locate the single executable (type .exe) file and run this program manually.

If the installation software has been downloaded, the installer program will request a Username and Password to complete the installation procedure. Normally, these will have been provided in advance by a Nuvoton sales representative. Using a downloaded version of the software will insure having the most recently released version of the program.

1. If no version of this GUI Application has been previously installed on the PC, components will be added that enable the PC to recognize the Nuvoton USB audio hardware. Depending on the operating system and configuration, it may be necessary to reboot the PC after the first-time installation. If the installation program recommends rebooting the PC, it is best to do so. However, a requested reboot can usually be ignored, and all components will operate correctly.

The software installation procedure does not overwrite or replace older versions of the GUI Application software. In some cases, it may be desirable to keep older versions of the application available while learning to use a newer version.

If it is preferred to remove older versions of the application, the software should be removed BEFORE installing the new software. The reason is that the un-install process may remove common shared library components needed by the newer version of the application. An undesired version application can be removed (before installing a newer version) using the standard un-install feature included in Windows PC "Add or Remove Programs" control panel.

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3 PC Configuration

IMPORTANT INFORMATION: The GUI Application software installation and configuration is entirely automatic. However, because the EVB is registered with the PC as an "Audio Device," sound from inside the PC may automatically be routed to the Nuvoton EVB. The EVB is registered as a USB audio device, because it has the capability to receive an audio stream over the USB bus.

Thus, after plugging the EVB into a PC, audio inside the PC may appear to stop working or be changed in ways that are surprising. Managing the PC audio routing will be especially important if it is desired to use the PC as an audio source as part of the EVB evaluation process.

Therefore, it is important to understand how to manage and control the PC built-in software and hardware audio features. What happens automatically, and the details of how to manage audio inside the PC will vary depending on the Windows version and specific PC hardware. Further details may be different if other audio hardware and or software has been installed on the PC.

In all Windows systems, the management of audio is similar. This is typically done using the "Control Panel" option in the Start Menu, and then selecting the appropriate audio control icon or menu item. It may also be possible to access the PC audio control panel by clicking or rightclicking on the speaker icon in the Task Bar, normally at the bottom of the PC screen.

After activating the audio control panel, there will be various options. There will be an option for routing sound to and from the PC, and in this option there will be a list of possible audio devices. The Nuvoton EVB is registered as an "Audio Device." It is possible other audio devices attached to the PC may have the same or similar name. The Nuvoton EVB can be identified in this case by unplugging/replugging into the PC to see which item is changed in the list of audio devices.

Again depending on the Windows system and configuration, any selection made in the control panel may later be automatically changed by the PC system. Also, media player software may not immediately recognize that the PC audio path has been changed. It is best to quit and then restart any media player application after making a change to the audio routing using the PC control panel.

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4 Running the GUI Application

After installation, and depending on the Windows operating system and installation options, an icon to start the application may have been added to either or both the Desktop and Start Menu locations. The program will always be available under the Run option in the Start Menu. The application name will always start with the word "Nuvoton.”

The application may be started with or without the motherboard USB hardware attached. If the motherboard is not attached, the application will run in a "software demo" mode that enables becoming more familiar with the software.

After starting, the following start-up screen will be displayed. The normal use of the application at this time is to click on the icon that matches the actual device

that is on the installed hardware daughter card. Clicking on this icon will then configure the software to match the attached hardware, and after this, evaluation can begin immediately. The next window that opens will be the DEMO page that is explained below.

Figure 2: GUI APPLICATION START-UP SCREEN

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5 Getting Started Using the GUI Application

After making the selection on the start-up screen to select the audio device to be evaluated, the GUI Application will open to the Demo Panel screen. All panels are structured similarly and include the Main Menu Bar, Control Tabs, and Status Indicators.

5.1 DEMO Panel Status Indicators

The Status Indicators are located in the lower left hand corner of every Control Tab screen. These indicators are especially important, as they provide the highest level of system status.

5.1.1 Device Attached/Detached Indicator

The Status Indicator on the far left is the most important. This indicator will be Green when the motherboard hardware is attached to the PC, and signals that the PC has recognized the hardware and established communication with the hardware. If the indicator is white, then no interaction with the motherboard or daughter card is possible.

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Figure 3: DEMO PANEL OVERVIEW

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5.1.2 Power Up Indicator

The middle status indicator is the Power Up Indicator. This will be Green after the software has powered up all elements on the motherboard necessary to interoperate with the daughter card. If the indicator is white, then the motherboard and communications between the motherboard and daughter card have not been set up, and no interaction with the daughter card is possible.

5.1.3 Busy Indicator

The status indicator on the right-hand side indicates when the GUI Application is making changes to the motherboard and/or the daughter card. This will be Green when all changes are completed and the hardware is configured for operation. This indicator will be white when the GUI Application is busy making changes to the motherboard and/or the daughter card.

5.2 Introduction to Main Menu Bar

The Main Menu Bar is included on the Demo Panel, the start-up screen, and all other views. This enables direct and quick access to some features common to all devices. Many of these features are for more experienced users, and this section can be studied as needed at a future time.

5.2.1 Device

The Device menu allows changing the selected daughter card device without restarting the application. This can be useful if the wrong device was accidentally selected, or it can be used to switch daughter cards without restarting or powering down the hardware. However it is preferred to power-down the hardware and restart the application to change daughter cards This more conservative procedure will insure the greatest reliability for both the hardware and software.

5.2.2 Mode

The Mode selection is normally automatic and the user should NOT change this. This menu item enables changing the hardware control bus protocol between the motherboard and the audio device being tested.

The Mode feature is included for instances when the motherboard or daughter card hardware has been custom modified to be hard-wired into a particular control bus configuration. Then, it is important to have a top-level menu control to change this selection. The control bus modes are explained in more detail in the section describing the Device Control menu tab functionality.

5.2.3 Config

The Config menu enables Exporting or Importing settings from a standard file stored on the PC system. This feature saves only the settings for the audio device being tested, and not the configuration of the motherboard itself. So, the motherboard must already be initialized and set up in the desired mode before executing the Import function.

Export/Import is useful for saving configurations for future use, or for sharing configurations with other users. It is also a convenient way to copy/paste a set of desired register settings from the EVB environment directly into software used to control the device in the actual end product.

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6 The Control Tabs

All of the main features and many options are selected by choosing one of the Control Tabs. This is the horizontal menu list immediately below the Main Menu. After the user selects the device, the application automatically opens into the Control Tab for the Demo Panel. It is best to first work with the Demo Panel to begin learning how to use this application and the other Control Tabs. The following sections describe the functions of each Control Tab in more detail.

6.1 Demo Panel

The Demo Panel is important, because it enables complete, proven, and working examples of how to configure the device on the daughter card. This panel also will automatically initialize the EVB (if necessary) and do other initialization as may be needed to start up the device on the daughter card. The idea of this panel is to be able to use the EVB with almost no understanding of any other function of the EVB and its many options.

The Demo Panel breaks down operation of the EVB into three simple steps. These are grouped together visually on the PC screen, and each group is labeled as a numbered Step.

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Figure 4: DEMO CONTROL PANEL

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6.1.1 Step 1: Choose Settings

The Choose Settings selection enables selection of the input, as well as the entire path for audio from the selected input, through all of the device options, and then to the output. The path descriptions are listed in an abbreviated form to fit within the GUI display.

The Choose Settings selection also enables choosing various possible outputs and output combinations that will work with the selected input. These selections may be scrolled one-at-atime using the up/down arrows in the output selection area. They may also be selected directly by clicking on the text of the output path that is shown. This will open a pop up a window showing all of the possible output selections, and then the desired selection can be made directly.

6.1.2 Step 2: Load Settings

Clicking on this button will cause all of the desired settings to be loaded into the audio device being tested. Additionally, any necessary changes to the EVB initialization or configuration will be performed automatically at this time.

While the settings are being loaded, the Status Indicators at the bottom left of the screen may change from Green to White. IMPORTANT: If the configuration was successfully completed, all three Status Indicators will be Green, and the configuration is now ready for evaluation.

6.1.3 Step 3: Evaluate Sound

The bottom portion of the screen includes a few controls that enable experimentation with some of the settings that can be changed on the audio device being tested. These can be changed using the GUI, and the effect on the device will be immediate. Do NOT push the "Load Settings" button again while using this feature. This will cause all of the settings to revert to the original selected Demo configuration.

At this time, it may be useful to select any of the other Control Tabs. These make available many more controls and features that can be changed after the Demo selection has been loaded.

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7 Demo Example for NAU8822

In this example, the goal is to pass audio from the left and right auxiliary inputs, into the ADC, from the ADC into the DAC, and then output to the headphones. This is accomplished by the following three steps:

Choose: "L/R AUXIN => L/R AuxBstGain => L/RADC => L/RDAC => M Mixer => Select for the output: Headphone Push the "Load Settings" button and verify all three Status Indicators change to Green

At this point, any line level audio input attached to the Aux inputs should be audible in a headphone attached to the headphone jack. A suitable line level audio source would be the output from a CD-audio player or other media player device.

7.1 Path View Control Panel

This panel shows in a graphical form the internal structure of the device being tested as it related to the available input, output, and control pins on the device. This is a highly interactive panel, and most of the features and controls are "clickable." This means that on the GUI screen you can simply click on a functional block or path and change its settings. You can also use this panel to see some of the settings that are currently in use.

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Figure 5: PATH VIEW

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This panel is intended to be used after a full set of settings has already been loaded into the device. This panel is difficult or impossible to use without having done this first. The main reason for this is that power control features are in the "off" condition, and these are not all directly available on the Path View.

To simplify use of the Path View, the Demo settings have been set up with all of the power control features in the "on" condition. This makes the Path View simpler to use, because it may not be at all obvious that a particular path is not working because one of the elements in the path does not have power.

7.1.1 Description of Special Icons in Path View

Here is a summary of the "language" that can be used in this graphical environment: The active path over which audio is enabled, is indicated by red colored

lines in the GUI. In some cases, the lines are clickable and the path can be enabled/disabled simply by clicking on the line. This includes on/off switches which are also clickable with the active path indicated in red.

A speaker icon indicates that an output or input block is enabled. The disabled state will show the speaker icon with the international red "crossed out" overlay.

Items for which a drop-down or pop-up menu will appear are marked with a small down-arrow icon. This can be used to either view the current setting or to change a setting.

On NAU8822 devices, some of the outputs can be in a "boost" or "non-boost" gain configuration. This status is indicated near the output icon with a red up-arrow symbol to indicate the Boost state, or a red horizontal line symbol indicating the "Non-Boost" state.

Additionally, if a block is does not have power, this will be indicated by a right-angle down-arrow icon. To reduce visual clutter on the display, the "power-on" status is not shown. Because the Demo selections enable all power to all blocks, no power-down icons will normally be seen. However, if power is turned off using other Control Tabs, or the Path View is selected before loading any settings into the device, then the power-down icons will be visible.

7.1.2 Path View Navigation Shortcuts

Clicking on blocks in the GUI view that have many functions will in some cases cause the display to switch to the Control Tab view appropriate for that block. This is a quick, powerful, and convenient way to change features in a block too complex to show in this Path View.

After clicking on a block that switches to a different Control Tab view, changes can be made in that view. When the changes are complete, simply right-click on the current Control Tab view, and the display will automatically switch back to the Path View. The Path View will automatically be updated to show any changes that were made in any of the other Control Tab panels.

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7.2 Device Control Panel

This panel modifies the basic configuration of both the motherboard and the audio device under test. In general, these features are for advanced users. Except for the "Initialize Board," "Initialize Device," and "Device Control" radio buttons, other settings in this panel should not be changed without a good understanding of the underlying functions.

The panel manages four basic groups of functions:

1) Radio button controls for motherboard and device management

2) Board Settings to select various motherboard hardware configuration options

3) Device Settings to select power options for high voltage NAU8822 outputs

4) Power Management features for the NAU8822 device For less experienced users, the only Device Control radio buttons that should be used are the

"Initialize Board" and "Initialize Device" buttons. These set up the motherboard and device, respectively, to basic starting conditions. These buttons may be most useful after having made many changes, and the state of the motherboard or device is unclear.

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Figure 6: DEVICE CONTROL OVERVIEW

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7.2.1 Device Settings

This changes the 5-volt or 3-volt settings of the NAU8822 outputs to match the actual voltage supplied on the VDDSPK pin. Management of the power options is explained in other sections of this document.

IMPORTANT: These settings should NOT be changed unless work is being done to change the internal or external VDDSPK voltage. For reliable operation, it is very important that these settings match the actual voltage on VDDSPK. The motherboard is set up by default to the 5-volt settings for VDDSPK, and this default software selection matches this default configuration.

The other Device Control radio buttons change various features as indicated by the text in the button. These change many different register values, and in many cases require a detailed understanding of information in the device data sheet and/or design guide.

 Reset: Writes to Register 0x00 of an NAU8822 device for its Reset condition  PowerUp: Turns on basic registers to put an NAU8822 device into an "on" condition  PowerDown: Sets an NAU8822 device into a low power "sleep" condition  MuteAllOutputs: Enables only the Mute function on NAU8822 outputs  EnableAllOutputs: Turns on power control bits for all outputs  DisableAllOutputs: Turns off power control bits for all outputs  LoadDefaultUpdateBits: Write to update bits to cause update feature to take place

Figure 7: DEVICE CONTROL PANEL - DEVICE SETTINGS

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7.2.2 Board Settings

These settings change the basic configuration of the motherboard communications with the device on the daughter card. These can affect the control bus mode, the I2S audio data stream, and also select external connectors as alternative sources and sinks for these signals.

IMPORTANT: Changes to this portion of the panel do NOT become effective until pushing the "Config Board" radio button. This button is located at the bottom of this grouping of controls.

Figure 8: DEVICE CONTROL PANEL – BOARD SETTINGS

7.3 Command Interface

This selects options for the control bus to the daughter card device. Normally, this selection is automatic and these settings should not be changed unless there is a specific goal to work with the command interface.

The listed options set up the motherboard and device on the daughter card to work together in the indicated mode. Additionally, the speed of the I2C clock can be altered.

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7.4 External Control

In addition to the built-in interfaces, an external command interface control can be selected. In this case, control to and from the daughter card is via the CONT. PORT, Connector J24. Bidirectional level shifters are used to connect the daughter card to this port instead of to the internal port provided on the motherboard.

Coupled with the External Control is the ability to set the MODE pin on the NAU8822 device to high or low. This feature is needed to set the control mode in the NAU8822 device as described in the NAU8822 device design guide.

When using the CONT. PORT interface, an additional option exists to set the voltage used by the level shifter. This is changed by the jumper on Connector J23. Pin #1 of this connector is indicated by a square symbol on the PCB silkscreen.

7.5 I2S Signal Connection

The I2S path is the serial data path for audio the digital audio signal to and from the device on the daughter card. This feature is automatically handled, and should be changed only when specific work is being done with the I2S bus.

7.5.1 Digital Audio Reset

A SPDIF controller chip is included on the motherboard for coupling audio to and from the device on the daughter card using I2S serial data. Selecting this option will reset the SPDIF controller.

7.5.2 I2S Master

The motherboard can be configured as the I2S Master or I2S Slave, but not both at the same time. In most applications, the motherboard will be the I2S Master. There are several options for the signal source in I2S Master Mode.

7.5.3 On-Board USB

When audio is streamed from the USB host (typically a PC computer), the USB controller device on the motherboard is configured by this selection to be the I2S Master. When selecting USB audio in the Demo Panel, this selection is made automatically.

It should be noted that the built-in USB controller supports only a monophonic data stream. In the Demo Panel configuration, this same audio stream is output to both the left and right channels. Also, the USB mode does NOT support streaming of audio from the daughter card to the PC.

7.5.4 Audio Precision I2S Master

This control is for when I2S audio is streamed from an external master source connected to the I2S_PORT, Connector J15. Bi-directional level shifters are selected by this option to connect the daughter card to this port instead of to the internal port provided on the motherboard. External equipment, such as an Audio Precision analyzer must be configured to be the I2S master.

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7.5.5 Digital Audio Master

This control is for when I2S audio is streamed from the SPDIF controller included on the motherboard. Bi-directional level shifters are selected by this option to connect the daughter card to the SPDIF controller, instead of to the USB I2S port also provided on the motherboard. When selecting SPDIF audio in the Demo Panel, this selection is made automatically.

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7.5.6 I2S Slave

The motherboard can be configured as the I2S Master or I2S Slave, but not both at the same time. In most applications, the motherboard will be the I2S Master. This section controls options for the audio signal source in I2S slave mode.

7.5.7 Audio Precision Slave Mode

This control is for when I2S audio is streamed to an external slave device connected to the I2S_PORT, Connector J15. Bi-directional level shifters are selected by this option to connect the daughter card to this port instead of to the internal port provided on the motherboard. External equipment, such as an Audio Precision analyzer must be configured to be the I2S slave.

7.5.8 Digital Audio Slave

This control is for when I2S audio is streamed to the SPDIF controller included on the motherboard. Bi-directional level shifters are selected by this option to connect the daughter card to the SPDIF controller, instead of to the USB I2S port also provided on the motherboard.

At the present time, the GUI Application software does not implement the ability for the SPDIF controller to stream audio out from SPDIF_OUT, Connector J9.

7.5.9 Direct Digital Audio Interface Header Enable

This control connects the I2S port on the daughter card device directly to the I2S_PORT header Connector J15, but does not configure the daughter card device I2S direction. The daughter card device must be configured separately. Bi-directional level shifters are selected by this option to connect the daughter card to the J15 header connector, and not to any of the I2S devices on the motherboard.

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8 Power Management

This panel of controls gives direct access to the various power management bits available in the NAU8822 device. Control of these bits is normally automatic. These bit controls are made available here for convenient manipulation and evaluation of the power control features.

The function of each of these control bits is explained in detail in the NAU8822 device Design Guide documentation. The names for each control in this panel match the names given to specific control bits in the NAU8822 control registers. The description and function for each of these bits can be found (most easily by doing a text string search) in the Details of Register Operation appendix portion of the NAU8822 device Design Guide.

Figure 9: DEVICE CONTROL PANEL – POWER MANAGEMENT

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9 Input Path Control Panel

This Control Tab gives access to the various controls and settings for the analog audio input routing, power management, and gain blocks up to, but not including, the ADC converters. Control of these bits is normally automatic when using the Demo Panel. These bit controls are provided here for convenient manipulation and evaluation of the input path features and settings.

Figure 10: INPUT PATH CONTROL PANEL

9.1 Microphone Bias

This section also provides control over the microphone bias circuit. This function provides lownoise DC power from the MICBIAS output pin that is normally used to power one or more external microphones. The description and function for each of these bits can be found (most easily by doing a text string search) in the functional descriptions, and also, the Detailed Register Map in the NAU8822 device Design Guide.

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10 ADC/Filtering Control Panel

This Control Tab gives access to the various controls and settings in the ADC converter blocks. Controls are also included here for the digital high pass filter, digital notch filter, and gain options associated with the ADC function.

Control of these bits is normally automatic when using the Demo Panel. These controls are provided in this panel for convenient manipulation and evaluation of the ADC section features and signal processing settings.

Figure 11: ADC/FILTERING CONTROL PANEL

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11 Equalizer Control Panel

This Control Tab gives access to the various controls and settings for the Equalizer and 3-D Audio digital signal processing blocks. This pair of functions may be applied to either the ADC digital outputs, or to the DAC digital inputs, but not to both paths at the same time.

These features are explained in detail in the NAU8822 device Design Guide documentation. Also, the names for each control bit in this panel match the names given to specific control bits in the NAU8822 control registers as described in the detailed register map in the NAU8822 Design Guide. The description and function for each of these bits can be found (most easily by doing a text string search) in the Details of Register Operation appendix portion of the NAU8822 device Design Guide.

This panel provides both graphical equalizer style controls and control panel style controls to modify the Equalizer settings. A change in either type of control is reflected in both controls.

Additionally, a few Equalizer presets are provided in a scrolling window beneath the 3-D Audio controls. These presets give some examples of the many ways to configure the Equalizer. When a preset is applied, the settings for these are reflected in all of the control panels, and also, in the register map.

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Figure 12: EQUALIZER CONTROL PANEL

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12 Input Limiter and ALC Control Panel

This Control Tab gives access to the various controls and settings for the Input Limiter and ALC signal control blocks.

The operation of each of these functions is explained in detail in the NAU8822 device Design Guide documentation. Also, the names for each control bit in this panel match the names given to specific control bits in the NAU8822 control registers as described in the detailed register map in the NAU8822 Design Guide. The description and function for each of these bits can be found (most easily by doing a text string search) in the Details of Register Operation appendix portion of the NAU8822 device Design Guide.

Figure 13: INPUT LIMITER AND ALC CONTROL PANEL

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13 DAC/PLL/Digital Audio Control Panel

This Control Tab manages three major functional groups: control of the DACs themselves, management of the PLL and voltage reference that support the DACs, and miscellaneous functions also related to operation of the DACs.

The GUI Application performs a few additional services not described in the Design Guide. These are described in this section.

Figure 14: DAC/PLL/DIGITAL AUDIO PANEL OVERVIEW

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13.1 DAC Control

As mentioned in the heading of this section, the details of all of the functions and bits are described in detail in the NAU8822 Design Guide and appendices. The bit names match this documentation, and using a text string search in the Design Guide is a good method to quickly locate specific information about a specific control bit function.

Figure 15: DAC/PLL/DIGITAL AUDIO PANEL – DAC CONTROL

13.2 Oversampling

DAC and ADC performance is optimized when both are operated at the same oversampling rate. An added feature of the GUI Application is that when either the ADC or DAC oversampling rate is changed, both are changed by the application. If it is desired to make the ADC and DAC operate at different oversampling rates, this can be done using the Register Map control tab.

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13.3 PLL Control

The PLL is one of the most powerful and also most difficult to understand features of NAU8822 devices. It is important to understand carefully the detailed information regarding the PLL that is included in the NAU8822 Design Guide.

As mentioned in the heading of this section, the details of all of the functions and bits are described in detail in the NAU8822 design guide and appendices. The bit names match this documentation, and using a text string search in the Design Guide is a good method to quickly locate specific information about a specific control bit function.

Figure 16: DAC/PLL/DIGITAL AUDIO PANEL – PLL CONTROL

13.4 REFIMP

The PLL cannot be enabled unless the reference impedance is enabled. This is part of the power management functionality to help minimize power consumption when the device is put into a nonoperating mode.

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13.5 FS (Frame Sync)

This is the pin name and bit name for the Frame Sync function. The FS rate is normally the same as actual sampling rate intended for the device. However, FS is simply the rate at which samples are transmitted over the I2S or PCM digital audio bus. It is not inherent in the device that the ADC and DAC are actually also operating at the FS sample rate.

The FS rate can be left as Default, or selected to be Custom. In either case, this section of the PLL Control features will set up the PLL to operate the ADC and DAC at the desired sample rate. If the device is set to be the bus master, then FS will be exactly the specified sample rate.

If the device is in "slave" mode, best performance will be achieved when the FS signal is phase locked with the ADC and DAC and operating at the same exact sampling rate. The default configuration for the PLL is to convert a 12.000MHz external MCLK into an internal 12.288MHz signal for the internal IMCLK signal, which sets a 48.000kHz sample rate for both the ADC and DAC. The ADC and DAC always have the same sampling rate.

13.6 Clock Prescalers

Choosing the optimum prescale values and PLL coefficients is a complex process linked to the details of the configuration and desired operation of the end-product system. As an aid to this process, the GUI Application can be asked to automatically determine the best PLL parameters.

However, this needs to be checked against the instructions in the Design Guide, because the automatic calculation may not guess correctly the entire desired configuration. As a further aid,

the clock prescalers can be set to "Fixed" or "Auto." If set to "Auto,” the Calculate function will

make its best guess how to set the prescaler value. If set to "Fixed," the Calculate function will use the prescaler value set in this control panel.

13.7 Config PLL

This radio button causes all manually entered or automatically determined PLL parameters to be loaded into the PLL control registers. No change to the PLL control registers is made until the button is activated.

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13.8 Digital Audio Control

Figure 17: DAC/PLL/DIGITAL AUDIO PANEL – DIGITAL AUDIO CONTROL

13.9 Clock Generation Control

The Clock Generation Control block sets up the relationship of the ADC and DAC to the FS and BLCK digital audio data bus signals. It is important to understand carefully the detailed information regarding this, which is in the PLL description in the NAU8822 Design Guide.

13.10 CLKIOEN Master Mode

Selecting this control bit will cause NAU8822 device to drive the FS and BCLK pins as the master of the I2S or PCM digital audio data bus. If this is not selected, the NAU8822 device will be the slave of the digital audio data bus and the FS and BLCK pins will be used as inputs to the NAU8822 device.

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13.11 CLKM Master Clock

Selecting this control bit will cause the NAU8822 device to use the PLL output as the input to its Master Clock (IMCLK) Prescaler. If this is not selected, the IMCLK Prescaler will use the signal on the external MCLK pin as its input.

13.12 BCLKSEL

This has an effect only if the NAU8822 device is the audio bus master. When the device is the audio bus master, the internal IMCLK rate will be divided by the factor set in this panel, and this will become the rate of the FS signal on the FS output pin.

13.13 SMPLR Sample Rate

This control value does NOT change the sampling rate in any way. The SMPLR value exists because the digital signal processing algorithms have no information to know the actual physical sample rate. This is determined by the external MCLK frequency. The only function of the SMPLR value is to scale the ADC high pass filter coefficients to be compensated for the actual sample rate of the system. If SMPLR is set correctly, then the high pass filter cutoff frequency will be the desired value as listed in the NAU8822 Design Guide. The Equalizer cutoff frequencies have no such compensation. The nominal Equalizer cutoff frequencies in the design guide are for a 48kHz sample rate. For example, if the actual sample rate is 24kHz, then the Equalizer cutoff frequencies will be one half of the values listed for 48kHz in the Design Guide.

13.14 Companding Control

Companding implements a non-linear compression/decompression of the audio signal as explained in the NAU8822 device Design Guide. Most applications for the NAU8822 will not use this feature.

13.15 PASSTHRU

When enabled, the pass-through mode causes data from the left and right ADC outputs to flow directly into the digital signal processing chain for the DAC output section. In this mode, data on the DACIN pin are ignored and replaced with data from the corresponding ADCs. ADC data continues to be output on the ADCOUT pin.

13.16 Audio Interface Control

These controls affect how audio data are formatted and input or output on the serial digital audio bus and are explained in the device Design Guide. The "MONO" control does not affect formatting. This feature may be useful when only the left ADC is being used, and it is important to guarantee that the right channel information is exactly zero.

13.17 Jack Detect Bus Switching

These controls affect various options related to the jack detection feature as detailed in the device Design Guide. The idea of jack detection is that a logic level change can be sensed on one of the GPIO pins, and this change will then enable/disable specified outputs and power control blocks.

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14 Output Path Control Panel

This Control Tab gives access to the various controls and settings for the analog outputs, and the analog mixers that work together with the analog outputs.

The operation of each of these functions is explained in detail in the NAU8822 device Design Guide documentation. Also, the names for each control bit in this panel match the names given to specific control bits in the NAU8822 control registers as described in the Design Guide detailed register map. The description and function for each of these bits can be found (most easily by doing a text string search) in the Details of Register Operation appendix portion of the NAU8822 device Design Guide.

Figure 18: OUTPUT PATH CONTROL PANEL

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15 Register Map Control Panel

When the Register Map control tab is selected, all of the bits in all of the registers will be displayed corresponding to the current settings in the device. In the case of any write-only bits, or in the case when the control bus is write-only (register values cannot be read back by software), the values displayed are values that are remembered by software, and that should be the same as the actual values used by the device.

If there is ever any uncertainty whether or not the values in the display truly reflect the values in the physical device, and if the control bus allows reading from the device, the display values can be refreshed by selecting the "Read All and Update" radio button in the “Audio Codec Register Control" panel. This will read all of the registers from the device, and all bits values that can be read from the device will then be updated in the GUI display to be the same.

Figure 19: REGISTER MAP CONTROL PANEL OVERVIEW

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15.1 Register Map Bit Control

In this view, any bit can be selected and altered. The changed value will be written to the actual device control register by hitting the "enter" or "return" key on the PC keyboard, or by simply moving the cursor to a different bit field. When any of these completing actions is done, the hexadecimal value column entry for that register will also be updated.

In this view, hexadecimal values may also be directly changed in the "Hex Val" column. The changed value will be written to the actual device control register by hitting the "enter" or "return" key on the PC keyboard, or by simply moving the cursor to a different bit field.

15.2 Register Map Update Bits (write-only bits)

The bits known as "update bits" are commands to the device that are not physically stored in the device control registers. These bits are displayed in the Register Map view as the present user preference. This preference may be altered at any time. When writing the device from the Register Map view, the displayed preferences for each update bit will be used when writing the respective register which contains that update bit.

Figure 20: REGISTER MAP CONTROL DETAILS

15.3 Audio Codec Register Control

This panel gives simple hexadecimal read and write control to all of the registers in the device. Both the register address and register data are in hexadecimal format. If the control bus is set up in a write-only format, then reading the device is not possible, and attempts to read the device will result in an error message from the GUI Application software.

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16 Script Control Panel

In all of the other Control Tabs, any time sequencing of operations to the device is automatic. This panel enables creating specific sequences of any specified register write operations. Only the commands in the script are executed, so the codec may already be configured using the other controls and panels. Then the script will modify what is already in the codec. This simplifies the script, because the script does not necessarily have to set up the entire codec.

16.1 Script Panel Structure

The main body of this panel contains the script to be executed, and at the top of the panel are three the radio button controls. The "Run" command will cause the entire script to be executed at that time. The "Save" command will save the current script into short term system memory (but not as a file). The "Load" command will recall an existing script from short term memory.

16.2 Script Panel Syntax

The script panel has a simple syntax. Each line contains a register address in hexadecimal form, followed by an equals sign, then followed by another hexadecimal value to be written into that register. The hexadecimal values are the same 9-bit long values as are shown in the Register Map view and device register level documentation.

Lines are separated by carriage returns (new line or "enter" on the PC keyboard). Comments are limited to one line and are any text preceded by a semicolon.

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Figure 21: SCRIPT CONTROL PANEL

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A time delay can be inserted by using negative 1 (hexadecimal 0x-1) as the register address followed by an equal sign and then an integer decimal value. In this case, the script program will pause for the duration of the decimal value in milliseconds.

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17 Daughter Card System

The daughter card is the small PCB mounted onto a socket connector on the main EVB motherboard, and this contains the device being evaluated. This arrangement enables a single EVB hardware and software system to support testing of a very wide range of Nuvoton audio products in a consistent, stable, and easy to use environment.

17.1 Changing Daughter Cards

If it is desired to use a different daughter card on the system, it is best to first completely remove all power connections to the EVB. Then, simply remove the existing daughter card and insert the new daughter card in the same location.

IMPORTANT: When inserting the new daughter card, make certain that the Pin #1 alignment matches the Pin #1 location indicated on the motherboard. Also, be careful to mount the daughter card so that all four rows of connectors are in fact connected. It is possible to offset the daughter card horizontally so that some rows are connected and other rows are not connected.

A good technique to insert a new daughter card is to hold the card at an angle so that it can be seen clearly visually that one row is completely and correctly aligned. After this first row begins to become connected, then in a rolling or rotating motion, swing the daughter card so that it is parallel with the motherboard and push to engage all of the other connectors.

17.2 NAU8822 Daughter Card

The new style NAU8822 daughter card includes series resistors on all of the low-current analog and digital signal paths. Most are zero-ohm resistors, but some have a small value to optimize clock signal integrity. A schematic diagram of the daughter card is included for reference.

The series resistors make it easy to modify the daughter card for experimentation, eliminating the need to cut actual foil traces on the PCB. Additionally, test points are included for: * digital ground (convenient for attaching test equipment) * analog ground (important for precise analog performance measurement) * Vref (AC and DC voltage reference used by the device)

A built-in microphone is also included on the new style daughter card. This can be connected by moving the two left microphone path jumpers, J11 and J14, from the normal location on the EVB onto the J1 and J2 pin-pairs on the daughter card as shown in the picture below. The Demo panel option for microphone input will now operate using the built-in microphone.

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Figure 22: NAU8822 DAUGHTER CARD; AS ORIENTED ON EVB; WITH MIC ENABLED

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18 Jumpers and Connectors

The EVB motherboard has many jumpers and connectors for maximum flexibility. These enable various combinations of internal/external power, simplify power measurements, change audio paths, change external command and control paths, and enable external streaming of audio data to and from the device on the daughter card.

18.1 Power Related Connectors and Options

The main power supply for the EVB and each regulated supply that supports the daughter card can be replaced with an external power supply connection. This makes it easy to test alternative power configurations.

WARNING: The EVB is carefully designed to keep built-in power supply combinations within safe

limits for the device on the daughter card. When using external power supply sources, extreme care must be used to make certain that the maximum power supply limits and power supply combination voltages on the device under test are never exceeded. Excessive power or incorrect power combinations may destroy both the daughter card and the motherboard.

Figure 23: POWER RELATED CONNECTORS AND OPTIONS

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19.1 Summary of Power Options and Limits

Connector

Name

Signal

Name

Supply Range

and Limits

Option

Jumper

Name

Power optioning description

Important: Note carefully the differing

pin #1 positions on each jumper

CON1

USB

USB host limited

n/a

Power is normally supplied entirely from the USB host. Series diodes will substitute power from the greater of either P1 or from J26 if either source is greater than 5Vdc from the USB host.

5vDC Center Pin = Positive (+V)

0.0Vdc to 5.5Vdc

n/a

Note: There is no jumper for this option. Series diodes pass power from P1 if this voltage is greater than 5Vdc coming from USB

DGND

0V (digital ground)

n/a

J18

EXT_VDDC

1.6Vdc to 3.6Vdc

J17

Pin 1-2 shorted selects External VDDC via J18 Pin 3-4 shorted selects VDDC=VDDB Pin 5-6 shorted selects VDDC=1.8Vdc

J19

EX_VDDA

2.5V to 3.6V VDDA must be ≥ VDDC

J21

Pin 1-2 shorted selects external VDDA via J19 Pin 2-3 shorted selects VDDA = 3.3Vdc

J22

EXT_VDDB

1.8V to 3.6V VDDB must be ≥ VDDC

J20

Pin 1-2 shorted selects External VDDB via J22 Pin 2-3 shorted selects VDDB=3.3Vdc

J26

EXT_+5V_IN

0.0Vdc to 5.5Vdc

n/a

Note: There is no jumper for this option. Series diodes pass power from J26 if this voltage is greater than 5Vdc coming from USB

J36

EX_VDDSPK

2.5V to 5.0V

J25

Pin 1-2 shorted selects external VDDSPK via J36 Pin 3-4 shorted selects built-in 5.0Vdc Pin 5-6 shorted selects VDDSPK = VDDA

IMPORTANT: Physical orientation of the various power selection jumpers is NOT the same. Each jumper must be examined carefully to determine its Pin #1 designator and orientation. The connector Pin #1 is marked with a white square in the silkscreen pattern on the PCB.

Default factory configuration highlighted in color

Table 1: POWER OPTIONS

19.2 Main 5Vdc Power

All power is usually supplied to the NAU8822-EVB USB interface via the USB connector. It should be noted that the voltage supplied via USB is nominally 5Vdc. However, this voltage supplied by the external USB host may be significantly less, especially if driving a loudspeaker at high volume using the device on the daughter card.

With most USB host devices and USB cables, it is not possible to achieve the full rated 1-Watt of loudspeaker power using only USB as the power source. Additionally, long or poor quality USB cables can cause the EVB to operate unreliably. The USB cable used with the EVB should be a high quality product and not longer than 1-meter.

If the primary purpose to use alternative power is to drive the speaker output to the full rated power, it is preferred to simply substitute an external supply for VDDSPK via J36. EVB operation is simpler if the main 5Vdc power other than for VDDSPK is supplied from the USB host.

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19.3 Power LINK Jumpers

Jumper

Supply

Name

Jumper Selection

LINK2

VDDC

Removing jumper completely disconnects DC path for VDDC from motherboard

LINK3

VDDA

Removing jumper completely disconnects DC path for VDDA from motherboard

LINK4

VDDB

Removing jumper completely disconnects DC path for VDDB from motherboard

LINK5

VDDSPK

Removing jumper completely disconnects DC path for VDDSPK from motherboard

Each power rail between the motherboard and the daughter card passes through a Link jumper. If this jumper is removed, the power connection is completely disconnected. These jumpers are useful as a point to measure power rail supply current, or to substitute external power directly to the device on the daughter card with no connection at all to any component on the motherboard.

On newer revisions of the EVB motherboard, the LINK jumpers are a red color plastic.

Table 2: POWER LINK JUMPERS

Figure 24: POWER LINK JUMPERS

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20 Analog Inputs for NAU8822

Jack

Name

Connector

Daughter

card

Jumper

Connect

Function and

Signal Name / Device Pin Number

on NAU8822

Line In

RCA jack - top RCA jack - bottom

H1,3 H1,6

None None

Left Line Level Input: LLIN: Pin #3 Right Line Level Input: RLIN, Pin #6

Phono Right

RCA jack - top RCA jack - bottom

H1,5 H1,4

J10: 2-3 J12: 2-3

Right Inverting Mic Input: RMICN, Pin #5 Right non-Inverting Mic In: RMICP, Pin #4

Phono Left

RCA jack - top RCA jack - bottom

H1,2 H1,1

J11: 2-3 J14: 2-3

Left Inverting Mic Input: LMICN, Pin #2 Left non-Inverting Mic In: LMICP, Pin #1

Auxin

RCA jack - top RCA jack - bottom

H4,3 H4,4

None None

Left Auxiliary Line Input: LAUXIN, Pin #19 Right Auxiliary Line Input: RAUXIN, Pin #20

J12

Stereo Mic /

Right Mic

3.5mm jack - tip

3.5mm jack - ring

3.5mm jack - sleeve

H1,4 H1,1 H1,5

J13: 1-2

Link1=on

J10: 1-2

Right non-Inverting Mic In: RMICP, Pin #4 Left non-Inverting Mic In: LMICP, Pin #1 Right Inverting Mic Input: RMICN, Pin #5

J16

Left Mic

3.5mm jack - tip

3.5mm jack - ring

3.5mm jack - sleeve

H1,1

None

H1,2

J14: 1-2

None

J11: 1-2

Left non-Inverting Mic In: LMICP, Pin #1 No connection Left Inverting Mic Input: LMICN, Pin #2

The analog inputs connect via passive components to pins on the daughter card. All paths are AC coupled, and passive components are typically transparent (such as zero-ohm resistors and RF bypass capacitors) at audio frequencies. Some paths may also pass through a jumper selection as outlined in this documentation.

In most cases, the analog inputs may be used intuitively without the need to know further details of the actual path through the EVB. The EVB schematic is included and readily available if further detailed understanding is needed.

Figure 25: ANALOG INPUTS

Default factory configuration highlighted in color

Table 3: ANALOG INPUTS

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21 Analog Outputs for NAU8822

Jack

Name

Connector

Daughter

card

Jumper

Connect

Function and

Signal Name / Device Pin Number

on NAU8822

J39

Line Out

RCA jack - top RCA jack - bottom

H1,3 H1,6

J30: 1-2 J31: 1-2

Left Line Level Output: LHP: Pin #30 Right Line Level Output: RHP, Pin #29

J45

Headphone

3.5mm jack - tip

3.5mm jack - ring

3.5mm jack - sleeve

H1,5 H1,4

n/a

J30: 2-3 J12: 2-3 J32: 1-2

Left Headphone Output: LHP, Pin #30 Right Headphone Output: RHP, Pin #29 Sleeve connected to Analog Ground

J43

Auxout1

RCA jack (single)

H4,5

None

Auxiliary Output #1: AUXOUT1, Pin #21

J42

Auxout2

RCA jack (single)

H4,6

None

Auxiliary Output #2: AUXOUT2, Pin #22

J40

Spkr LineOut

RCA jack - top RCA jack - bottom

H3,1 H4,7

None None

Left Speaker line out: LSPKOUT, Pin #25 Right Speaker line out: RSPKOUT, Pin #23

J38

Speaker Out

3.5mm jack - tip

3.5mm jack - sleeve

H4,7 H3,1

None None

Mono-speaker right: RSPKOUT, Pin #23 Mono-speaker left: LSPKOUT, Pin #25

The analog outputs connect via passive components to pins on the daughter card. All paths are AC coupled, and passive components are typically transparent (such as zero-ohm resistors and RF bypass capacitors) at audio frequencies. Some paths may also pass through a jumper selection as outlined in this documentation.

In most cases, the analog outputs may be used intuitively without the need to know further details of the actual path through the EVB. The EVB schematic is included and readily available if further detailed understanding is needed.

Default factory configuration highlighted in color

Table 4: ANALOG OUTPUTS

Figure 26: ANALOG OUTPUTS

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21.1 Analog Output Options for NAU8822

Jumper and

Label on

Motherboard

Jumper Selection

J34 HP-DETECT

Installing this jumper on the motherboard connects the LLIN/GPIO2 pin of the NAU8822 to a pullup resistor tied to VDDB, and shorted to a lower voltage by the headphone jack in the state when nothing is inserted in the headphone jack.

Care should be taken to remove J34 if the headset detection function is not needed or being evaluated. This otherwise creates a large DC offset for the LLIN signal, and may give the appearance the LLIN input is malfunctioning.

J32 HP_DC-AC

"AC" default position, connecting pins 1-2. Headphone is tied to analog ground and should be AC coupled (J33 and J35 not-installed on motherboard).

"DC" position, connecting pins 2-3. Headphone is tied to AUXOUT2 which should be configured as a virtual ground, and in which case the headphone may be DC coupled.

J33 HP-DC

Installing J33 causes the left headphone connector output to be DC coupled to the LHP headphone output of the NAU8822.

J35 HP-DC

Installing J35 causes the left headphone connector output to be DC coupled to the LHP headphone output of the NAU8822.

H5 (header) AUX1

This is intended as the two-pin connection for an external ear speaker load, such as a telephony 150-ohm receiver transducer. This is not a jumper option location and no jumper should ever be installed at this location.

J30 LINE-HP

Position 1-2 Left Line_Out select and Position 2-3 selects Left HP-_Out (Left headphone out)

J31 LINE-HP

Position 1-2 Right Line_Out select and Position 2-3 selects Right HP+_Out (Right headphone out)

Several functional feature options are available related to the analog outputs.

Default factory configuration highlighted in color

Table 5: ANALOG OUTPUT OPTIONS

Figure 27: ANALOG OUTPUT OPTIONS

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22 Headphone Detect

The NAU8822 can detect the presence of a headphone by sensing a logic level DC voltage change at its GPIO pins. On the motherboard, an option exists to connect the GPIO function of the Left Line input (LLIN/GPIO2) to a 33k-ohm pullup resistor to VDDB. This connection is made by inserting J34 onto the motherboard.

IMPORTANT: If jumper J34 is left inadvertently on the motherboard, the LLIN input will have a large DC offset voltage when no headphone is inserted into the headphone jack. This will cause this input to have a very limited voltage range and unexpected clipping owing to the large DC offset voltage. If it is desired to use the LLIN input as a signal input, J34 should be removed from the motherboard. Other GPIO pins can be selected for headphone jack detection in the same way by setting up the appropriate software configuration.

22.1 Headphone Virtual Ground

The headphone is normally connected to analog ground in the default configuration. An alternative configuration is to use Auxout2 as a "virtual ground" for the headphone. This is done by moving jumper J32 to short the pin 2-3 position. In this mode of operation, the Auxout2 output is normally set to Mute, but enabled to output the same DC voltage output as the headphone output pins. When this is done, AC coupling of the headphone output drivers is not necessary.

IMPORTANT: If jumper J32 is left inadvertently in the pin 2-3 position, unexpected results will happen depending on how Auxout2 is being used. The most common unexpected result is for Auxout2 to be in the high impedance state (not powered). In this case, the headphones will have no ground. Stereo signals will partially cancel, and an unusual mix in the headphones will result.

22.2 DC Coupled Headphone Outputs

The headphone outputs may optionally be DC coupled by inserting a jumper on the motherboard. Inserting J33 will cause the left headphone output to be DC coupled, and inserting J35 will cause the right headphone output to be DC coupled.

22.3 Ear Speaker Mode

This mode is typically used in telephony applications when the ear speaker transducer (such as a standard 150-ohm impedance receiver transducer) is driven as a floating monaural load. For this application, the ear speaker transducer would be placed across the two pins of the H5 two-pin header on the motherboard.

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23 Digital Audio Using the NAU8822

The NAU8822 supports digital audio input and output using I2S or PCM (DSP Mode) serial data communications. These various paths may be used directly, or as a convenience, the motherboard provides resources to convert these formats into commonly used external formats such as S/PDIF and USB audio. The connectors supporting these digital audio options are listed and discussed in this section.

23.1 NAU8822 Master Clock Requirement

The NAU8822 requires a high frequency master clock supplied via its MCLK pin to operate either the ADC or DAC blocks inside the NAU8822. For the best audio quality, the master clock should be phase locked in an integer ratio relationship with the sample clock (FS signal) of the external source. Further, the internal IMCLK signal clock rate to the ADC and DAC should be exactly 256 times the FS sample rate. This is explained in the Design Guide for the NAU8822.

23.2 Master Clock Selection

Many options are available for supplying a suitable MCLK under control of the W681308 microcontroller and using the extensive MCLK management resources provided by the NAU8822. The NAU8822 also includes a fractional-N PLL (phase locked loop) that can create a suitable internal MCLK signal using a wide range of available signals on its MCLK pin.

When using S/PDIF as an audio source, the S/PDIF transceiver provides a suitable MCLK. When using USB, the W681308 provides the 12.000MHz USB clock as the MCLK signal. An external MCLK clock may be supplied directly to the device on the daughter card via TP33.

To select this option, the J47 jumper selector must be moved from the default Pin 2-3 position to the Pin 1-2 position. MCLK may also be supplied to J8, however, this SMB style connector is not populated on the motherboard.

23.3 Frame Sync (Sample Rate Clock)

The FS signal is synonymous with the sample rate of the digital audio data bus. This signal does NOT in any way determine the ADC and DAC sample rate. For best audio quality, the master clock inside the NAU8822 should be set up so that the ADC and DAC are running phase locked at exactly the same sample rate as the FS signal. The FS signal is provided by the audio bus master. The W681308 microcontroller determines which device is the bus master and sets up the NAU8822 clock subsystem accordingly.

23.4 Bit Clock (BLCK)

The bit clock is a medium speed clock that initiates transfer of each audio bit in the I2S or PCM audio data stream. This clock is synchronous with the Frame Sync and provided by the same bus master that supplies the Frame Sync signal. The only requirement for the bit clock is to have a sufficient number of clock-edge transitions to transfer all of the audio data bits in the audio sample before the next Frame Sync transition occurs.

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24 Digital Audio Input

There are three methods to stream digital audio from the motherboard or external devices into the NAU8822 audio data interface. These paths are set up using the appropriate connectors, and also, using the W681308 microcontroller managed by the GUI Application software to set up the paths accordingly.

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24.1 Formatted Digital Audio

A serial audio transceiver that supports AES/EBU, UEC958, S/PDIF, EIAJ CP340/1201 serial digital audio formats is on the motherboard. Audio to the transceiver may be connected via either the S/PDIF optical coupler, S/PDIF RCA jack, or connected directly through the J7 header.

The transceiver and serial audio paths between the transceiver and the device on the daughter card are managed by the W681308 microcontroller. Level shifters are included on the motherboard to adjust signal levels appropriately for the voltages selected for the device on the daughter card.

24.2 USB Audio

Audio in mono format can be streamed from an external USB host through the W681308 microcontroller and output in I2S format to the device on the daughter card. USB audio is in a standard USB isochronous stream format. Level shifters are included on the motherboard to adjust signal levels appropriately for the voltages selected for the device on the daughter card.

24.3 Unformatted Audio

Bi-directional serial audio may be connected directly to a device on the daughter card via the J15 serial audio connector. Although J15 is labeled on the motherboard as an I2S port, this port may be used for either I2S or PCM (DSP mode) audio data modes as determined by the external device connected to the J15 header. The path to use the J15 header is managed by the W681308 microcontroller. Level shifters are included on the motherboard to adjust signal levels appropriately for the voltages selected for the device on the daughter card.

Figure 28: DIGITAL AUDIO INPUTS/OUTPUTS

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25 Digital Audio Output

There are three methods to stream digital audio from the NAU8822 audio data interface to the motherboard or external devices. These paths are set up using the appropriate connectors, and also, using the W681308 microcontroller managed by the GUI Application software to set up the paths accordingly.

25.1 Formatted Digital Audio

A serial audio transceiver that supports AES/EBU, UEC958, S/PDIF, EIAJ CP340/1201 serial digital audio formats is included on the motherboard. Audio data from the NAU8822, and clock information to or from the NAU8822 may be routed to the transceiver under control of the W681308. The audio data from the NAU8822 ADC will then be available on the S/PDIF serial output from RCA jack, J9.

When the W681308 has configured the motherboard to use the S/PDIF transceiver, the I2S audio and clock signals to/from the NAU8822 are available on header J7.

25.2 USB Audio

Audio data in mono format can be streamed from the NAU8822 ADC to the USB host through the W681308 microcontroller. USB audio is in a standard USB isochronous stream format.

25.3 Unformatted Audio

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25.4 Digital Audio Related Connector Options

Digital

Audio

Connector

Type

Signal Name and Description

RCA Jack

(single)

SPDIF_IN digital audio from an external audio device

RCA Jack

(single)

SPDIF_OUT digital audio to an external audio device

TP33

Test Point

MCLK_IN external source for master clock

SMB Connector

MCLK_IN external source for master clock (note: SMB connector not populated on PCB)

J7 pin1

Header

SPDIF_MCLK_OUT high speed clock generated by S/PDIF transceiver Passed to MCLK pin on daughter card if S/PDIF is set to be bus Master

J7 pin2

Header

SPDIF_ADCDAT_IN audio data from daughter card into S/PDIF transceiver This path is level shifted, but always enabled.

J7 pin3

Header

SPDIF_FRAME_IN frame sync from daughter card if provided by device on card

J7 pin4

Header

SPDIF_BCLK_IN bit clock from daughter card if provided by device on card

J7 pin5

Header

SPDIF_DACDAT_OUT serial audio data to daughter card

J7 pin6

Header

SPDIF_FRAME_OUT frame sync signal provided by S/PDIF transceiver

J7 pin7

Header

SPDIF_BLCK_OUT bit clock signal provided by the S/PDIF transceiver

J15 pin 1

Header

ADCOUT_AP audio data from daughter card if provided by device on card

J15 pin 3

Header

BCLK_AP bit clock to or from external device connected to J15

J15 pin 5

Header

FS_AP frame sync to or from external device connected to J15

J15 pin 7

Header

DACIN_AP audio data from external device

J15 pin 9

Header

MCLK_AP high speed MCLK signal to or from external device connected to J15

J47

Jumper

Pin 1-2 shorted to select external MCLK Pin 2-3 shorted to select internal MCLK on motherboard

Default factory configuration highlighted in color

Table 6: DIGITAL AUDIO CONNECTOR OPTIONS

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26 USB and External Control CONNECTIONS

Reference

Designator

Connector

Style

Pin Number

Signal Name

CON1

miniUSB

Type B

VCC

USBD-

USBD+

NC 5 GND

SHIELD

Connector

Name

Description

J15

JTAG_ICE

JTAG ICE connector

J29, J37, J41

J29

For Nuvoton use to program the W681308 USB controller

The motherboard is connected to the USB host using a standard mini-USB type connector. USB V1.1 is supported, and in most cases, all power for the EVB is supplied via the USB cable.

Table 7: USB CONNECTOR

26.1 Special Connectors

The motherboard is connected to the USB host using a standard mini-USB type connector. USB V1.1 is supported, and in most cases, all power for the EVB is supplied via the USB cable.

Table 8: SPECIAL CONNECTORS

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27 Jumpers

All images of the motherboard show the jumpers in the standard configuration. This image may be used for reference to restore jumpers to the original factory-new positions.

Figure 29: JUMPERS IN STANDARD CONFIGURATION

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27.1 Table of Jumper Options

Jumpers

Default Position

Description

J10

1-2 (short)

Position 1-2 selects Right MIC and Position 2-3 selects Right Phono

J11

1-2 (short)

Position 1-2 selects Left MIC and Position 2-3 selects Left Phono

J13

1-2 (short)

Position 1-2 selects Right MIC and Position 2-3 selects Right Phono

J14

1-2 (short)

Position 1-2 selects Left MIC and Position 2-3 selects Left Phono

J17

3-4(short)

The 3 position jumper selects the VDDC source. Position 1-2 Selects External VDD via J18, 3-4 Selects VDDB, and position 5-6 sects 1.8VDC

J20

2-3(short)

J20 Selects the VDDB source, position 1-2 selects external source via J22 position 2-3 selects 3.3VDC

J21

2-3(short)

J21 Selects the VDDA source, position 1-2 selects external source via J19 position 2-3 selects 3.3VDC

J23

2-3(short)

Install for external I2C at VDDB or I2C at 3.3V operation

J25

3-4 (short)

Speaker VDD selection jumper. Position 1-2 selects external source via (J36), position 34 selects 5VDc and position 5-6 selects analog power (VDDA)

J28

Not on PCB

JTAG.connector for factory use with the W681308 USB controller

J30

2-3(short)

Position 1-2 Left Line_Out select and Position 2-3 selects Left HP-_Out (Left headphone out)

J31

2-3(short)

Position 1-2 Right Line_Out select and Position 2-3 selects right HP+_Out (Right headphone out)

J32

1-2 (short)

Position 1-2 selects Headphone cap-less mode and Position 2-3 selects AC coupled headphone output

J33

Open

Open position selects Headphone cap-less mode and Closed Position selects DC coupled headphone output (HP-) (Output for WAU8812, and WAU8814)

J34

Open

Headphone detect

J35

Open

Open position selects Headphone cap-less mode and Closed Position selects DC coupled headphone output (HP+)

J41

Not on PCB

Connector for JTAG ICE

J47

2-3(short)

Install this jumper for external MCLK Position 1-2 enables external MCLK and poison 2-3 disables the external MCLK.

AUX1

Open

H5 header on schematic. This is never a jumper. Two pin header for 150-ohm ear speaker load.

Link1

Closed

Set up 3.5mm stereo microphone for stereo operation.

Link2

Closed

Connects VDDC pin H2-5, on daughter card to VDDC supply voltage

Link3

Closed

Connects VDDA pin H3-7, on daughter card to VDDA supply voltage

Link4

Closed

Connects VDDB pin H2-6, on daughter card to VDDB supply voltage

Link5

Closed

Connects VDDSPK pin H3-2, on daughter card to VDDSPK supply voltage

Table 9: JUMPER OPTIONS

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28 Test Points

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Figure 30: TEST POINTS

Page 56

CODEC Motherboard

28.1 Table of Test Points

Reference

Designator

Description

Signal Name

TP1

Digital Ground

DGND

TP2

Right Line_In

R_LIN

TP3

Left Line_In

L_LIN

TP4

Right Phono-In positive

RMIC_IN+

TP5

Right Phono-In Negative

RMIC_IN-

TP6

Left Phono-In positive

LMIC_IN+

TP7

Left Phono-In Negative

LMIC_IN-

TP8

Right Aux_IN

RAUXIN

TP9

Left Aux_IN

LAUXIN

TP10

Right Mic-In Positive

RMIC+

TP11

Right MIC-In Negative

RMIC-

TP12

Left MIC-In positive

LMIC+

TP13

Left MIC-In Negative

LMIC-

TP14

VDDC Source (J17)

J17-VDD-SRC

TP15

VDDB Source (J23)

J23 I2C

TP16

Analog Voltage test point

VDDA

TP17

Speaker VDD

VDDSPK

TP18

Digital Ground

DGND

TP19

Analog Ground

AGND

TP20

Analog Ground

AGND

TP21

External +5VDC P1

DC_EXT

TP22

Internal +5VDC Rail

+5V_IN

TP23

LINE OUT

L_OUT-

TP24

LINE OUT

L_OUT+

TP25

Headphone

HP-

TP26

Headphone

HP+

TP27

Differential Speaker Negative

DIFF-

TP28

Speaker Negative

SPK-

TP29

Differential Speaker Positive

DIFF+

TP332

Speaker positive

SPK+

TP31

AUXOU2

AUXOUT1

TP30

AUXOUT1

AUXOU2

TP33

External clock Input

MCLK_IN

CODEC Motherboard Manual Version 1.3 Page 56 of 66 April 12, 2016

Table 10: TEST POINTS

Page 57

CODEC Motherboard

DUT_LMICP

1234567

AGND

DUT_LMICP

R4 0

R14 100

DGND

DUT_HPP

R11 22

DUT_SPKOUTN

AGND

DUT_RMICP

.1UF

DUT_MCLK

C10

4.7UF

DGNDAGND

1 2

DUT_LAUXIN

AGND

R7 22

DUT_BCLK

DUT_AUXOUT1

C11

.1UF

4.7UF

1 2

R17 0

DUT_HPN

DUT_RAUXIN

DUT_AUXOUT2

C16

4.7UF

TP1

C13

4.7UF (no-pop)

DUT_CSB_GPIO

DUT_RLIN _GPIO

M-

R22 0

DUT_CSB_GPIO

DUT_LLIN_GPI O

DUT_SPKOUTP

DUT_MICBIAS

R18 0

DUT_AVDD

R3 0

4.7UF

C15

.1UF

1234567

R20 0

DUT_MODE

R10 100

DUT_HPN

4.7UF

DUT_MICBIAS

R2 0

DUT_BCLK

DUT_RLIN _GPIO

C12

4.7UF

DGND

DUT_DCVD D

DUT_HPP

DGND

DUT_ADCOU T

DUT_MICBIAS

TP3

DUT_RMICN

C18

4.7UF

R19 0

AGND DGND

R15 100

AGND

DUT_SCLK

DUT_AUXOUT2

.1UF

AGND

DGND

DUT_ADCOU T

DUT_SCLK

R25

1.2K 1%

M+

DUT_MODE

C14

.1UF

TP2

R6 0

R23

no-pop

DUT_SPKVDD

DUT_DBVDD

DUT_VREF

DUT_FS

DUT_AVDD

.1UF

R1 0

R24

1.2K 1%

DUT_LMICP

DUT_SPKOUTN

DUT_LLIN_GPI O

DUT_AUXOUT1

DUT_LMICN

DUT_DBVDD

DUT_SPKVDD

100UF

AGND

MICROPHON E

DUT_DCVD D

1234567

DUT_SDIN

DUT_AVDD

C17

4.7UF

DUT_MCLK

R13 100

DUT_SDIN

AGND

DGND

DUT_DACI N

DUT_FS

DUT_DACI N

DUT_VREF

AGND

DGND

DUT_LMICN

R9 22

AGND

DGND

DUT_SPKVDD

R16 0

R5 0

DUT_SPKOUTP

DUT_DBVDD

DUT_DCVD D

4.7UF

R8 22

DUT_LAUXIN

DUT_RAUXIN

DUT_RMICP

WAU8822/N AU8822

9107

151617

302425

419612

VREF

RAUXIN

RHP

VSSD

VDDA

RSPKOUT

RMICN

VDDC

VDDB

VSSA

ADCOUT

DACIN

BCLK

MCLK

CSB/GPIO1

SCLK

SDIO

MODE

LHP

VSSSPK

LSPKOUT

VDDSPK

AUXOUT2

MICBIAS

RMICP

LAUXIN

RLIN/ GPIO3

LMICP

LMICN

LLIN/GPI O2

AUXOUT1

GPAD

R21 0

DUT_RMICN

R12 0

29 NAU8822-EVB Schematics (High Resolution Images)

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Figure 31: NAU8822 DAUGHTER CARD SCHEMATIC

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J14

MICP

123

AGND

TP9

AVDD

DUT_LMICP PG1

C81 1UF

J10

MICN

123

WHITE

AUXL INPUT

Analog Inputs:

R59 0

AGND

R74

NoLoad

LEFT MIC

INPUT

RED

AUXR INPUT

TP5

R91

47K

C101 1UF

TP10

TP11

R69 0

LEFT

PHONO

INPUT

C88

220PF

R63 0

C99 1UF

R80

47K

TP2

RIGHT

PHONO

INPUT

R62

NoLoad

R84 680

TP12

R70

NoLoad

AGND

C86

220PF

R65 0

J11

MICN

123

Red

J13

MICP

123

RED

R2 INPUT

AGND

TP13

RIN JUMPER:

1-2 RIN MIC SELECT

2-3 RIN PHONO SELECT

TP3

R68

NoLoad

R64

NoLoad

Note: If RAvdd is

populated Rmbias

must not be

loaded

C87

220PF

R85 NoLoad

AGND

C83

220PF

R78 680

RIGHT MIC

INPUT

R71

NoLoad

C90 1UF

TP7

TP C102 1UF

C85

220PF

R66

NoLoad

C91 1UF

LINK1

C89

220PF

R61

NoLoad

Red

Stereo Mic Select

TP6

R83 0

C93

4.7UF

C12

NoLoad

AGND

C96

220PF

C82 1UF

LIP JUMPER:

1-2 LIP MIC SELECT

2-3 LIP PHONO SELECT

R92

C100 1UF

White

R60 0

AGND

(MIC Select)

C84

220PF

(RIN Phono Select)

C105

220PF

R73 0

(LIP Phono Select)

AGND

R72 0

AGND

(MIC Select)

MICBIAS PG1

R67 0

R81

LIN JUMPER:

1-2 LIN MIC SELECT

2-3 LIN PHONO SELECT

DUT_LAUXIN PG1

(RIP Phono Select)

DUT_LLIN_GPI O PG1,3

J12

CP-3533N-ND

251

White

DUT_LMICN PG1

TP4

(MIC Select)

AGND

DUT_RMICP PG1

WHITE

L2 INPUT

(MIC Select)

DUT_RMICN PG1

DUT_RAUXIN PG1

J16

CP-3533N-ND

251

DUT_RLIN _GPIO PG1,4, 5

RIP JUMPER:

1-2 RIP MIC SELECT

2-3 RIP PHONO SELECT

C80

220PF

TP8

(LIN Phono Select)

CODEC Motherboard Manual Version 1.3 Page 59 of 66 April 12, 2016

Figure 32: ANALOG INPUTS SCHEMATIC

Page 60

CODEC Motherboard

R117

33K

R109

4.7K

8 Ohm Speaker

TP23

AGND

TP32

R114 100

C65 100U F

DUT_SPKOUTNPG1

TP26

AGND

J35

C141

220PF

J32

SPKN

C140 1UF

R111

10K

R120

4.7K

C63 NoLoad

C134

220PF

DUT_HPPPG1

R110

4.7K

DUT_SPKOUTPPG1

J33

AGND

J42

OUT4

213

R118

10K

AGND

R122 100

R116 100

C135 1UF

TP19

AGND

C137

220PF

J45

SJ-3504

123

C64 NoLoad

DUT_AUXOUT1PG1

R112

47K

R113

47K

C133

220PF

10UFC131

J39

R123 100

10UFC130

C138 1UF

AGND

C132

220PF

R115 100

J30

LOUT1

123

C62 100U F

J40

TP28

TP31

C136 1UF

TP29

J34

HPP JUMPER:

1-2 Line_OUT

2-3 HP_OUT

R121 100

TP30

DBVDD

AGND

J43

OUT3

213

HPN JUMPER:

1-2 Line_OUT

2-3 HP_OUT

J38

MJ-3536

231

TP27

C139

220PF

DUT_HPNPG1

TP20

AGND

C142

220PF

J31

ROUT1

123

Ear Speaker Connection

R119

4.7K

TP24

DUT_LLIN_GPI O PG1,2

C143

220PF

AGND

DUT_AUXOUT2PG1

TP25

Figure 33: ANALOG OUTPUTS SCHEMATIC

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SPDIF_FRAME_INPG4

SPDIF_BCLK_INPG4

R58

R14

10K

DGND

SPDIF_RESB PG5

NoLoad

SPDIF_BCLK_OUT

R13 47K

SPDIF Interface

DGND

SPDIF_BCLK_OUT PG4

0.1UF

SPDIF Interface

R17 47K

VA+

R18 0

VA+

SPDIF Interface:

DGND

TP1

GND

R1 47K

CON7

1234567

SPDIF_FRAME_IN

0.1UF

SPDIF_ADCDAT_IN

DGND

.0047UF

Black

V33USB

Note: CS8427 is setup for I2S data format

R2 47K

47K

SPDIF_FRAME_OUT PG4

SPDIF_MCLK_OUT PG4

1.2K

DGND

V33USB

+5V_IN

SPDIF_IN

213

TORX177

SPDIF_MCLK_OUT

SPDIF_ADCDAT_INPG4,5

R5 47K

0.1UF

3.3uH

DGND

C10 0.1UF

CS8427

22276

121314

161718

COPY

DGND

AGNDVA+

VL+

VL2+

RST

RMCK

RERR

ILRCK

ISCLK

SDIN

TCBL

OSCLK

OLRCK

SDOUT

AUDIO/V

PRO/C

APMS

H/S

TXN

TXP

ORIG

RXP

RXN

EMPH/U

FILT

47uH

DGND

C6 0.1UF

+5V_IN

SPDIF_DACDAT_OUT

R15

NoLoad

DGND

4.7UF

R19

NoLoad

SPDIF_DACDAT_OUT PG4

0.1UF

SPDIF_OUT

213

SC982-04

1 5

4 8

R16 620

DGND

SPDIF_FRAME_OUT

C79 0.01UF

SPDIF_BCLK_IN

Figure 34: SPDIF INTERFACE SCHEMATIC

CODEC Motherboard Manual Version 1.3 Page 61 of 66 April 12, 2016

Page 62

CODEC Motherboard

DGND

AP_MASB

TDO

R102

R32

AP_MAS_EN PG4

DUT_MODE PG1

DUT_MODE

DGND

TMS

USB_MOSI

C111

0.1UF

DGND

SPDIF_RESBPG6

TCK

R95

47K

THE_BUTTON

V33USB

USB_I2S_EN PG4

SDO

XTI

R10

47K

C147

0.1UF

R31

C34

0.1UF

C144

0.01UF

J24

CON10A

1 2

3 4

5 6

7 8

9 10

DGND

XTO

JTAG

C124

22PF

R52

U28

DS1818

RSTVCC

GND

2N7002

TCK

DBVDD

DGND

C38

0.1UF

R100

TDI

TDO

R53 22

R12

47K

DUT_SCLK PG1

2N7002

V33USB

USB_CSB

+5V_IN

SPI_MODEB

USB_MOSI

EXT_CONTROL

U20

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

+5V_IN

SPDIF_MASB

U24

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

2N7002

C125

22PF

TDO

AP_MASB

USB_CSB

R26

47K

R45

DGND

V33USB

R29

RESETB

SCK

DGND

DUT_SDIN PG1

XTO

+5V_IN

DBVDD

TDO

DGND

DBVDD

DGND

SPDIF_MASB

THE_BUTTON

SDO

Q12

2N7002

312

DGND

USB_FRAME PG4

DGND

C145

0.1UF

V33USB

USB_I2SB

D15

RED_LED

C77

27PF

USB_MISO PG4

USB_MODE

R38

47K

+5V_IN

V33USB

DGND

J44

CON2

USB_DACDAT PG4

Reset _Butt on

USB_MODE

R57

1.2K

DGND

C56

0.1UF

V33USB

EXT_CONT

TDI

R46

2N7002

DGND

DIRECT_DUTB

SPDIF_SLVB

TDI

V33USB

2N7002

DGND

SPDIF_SLV_EN PG4

DGND

VDDL

SDI

SPI_MODE_EN

USB_MOSI

D19

GRN_LED

V33USB

C121

NOPOP

C74

51PF

DGND

R35 47K

R49 330

DUT_CSB_GPIO PG1,4

I2C_MODE

USB_MISO

C68 0. 1UF

+5V_IN

USB_I2SB

V33USB

DGND

+5V_IN

DGND

USB_MCLK PG4

R11

47K

SPDIF_MAS_EN PG4

V33USB

USB_ADCDAT_IN PG4,6

DUT_SDIN

2N7002

USB_BCLK PG4

C55

0.1UF

DGND

2N7002

DGND

VREF2

47K

U22

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

DGND

SDI

J37

CON12

R30

J27

CON5

12345

USB_SCLK

R43

47K

+5V_IN

USB_SCLK

+5V_IN

DUT_RLIN_GPIO PG1,2,4

XTO

TCK

R47 270

C48

0.1UF

DGND

SCK

U25

PCA9306_VSSOP

482

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

R101

NOPOP

DGND

U23

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

I2C_MODE

DUT_CSB_GPIO

SPDIF_RESB

THE_BUTTON

USB_SCLK

DGND

SPDIF_SLVB

USB_MODE

R40

47K

U27

W681308

123456789

101112

2526272829303132333435

37 38 39 40 41 42 43 44 45 46 47 48

TX_TRST

RX_TMS

GND3

XTOUT

XTIN

VDDL

VDD7DNDP

GND10

GPIO3_LED

GPIO0_TCK

CSB

SCLK

SDI

SDO

CSLB

BCLK

PCMR

PCMT

GPIO1_TDI

GPIO2_TDO

VPP

GND25

SPN

EARN

VDD28

EARP

SPP

GND31

MCGND

MCO

MCP

VREF2

VREF1

REGL KY4 KY3 KY2 KY1 KY0 KX4 KX3 KX2 KX1 KX0

JTAG

C69

0.1UF

R56

DBVDD

TMS

J28

CON3

123

V33USB

+5V_IN

C76

51PF

DGND

J29

CON10

+5V_IN

VREF1

SPI_MODEB

DGND

R34

47K

R51 22

47K

C116

NOPOP

V33USB

SCK

SDO

Y1 12MHz

C118

NOPOP

DGND

R105

NOPOP

C117

NOPOP

RESETB

R24

47K

R103

NOPOP

DGND

J23

CON3

123

TMS

XTI

AP_SLVB

2N7002

CON1

UX60A-MB-5ST

123567894

VCC

USBD-

USBD+

GND

SHELL

DGND

V33USB

DGND

AP_SLVB

EXT_CONTROL

R23

47K

R99

47K

V33USB

DUT_SDIN

C122

NOPOP

JTAG ICE Connector

+5V_IN

DUT_SCLK

R25

47K

C71

0.01UF

V33USB

C146 0.1UF

R42

47K

R55

DGND

R48 1M

DGND

J41

CON10A

1 2

3 4

5 6

7 8

9 10

DIRECT_DUT_EN PG4

DUT_SCLK

SPI_MODE_EN

R27

47K

SDI

Q11

2N7002

312

If the external signal interface VCC

is greater than DBVDD, external

PU resistors are required. External

VCC can range from DBVDD to

5VDC (w/ the PU's).

DGND

USB_CSB

R108

NOPOP

Install for external I2C@DBVDD

or I2C@3.3V operation.

DGND

Q10

2N7002

312

C75

27PF

DGND

AP_SLV_EN PG4

DIRECT_D UTB

EXT_CONT

C78

22PF

D16

YEL_LED

TCK

TDI

R124

10K

USB_5V

R106

NOPOP

2N7002

+5V_IN

R21

47K

DGND

DGND DGND

V33USB

R98

47K

Figure 35: USB CONTROLLER SCHEMATIC

CODEC Motherboard Manual Version 1.3 Page 62 of 66 April 12, 2016

Page 63

CODEC Motherboard

To AP for AP

Slave mode.

USB_DACD ATPG5

C28

0.1UF

U16

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

USB_I2S_ENPG5

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

ADCOUT_AP

DGND

ADCOUT_AP

DGND

AP_MAS_EN

SPDIF_D ACDAT_OUTPG6

DUT_BCLK

USB_MCLKPG5

Digital Audio

Interface

USB_FRAMEPG5

DUT_CSB_IN

D3 BAV16W

U18

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

DUT_DACI N

C23

0.1UF

DGND

DUT_MCLK PG1

DUT_BCLK_IN

DGND

C21

0.1UF

V33USB

BCLK_AP

R88 47K

C33

0.1UF

DIREC T_DUT_ENPG5

FS_AP

DGND

DBVDD

DGND

SPDIF_BC LK_INPG6

AP_MAS_ENPG5

FS_AP

ADCDAT_3V

J15

I2S Port

246810

13579

C108

0.1UF

SPDIF_F RAME_OUTPG6

FS_AP

SMB

DGND

C98

NOPOP

C35

0.1UF

DUT_BCLK

DUT_BCLK_IN

DGND

+5V_IN

C14

0.1UF

DGND

SPDIF_AD CDAT_INPG5,6

DUT_CSB_IN

DACIN _AP

DGND

U13

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

R77

NOPOP

On-board Digital Audio

SPDIF_MCLK_OU TPG6

C20

0.1UF

C15

0.1UF

DUT_CSB_GPIO PG1, 5

DUT_MCLK

BCLK_AP

C27

0.1UF

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

Direct Header Bypass

note: May require

external pull-up to

external VDD.

DGND

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

DACIN _AP

C11

0.1UF

SPDIF_SLV_ENPG5

DUT_DACI N

R82

NOPOP

R7 330

DUT_ADCOU T

DACIN _AP

MCLK_AP

C29

0.1UF

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

3.3VDC Digital Audio Interface.

SPDIF_F RAME_INPG6

MCLK_AP_OUT

SPDIF_MAS_EN

USB_ADCD AT_INPG5,6

DUT_BCLK_IN

+5V_IN

DUT_BCLK

C95

NOPOP

R76

NOPOP

DGND

C92

NOPOP

USB_BCLKPG5

ADCOUT_AP

DBVDD

SPDIF

MCLK_AP_OUT

DGND

USB_MISOPG5

DUT_FRAME_IN

DUT_ADCOU T PG1

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

R86

NOPOP

C94

NOPOP

+5V_IN

DBVDD

Master CLK Input

U11

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

DGND

DUT_DACI N PG1

FS_AP

DUT_FRAME_IN

To SPDIF

DUT_FRAME_IN

DBVDD

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

C13

0.1UF

U15

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

A<-B

U12

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

DUT_RLIN _GPIO PG1,2,5

DUT_FS PG1

DUT_FS

AP_SLV_EN

DGND

DBVDD

DGND

SPDIF_BC LK_OUTPG6

DGND

R75 330

From

USB

BCLK_AP

R79

NOPOP

DGND

D2 BAV16W

DUT_FS

C16

0.1UF

To USB

AP_SLV_ENPG5

MCLK_AP

BCLK_AP

74LVC8T245

123456789

101112 13

1415161718192021222324

VCCA

DIRA1A2A3A4A5A6A7A8

GND

GND GND

B8B7B6B5B4B3B2

VCCB

R96 47K

From

SPDIF

+5V_IN

C97

NOPOP

DUT_MCLK

DUT_FS

C19

0.1UF

U14

PCA9306_VSSOP

482

765

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

DGND

DBVDD

DGND

DUT_BCLK PG1

+5V_IN

R93 47K

R87 47K

V33USB

SPDIF_MAS_ENPG5

MCLK_AP

ADCDAT_3V

CODEC Motherboard Manual Version 1.3 Page 63 of 66 April 12, 2016

Figure 36: LEVEL TRANSLATORS SCHEMATIC

Page 64

CODEC Motherboard

PTC5

0.35A

DGND

MT1MOUNTING HOLE

R33 TBD

C43

0.1UF

R28

1.2K

TP17 +5V_IN

J17

DCVDD

1 2 3 4 5 6

DGND

J20

DBVDD

R94 TBD

PTC4

0.35A

DGND

C59

10UF

J19

BANANA

C25

10UF

DBVDD Power

DGND

C9 10UF

DGND

+5V_IN

TP18 GND

TP15

3.3VD

AGND

C104

0.1UF

D7 RED

C42

0.1UF

C73

0.1UF

DGND

R6 0

C128

0.1UF

AGND

U26

SPX1117

23 4

ADJ

VOUTVIN VOUT

+5V_IN

Analog Power

+5V_IN

DGND

Speaker Power

DGND

C22

10UF

C120 1UF

C18

4.7UF

PTC1

0.35A

D11 YELLOW

EXT_AVDD

PTC2

0.35A

C54

4.7UF

R54 0

0.33UF

D12 1SMB5920B

2 1

EXT_SPKVDD

DBVDD

C58

0.1UF

R37 1K

AVDD

DUT_DBVDD PG7

4.7V

SPKVDD

C70

10UF

+5V_IN

DUT_AVDD PG7

C45

10UF

MT6MOUNTING HOLE

DCV

AGND

DGND

AVDD

C47 1UF

C26 10UF

Codec Power:

DGND

V33USB

DGND

R41

1.2K

C114 .1UF

D8 GREEN

TP21 DC_EXT

DUT_DCVDD PG7

C53 .1UF

C31

0.1UF

+5V_IN ON

EXT_5V

4.7V

DBVDD

R89 TBD

AGND

C129

0.01UF

J36

BANANA

C103 1UF

AGND

DGND

AGND

U21

SPX1117

23 4

ADJ

VOUTVIN VOUT

TP14

1.8VC

FB2

D17

BAT60J

1 2

C41 10UF

U10

SPX1117

23 4

ADJ

VOUTVIN VOUT

4.7V

DBV

C112

0.1UF

MT3MOUNTING HOLE

D1 YELLOW

C32

10UF

AGND

DCVDD Power

+5V_IN

FB1

D18

BAT60J

1 2

R36 TBD

2.5MM DC J ACK

C123

0.1UF

USB_5V

TP16

3.3VA

C17 .1UF

D6 1SMB5917B

2 1

D5 1SMB5917B

2 1

5VDC INPUT

AGND

R97 TBD

J25

SPKVDD

1 2 3 4 5 6

EXT_SPKVDD

AGND

D9 RED

D10

BAT60J

1 2

MT4MOUNTING HOLE

C51

100UF

DGND

EXT_DCVDD

C72

100UF

J21

AVDD

R50

1.2K

R39

1.2K

C66

0.1UF

DC_EXT

MT5MOUNTING HOLE

DGND

J22

BANANA

R107 TBD

6.2V

J26

BANANA

6.2V

DGND

C126

0.01UF

MT2MOUNTING HOLE

R22

1.2K

C57 10UF

EXT_5V

C60 .1UF

DC_VIN

D13 1SMB5920B

2 1

+5V_IN

AGND

J18

BANANA

EXT_DBVDD

DGND

EXT_AVDD

D14

C115

4.7UF

R20 0

C67

10UF

TP22 +5V_IN

C109 1UF

D4 1SMB5917B

2 1

R104 TBD

C24

0.1UF

EXT_DCVDD

DGND

C119

0.33UF

R44 0

PTC3

0.35A

C61

10UF

C127

0.1UF

U17

SPX1117

23 4

ADJ

VOUTVIN VOUT

R90 TBD

C37

10UF

C50 10UF

DCVDD

AGND

EXT_DBVDD

BANANA

Figure 37: POWER SCHEMATIC

CODEC Motherboard Manual Version 1.3 Page 64 of 66 April 12, 2016

Page 65

CODEC Motherboard

LIST OF FIGURES

VERSION

DATE

PAGE

DESCRIPTION

Figure 1: NAU8822-EVB SYSTEM................................................................................................. 6

Figure 2: GUI APPLICATION START-UP SCREEN ...................................................................... 9

Figure 3: DEMO PANEL OVERVIEW .......................................................................................... 10

Figure 4: DEMO CONTROL PANEL ............................................................................................ 12

Figure 5: PATH VIEW ................................................................................................................... 14

Figure 6: DEVICE CONTROL OVERVIEW .................................................................................. 16

Figure 7: DEVICE CONTROL PANEL - DEVICE SETTINGS ...................................................... 17

Figure 8: DEVICE CONTROL PANEL – BOARD SETTINGS ..................................................... 18

Figure 9: DEVICE CONTROL PANEL – POWER MANAGEMENT ............................................. 22

Figure 10: INPUT PATH CONTROL PANEL ............................................................................... 23

Figure 11: ADC/FILTERING CONTROL PANEL ......................................................................... 24

Figure 12: EQUALIZER CONTROL PANEL ................................................................................ 25

Figure 13: INPUT LIMITER AND ALC CONTROL PANEL .......................................................... 26

Figure 14: DAC/PLL/DIGITAL AUDIO PANEL OVERVIEW......................................................... 27

Figure 15: DAC/PLL/DIGITAL AUDIO PANEL – DAC CONTROL ............................................... 28

Figure 16: DAC/PLL/DIGITAL AUDIO PANEL – PLL CONTROL ................................................ 29

Figure 17: DAC/PLL/DIGITAL AUDIO PANEL – DIGITAL AUDIO CONTROL ............................ 31

Figure 18: OUTPUT PATH CONTROL PANEL ........................................................................... 33

Figure 19: REGISTER MAP CONTROL PANEL OVERVIEW ..................................................... 34

Figure 20: REGISTER MAP CONTROL DETAILS ...................................................................... 35

Figure 21: SCRIPT CONTROL PANEL ........................................................................................ 36

Figure 22: NAU8822 DAUGHTER CARD; AS ORIENTED ON EVB; WITH MIC ENABLED ...... 39

Figure 23: POWER RELATED CONNECTORS AND OPTIONS ................................................ 40

Figure 24: POWER LINK JUMPERS ........................................................................................... 42

Figure 25: ANALOG INPUTS ....................................................................................................... 43

Figure 26: ANALOG OUTPUTS ................................................................................................... 44

Figure 27: ANALOG OUTPUT OPTIONS .................................................................................... 45

Figure 28: DIGITAL AUDIO INPUTS/OUTPUTS ......................................................................... 49

Figure 29: JUMPERS IN STANDARD CONFIGURATION .......................................................... 53

Figure 30: TEST POINTS ............................................................................................................. 55

Figure 31: NAU8822 DAUGHTER CARD SCHEMATIC .............................................................. 58

Figure 32: ANALOG INPUTS SCHEMATIC ................................................................................. 59

Figure 33: ANALOG OUTPUTS SCHEMATIC ............................................................................. 60

Figure 34: SPDIF INTERFACE SCHEMATIC .............................................................................. 61

Figure 35: USB CONTROLLER SCHEMATIC ............................................................................. 62

Figure 36: LEVEL TRANSLATORS SCHEMATIC ....................................................................... 63

Figure 37: POWER SCHEMATIC ................................................................................................. 64

LIST OF TABLES

Table 1: POWER OPTIONS ......................................................................................................... 41

Table 2: POWER LINK JUMPERS ............................................................................................... 42

Table 3: ANALOG INPUTS .......................................................................................................... 43

Table 4: ANALOG OUTPUTS ...................................................................................................... 44

Table 5: ANALOG OUTPUT OPTIONS ....................................................................................... 45

Table 6: DIGITAL AUDIO CONNECTOR OPTIONS .................................................................... 51

Table 7: USB CONNECTOR ........................................................................................................ 52

Table 8: SPECIAL CONNECTORS .............................................................................................. 52

Table 9: JUMPER OPTIONS ........................................................................................................ 54

Table 10: TEST POINTS .............................................................................................................. 56

VERSION HISTORY

CODEC Motherboard Manual Version 1.3 Page 65 of 66 April 12, 2016

Page 66

CODEC Motherboard

0.2

June 17, 2008 Preliminary revision

0.3

June 17, 2008 Preliminary revision

0.5

July 24, 2008 Preliminary revision

0.6

December 24, 2008

Preliminary revision

0.7

January 12, 2009

Preliminary revision

1.0

February 04, 2010

General Revision

1.1

February 22,2013

Changed the GUI screen capture to reflect

latest version

1.3

April 12, 2016

1 6

Changed Header & Title

Replaced WAU8822 to NAU8822

Edit Fig.1 and first paragraph

The information contained in this document may be subject to change

without notice. It is the responsibility of the customer to check the Nuvoton

USA website (www.nuvoton.com) periodically for the latest version of this

document, and any Errata Sheets that may be generated between

Important Notice

Nuvoton products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Further more, Nuvoton products are not intended for applications wherein failure of Nuvoton products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur.

Nuvoton customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nuvoton for any damages resulting from such improper use or sales.

CODEC Motherboard Manual Version 1.3 Page 66 of 66 April 12, 2016

Nuvoton CODEC User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual