NTE ELECTRONICS NTE 74LS192 Datasheet

NTE74LS192
Integrated Circuit
TTL Synchronous 4Bit Up/Down Counter
Description:
The NTE74LS192 is a synchronous BCD reversible up/down counter in a 16Lead plastic DIP type package having the complexity of 55 equivalent gates. Synchronous operation is provided by having all flip−flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters.
The outputs of the four masterslave flipflops are triggered by a lowto−high transition of either count (clock) input. The direction of counting is determined by which count input is pulsed while the other count input is high.
This counter is fully programmable; that is, each output may be preset to either level by entering the desired data of the data inputs while the load input is low. The output will change to agree with the data inputs independently of the count pulses. This feature allows the counter to be used as a mod­uloN divider by simply modifying the count length with the preset inputs.
A clear input has been provided which forces all outputs to the low level when a high level is applied. The clear function is independent of the count and load inputs. The clear, count, and load inputs are buffered to lower the drive requirements. This reduces the number of clock drivers, etc., required for long words.
This device was designed to be cascaded without the need for external circuitry. Both borrow and carry outputs are available to cascade both the upcounting and downcounting functions. The bor­row output produces a pulse equal in width to the countup input when an overflow condition exists. The counter can then be easily cascaded by feeding the borrow and carry outputs to the countdown and count−up inputs respectively of the succeeding counter.
Features:
D Cascading Circuitry Provided Internally D Synchronous Operation D Individual Preset to Each FlipFlop D Fully Independent Clear Input
Absolute Maximum Ratings:
Supply Voltage, V DC Input Voltage, V Power Dissipation, P
CC
IN
D
Operating Temperature Range, T Storage Temperature Range, T
(Note 1)
A
stg
7V.................................................................
7V................................................................
95mW............................................................
0C to +70C............................................
65C to +150C........................................
Note 1. Unless otherwise specified, all voltages are referenced to GND.
Recommended Operating Conditions:
Parameter Symbol Min Typ Max Unit
Supply Voltage V
HighLevel Output Current I
LowLevel Output Current I
Clock Frequency f
Width of Any Input Pulse t
Clear Inactive Setup Time t
Load Inactive Setup Time t
Data Setup Time t
Data Hold Time t
Operating Temperature Range T
Electrical Characteristics: (Note 2, Note 3)
Parameter Symbol Test Conditions Min Typ Max Unit
HighLevel Input Voltage V
LowLevel Input Voltage V
Input Clamp Voltage V
High Level Output Voltage V
Low Level Output Voltage V
Input Current I
High Level Input Current I
Low Level Input Current I
ShortCircuit Output Current I
Supply Current I
OH
OL
IH
IL
OS
CC
IH
IL
VCC = MIN, II = 18mA −1.5 V
IK
VCC = MIN, VIH = 2V, VIL = MAX, IOH = -400A 2.7 3.4 V
VCC = MIN, VIH = 2V, VIL = MAX IOL = 4mA 0.15 0.4 V
VCC = MAX, VI = 7V 0.1 mA
I
VCC = MAX, VI = 2.7V 20 A
VCC = MAX, VI = 0.4V −0.4 mA
VCC = MAX, Note 4 −20 −100 mA
VCC = MAX, Note 5 19 34 mA
CC
OH
OL
clock
w
su
su
su
h
A
4.75 5.0 5.25 V
400 A
8 mA
0 25 MHz
20 ns
15 ns
15 ns
20 ns
5 ns
0 +70 C
2 V
0.8 V
IOL = 8mA 0.35 0.5 V
Note 2. .For conditions shown as MIN or MAX, use the appropriate value specified under “Recommended
Operation Conditions”.
Note 3. All typical values are at V
= 5V, TA = +25C.
CC
Note 4. Not more than one output should be shorted at a time and duration of shortcircuit should
not exceed one second.
Note 5. I
is measured with all outputs open, clear and load inputs grounded, and all other inputs
CC
at 4.5V.
Switching Characteristics
Parameter Symbol Test Conditions Min Typ Max Unit
Maximum Clock Frequency f
Propagation Delay Time
(From UP Input to Any CO
Propagation Delay Time
(From DOWN Input to BO
Propagation Delay Time
(From UP or DOWN Input to Q Output)
Propagation Delay Time
(From LOAD
Propagation Delay Time
(From CLR Input to Q Output)
Input to Q Output)
: (VCC = 5V, TA = +25C unless otherwise specified)
RL = 2k, CL = 15pF
Output)
Output)
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
25 32 MHz
17 26 ns
18 24 ns
16 24 ns
15 24 ns
27 38 ns
30 47 ns
24 40 ns
25 40 ns
23 35 ns
Pin Connection Diagram
1
B
2
Q
B
3
Q
A
DOWN
GND
UP
Q
Q
4
5
6
C
7
D
8
16 9
16
15 14
13
12
11
10
9
V
CC
A CLR
BO
CO
LOAD
C
D
18
.870 (22.0) Max
.260 (6.6)
Max
.200
(5.08)
Max
.100 (2.54)
.099 (2.5) Min
.700 (17.78)
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