Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Current 19 mA
Power Dissipation (Note 1) 1250 mW
Operating Temperature Range
b
40§Ctoa70§C
Storage Temperature Range
b
55§Ctoa150§C
Soldering Information
Dual-In-Line Package (10 sec.) 260
§
C
Small Outline Package
Vapor Phase (60 sec.) 215
§
C
Infrared (15 sec.) 220
§
C
See AN-450 ‘‘Surface Mounting and Their Effects on Product Reliability’’ for other methods of soldering surface
mount devices.
DC Electrical Characteristics T
A
e
25§C, I
SS
e
5mA
Parameter Conditions Min Typ Max Units
Power Supply Shunt Pin 8, Average Value
22 26 30 V
Regulator Voltage
Latch Trigger Voltage Pin 7 15 17.5 20 V
Sensitivity Set Voltage Pin 8 to Pin 6 6 7 8.2 V
Output Drive Current Pin 1, With Fault 0.5 1 2.4 mA
Output Saturation Voltage Pin 1, Without Fault 100 240 mV
Output Saturation Resistance Pin 1, Without Fault 100 X
Output External Current Pin 1, Without Fault,
2.0 5 mA
Sinking Capability V
pin 1
Held to 0.3V (Note 4)
Noise Integration Pin 7, Ratio of Discharge
Sink Current Ratio Currents Between No Fault 2.0 2.8 3.6 mA/mA
and Fault Conditions
AC Electrical Characteristics T
A
e
25§C, I
SS
e
5mA
Parameter Conditions Min Typ Max Units
Normal Fault Current
Figure 1
(Note 3) 3 5 7 mA
Sensitivity
Normal Fault Trip Time 500X Fault,
Figure 2
(Note 2) 18 ms
Normal Fault with 500X Normal Fault, 18 ms
Grounded Neutral Fault 2X Neutral,
Figure 2
(Note 2)
Trip Time
Note 1: For operation in ambient temperatures above 25§C, the device must be derated based on a 125§C maximum junction temperature and a thermal resistance
of 80
§
C/W junction to ambient for the DIP and 162§C/W for the SO Package.
Note 2: Average of 10 trials.
Note 3: Required UL sensitivity tolerance is such that external trimming of LM1851 sensitivity will be necessary.
Note 4: This externally applied current is in addition to the internal ‘‘output drive current’’ source.
TL/H/5177– 2
FIGURE 1. Normal Fault Sensitivity Test Circuit
2