NSC 5962R8968901VFA, 5962R8968901VEA, 5962R8968901V2A, 5962R8968901FA, 5962R8968901EA Datasheet
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54AC257•54ACT257
Quad 2-Input Multiplexer with TRI-STATE
®
Outputs
General Description
The ’AC/’ACT257 is a quad 2-input multiplexer with
TRI-STATE outputs. Four bits of data from two sources can
be selected using a Common Data Select input. The four
outputs present theselected data in true (noninverted) form.
The outputs may be switched to a high impedance state by
placing a logic HIGH on the common Output Enable (OE) input, allowing the outputs to interface directly with
bus-oriented systems.
Features
n ICCand IOZreduced by 50
%
n Multiplexer expansion by tying outputs together
n Noninverting TRI-STATE outputs
n Outputs source/sink 24 mA
n ’ACT257 has TTL-compatible inputs
n Standard Military Drawing (SMD)
— ’AC257: 5962-88703
— ’ACT257: 5962-89689
Logic Symbols
Pin Names Description
S Common Data Select Input
OE
TRI-STATE Output Enable Input
I
0a–I0d
Data Inputs from Source 0
I
1a–I1d
Data Inputs from Source 1
Z
a–Zd
TRI-STATE Multiplexer Outputs
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
FACT
™
is a trademark of Fairchild Semiconductor Corporation.
DS100286-1
IEEE/IEC
DS100286-2
July 1998
54AC257
•
54ACT257 Quad 2-Input Multiplexer with TRI-STATE Outputs
© 1998 National Semiconductor Corporation DS100286 www.national.com
Connection Diagrams Functional Description
The ’AC/’ACT257 is quad 2-input multiplexer with
TRI-STATE outputs. It selects four bits of data from two
sources under controlof a CommonData Select input. When
the Select inputis LOW, the I
0x
inputs are selectedand when
Select is HIGH, the I
1x
inputs are selected. The data on the
selected inputs appears at the outputs in true (noninverted)
form. The device is the logic implementation of a 4-pole,
2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The
logic equations for the outputs are shown below:
Z
a
=
OE
•
(1
1a
•
S+I
0a
•
S)
Z
b
=
OE
•
(1
1b
•
S+I
0b
•
S)
Z
c
=
OE
•
(1
1c
•
S+I
0c
•
S)
Z
d
=
OE
•
(1
1d
•
S+I
0d
•
S)
When the Output Enable (OE) is HIGH, the outputs are
forced to a high impedance state. If the outputs are tied together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum
ratings. Designers should ensure the Output Enable signals
to TRI-STATE devices whose outputs are tied together are
designed so there is no overlap.
Truth Table
Output Select Data Outputs
Enable Input Inputs
OE
SI
0
I
1
Z
HXXXZ
LHXLL
LHXHH
LLLXL
LLHXH
H
=
HIGH Voltage Level
L=LOW Voltage Level
X=Immaterial
Z=High Impedance
Logic Diagram
Pin Assignment for
DIP and Flatpak
DS100286-3
Pin Assignment for LCC
DS100286-4
DS100286-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.national.com 2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
=
−0.5V −20 mA
V
I
=
V
CC
+0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to VCC+0.5V
DC Output Diode Current (I
OK
)
V
O
=
−0.5V −20 mA
V
O
=
V
CC
+0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to VCC+0.5V
DC Output Source or Sink Current
(I
O
)
±
50 mA
DC V
CC
or Ground Current
Per Output Pin (I
CC
or I
GND
)
±
50 mA
Storage Temperature (T
STG
) −65˚C to +150˚C
Junction Temperature (T
J
)
CDIP 175˚C
Recommended Operating
Conditions
Supply Voltage (VCC)
’AC 2.0V to 6.0V
’ACT 4.5V to 5.5V
Input Voltage (V
I
) 0VtoV
CC
Output Voltage (VO) 0VtoV
CC
Operating Temperature (TA)
54AC/ACT −55˚C to +125˚C
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
V
IN
from 30%to 70%of V
CC
V
CC
@
3.3V, 4.5V, 5.5V 125 mV/ns
Minimum Input Edge Rate (∆V/∆t)
’ACT Devices
V
IN
from 0.8V to 2.0V
V
CC
@
4.5V, 5.5V 125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recommend operation of FACT
™
circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
54AC
Symbol Parameter V
CC
T
A
=
Units Conditions
(V) −55˚C to +125˚C
Guaranteed
Limits
V
IH
Minimum High 3.0 2.1 V
OUT
=
0.1V
Level Input 4.5 3.15 V or V
CC
− 0.1V
Voltage 5.5 3.85
V
IL
Maximum Low 3.0 0.9 V
OUT
=
0.1V
Level Input 4.5 1.35 V or V
CC
− 0.1V
Voltage 5.5 1.65
V
OH
Minimum High 3.0 2.9 I
OUT
=
−50 µA
Level Output 4.5 4.4 V
Voltage 5.5 5.4
(Note 2)
V
IN
=
V
IL
or V
IH
3.0 2.4 −12 mA
4.5 3.7 V I
OH
−24 mA
5.5 4.7 −24 mA
V
OL
Maximum Low 3.0 0.1 I
OUT
=
50 µA
Level Output 4.5 0.1 V
Voltage 5.5 0.1
(Note 2)
V
IN
=
V
IL
or V
IH
3.0 0.50 12 mA
4.5 0.50 V I
OL
24 mA
5.5 0.50 24 mA
I
IN
Maximum Input 5.5
±
1.0 µA V
I
=
V
CC
, GND
Leakage Current
3 www.national.com
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