NSC 5962-8775701FA, 5962-8775701EA, 5962-87757012A, 54ACT174FM-MLS Datasheet

54AC174•54ACT174
Hex D Flip-Flop with Master Reset

General Description

The ’AC/’ACT174 is a high-speed hex D flip-flop. The device
is used primarily as a 6-bit edge-triggered storage register.
The information on theDinputsis transferred to storage dur­ing the LOW-to-HIGH clock transition. The device has a
Master Reset to simultaneously clear all flip-flops.

Features

n ICCreduced by 50

%

n Outputs source/sink 24 mA
n ’ACT174 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)

— ’AC174: 5962-87626
— ’ACT174: 5962-87757

Logic Symbols

Pin Names Description

D

0–D5

Data Inputs
CP Clock Pulse Input
MR

Master Reset Input
Q

0–Q5

Outputs

FACT™is a trademark of Fairchild Semiconductor Corporation.

DS100277-1

IEEE/IEC

DS100277-2

July 1998

54AC174

•

54ACT174 Hex D Flip-Flop with Master Reset

© 1998 National Semiconductor Corporation DS100277 www.national.com

Connection Diagrams

Functional Description

The ’AC/’ACT174 consists of six edge-triggered D flip-flops
with individual D inputs and Q outputs. The Clock (CP) and
Master Reset (MR) are common to all flip-flops. Each D in­put’s state is transferred to the corresponding flip-flop’s out­put following the LOW-to-HIGH Clock (CP) transition. A LOW
input to the Master Reset (MR) will force all outputs LOW in­dependent of Clock or Data inputs. The ’AC/’ACT174 is use­ful for applications where the true output only is required and
the Clock and Master Reset are common to all storage
elements.

Truth Table

Inputs Output

MR

CP D Q

LXX L
H

N

HH

H

N

LL

HLX Q

H

=

HIGH Voltage Level

L=LOW Voltage Level

N

=

LOW-to-HIGH Transition

X=Immaterial

Logic Diagram

Pin Assignment

for DIP and Flatpak

DS100277-3

Pin Assignment

for LCC

DS100277-4

DS100277-5

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Supply Voltage (V

CC

) −0.5V to +7.0V

DC Input Diode Current (I

IK

)

V

I

=

−0.5V −20 mA

V

I

=

V

CC

+ 0.5V +20 mA

DC Input Voltage (V

I

) −0.5V to VCC+ 0.5V

DC Output Diode Current (I

OK

)

V

O

=

−0.5V −20 mA

V

O

=

V

CC

+ 0.5V +20 mA

DC Output Voltage (V

O

) −0.5V to VCC+ 0.5V

DC Output Source

or Sink Current (I

O

)

±

50 mA

DC V

CC

or Ground Current

per Output Pin (I

CC

or I

GND

)

±

50 mA

Storage Temperature (T

STG

) −65˚C to +150˚C

Junction Temperature (T

J

)

CDIP 175˚C

Recommended Operating
Conditions

Supply Voltage (VCC)

’AC 2.0V to 6.0V
’ACT 4.5V to 5.5V

Input Voltage (V

I

) 0VtoV

CC

Output Voltage (VO) 0VtoV

CC

Operating Temperature (TA)

54AC/ACT −55˚C to +125˚C

Minimum Input Edge Rate (∆V/∆t)

’AC Devices
V

IN

from 30%to 70%of V

CC

V

CC

@

3.3V, 4.5V, 5.5V 125 mV/ns

Minimum Input Edge Rate (∆V/∆t)

’ACT Devices
V

IN

from 0.8V to 2.0V

V

CC

@

4.5V, 5.5V 125 mV/ns

Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom­mend operation of FACT

™

circuits outside databook specifications.

DC Characteristics for ’AC Family Devices

54AC

Symbol Parameter V

CC

T

A

=

Units Conditions

(V) −55˚C to +125˚C

Guaranteed Limits

V

IH

Minimum High Level 3.0 2.1 V

OUT

=

0.1V

Input Voltage 4.5 3.15 V or V

CC

− 0.1V

5.5 3.85

V

IL

Maximum Low Level 3.0 0.9 V

OUT

=

0.1V

Input Voltage 4.5 1.35 V or V

CC

− 0.1V

5.5 1.65

V

OH

Minimum High Level 3.0 2.9 I

OUT

=

−50 µA

Output Voltage 4.5 4.4 V

5.5 5.4
(Note 2)

V

IN

=

V

IL

or V

IH

3.0 2.4 IOH= −12 mA

4.5 3.7 V I

OH

= −24 mA

5.5 4.7 I

OH

= −24 mA

V

OL

Maximum Low Level 3.0 0.1 I

OUT

=

50 µA

Output Voltage 4.5 0.1 V

5.5 0.1
(Note 2)

V

IN

=

V

IL

or V

IH

3.0 0.50 IOL=12mA

4.5 0.50 V I

OL

=24mA

5.5 0.50 I

OL

=24mA

I

IN

Maximum Input 5.5

±

1.0 µA V

I

=

V

CC

, GND

Leakage Current

I

OLD

Minimum Dynamic
Output Current (Note 3)

5.5 50 mA V

OLD

=

1.65V Max

I

OHD

5.5 −50 mA V

OHD

=

3.85V Min

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