NSC 100370DMQB Datasheet
100370
Low Power Universal Demultiplexer/Decoder
General Description
The 100370 universal demultiplexer/decoder functions as either a dual 1-of-4 decoder or as a single 1-of-8 decoder, depending on the signal applied to the Mode Control (M) input.
In the dual mode, each half has a pair of active-LOW Enable
(E) inputs. Pin assignments for the E inputs are such that in
the 1-of-8 mode they can easily be tied together in pairs to
provide two active-LOW enables (E
1a
to E1b,E2ato E2b).
Signals applied to auxiliary inputs Ha,Hband Hcdetermine
whether the outputs are active HIGH or active LOW. In the
dual 1-of-4 mode the Address inputs are A
0a,A1a
and A0b,
A
1b
with A2aunused (i.e., left open, tied to VEEor with LOW
signal applied). In the 1-of-8 mode, the Address inputs are
A
0a,A1a,A2a
with A0band A1bLOW or open. All inputs have
50 kΩ pulldown resistors.
Features
n 35%power reduction of the 100170
n 2000V ESD protection
n Pin/function compatible with 100170
n Voltage compensated operating range=−4.2V to −5.7V
Logic Symbols
Pin Names Description
A
na,Anb
Address Inputs
E
na,Enb
Enable Inputs
M Mode Control Input
H
a
Z0–Z3(Z0a–Z3a)
Polarity Select Input
H
b
Z4–Z7(Z0b–Z3b)
Polarity Select Input
H
c
Common Polarity
Select Input
Z
0–Z7
Single 1-of-8
Data Outputs
Z
na,Znb
Dual 1-of-4
Data Outputs
Single 1-of 8 Application
DS100311-1
Dual 1-of-4 Application
DS100311-4
August 1998
100370 Low Power Universal Demultiplexer/Decoder
© 1998 National Semiconductor Corporation DS100311 www.national.com
Connection Diagrams
Logic Diagram
24-Pin DIP
DS100311-2
24-Pin Quad Cerpak
DS100311-3
DS100311-6
Note 1: (Zn) for 1-of-4 applications.
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Truth Tables
Dual 1-of-4 Mode (M=A
2a
=
H
c
=
LOW)
Inputs Active HIGH Outputs Active LOW Outputs
(H
a
and HbInputs HIGH) (Haand HbInputs LOW)
E
1a
E
2a
A
1a
A
0a
Z
0a
Z
1a
Z
2a
Z
3a
Z
0a
Z
1a
Z
2a
Z
3a
E
1b
E
2b
A
1b
A
0b
Z
0b
Z
1b
Z
2b
Z
3b
Z
0b
Z
1b
Z
2b
Z
3b
HXXXLLLLHHHH
XHXXLLLLHHHH
LLLLHLLLLHHH
LLLHLHLLHLHH
LLHLLLHLHHLH
LLHHL LLHHHHL
Single 1-of-8 Mode (M=HIGH; A
0b
=
A
1b
=
H
a
=
H
b
=
LOW)
Inputs Active HIGH Outputs (Note 2)
(H
c
Input HIGH)
E
1E2A2aA1aA0aZ0Z1Z2Z3Z4Z5Z6Z7
H X X X X LLLLLLLL
X H X X X LLLLLLLL
L L L L LHLLLLLLL
L L L L HLHLLLLLL
L L L H L LLHLLLLL
L L L H HLLLHLLLL
L L H L L LLLLHLLL
L L H L HLLLLLHLL
L L H H L LLLLLLHL
L L H H HLLLLLLLH
H=HIGH Voltage Level
L=LOW Voltage Level
X=Don’t Care
E
1
=
E
1a
and E1bwired; E
2
=
E2
2a
and E2bwired
Note 2: for H
c
=
LOW, output states are complemented
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