NPC SM5852FS Datasheet

SM5852FS
NIPPON PRECISION CIRCUITS INC.
OVERVIEW
The SM5852FS is a digital signal processor IC that performs DDBB (digital dynamic bass boost) processing for use in digital audio reproduction equipment. It is designed for use with a 44.1 kHz sampling frequency.
FEATURES
2-channel processing
Improved DDBB mode channel separation
6 input-level dependent dynamic gain characteristics
Serial input/output interface 2s complement, MSB first, 16-bit
384fs system clock
23 × 23-bit multiplier/30-bit high-precision accumulator
TTL-compatible input/output
3.2 to 5.5 V operating voltage range
16-pin SOP
Molybdenum-gate CMOS
Digital Dynamic Bass Boost LSI
PINOUT
LRCI
1
BCKI
CLK
VSS
RSTN
TESTN
MUTEN
2
DI
3 4 5 6 7 8
SM5852FS
PACKAGE DIMENSIONS
16-pin SOP (Unit: mm)
DB/DS
16
MOD2
15
MOD1
14
OPT
13
VDD
12
LRCO
11
BCKO
10
DOUT
9
ORDERING INFOMATION
Device Package
SM5852FS 16pin SOP
0.635±0.15
1.27±0.15
10.16±0.3
10.5 MAX
0.4±0.15
5.5±0.3
2.0±0.2
0.1±0.1
8.0±0.3
0 to 15
0.17±0.05
6.8±0.3
8.0±0.3
NIPPON PRECISION CIRCUITS—1
BLOCK DIAGRAM
SM5852FS
LRCI
BCKI
DI
CLK
RSTN
TESTN
MUTEN
Input data
Interface
System
Clock
Sequence
Control
Mute
Control
DSP Block
Output data
Interface
VDD
VSS
LRCO BCKO DOUT
DB/DS
OPT
MOD1 MOD2
Mode Control
NIPPON PRECISION CIRCUITS—2
PIN DESCRIPTION
SM5852FS
Number Name I/O
1 LRCI Ip Input data sample rate (fs) clock input 2 BCKI Ip Bit clock input 3 DI Ip Serial data input 4 CLK I Clock input 5 VSS Ground 6 RSTN Ip System reset initialization. Reset when LOW. 7 TESTN Ip Test mode input. Testing when LOW. 8 MUTEN Ip Mute input. Muting when LOW.
9 DOUT O Serial data output 10 BCKO O Bit clock output 11 LRCO O Output data sample rate (fs) clock output 12 VDD 3.2 to 5.5 V supply 13 OPT Ip Not used. Tie HIGH for normal operation.
14 MOD1 Ip
15 MOD2 Ip
16 DB/DS Ip
1
Gain characteristics switch inputs.
MOD1 MOD2 DB/DS Gain mode
LOW LOW LOW 18 dB LOW LOW HIGH 16 dB LOW HIGH LOW 14 dB
LOW HIGH HIGH 12 dB HIGH LOW LOW 10 dB HIGH LOW HIGH 6 dB HIGH HIGH LOW Off HIGH HIGH HIGH Off
Description
1. Ip = Input pin with pull-up resistor. Accordingly, they can be left open for HIGH-level input.
NIPPON PRECISION CIRCUITS—3
SPECIFICATIONS
Absolute Maximum Ratings
V
= 0 V
SS
Parameter Symbol Condition Rating Unit
Supply voltage V Input voltage V Storage temperature T Power dissipation P Soldering temperature T Soldering time t
Recommended Operating Conditions
V
= 0 V
SS
Parameter Symbol Condition Rating Unit
Supply voltage V Operating temperature T
DD
IN
stg
D
sld
sld
DD
opr
SM5852FS
0.3 to 7.0 V
V
0.3 to V
SS
3.2 to 5.5 V
+ 0.3 V
DD
55 to 125
250 mW 255
10 s
40 to 85
° C
° C
° C
NIPPON PRECISION CIRCUITS—4
SM5852FS
DC Characteristics
V
= 4.5 to 5.5 V, V
DD
Parameter Symbol Condition
Current consumption
1
Input voltage for all inputs
Output voltage for all outputs
Input leakage current for all inputs CLK input leakage current I Input current for all inputs except CLK
1. f
= 384fs = 16.9344 MHz, no output load, input data conformance with NPC test pattern
CLK
2. LRCI, BCKI, DI,RSTN, TESTN, MUTEN, OPT, MOD1, MOD2, DB / DS, CKL
3. LRCO, BCKO, DOUT
V
= 3.2 to 4.5 V, V
DD
Parameter Symbol Condition
Current consumption
1
Input voltage for all inputs
Output voltage for all outputs
Input leakage current for all inputs CLK input leakage current I Input current for all inputs except CLK
1. f
= 384fs = 16.9344 MHz, no output load, input data conformance with NPC test pattern
CLK
2. LRCI, BCKI, DI,RSTN, TESTN, MUTEN, OPT, MOD1, MOD2, DB / DS, CLK
3. LRCO, BCKO, DOUT
SS
2
3
SS
2
3
= 0 V, T
2
2
= 0 V, T
2
2
= 40 to 85 ° C for nomal-voltage operation
a
I
DD
V
V
V
OH
V
OL
I
LH
LL
I
= 20 to 70 ° C for low-voltage operation
a
I
DD
V
V
V
OH
V
OL
I
LH
LL
I
V
= 5.0 V 16 23 mA
DD
IH
IL
I
= 0.4 mA 2.5 V
OH
I
= 1.6 mA 0.4 V
OL
V
= V
IN
DD
V
= 0 V 1.0 µA
IN
V
IL
IH
IL
IL
= 0 V 20 µA
IN
V
= 3.4 V 7 10 mA
DD
I
= 0.2 mA 2.5 V
OH
I
= 0.8 mA 0.4 V
OL
V
= V
IN
DD
V
= 0 V 1.0 µA
IN
V
= 0 V 12 µA
IN
Audio
Rating
Unit
min typ max
2.4 V – 0.5 V
1.0 µA
Rating
Unit
min typ max
2.4 V – 0.5 V
1.0 µA
NIPPON PRECISION CIRCUITS—5
AC Characteristics
V
= 4.5 to 5.5 V, V
DD
V
= 3.2 to 4.5 V, V
DD
CLK (384fs)
SS
SS
= 0 V, T = 0 V, T
SM5852FS
= 40 to 85 ° C for nomal-voltage operation
a
= 20 to 70 ° C for low-voltage operation
a
Parameter Symbol Condition
Clock pulsewidth t Clock cycle time t
CLK
RSTN
Parameter Symbol Condition
Reset LOW-level pulsewidth t
CW
CY
RST
tcy
Rating
min typ max
24 500 ns 55 59 1000 ns
VIH
Unit
1.5V
tCW
At power-ON 1 µs At all other times 50 1000 ns
tCW
min typ max
VIL
Rating
Unit
3.2V
VDD
VDD
RSTN
RSTN
3.2V
tRST 1µsec
tRST 1µsec
RSTN should be set LOW at power-ON and after reacquiring synchronization. Note that if RSTN is LOW for longer than 1 µs, a through-current flows in the internal dynamic circuits because the internal clock is stopped. The through-current has no rated value, so the reset pulse should be kept as short as possible at all times other than at power-ON.
tRST
tRST
1.5V
1.5V
NIPPON PRECISION CIRCUITS—6
Serial input timing
SM5852FS
Parameter Symbol Condition
BCKI pulsewidth t BCKI cycle time t DI setup time t DI hold time t LRCI setup time t LRCI hold time t
BCKI
tBCIW tBCIW
DI
BCIW
BCIY
DIS
DIH
LIS
LIH
tBCIY
Rating
Unit
min typ max
100 ns 200 ns
75 ns 75 ns 75 ns 75 ns
1.5V
1.5V
tDIS
LRCI
tLIS
tDIH
1.5V
tLIH
DB/DS, OPT
Parameter Symbol Condition
Minimum pulsewidth t
min typ max
W
2/fs ns
Rating
Unit
When DB/DS or OPT change state, the input level must be constant for a minimum of 2/fs (2 × LRCI cycle time). Input levels of duration less than 2/fs may be ignored.
NIPPON PRECISION CIRCUITS—7
Serial output timing
SM5852FS
Parameter Symbol Condition
BCKO pulsewidth t BCKO cycle time t
DOUT, LRCO output delay time
BCKO
DOUT
LRCO
tDHL
BCOW
BCOY
t
DHL
t
DLH
Rating
min typ max
15 pF load 180 1/96fs ns 15 pF load 400 1/48fs ns 15 pF load 15 pF load
20 60 ns
20 60 ns
1.5V
tBCOW
tBCOW
tBCOY
1.5V
tDLH
Unit
NIPPON PRECISION CIRCUITS—8
Low-pass Gain Characteristics
SM5852FS
20
10
0
10
20
30
40
GAIN (dB)
50
60
70
80
1.0 10 100 1k 10k 20k
2.0 5.0 20 50 200 500 2k 5k
DDBB Mode Filter Characteristics
18dB
16dB
14dB 12dB
OFF
6dB
10dB
Frequency (Hz)
0
-10
-20
-30
-40
18dB
16dB
14dB
12dB
10dB
6dB
OFF
-50
Ooutput (dB)
-60
-70
-80
-90
-90 -80 -70 -60 -50 -40 -30 -20 -10 0 Input (dB)
NIPPON PRECISION CIRCUITS—9
FUNCTIONAL DESCRIPTION
SM5852FS
DDBB (Digital Dynamic Bass Boost)
The DDBB function emphasizes the low-frequency components of the input signal by picking out the low-frequency components and passing them through a DDBB 3rd-order IIR low-pass filter and then changing the gain for the low-frequency components.
Two independent DDBB filters are used, one for each the left and right channels, to maintain full channel separation. The DDBB boost is determined by DB/DS, MOD1 and MOD2.
MOD1 MOD2 DB/DS Gain mode
LOW LOW LOW 18 dB LOW LOW HIGH 16 dB LOW HIGH LOW 14 dB LOW HIGH HIGH 12 dB HIGH LOW LOW 10 dB HIGH LOW HIGH 6 dB HIGH HIGH LOW Off HIGH HIGH HIGH Off
Soft Muting
DB/DS Switching Shock Noise
The soft muting function is also activated to eliminate switching shock noise when DB/DS changes state. When DB/DS changes state, the attenuation changes to −∞ dB, the internal circuit settings are activated and then soft muting is released. Therefore, a maximum time of approximately 46.4 ms is required to change the compression mode. Of course, if the attenuation is already −∞ dB after soft muting using MUTEN, then no time is required to change compression mode.
Reset Initialization
RSTN should be set LOW at power-ON and after reacquiring synchronization. Note that if RSTN is LOW for longer than 1 µs, a through-current flows in the LSI’s internal dynamic circuits because the internal clock is stopped. The through-current has no rated value, so the reset pulse should be kept as short as possible at all times other than at power-ON.
When RSTN goes from LOW to HIGH, initialization hold is released and the initialization routine first resets the internal data over an interval of 4fs. During the initialization routine, the output data is forcibly muted so that there is no output signal.
Soft muting is active when MUTEN is LOW. When MUTEN is LOW, the attenuation changes smoothly from 0 to −∞ dB in 1024/fs, or approximately 23.2 ms.
When MUTEN goes HIGH, soft muting is released and the attenuation changes smoothly from −∞ to 0 dB, again taking approximately 23.2 ms.
Also, if a MUTEN transition occurs while the attenuation is changing, the attenuation then changes smoothly in the direction specified by the new level of MUTEN.
NIPPON PRECISION CIRCUITS—10
SM5852FS
INPUT/OUTPUT TIMING
Input Timing
LRCO
BCKO
MSB
Lch
LSB
MSB
Rch
LSB
DOUT
There must be a minimum of 16 BCKI clock cycles to read in a single word of data. Data on DI is input in sync with the falling edge of BCKI in 16-bit serial, MSB first, 2s complement
format.
Output Timing
LRCO BCKO
MSB
Lch
DOUT
Shaded areas represent intervals of invalid data.
LSB
MSB
Rch
LSB
NIPPON PRECISION CIRCUITS—11
APPLICATON CIRCUIT
SM5852FS
X'tal(16.9344 MHz)
SONY
CXD1125
1130 1135
PSSL SLOB
XTAI
LRCK
C210
DATA
LRCI
BCKI
DI
SM5852FS
CLK
RSTN
TESTN
MUTEN
DB/DS
MOD2
MOD1
OPT
LRCO
BCKO
DOUT
XTI
CKO
LRCI
BCKI
DIN
XTO
SM5841
Microcontroller
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warr anty that such applications will be suitab le for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not expor t, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2 chome
Koto-ku, Tokyo 135-8430, Japan
NIPPON PRECISION CIRCUITS INC.
Telephone: 03-3642-6661 Facsimile: 03-3642-6698
NC9623BE 1998.08
NIPPON PRECISION CIRCUITS—12
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