NOVATEK NT3881DH-02, NT3881DH-01, NT3881DF-01, NT3881DF-02 Datasheet
NT3881D
Features
! Internal LCD drivers
16 common signal drivers
40 segment signal drivers
(can be externally extended to 400 segments
using NT3882)
! Maximum display dimensions
40 characters * 2 lines or
80 characters * 1 line
! Interfaces with 4-bit or 8-bit MPU
! Versatile display functions provided on chip:
Display Clear, Cursor Home, Display ON/OFF,
Cursor ON/OFF, Character Blinking, Cursor
Shift, and Display Shift
! Three duty factors, selected by PROGRAM:
1/8, 11/11, and 1/16
! Displays Data RAM (DD RAM): 80 X 8 bits
(displays up to 80 characters)
! Character Generator RAM (CG RAM):
64 X 8 bits for general data,
8 5 X 8 programmable dot patterns, or
4 5 X 10 programmable dot patterns
! Low voltage reset
! NOVATEK Identification code
! Bonding option for A-type and B-type waveform
Dot Matrix LCD Controller and Driver
! Character Generator ROM (CG ROM):
3 kinds of CG ROM sizes:
192 characters:
160 5 X 8 dot patterns
32 5 X 10 dot patterns
240 characters:
192 5 X 8 dot patterns
48 5 X 10 dot patterns
256 characters:
192 5 X 8 dot patterns
64 5 X 10 dot patterns
Custom CG ROM is also available
! Built-in power-on r eset function
! Logic power supply: single +5V supply
! LCD driver power supply: V
(V
+0.3 - VDD-13.5)
DD
! Three oscillator operations
(Freq. = 250KHz - 270KHz):
• Internal oscillation
• Ceramic resonator
• External clock
! CMOS Process
! Available in 80-pin QFP or in CHIP FORM
- V5
1
General Description
The NT3881D is a dot matrix LCD controller and driver
LSI that can operate with either a 4-bit or an 8-bit
microprocessor (MPU). NT3881D receives control
character codes from the MPU, stores them in an internal
RAM (up to 80 characters), transforms each character
code into a 5 X 7, 5 X 8, or 5 X 10 dot matrix character
pattern, and then displays the codes on the LCD panel.
The built-in Character Generator ROM consists of 256
different character patterns.
The NT3881D also contains Character Generator RAM
where the user can store 8 different character patterns at
run time. These memory features make character display
flexible. NT3881D also provides many display instructions
to achieve versatile LCD display functions. The NT3881D
is fabricated on a single LSI chip using the CMOS
process, resulting in very low power requirements.
With several NT3882 driver ICs connected to the
NT3881D, up to 80 characters can be displayed.
1 V2.4
Pin Configuration
S
S
C
C
C
C
C
C
E
E
O
O
G
3
9
O
G
M
M
M
4
1
1
1
0
6
5
4
C
O
O
O
O
C
C
C
C
C
C
C
C
C
D
D
D
D
D
M
M
M
M
O
O
O
O
O
O
O
O
O
B
1
1
1
1
M
M
M
M
M
M
3
2
1
0
9
8
7
M
6
5
4
3
B
M
M
7
6
2
1
D
B
B
B
B
5
4
3
2
NT3881D
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
6463626160595857565554535251504948474645444342
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
123456789
S
S
S
S
E
G
2
2
S
E
E
E
E
G
G
G
G
2
2
1
1
1
0
9
8
S
S
S
E
E
E
G
G
G
1
1
1
7
6
5
UM3881DF
NT3881DF
101112131415161718192021222324
S
S
S
S
S
S
S
S
S
S
E
E
E
E
E
E
G
G
G
1
1
1
4
3
2
E
G
G
G
G
1
1
9
8
1
0
S
E
E
E
E
G
G
G
G
7
6
5
4
S
E
G
3
41
40
DB1
39
DB0
38
E
37
R/W
36
RS
35
D
34
M
33
VDD
32
CL2
31
CL1
30
V5
29
V4
28
V3
27
V2
26
V1
25
OSC2
S
S
G
O
E
E
N
S
G
G
D
C
2
1
1
2 V2.4
Pad Configuration
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
GND
OSC1
S
S
S
S
S
S
S
S
S
S
S
E
E
E
E
E
E
E
E
G
G
G
G
G
2
2
2
3
4
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 26 27 28 29 30 31 328134 35 36 37 38 39 40
O
V1V2V3V4V5C
S
C
2
G
2
2
2
6
7
8
E
G
G
G
2
3
3
9
0
1
NT3881DH
V
D
D
B
33
C
V
L
L
D
1
2
D
A
S
E
E
E
G
G
G
3
3
3
2
3
4
71727374757677787980
6970
M D RSR
NT3881D
S
S
S
E
G
3
6
E D
S
E
E
G
G
3
3
7
8
6567
66
64
SEG39
63
SEG40
COM1
62
6
COM1
61
5
COM1
60
4
COM1
59
3
COM1
58
2
COM1
57
1
COM1
56
0
55
COM9
54
COM8
53
COM7
52
COM6
51
COM5
50
COM4
49
COM3
48
COM2
47
COM1
46
DB7
45
DB6
44
DB5
43
DB4
DB3
42
DB2
41
D
B
B
0
1
E
G
3
5
68
/
W
3 V2.4
Block Diagram
V1
V2
V3
V4
V5
VDD
GND
OSC1
OSC2
8
INSTRUCTION
REGISTER
(IR)
INSTRUCTION
8
DECODER
ADDRESS
COUNTER
7
7
TIMING
GENERATOR
7
NT3881D
3
M
CL1
CL2
RS
R/W
E
DB7~DB4
DB3~DB0
7
7
I/O
BUTTER
8
DATA
REGISTER
(DR)
4
CHARACTER
GENERATOR
4
BUSY
FLAG
(BF)
64 X 8 BITS
CUR50R
ADDRESS
COURTER
78 8
RAM
(CG RAM)
PARALLEL-TO-SERIAL
CONVERTER
7
DISPLAY DATA
RAM
(DD RAM)
80 X 8 BITS
8
CHARACTER
GENERATOR
ROM
(CG ROM)
55
CURSOR
/BLINK
CONTROLLER
16-BIT
16
SHIFT
REGISTER
40-BIT
40
LATCH
CIRCUIT
40-BIT SHIFT REGISTER
COMMON
SIGNAL
DRIVER
SEGMENT
SIGNAL
DRIVER
COM1
16
|
COM16
SEG1
40
|
SEG40
D
4 V2.4
Pin and Pad Descriptions
NT3881D
Pin and Pad No. Designation I/O
External
Connection
Description
1 - 22 SEG22 - SEG1 O LCD panel Segment signal output pins
24, 25 OSC1, OSC2 Pins connected to resistor or ceramic filter for
internal clock oscillation. For external clock
operation, clock inputs to OSC1.
26 - 30
V
- V5
1
P Power supply Power supply for LCD driver
31 CL1 O NT3882 Clock to latch serial data D sent to NT3882.
32 CL2 O NT3882 Clock to shift serial data D
V
: +5V
33, 81 VDDB, VDDA P Power supply
DD
A-Type waveform: V
B-Type waveform: V
bond to VDDA
DD
bond to VDDB
DD
23 GND P Power supply GND: 0V
34 M O NT3882 Switch signal to convert LCD drive waveform to
AC
35 D O NT3882 Character pattern data corresponding to each
common signal is transmitted serially from this
output. 0-Non selection, 1-selection.
36 RS I MPU Register select signal
0: Instruction register (write)
Busy flag, address counter (read)
1: Data register (write, read)
37 R/W I MPU Read/Write control signal
0: Write
1: Read
38 E I MPU Read/Write start signal
39 - 42 DB0 - DB3 I/O MPU Lower 4 tri-state bi-directional data bus for
transmitting data between MPU and NT3881D.
Not used during 4-bit operation.
43 - 46 DB4 - DB7 I/O MPU Higher 4 tri-state bi-directional data bus for
transmitting data between MPU and NT3881D.
DB7 is also used as busy flag.
47 - 62 COM1 - COM16 O LCD panel Common signal output pins
63 - 80 SEG40 - SEG23 O LCD panel Segment signal output pins
5 V2.4
Functional Description
The NT3881D is a dot-matrix LCD controller and driver
LSI. It operates with either a 4-bit or an 8-bit
microprocessor (MPU). The NT3881D receives both
instructions and data from the MPU. Some instructions
set operation modes, such as the function mode, data
entry mode, and display mode; as well as some control
LCD display functions, such as clear display, restore
display, shift display, and cursor. Other instructions
include read and write both data and addresses. All
instructions allow users convenient and powerful functions
to control the LCD dot-matrix displays.
Data is written into and read from the Data Display RAM
(DD RAM) or the Character Generator RAM (CG RAM).
As display character codes, the data stored in the DD
RAM decodes a set of dot-matrix character patterns that
are built into the Character Generator ROM (CG ROM).
The CG ROM, with many character patterns (up to 256
patterns), defines the character pattern fonts. The
NT3881D regularly scans the character patterns through
the segment drivers. The CG RAM stores character
pattern fonts at run time if users intend to show character
patterns that are not defined in the CG ROM. This feature
makes character display flexible. Other unused bytes can
be used as general-purpose data storage.
The LCD driver circuit consists of 16 common signal
drivers and 40 segment signal drivers allowing a variety of
application configurations to be implemented. Additionally,
the user can extend display size by cascading the
segment driver LSI NT3882. The maximum display
dimensions can be either 80 characters in a 1-line display
or 40 characters in a 2-line display.
Character Generator ROM (CG ROM)
The character generator ROM generates LCD dot
character patterns from the 8-bit character pattern codes.
The NT3881D provides 3 CG ROM configurations:
1. 192 Characters:
The CG ROM contains 160 5 X 8 dot character patterns
and 32 5 X 10 dot character patterns. An example is the
NT3881D-01, in which the relation between the character
codes and character patterns is shown in Table 1. The
character codes from 00H to 0FH are used to get
character patterns from the CG RAM. Character codes
from 10H to 1FH and from 80H to 9FH map to full
NT3881D
character patterns. Character codes from E0H to FFH are
assigned to generate 5 X 10 dot character patterns, and
other codes are used to generate 5x8 dot character
patterns.
2. 240 Characters:
The CG ROM contains 192 5 X 8 dot character patterns
and 48 5 X 10 dot character patterns. An example of this
type is the NT3881D-02, in which the relation between the
character codes and character patterns is shown in Table
2.
The character codes from 00H to 0FH are used to get
character patterns from the CG RAM. Character codes
from 10H to 1FH and from E0H to FFH are assigned to
generate 5 X 10 dot character patterns, and other codes
to generate 5 X 8 dot character patterns. No null
character pattern exists in this type. Note that the
underlined cursor, displayed on the 8th duty may be
obscure if the 8th row of a dot character pattern is coded.
We recommend that users display the cursor in the
blinking mode if they code 5x8 dot character patterns is
their custom CG ROM.
3. 256 Characters:
The CG ROM contains 192 5 X 8 dot character patterns
and 64 5 X 10 dot character patterns. No adequate
example is presented here.
The only difference between this type and the just
mentioned second type is that the character codes from
00H to 0FH get character patterns from the CG ROM
rather than from the CG RAM. These character codes are
assigned to generate 5 X 10 dot character patterns. In this
application, the CG RAM would be employed as a
general-purpose data storage.
Custom character patterns are available by maskprogramming ROM. For convenience of character pattern
development, NOVATEK has developed a user-friendly
editor program for the NT3881D to help determine the
character patterns users prefer. By executing the program
on the computer, users can easily create and modify their
character patterns. By transferring the resulting files
generated by the program through a modem or some
other communication method, the user and NOVATEK
have established a reliable, fast link for programming the
CG ROM.
6 V2.4
NT3881D
Absolute Maximum Ratings*
Power Supply Voltage (VDD) . . . . . . . . . . -0.3V to +0.7V
Power Supply Voltage(V
Input Voltage (V
) . . . . . . . . . . . . . . . -0.3V to VDD +0.3V
I
Operating Temperature (T
Storage Temperature (T
toV5).VDD -13.5V to VDD+0.3V
1
) . . . . . . . . -20°C to +75°C
OPR
) . . . . . . . -55°C to +125°C
STG
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
! All voltage values are referenced to GND = 0V
to V5, must maintain VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5.
! V
1
= 5.0V, GND = VEE = 0V, TA = 25°C)
DC Electrical Characteristics
(V
DD
Symbol Parameter Min. Typ. Max. Unit Conditions Applicable Pin
V
V
V
V
"H" Level Input Voltage (1) 2.2 -
IH1
"L" Level Input Voltage (1) -0.3 - 0.8 V
IL1
"H" Level Input Voltage (2)
IH2
"L" Level Input Voltage (2) GND - 1.0 V
IL2
VDD
V
-1.0
DD
-
VDD
V
V
DB0 - DB7, RS,
R/W, E
OSC1
V
V
V
V
V
V
OH1
OL1
OH2
OL2
COM
SEG
IIL
-IP
IOP
"H" Level Output Voltage (1) 2.4 - - V
"L" Level Output Voltage (1) - - 0.4 V
"H" Level Output Voltage (2)
"L" Level Output Voltage (2) - -
Driver Voltage Descending (COM) - - 2.9 V
Driver Voltage Descending (SEG) - - 3.8 V
0.9 VDD
- - V
0.1 VDD
Input Leakage Current -1 - 1
Pull-up MOS Current 50 125 250
Supply Current Power Supply
- 0.3 0.5 mA Rf oscillation,
Current
V
A
µ
A
µ
IOH = -0.25mA
IOL = 1.2mA
= -0.04mA
I
OH
IOL = 0.04mA
ID = 0.05mA
ID = 0.05mA
VIN = 0 to VDD
VDD = 5V
from external
clock V
f
OSC
=5V,
DD
= fCP =
270KHz
DB0 - DB7
(TTL)
CL1, CL2, M, D
(CMOS)
COM1 - 16
SEG1 - 40
RS, R/W,
DB0-DB7
V
DD
7 V2.4
NT3881D
DC Electrical Character (continued)
Symbol Parameter Min. Typ. Max. Unit Conditions Applicable Pin
External Clock Operation
fCP
External Clock Operating
125 270 350 KHz
Frequency
t
DUTY
t
RCP
t
FCP
External Clock Duty Cycle 45 50 55 %
External Clock Rise Time 0.1 - 0.5
External Clock Fall Time 0.1 - 0.5
s
µ
s
µ
Internal Clock Operation (RC Oscillator)
f
OSC
Oscillator Frequency 190 270 350 KHz
Rf = 91K
Ω ±
2%
Internal Clock Operation (Ceramic Resonator Oscillator)
Oscillator Frequency 245 250 255 KHz Ceramic resonator
LCD Driving Voltage
4.6
3.0
-
V
DD
V
V
DD
- V5
1/5 bias
1/4bias
V
V
f
OSC
LCD1
LCD2
AC Characteristics
Read Cycle (VDD = 5.0V, GND = VEE = 0V, TA = 25°C)
Symbol Parameter Min. Typ. Max. Unit Conditions
t
CYCE
t
WHE
tRE, tFE
Enable Cycle Time 500 - - ns Figure 1
Enable "H" Level Pulse Width 300 - - ns Figure 1
Enable Rise/Fall Time - - 25 ns Figure 1
601
tAS
tAH
tRD
t
DHR
RS, R/W Setup Time
100
2
RS, R/W Address Hold Time 10 - - ns Figure 1
Read Data Output Delay - - 190 ns Figure 1
Read Data Hold Time 20 - - ns Figure 1
- - ns Figure 1
8 V2.4
NT3881D
AC Characteristics (continued)
Write Cycle (VDD = 5.0V, GND = VEE = 0V, TA = 25°C)
Symbol Parameter Min. Typ. Max. Unit Conditions
t
CYCE
t
WHE
tRE, tFE
Enable Cycle Time 500 - - ns Figure 2
Enable "H" Level Pulse Width 300 - - ns Figure 2
Enable Rise/Fall Time - - 25 ns Figure 2
601
tAS
tAH
tDS
t
DHR
RS, R/W Setup Time
100
2
RS, R/W Address Hold Time 10 - - ns Figure 2
Data Output Delay 100 - - ns Figure 2
Data Hold Time 10 - - ns Figure 2
- - ns Figure 2
Notes: 1: 8-bit operation mode
2: 4-bit operation mode
Timing Characteristics of Interface Signals with Segment Driver LSI NT3882
(V
= 5V, GND = V
DD
= 0V, T
EE
= 25°C)
A
Symbol Parameter Min. Typ. Max. Unit Conditions
t
CWH
Clock Pulse Width High 800 - - ns Figure 3
t
t
CWL
tSU
tDH
CSU
tDM
Clock Pulse Width Low 800 - - ns Figure 3
Data Setup Time 300 - - ns Figure 3
Data Hold Time 300 - - ns Figure 3
Clock Setup Time 500 - - ns Figure 3
M Delay Time -1000 - 1000 ns Figure 3
Power Supply Conditions Using Internal Reset Circuit
Symbol Parameter Min. Typ. Max. Unit Conditions
t
RON
t
OFF
Power Supply Rise Time 0.1 - 10 ns Figure 4
Power Supply OFF Time 1 - - ms Figure 4
9 V2.4
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