Noty an13f Linear Technology
High Speed Comparator Techniques
Jim Williams
INTRODUCTION
Application Note 13
April 1985
Comparators may be the most underrated and underutilized monolithic linear component. This is unfortunate
because comparators are one of the most flexible and
universally applicable components available. In large
measure the lack of recognition is due to the IC op amp,
whose versatility allows it to dominate the analog design
world. Comparators are frequently perceived as devices,
which crudely express analog signals in digital form—a
1-bit A/D converter. Strictly speaking, this viewpoint is
correct. It is also wastefully constrictive in its outlook.
Comparators don’t “just compare” in the same way that
op amps don’t “just amplify”.
Comparators, in particular high speed comparators, can
be used to implement linear circuit functions which are
as sophisticated as any op amp-based circuit. Judiciously
combining a fast comparator with op amps is a key to
achieving high performance results. In general, op ampbased circuits capitalize on their ability to close a feedback
loop with precision. Ideally, such loops are maintained
continuously over time. Conversely, comparator circuits
are often based on speed and have a discontinuous output
over time. While each approach has its merits, a fusion of
both yields the best circuits.
This effort’s initial sections are devoted to familiarizing
the reader with the realities and difficulties of high speed
comparator circuit work. The mechanics and subtleties
of achieving precision circuit operation at DC and low
frequency have been well documented. Relatively little has
appeared which discusses, in practical terms, how to get
fast circuitry to work. In developing such circuits, even
the most veteran designers sometimes feel that nature is
conspiring against them. In some measure this is true.
Like all engineering endeavors, high speed circuits can only
work if negotiated compromises with nature are arranged.
Ignorance of, or contempt for, physical law is a direct
route to frustration. In this regard, much of the text and
appendices are directed at developing awareness of and
respect for circuit parasitics and fundamental limitations.
This approach is maintained in the applications section,
where the notion of “negotiated compromises” is expressed
in terms of resistor values and compensation techniques.
Many of the application circuits use the LT
to improve on a standard circuit. Some utilize the speed to
implement a traditional function in a non-traditional way,
with attendant advantages. A (very) few operate at or near
the state-of-the-art for a given circuit type, regardless of
approach. Substantial effort has been expended in developing these examples and documenting their operation.
The resultant level of detail is justified in the hope that it
will be catalytic. The circuits should stimulate new ideas
to suit particular needs, while demonstrating the LT1016’s
capabilities in an instructive manner.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
®
1016’s speed
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Application Note 13
Table of ConTenTs
Introduction ................................................................................................................................................................ 1
The LT1016—An Overview ......................................................................................................................................... 3
The Rogue’s Gallery of High Speed Comparator Problems
Bypassing ............................................................................................................................................................... 4
Probe Compensation .............................................................................................................................................. 4
Probe Bandwidth .................................................................................................................................................... 4
Probe Grounding .................................................................................................................................................... 5
FET Probe Considerations ....................................................................................................................................... 5
Comparator Grounding ........................................................................................................................................... 6
Ground Planes ........................................................................................................................................................ 6
Source Impedance Considerations ......................................................................................................................... 6
Stray Capacitance at Inputs .................................................................................................................................... 7
Output Loading ....................................................................................................................................................... 7
Output Termination ................................................................................................................................................. 7
Input Common Mode Level ..................................................................................................................................... 7
Oscilloscopes .............................................................................................................................................................. 8
Applications
1Hz to 10MHz V→F Converter ................................................................................................................................ 8
Quartz-Stabilized 1Hz to 30MHz V→F Converter .................................................................................................. 10
1Hz to 1MHz Voltage-Controlled Sine Wave Oscillator ......................................................................................... 12
200ns–0.01% Sample-and-Hold Circuit................................................................................................................ 14
Fast Track-and-Hold Circuit ................................................................................................................................... 16
10ns Sample-and-Hold ......................................................................................................................................... 17
2.5µs, 12-Bit A/D Converter .................................................................................................................................. 18
Inexpensive, Fast 10-Bit Serial Output A/D ........................................................................................................... 20
2.5MHz Precision Rectifier/AC Voltmeter .............................................................................................................. 21
10MHz Fiber Optic Receiver .................................................................................................................................. 22
12ns Circuit Breaker ............................................................................................................................................. 23
50MHz Trigger ...................................................................................................................................................... 24
References ................................................................................................................................................................ 25
Appendices
A—About Bypass Capacitors ................................................................................................................................ 25
B—About Probes and Oscilloscopes .................................................................................................................... 27
C—About Ground Planes ...................................................................................................................................... 29
D—Measuring Equipment Response .................................................................................................................... 30
E—About Level Shifts ........................................................................................................................................... 31
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THE LT1016—AN OVERVIEW
Application Note 13
A new ultra high speed comparator, the LT1016, features
TTL-compatible complementary outputs and 10ns response time. Other capabilities include a latch pin and
good DC input characteristics (see Figure 1). The LT1016’s
outputs directly drive all TTL families, including the new
higher speed ASTTL and FAST parts. Additionally, TTL
outputs make the device easier to use in linear circuit applications where ECL output levels are often inconvenient.
A substantial amount of design effort has made the LT1016
relatively easy to use. It is much less prone to oscillation
and other vagaries than some slower comparators, even
with slow input signals. In particular, the LT1016 is stable
in its linear region, a feature no other high speed comparator has. Additionally, output stage switching does not appreciably change power supply current, further enhancing
stability. These features make the application of the 200GHz
gain-bandwidth LT1016 considerably easier than other
fast comparators. Unfortunately, laws of physics dictate
that the circuit environment the LT1016 works in must be
properly prepared. The performance limits of high speed
circuitry are often determined by parasitics such as stray
capacitance, ground impedance, and layout. Some of these
considerations are present in digital systems where designers are comfortable describing bit patterns and memory
access times in terms of nanoseconds. The LT1016 can
be used in such fast digital systems and Figure2 shows
just how fast the device is. The simple test circuit allows
us to see that the LT1016’s (Trace B) response to the pulse
generator (Trace A) is faster than a TTL inverter (Trace C)!
In fact, the inverter’s output never gets to a TTL “0” level.
Linear circuits operating with this kind of speed make
many engineers justifiably wary. Nanosecond domain linear
circuits are widely associated with oscillations, mysterious shifts in circuit characteristics, unintended modes of
operation and outright failure to function.
Other common problems include different measurement
results using various pieces of test equipment, inability
to make measurement connections to the circuit without
inducing spurious responses and dissimilar operation
between two “identical” circuits. If the components used
A = 5V/DIV
VERTICAL B = 5V/DIV
C = 2V/DIV
+
V
1
–
4
LT1016
3
+
7
V
PROP DELAY – 100mV STEP
5mV OVERDRIVE – 12ns MAX
20mV OVERDRIVE – 10ns MAX
DIFFERENTIAL PROP DELAY – 2ns MAX
9
Q
OUT
L
8
Q
6
5
–
OUT
Figure 1. The LT1016 at a Glance
OUTPUTS ARE STABLE WHEN THE LT1016
IS IN ITS LINEAR REGION.
REGARDLESS OF HOW SLOWLY THE
INPUT SIGNALS ARE CHANGING
INPUT OFFSET – 1.5mV MAX
INPUT OFFSET DRIFT – 10µV/°C MAX
INPUT BIAS CURRENT – 10µA MAX
COMMON MODE RANGE – +V – 1V –V + 1.25V
GAIN – 2000 MIN
POWER SUPPLY RANGE – +5V/GND – ±5V
TEST CIRCUIT
PULSE
GENERATOR
+
–
7404
OUTPUTS
LT1016
HORIZONTAL = 5ns/DIV
Figure 2. LT1016 vs a TTL Gate
1V
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Application Note 13
in the circuit are good and the design is sound, all of the
above problems can usually be traced to failure to provide a proper circuit “environment.” To learn how to do
this requires studying the causes of the aforementioned
difficulties.
The Rogue’s Gallery of High Speed Comparator Problems
By far the most common error involves power supply
bypassing. Bypassing is necessary to maintain low supply impedance. DC resistance and inductance in supply
wires and PC traces can quickly build up to unacceptable
levels. This allows the supply line to move as internal current levels of the devices connected to it change. This will
almost always cause unruly operation. In addition, several
devices connected to an unbypassed supply can “communicate” through the finite supply impedances, causing
erratic modes. Bypass capacitors furnish a simple way to
eliminate this problem by providing a local reservoir of
energy at the device. The bypass capacitor acts like an
electrical flywheel to keep supply impedance low at high
frequencies. The choice of what type of capacitors to use
for bypassing is a critical issue and should be approached
carefully (see Appendix A, “About Bypass Capacitors”).
An unbypassed LT1016 is shown responding to a pulse
input in Figure 3. The power supply the LT1016 sees at
its terminals has high impedance at high frequency. This
impedance forms a voltage divider with the LT1016, allowing the supply to move as internal conditions in the
comparator change. This causes local feedback and
oscillation occurs. Although the LT1016 responds to the
input pulse, its output is a blur of 100MHz oscillation.
Always use bypass capacitors.
In Figure 4 the LT1016’s supplies are bypassed, but it still
oscillates. In this case, the bypass units are either too far
from the device or are lossy capacitors. Use capacitors with
good high frequency characteristics and mount them as
close as possible to the LT1016. An inch of wire between
the capacitor and the LT1016 can cause problems.
In Figure 5 the device is properly bypassed but a new
problem pops up. This photo shows both outputs of the
comparator. Trace A appears normal, but Trace B shows an
excursion of almost 8V—quite a trick for a device running
from a +5V supply. This is a commonly reported problem
in high speed circuits and can be quite confusing. It is
not due to suspension of natural law, but is traceable to a
grossly miss-compensated or improperly selected oscilloscope probe. Use probes which match your oscilloscope’s
input characteristics and compensate them properly (for
a discussion on probes, see Appendix B, “About Probes
and Scopes”). Figure 6 shows another probe-induced
problem. Here, the amplitude seems correct but the 10ns
response time LT1016 appears to have 50ns edges! In this
case, the probe used is too heavily compensated or slow
for the oscilloscope. Never use 1X or “straight” probes.
Their bandwidth is 20MHz or less and capacitive loading
is high. Check probe bandwidth to ensure it is adequate
for the measurement. Similarly, use an oscilloscope with
adequate bandwidth.
A = 2V/DIV
Figure 3. Unbypassed LT1016 Response Figure 4. LT1016 Response with Poor Bypassing
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HORIZONTAL = 100ns/DIV
A = 2V/DIV
HORIZONTAL = 100ns/DIV
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A = 2V/DIV
B = 2V/DIV
Application Note 13
VERTICAL = 1V/DIV
HORIZONTAL = 10ns/DIV
Figure 5. Improper Probe Compensation Causes
Seemingly Unexplainable Amplitude Error
In Figure 7 the probes are properly selected and applied
but the LT1016’s output rings and distorts badly. In this
case, the probe ground lead is too long. For general purpose work most probes come with ground leads about six
inches long. At low frequencies this is fine. At high speed,
the long ground lead looks inductive, causing the ringing
shown. High quality probes are always supplied with some
short ground straps to deal with this problem. Some come
with very short spring clips which fix directly to the probe
tip to facilitate a low impedance ground connection. For
fast work, the ground connection to the probe should not
exceed one inch in length. Keep the probe ground con-
nection as short as possible.
The difficulty in Figure 8 is delay and inadequate amplitude
(Trace B). A small delay on the leading edge is followed by
a large delay before the falling edge begins. Additionally,
HORIZONTAL = 50ns/DIV
Figure 6. Overcompensated or Slow Probes Make Edges
Look Too Slow
a lengthy, tailing response stretches 70ns before finally
settling out. The amplitude only rises to 1.5V. A common
oversight is responsible for these conditions.
A FET probe monitors the LT1016 output in this example.
The probe’s common mode input range has been exceeded,
causing it to overload and clip the output badly. The small
delay on the rising edge is characteristic of active probes
and is legitimate. During the time the output is high, the
probe is driven deeply into saturation. When the output
falls, the probe’s overload recovery is lengthy and uneven,
causing the delay and tailing.
Know your FET probe. Account for the delay of its active
circuitry. Avoid saturation effects due to common mode
input limitations (typically ±1V). Use 10X and 100X attenuator heads when required.
A = 2V/DIV
VERTICAL = 1V/DIV
B = 1V/DIV
HORIZONTAL = 20ns/DIV
Figure 7. Typical Results Due to Poor Probe Grounding Figure 8. Overdriven FET Probe Causes Delayed
Tailing Response
HORIZONTAL = 20ns/DIV
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Application Note 13
Figure 9 shows the LT1016’s output (Trace B) oscillating
near 40MHz as it responds to an input (Trace A). Note
that the input signal shows artifacts of the oscillation.
This example is caused by improper grounding of the
comparator. In this case, the LT1016’s ground pin connection is one inch long. The ground lead of the LT1016
must be as short as possible and connected directly to a
low impedance ground point. Any substantial impedance
in the LT1016’s ground path will generate effects like this.
The reason for this is related to the necessity of bypassing the power supplies. The inductance created by a long
device ground lead permits mixing of ground currents,
causing undesired effects in the device. The solution here
is simple. Keep the LT1016’s ground pin connection as
short (typically 1/4 inch) as possible and run it directly to
a low impedance ground. Do not use sockets.
Figure 10 addresses the issue of the “low impedance
ground”, referred to previously. In this example, the output is clean except for chattering around the edges. This
photograph was generated by running the LT1016 without
a “ground plane“. A ground plane is formed by using a
continuous conductive plane over the surface of the circuit
board (the theory behind ground planes is discussed in
Appendix C). The only breaks in this plane are for the circuit’s necessary current paths. The ground plane serves
two functions. Because it is flat (AC currents travel along
the surface of a conductor) and covers the entire area of
the board, it provides a way to access a low inductance
ground from anywhere on the board. Also, it minimizes
the effects of stray capacitance in the circuit by referring
them to ground. This breaks up potential unintended and
harmful feedback paths. Always use a ground plane with
the LT1016.
“Fuzz” on the edges is the difficulty in Figure 11. This
condition appears similar to Figure 10, but the oscillation
is more stubborn and persists well after the output has
gone low. This condition is due to stray capacitive feedback
from the outputs to the inputs. A 3kΩ input source impedance and 3pF of stray feedback allowed this oscillation.
The solution for this condition is not too difficult. Keep
source impedances as low as possible, preferably 1kΩ or
less. Route output and input pins and components away
from each other.
A = 1V/DIV
B = 2V/DIV
HORIZONTAL = 100ns/DIV
Figure 9. Excessive LT1016 Ground Path Resistance
Causes Oscillation
VERTICAL = 2V/DIV
HORIZONTAL = 100ns/DIV
Figure 10. Transition Instabilities Due to No Ground Plane Figure 11. 3pF Stray Capacitive Feedback with 3kΩ
VERTICAL = 2V/DIV
HORIZONTAL = 50ns/DIV
Source Can Cause Oscillation
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Application Note 13
The opposite of stray-caused oscillations appears in
Figure12. Here, the output response (Trace B) badly lags
the input (Trace A). This is due to some combination of
high source impedance and stray capacitance to ground
at the input. The resulting RC forces a lagged response at
the input and output delay occurs. An RC combination of
2kΩ source resistance and 10pF to ground gives a 20ns
time constant—significantly longer than the LT1016’s
response time. Keep source impedances low and minimize
stray input capacitance to ground.
Figure 13 shows another capacitance-related problem.
Here the output does not oscillate, but the transitions
are discontinuous and relatively slow. The villain of this
situation is a large output load capacitance. This could be
caused by cable driving, excessive output lead length or
the input characteristics of the circuit being driven. In most
situations this is undesirable and may be eliminated by
buffering heavy capacitive loads. In a few circumstances
it may not affect overall circuit operation and is tolerable.
Consider the comparator’s output load characteristics and
their potential effect on the circuit. If necessary, buffer
the load.
Another output-caused fault is shown in Figure 14. The
output transitions are initially correct but end in a ringing
condition. The key to the solution here is the ringing. What
is happening is caused by an output lead which is too long.
The output lead looks like an unterminated transmission
line at high frequencies and reflections occur. This accounts
for the abrupt reversal of direction on the leading edge
and the ringing. If the comparator is driving TTL this may
be acceptable, but other loads may not tolerate it. In this
instance, the direction reversal on the leading edge might
cause trouble in a fast TTL load. Keep output lead lengths
short. If they get much longer than a few inches, terminate
with a resistor (typically 250Ω to 400Ω).
A final malady is presented in Figure 15. These waveforms
are reminiscent of the input RC-induced delay of Figure12.
The output waveform initially responds to the input’s
leading edge, but then returns to zero before going high
again. When it does go high, it slews slowly. Additional
odd characteristics include pronounced overshoot and
pulse top aberration. The fall time is also slow and well
delayed from the input. This is certainly strange behavior
A = 2V/DIV
VERTICAL
B = 2V/DIV
HORIZONTAL = 10ns/DIV
Figure 12. Stray 5pF Capacitance from Input to Ground
Causes Delay
A = 1V/DIV
HORIZONTAL = 50ns/DIV
Figure 14. Lengthy, Unterminated Output Lines
Ring from Reflections
A = 2V/DIV
HORIZONTAL = 100ns/DIV
Figure 13. Excessive Load Capacitance Forces
Edge Distortion
A = 5V/DIV
B = 2V/DIV
HORIZONTAL = 20ns/DIV
Figure 15. Input Common-Mode Overdrive
Generates Odd Outputs
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Application Note 13
from a TTL output. What is going on here? The input pulse
is responsible for all these anomalies. Its 10V amplitude
is well outside the +5V powered LT1016’s common mode
input range. Internal input clamps prevent this pulse from
damaging the LT1016, but an overdrive of this magnitude
results in poor response. Keep input signals inside the
LT1016’s common mode range at all times.
Oscilloscopes
A few of the examples illustrated dealt with probe-caused
problems. Although it should be obvious, it is worth mentioning that the choice of oscilloscope employed is crucial.
Be certain of the characteristic of the probe-oscilloscope
combination you are using. Rise time, bandwidth, resistive and capacitive loading, delay, overdrive recovery and
other limitations must be kept in mind. High speed linear
circuitry demands a great deal from test equipment and
countless hours can be saved if the characteristics of the
instruments used are well known (see Appendix C, “Measuring Equipment Response”). In fact, it is possible to use
seemingly inadequate equipment to get good results if the
equipment’s limitations are well known and respected. All of
the applications which follow involve rise times and delays
well above the 100MHz to 200MHz region, but 90% of the
development work was done with a 50MHz oscilloscope.
Familiarity with equipment and thoughtful measurement
technique permit useful measurements seemingly beyond
instrument specifications. A 50MHz oscilloscope cannot
track a 5ns rise time pulse, but it can measure a 2ns delay
between two such events. Using such techniques, it is
often possible to deduce the desired information. There
are situations where no amount of cleverness will work
and the right equipment, e.g., a faster oscilloscope, must
be used.
In general, use equipment you trust and measurement
techniques you understand. Keep asking questions and
don’t be satisfied until everything you see on the oscilloscope is accounted for and makes sense.
The LT1016, combined with the precautionary notes listed
above, permits fast linear circuit functions which are difficult or impossible using other approaches. Many of the
applications presented represent the state-of-the-art for a
particular circuit function. Some show new and improved
ways to implement standard functions by utilizing the
LT1016’s speed. All have been carefully (and painfully)
worked out and should serve as good idea sources for
potential users of the device.
APPLICATIONS SECTION
1Hz to 10MHz V→F Converter
The LT1016 and the LT1012 low drift amplifier combine to
form a high speed V→F converter in Figure 16. A variety
of circuit techniques is used to achieve a 1Hz to 10MHz
output. Overrange to 12MHz (V
circuit has a wider dynamic range (140dB, or 7 decades)
than any commercially available unit. The 10MHz fullscale frequency is 10 times faster than currently available
monolithic V→Fs. The theory of operation is based on the
identity Q = CV.
Each time the circuit produces an output pulse, it feeds
back a fixed quantity of charge (Q) to a summing node
(Σ). The circuit’s input furnishes a comparison current at
the summing node. The difference signal at the node is
integrated in a monitoring amplifier’s feedback capacitor.
= 12V) is provided. This
IN
The amplifier controls the circuit’s output pulse generator,
completing a feedback loop around the integrating amplifier. To maintain the summing node at zero, the pulse
generator runs at a frequency which permits enough
charge pumping to offset the input signal. Thus, the output
frequency will be linearly related to the input voltage. A1
is the integrating amplifier.
For low bias, high speed operation, a pair of discrete
FETs directly drives A1’s output stages, replacing A1’s
monolithic input circuitry. A1’s input stage is turned off
by connecting the input pins to the negative 15V rail. The
FET gates become the “+” and “–“ inputs of the amplifier.
0.2μV/°C offset drift performance is obtained by stabilizing
the A1-FET combination with A2, a precision op amp. A2
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Application Note 13
measures the DC value of the negative input, compares
it to ground, and forces the positive input to maintain
offset balance in the A1-FET combination. Note that A2 is
configured as an integrator and cannot see high frequency
signals. It functions only at DC and low frequency. The
A1-FET combination is arranged as an integrator with
a 100pF feedback capacitor. When a positive voltage is
applied to the input, A1’s output integrates in a negative
1.8k
15V
–
33pF POLYSTYRENE
100pF
2
+
3
22k
–15V
36k
1k
15V
1k
–
+
7
1
A1
LT318A
–15V
5
4
1
C2
LT1011
100k
+
–
E
0V TO 10V
1Hz TRIM
IN
GAIN TRIM
15V
1k
–15V
6.19k*
2k
9.1k
10M
9.1k
= HP5082-2810
= 2N4393
Q3
Q4
∑
10k
300pF
–
A2
LT1012
+
direction (Trace A, Figure 17). During this period, C1’s
inverting output is low. A very high speed level shifter,
Q1-Q2 (see AppendixD, “About Level Shifters”), inverts this
output and drives the Zener reference bridge. The bridge’s
positive output is used to charge the 33pF capacitor. The
1.2V diode string provides cancellation and temperature
compensation for the diode drops in the bridge so that
the 33pF unit charges to V
+
C1
LT1016
–
5pF
100 220Ω
220k
0.1
5V
15V
1Hz TO 10MHz
OUTPUT
60ns WIDE PULSES
+ VBE Q3.
Z
4.7k
8200.1
1000pF
5V
430
Q1
2N2907
820
–5V
4.7k 4.7k
–15V 15V
Q2
150Ω
150
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LT1009
2.5V
= 1N4148
= 2N2369
Figure 16. 1Hz to 10MHz V→F Converter
A = 1V/DIV
B = 10V/DIV
C = 20mA/DIV
D = 1V/DIV
HORIZONTAL = 100ns/DIV
Figure 17. 10MHz V→Fs Operating Waveforms
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Application Note 13
When A1’s output crosses zero, C1’s inverting output goes
high and Q2’s (Trace B) collector goes to –5V. This causes
the 33pF unit to dispense charge into the summing node
via Q4’s V
. The amount of charge dispensed is a direct
BE
function of the voltage that the 33pF unit was charged to
(Q = CV). Q4’s V
compensates the Q3 VBE term in the
BE
capacitor’s charge equation. The current, which flows
through the 33pF unit (Trace C) reflects this charge pumping action. The removal of current from A1’s summing
junction (Trace D) causes the junction to be driven very
quickly negative. The initial negative-going 20ns transient
at A1’s output is due to amplifier delay. The input signal
feeds directly through the feedback capacitor and appears
at the output. When the amplifier finally responds, its output (Trace A) slew limits as it attempts to regain control
of the summing node. The amount of time Q2’s collector
(Trace B) remains at –5V depends on how long it takes
A1 to recover and the 5pF-100Ω hysteresis network at
C1. This 60ns interval is long enough for the 33pF unit
to fully discharge. After this, C1 changes state and Q2’s
collector swings positive. The capacitor is recharged and
the entire cycle repeats. The frequency at which this oscillation occurs is directly related to the voltage-input-derived
current into the summing junction. Any input current will
require a corresponding oscillation frequency to hold the
summing point at an average value of 0V.
Maintaining this relationship at megahertz frequencies
places severe restrictions on circuit timing. The key to
achieving 10MHz full-scale operating frequency is the
ability to transmit information around the loop as quickly
as possible. The discharge-reset sequence is particularly
critical and is detailed in Figure 18. Trace A is the A1
integrator output. Its ramp output crosses 0V at the first
left vertical graticule division. A few nanoseconds later,
C1’s inverting output begins to rise (Trace B), driving the
Q1-Q2 level shifter output negative (Trace C). Q2’s collector begins to head negative about 12ns after A1’s output
crosses 0V. 4ns later, the summing point (Trace D) begins
to go negative as current is pulled from it through the 33pF
capacitor. At 25ns, C1’s inverting output is fully up, Q2’s
collector is at –5V, and the summing point has been pulled
to its negative extreme. Now, A1 begins to take control.
Its output (Trace A) slews rapidly in the positive direction,
restoring the summing point. At 60ns, A1 is in control of
the summing node and the integration ramp begins again.
Start-up and overdrive conditions could force A1’s output
to go to the negative rail and stay there. The AC-coupled
nature of the charge dispensing loop can preclude normal
operation and the circuit may latch, C2 provides a “watchdog” function for this condition. If A1’s output tries to go
too far below zero, C2 switches, forcing the “+” input FET
gate positive. This causes A1’s output to slew positive,
initiating normal circuit action. The diode chain at C1’s
input prevents common mode overdrive at the LT1016.
To trim this circuit, ground the input and adjust the 1k pot
for 1Hz output. Next, apply 10,000V and set the 2kΩ unit
for 10.000MHz output. The transfer linearity of the circuit
is 0.06%. Full-scale drift is typically 50ppm/°C and zero
point error about 0.2µV/°C (0.2Hz/°C).
A = 0.2V/DIV
(UNCALIBRATED)
B = 1V/DIV
C = 5V/DIV
D = 0.5V/DIV
HORIZONTAL = 10ns/DIV
Figure 18. Detail of 60ns Reset Sequence (Whoosh!)
Quartz-Stabilized 1Hz to 30MHz V→F Converter
Figure 16’s upper limit on operating frequency is imposed
by delays in the active elements in the LT1016’s feedback
path. Higher speed is possible by minimizing these delays.
Figure 19 shows a way to do this while retaining good
drift and linearity characteristics. The circuit’s untrimmed
150dB dynamic range is 1000 times greater than commercially available V→F converters, whether monolithic,
hybrid, or modular.
The technique employed allows the LT1016 to roar along
at a 30MHz full-scale output frequency, substantially faster
than any commercially available V→F. The actual V→F
conversion is performed by the circuit shown inside the
dashed lines. This circuit functions similarly to Figure 16.
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