Noty an139f Linear Technology

Power Supply Layout and EMI

Christian Kueck

Application Note 139

October 2012

Introduction

PC-board layout determines the success or failure of every
power supply project. It sets functional, electromagnetic
interference (EMI), and thermal behavior. Switching power
supply layout is not black magic, but is often overlooked
until it is too late in the design process. Fortunately physics
is on your side. Functional and EMI requirements must
be met, and in a world of trade-offs in power supply unit
layout, what is good for functional stability is good for
EMI. Good layout from first prototyping on does not add
to cost, but actually saves significant resources in EMI
filters, mechanical shielding, EMI test time and PC board
runs. This application note focuses primarily on nonisolated
topologies, but will examine some isolated topologies as
well. You will learn to make the optimum choices regarding
PC-board layout for solid power supply designs.

I remember about a dozen years ago as a customer was
using a switch mode power supply in a car radio for the
first time many of his colleagues said that it could not
be done. However, after a few things were ironed out in
layout and input filtering, everything worked fine. Later a

®

customer successfully used an LT

1940 1MHz dual step­down switching regulator, which operated in the middle
of his AM band in a car radio receiver. No additional metal
shielding was required for the power supply unit (PSU);
it was only an issue of placement and layout. In order to
get there, we need to go through some physics.

With nonisolated topologies, one of the most basic topolo­gies is the buck regulator. EMI starts off from high di/dt
loops. The supply wire as well as the load wire should not
have high AC current content. So we can focus our analy­sis from the input capacitor, C
relevant AC currents to the output capacitor, C

, which should source all

IN

, where

OUT

any AC currents end.

V

IN

+
–

C

IN

HOT LOOP

S1

S2

Figure 1

V

OUT

C

OUT

AN139 F01

During the on cycle with S1 closed and S2 open, the AC
current follows the red loop (Figure 1). During the off
cycle, with S1 open and S2 closed, the AC current follows
the blue loop. Both currents have a trapeze shape. People
often have difficulty grasping that the loop producing the
highest EMI is not the red nor the blue loop. Only in the
green loop flows a fully switched AC current, switched from
zero to I

and back to zero. We refer to the green loop

PEAK

as a hot loop, since it has the highest AC and EMI energy.

In order to reduce EMI and improve functionality, you
need to reduce the radiating effect of the green loop as
much as possible. If we could reduce the PC-board area
of the green loop to zero and buy an ideal input capacitor
with zero impedance, the problem would be solved. But
we are limited to the real world. The task of engineering
is to find the optimal compromise.

Let’s take a look at the layout of an LT8611 buck converter
(Figure 3). The LT8611 has both switches internal, so we
only have to be concerned with the connection of the
input capacitor.

As you can see from the schematic in Figure 2, the hot
loop is not easy to spot for layout purposes.

L, LT, LTC, LTM, Linear Technology, the Linear logo and LTspice are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.

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Application Note 139

V

IN

5.5V TO 42V

f

SW

4.7μF

0.1μF

1μF

= 700kHz

The green line is the hot loop in the top layer. AC current
flows through the input capacitor and the switches in the
part. Figure 3 shows the DC1750A LT8611 demo board.
The current density in the cross cut of the hot loop will
look like this (Figure 4).

60.4k

IN

EN/UVON OFF

SYNC

IMON

ICTRL

INTV

TR/SS

RT

LT8611

CC

Figure 2

BSTV

SW

ISP
ISN

BIAS

PG

FB

GNDPGND

0.1μF

4.7μH

243k

10pF

1M

0.02Ω

1μF

AN139 F02

V
5V

2.5A

47μF

OUT

How much does a copper short-circuit loop or plane under
the hot loop improve the functional and EMI behavior of
your circuit?

AN139 F03

Figure 3

Figure 4

The result of an experiment with a 10 cm × 10cm rectangular
loop with 27MHz is shown in Table 1. The table gives an
indication how much improvement a solid copper plane
under the hot loop topside traces gives. The first line is
no plane single layer.

The inductance of a single-layer loop of 187nH gets down
to 13nH in the case of only 0.13mm insulation between
the plane and loop traces.

Table 1

d

(mm)f (MHz) C (pF) L (nH)

18.4 400 187 Single-Layer Open
Loop

21.2 400 141 Inner Copper Short­Circuit Loop

1.5 38.9 400 42 Solid Plate 3.23

1.5 34.7 400 53 Rectangular Loop No
Overlap

0.5 52.1 400 23 Thin Rectangular 1.77

0.27 55 400 21 1.61

0.12 69 400 13 Paper

FACTOR OVER

0.12mm

14.4

10.85

4.08

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Application Note 139

A solid plane on the next layer in a multilayer board
(four layers or more) will have over 3× less inductance
than a normal 1.5mm 2-layer board with a solid bottom
plane, and over 14× less over a single-layer board. A solid
plane with minimum distance to the hot loop is one of the
most effective ways to reduce EMI.

Where Does the Current Flow in the Plane?

The green top layer hot loop magnetic AC field produces
eddy currents in the plane (Figure 5). Those eddy currents
produce a mirror AC magnetic field, which is opposite the
hot loop field (red trace). Both magnetic fields will cancel
out. This works better the closer the mirror current is to
the hot loop. Current is a round trip in the top layer. The
most likely current path in the shield is the same round
trip direct under the top layer. Both currents are almost the
same. Since the plane current needs to be as high as the
top trace current, it will produce as much voltage across
the plane as is necessary to sustain the current. To the
outside it will show up as GND bounce.

The boost circuit can be viewed in continuous mode as a
buck circuit operating backwards.

The hot loop is identified as the difference between the
blue loop if S2 is closed and the red loop (Figure 6) with
S2 open and S1 closed.

V

OUT

S1

V

IN

+

C

IN

–

S2

HOT LOOP

Figure 6

C

OUT

AN139 F06

The hot loop of the LT3956 LED driver boost controller
is shown in green (Figure 7). The second layer is a solid
GND plane. The main EMI emitter is the magnetic an­tenna the hot loop creates. The area of the hot loop and
its inductance are tightly related. If you are comfortable
thinking in inductance, try to decrease it as much as you
can. If you are more comfortable in antenna design, reduce
the effective area of the magnetic antenna. For near field
purposes, inductance and magnetic antenna effectiveness
are essentially the same. See Appendices A and B for
further background.

AN139 F05

Figure 5

From EMI perspective small hot loops are best. A power
supply IC with integrated sync switches, optimized pinout
and careful internal switch control will outperform on
EMI a non-sync power supply IC with external Schottky
diode. And both will outperform a controller solution with
external MOSFETs.

+LED

+OUT

PGND

Figure 7

PV

IN

PGND

AN139 F07

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Application Note 139

The single inductor 4-switch buck-boost (Figure 8) consists
of a buck circuit followed by a boost circuit. The layout will
often be complicated by a common GND current shunt

®

which belongs to both hot loops. The LTC

3780 DC1046A
demo board (Figure 9) shows an elegant solution splitting
the sense resistor in two parallel ones.

AN139 F08

V

OUT

V

IN

+
–

HOT LOOP

HOT LOOP

Figure 8. 4-Switch Buck-Boost

A bit different drawing of a SEPIC circuit (Figure 10) shows
its hot loop. Instead of an active MOSFET for the top switch,
a diode is often used. The LT3757 DC1341A (Figure 11)
shows a good SEPIC layout. The green hot loop area is
minimized and has a solid GND plane on the next layer.

V

OUT

V

IN

+
–

Figure 10. SEPIC

HOT LOOP

AN139 F10

AN139-4

AN139 F09

Figure 9

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Application Note 139

AN139 F11

Figure 11

The inverting topology (Figure 12) is very similar to SEPIC,
only the load has moved through the top switch and top

–V

OUT

inductor. Layout is very similar, and demo boards can
typically be modified from SEPIC to inverting provided

V

IN

+
–

HOT LOOP

AN139 F12

the IC can also regulate on negative feedback voltage like
LT3581, LT3757 etc..

Flyback (Figure 13) uses separate windings on a trans­former and there is only magnetic coupling between the
primary and secondary windings. The current in the primary

Figure 12. Inverting

1

2

10mH

+–~

~

winding goes to zero at a relative high di/dt; only the energy

3

HOT LOOP

HOT LOOP

HIGH HF IMPEDANCE

Figure 13. Isolated Offline Flyback

AN139 F13

4

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Application Note 139

stored in the leakage inductance and capacitance between
windings and on the switch node slows that down. The
primary and other transformer windings can be seen as
fully switched current. We get two main hot loops as in the
buck-boost case (Figure 8). To reduce EMI, in addition to
close V

decoupling for differential mode EMI, common

IN

mode chokes are used for the likely dominant common
mode EMI in this topology.

Other AC Loops

The hot loop with the main switching energy is the major
source of RF energy. However for the operation of the IC
and circuit, other AC carrying loops are required. All circuits
need a supply for the main switch driver. In the case of the
buck, it is often decoupled with the same V

capacitor as

IN

the hot loop. Other ICs use a separate voltage for the drive
circuit, often referred to as INTV

Make the INTV

capacitor PGND and GND loop as small

CC

(Figure 14).

CC

as possible and shield it with a solid plane in the next
layer. EMI energy is on the order of 20dB lower than in
the main hot loop. Any excessive inductance in the INTV
loop will deteriorate IC performance. The INTV

capacitor

CC

CC

decouples beside switch drive internal sensitive and wide
band circuitry like current sense comparators, reference
and error amplifiers which are very often internal supplied
from INTV

CC

too.

Figure 15 is an FFT of the current in the INTVCC decoupling
capacitor (C2 in Figure 17).

Figure 16 is an FFT of the current in the input capacitor
(C6 in Figure 17). The RF energy is over 20dB higher than
in the INTV

–10dB

–30dB

–50dB

–70dB

–90dB

–10dB

–30dB

–50dB

loop.

CC

I(C2)

1MHz 1GHz

100MHz10MHz

AN139 F15

Figure 15

I(C6)

V

5.5V TO 42V

4.7μF

IN

10nF

1μF

60.4k

IN

EN/UV

PG

SYNC

TR/SS

INTV

RT

CC

LT8610

PGND

GND

BSTV

SW

BIAS

0.1μF

4.7μH

FB

1M

10pF

243k

47μF

V

OUT

5V

2.5A

–70dB

–90dB

1MHz 1GHz

10MHz

100MHz

AN139 F16

Figure 16

The LT8610 LTspice
loss of R

= 1Ω is used to decouple the zero impedance

PAR

®

circuit (Figure 17) L2 with a high

LTspice voltage source, V1, from the input capacitor, C6.
Note: LTspice switch mode regulator models are developed

f

= 700kHz

SW

Figure 14

AN39 F14

to simulate the functionality of the IC. Use great caution
to extrapolate RF behavior because the models do not
account for the internal or the external lump devices or
board layout. However, it is nonetheless a great tool to
get an approximation of very difficult to measure effects.

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