Noty an12fa Linear Technology
Circuit Techniques for Clock Sources
Jim Williams
Application Note 12
October 1985
Almost all digital or communication systems require some
form of clock source. Generating accurate and stable clock
signals is often a difficult design problem.
Quartz crystals are the basis for most clock sources. The
combination of high Q, stability vs time and temperature,
and wide available frequency range make crystals a
price-performance bargain. Unfortunately, relatively little
information has appeared on circuitry for crystals and
engineers often view crystal circuitry as a black art, best
left to a few skilled practitioners (see box, “About Quartz
Crystals”).
In fact, the highest performance crystal clock circuitry does
demand a variety of complex considerations and subtle
implementation techniques. Most applications, however,
don’t require this level of attention and are relatively easy
to serve. Figure 1 shows five (5) forms of simple crystal
clocks. Types 1a through 1d are commonly referred to
as gate oscillators. Although these types are popular,
they are often associated with temperamental operation,
spurious modes or outright failure to oscillate. The primary reason for this is the inability to reliably identify the
analog characteristics of the gates used as gain elements.
It is not uncommon in circuits of this type for gates from
different manufacturers to produce markedly different
circuit operation. In other cases, the circuit works, but is
influenced by the status of other gates in the same package. Other circuits seem to prefer certain gate locations
within the package. In consideration of these difficulties,
gate oscillators are generally not the best possible choice in
a production design; nevertheless, they offer low discrete
component count, are used in a variety of situations, and
bear mention. Figure 1a shows a CMOS Schmitt trigger
biased into its linear region. The capacitor adds phase shift
and the circuit oscillates at the crystal resonant frequency.
Figure 1b shows a similar version for higher frequencies.
The gate gives inverting gain, with the capacitors providing
additional phase shift to produce oscillation. In Figure 1c, a
TTL gate is used to allow the 10MHz operating frequency.
The low input resistance of TTL elements does not allow
the high value, single resistor biasing method. The R-C-R
network shown is a replacement for this function. Figure 1d
is a version using two gates. Such circuits are particularly
vulnerable to spurious operation but are attractive from a
component count standpoint. The two linearly biased gates
provide 360 degrees of phase shift with the feedback path
coming through the crystal. The capacitor simply blocks
DC in the gain path. Figure 1e shows a circuit based on
discrete components. Contrasted against the other circuits, it provides a good example of the design flexibility
and certainty available with components specified in the
linear domain. This circuit will oscillate over a wide range
of crystal frequencies, typically 2MHz to 20MHz.
The 2.2k and 33k resistors and the diodes compose a
pseudo current source which supplies base drive.
At 25°C the base current is:
1.2V –1V
To saturate the transistor, which would stop the oscillator, requires V
necessary to do this is:
IC(sat) =
with 18μA of base drive a beta of:
5mA
18µA
At 1mA the DC beta spread of 2N3904’s is 70 to ≅210.
The transistor should not saturate...even at supply voltages below 3V.
In similar fashion, the effects of temperature may also
be determined.
vs temperature over 25°C – 70°C is:
V
BE
–2.2mV/°C • 45° = –99mV.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
BE
33k
= 18µA
to go to near zero. The collector current
CE
5V
= 5mA
1k
= 278 is required
an12fa
AN12-1
Application Note 12
100kHz
2M
74C14
OUT
43pF
(1a) (1b) (1c)
1k 3k
74LS04 74LS04
ALL CRYSTALS PARALLEL
RESONANT AT-CUT TYPES
1200pF
5MHz
4049
68pF
1MHz
6.8M
OUT
68pF
68pF
OUT
0.1μF
5V
5V
2.2k
33k
20MHz
100pF
1k
2N3904
(1e)(1d)
Figure 1. Typical Gate Oscillators and the Preferred Discrete Unit
74LS04
10MHz
68pF
1k
OUT
22pF
0.25μF
1k
OUT
68pF
68pF
AN-12 F01
The compliance voltage of the current source will move:
2 • –2.2mV/°C • 45°C = –198mV.
Hence, a first order compensation occurs:
–198mV – 99mV = –99mV total shift.
This remaining –99mV over temperature causes a shift
in base current:
25°C current =
70°C current =
18µA – 15µA = 3µA
0.6V
33k
0.5V
33k
= 18µA
= 15µA
This 3μA shift (about 16%) provides a compensation for
transistor hFE shift with temperature, which moves about
20% from 25°C to 70°C. Thus the circuit’s behavior over
temperature is quite predictable. The resistor, diode and
tolerances mean that only first order compensations
V
BE
for V
and hFE over temperature are appropriate.
BE
to the crystal’s resonance, the crystal “steals” energy from
the RC, forcing it to run at the crystal’s frequency. The
crystal activity is readily apparent in Trace A of Figure 3,
®
which is the LT
1011’s “–” input. Trace B is the LT1011’s
output. In circuits of this type, it is important to ensure
that enough current is available to quickly start the crystal
resonating while simultaneously maintaining an RC time
constant of appropriate frequency. Typically, the free running frequency should be set 5% to 10% above crystal
resonance with a resistor feedback value calculated to
allow about 100μA into the capacitor-crystal network. This
type of circuit is not recommended for use above a few
hundred kHz because of comparator delays.
50k
85kHz
100pF
–
+
LT1011
10k
1k
10k
0UT
5V
5V
Figure 2 shows another approach. This circuit uses a
standard RC-comparator multivibrator circuit with the
crystal connected directly across the timing capacitor.
Because the free running frequency of the circuit is close
AN12-2
10k
AN-12 F02
Figure 2. Crystal Stabilized Relaxation Oscillator
an12fa
Application Note 12
Figures 4a and 4b use another comparator based approach.
In Figure 4a, the LT1016 comparator is set up with DC
negative feedback. The 2k resistors set the common mode
level at the device’s positive input. Without the crystal,
the circuit may be considered as a very wideband (50GHz
GBW) unity gain follower biased at 2.5V. With the crystal
inserted, positive feedback occurs and oscillation commences. Figure 4a is useful with AT-cut fundamental mode
crystals up to 10MHz. Figure 4b is similar, but supports
oscillation frequencies to 25MHz. Above 10MHz, AT-cut
5V
1MHz TO 10MHz
2k
A = 1V/DIV
B = 5V/DIV
10μs/DIV
2k
0.068μF
AN-12 F03
+
–
crystals operate in overtone mode. Because of this, oscillation can occur at multiples of the desired frequency. The
damper network rolls off gain at high frequency, insuring
proper operation.
All of the preceding circuits will typically provide temperature coefficients of 1ppm/°C with long term (1 year)
stability of 5ppm to 10ppm. Higher stability is achievable
with more attention to circuit design and control of temperature. Figure 5 shows a Pierce class circuit with fine
frequency trimming provided by the paralleled fixed and
5V
10MHz TO 25MHz
22Ω
820pF
200pF
2k
(AT CUT)
5V
+
V
+
LT1016
2k
–
V
–
LATCH
2k
GND
Q
OUTPUT
Q
AN-12 F04b
CRYSTAL
5V
LT1016
–
V
+
V
LATCH
2k
GND
Q
OUTPUT
Q
AN-12 F04a
Figure 3. Figure 2’s Waveforms
15V
10k
5.6k
* TRW MAR-6 RESISTOR
R
= YELLOW SPRINGS INST. #44014 75°C = 35.39k
T
= BLILEY #BG61AH-55, 75°C TURNING POINT. 5MHz FREQUENCY
0.1μF
330pF
Oscillator
33pF
10pF
5.6k
1000pF
Q1
2N3904
3.3k
OUTPUT
(50Ω)
100pF
0.1μF
Figure 4a. 1MHz to 10MHz
Crystal Oscillator
15V
AUX
OUT
5V
R SELECT
TYPICAL
34.8k
22M
0.01μF
LT1005
34.8k34.8k
600Ω
2N3904
R
V
CONTROL
Q3
–
LT1001
+
T
Oven Control
5V MAIN
OUT TO SUPPLY
10k
1N914
15V
–15V
THERMAL FEEDBACK
Figure 4b. 10MHz to 25MHz
Crystal Oscillator
“OSCILLATOR READY”
AND MAIN 5V POWER
Q2
2N3904
100k
3k
1N914
8.2k
2k
15V
8.2μF
+
2N6387
DARLINGTON
AN-12 F05
Figure 5. Ovenized Oscillator
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AN12-3
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