Nokia Solutions and Networks FZCWM2A1 User Manual

Page 1
AC210MWi-Fi AP Module Datasheet
P
N
N
)
I2C_9550_SDA (for test)
uF
uF
P
uF
N
uF
F
I, I/O
Introduction
The AC210M is a high-performance 2x2 802.11a/b/g/n/ac Wi-Fi AP module. It supports simultaneous operation of 2.4 GHz and 5 GHz frequency bands. The module provides two MMCX RF connectors for combined 2.4G and 5G radio and one 60-pin board-to-board connector for connection to the host system.
Interface Definition
RF
WiFi
Pin
Pin 1 - Gnd not present GND 2 - DP not present SYNCINB0_MB_RF_DN lvds_1.8v - - O 3 - DP not present SYNCINB0_MB_RF_DP lvds_1.8v - - O 4 - Gnd not present GND 5 - DP not present SERDOUT1_RF_MB_DN cml_1.8v mb, 0.1uF - I 6 - DP not present SERDOUT1_RF_MB_DP cml_1.8v mb, 0.1uF - I 7 - Gnd not present GND 8 - DP not present SERDIN0_MB_RF_DN cml_1.8v rf, 0.1uF - O 9 - DP not present SERDIN0_MB_RF_DP cml_1.8v rf, 0.1uF - O
10 - Gnd not present GND 11 - Extra not present GP_INTERRUPT cm 12 1 Gnd GND GND 13 2 DP Reserved SYNCOUTB0_RF_MB_D 14 3 DP Reserved SYNCOUTB0_RF_MB_D 15 4 Gnd GND GND 16 5 DP SGMII_1_WIFI_MB_DP SERDOUT2_RF_MB_DP 17 6 DP SGMII_1_WIFI_MB_DN SERDOUT2_RF_MB_DN 18 7 Gnd GND GND 19 8 DP SGMII_0_WIFI_MB_DP SERDOUT3_RF_MB_DP 20 9 DP SGMII_0_WIFI_MB_DN SERDOUT3_RF_MB_DN 21 10 Gnd GND GND 22 11 DP Reserved RX_MYK_ENABLE cmos_[VDD_IF] - rf, 4.7K, gnd O 23 12 DP Reserved RX_LNA_ENABLE_MAI 24 13 Gnd Reserved RX_LNA_ENABLE_DIV cmos_[VDD_IF] - rf, 4.7K, gnd O 25 14 Extra Reserved TX_MYK_ENABLE cmos_[VDD_IF] - rf, 4.7K, gnd O 26 15 Extra Reserved TX_KEY_MAIN cmos_[VDD_IF] - rf, 4.7K, gnd O 27 16 Extra Reserved TX_KEY_DIV cmos_[VDD_IF] - rf, 4.7K, gnd O 28 17 Gnd Reserved TR_SWITCH_MAIN cmos_[VDD_IF] - rf, 4.7K, gnd O 29 18 DP Reserved TR_SWITCH_DIV cmos_[VDD_IF] - rf, 4.7K, gnd O 30 19 DP I2C_9550_SCL (for test 31 20 Gnd 32 21 DP TRSTn GPIO4 (TRSTn) n/c on mb - - n/a 33 22 DP TDO GPIO5 (TDO) n/c on mb - - n/a 34 23 Gnd TDI GPIO6 (TDI) n/c on mb - - n/a 35 24 DP TMS GPIO7 (TMS) n/c on mb - - n/a 36 25 DP TCK GPIO8 (TCK) n/c on mb - - n/a 37 26 Gnd Reserved TEST n/c on mb - rf, 1K, gnd n/a 38 27 DP 5V_SENSE 5V_SENSE ana_5.1v - - I 39 28 DP VCC_5.1V VCC_5.1V 40 29 Gnd VCC_5.1V VCC_5.1V 41 30 Extra VCC_5.1V VCC_5.1V
58 36 DP 59 37 DP 60 38 Gnd GND GND 61 39 DP SGMII_0_MB_WIFI_D 62 40 DP SGMII_0_MB_WIFI_D 63 41 Gnd GND GND 64 42 DP I2C_SCL I2C_SCL cmos_3.3v ­65 43 DP I2C_SDA I2C_SDA cmos_3.3v ­66 44 Gnd GND GND 67 45 Extra Reserved SPI_SCLK cmos_[VDD_IF] - rf, 4.7k, gnd O 68 46 Extra UART_WIFI_M B SPI_MISO cmos_[VDD _IF] - mb, 4.7k, VDD_IF I 69 47 Extra UART_MB_WIF I SPI_MOSI cmos_[VDD _IF] - rf, 4.7k, VDD_IF O 70 48 Gnd Rese rved SPI_CS_n cmos_[VDD_IF] - rf, 4.7k, VDD _IF O 71 49 DP I2C_WP I2C_WP cmos_3.3v - rf, 4.7k, 3.3v O 72 50 DP RESET_n RESET_n cmos_[VDD_IF] - rf/wifi, 4.7K, VDD_I 73 51 Gnd GND GND 74 52 DP LED_WLAN_0 GPIO0 cmos_[VDD_IF] - mb, 10K, V DD_IF I, I/O 75 53 DP LED_WLAN_1 GPIO1 cmos_[VDD_IF] - mb, 10K, V DD_IF I, I/O 76 54 Gnd LED_ WLAN_2 GPIO2 cmos_[VDD_ IF] - mb, 10K, VDD_IF I, I/O 77 55 DP LED_WLAN_3 GPIO3 cmos_[VDD_IF] - mb, 10K, VDD_IF 78 56 DP VDD_IF VDD_IF (1.8v from MB, 2.5v from FPGA Dev Card) 79 57 Gnd VCC_ 5.1V VCC_5.1V 80 58 DP VCC_5.1V VCC_5.1V 81 59 DP VCC_5.1V VCC_5.1V 82 60 Gnd VCC_ 5.1V VCC_5.1V
Std
WiFi Card Usage RF Card Usage I / O V o l t a g e AC
Use
os_[VDD_IF] - mb, 4.7K, gnd I
lvds_1.8v - - I lvds_1.8v - - I
gmii_1.2v/cml_1.8vmb, 0.1uF - I gmii_1.2v/cml_1.8vmb, 0.1uF - I
gmii_1.2v/cml_1.8vmb, 0.1uF - I gmii_1.2v/cml_1.8vmb, 0.1uF - I
cmos_[VDD_IF] - rf, 4.7K, gnd O
Reserved n/c on mb - - n/a GND
SGMII_1_MB_WIFI_DPSERDIN2_MB_RF_DP SGMII_1_MB_WIFI_DNSERDIN2_MB_RF_DN
SERDIN3_MB_RF_DP SERDIN3_MB_RF_DN
gmii_1.2v/cml_1.8v/wifi, 0.1 gmii_1.2v/cml_1.8v/wifi, 0.1
gmii_1.2v/cml_1.8v/wifi, 0.1 gmii_1.2v/cml_1.8v/wifi, 0.1
Coupling
- - n/a
1K; rf/wifi 10K, 3.3vI/O 1K; rf/wifi 10K, 3.3vI/O
Pull-
up/down
- O
- O
- O
- O
MB
Dir
O
Signal Definition
Signal Type Description Parameters
SGMII_0_MB_WIFI_DN
SGMII_0_MB_WIFI_DP
SGMII_0_WIFI_MB_DN
SGMII_0_WIFI_MB_DP
SGMII_1_MB_WIFI_DN
SGMII_1_MB_WIFI_DP
SGMII_1_WIFI_MB_DN
SGMII_1_WIFI_MB_DP
WIFI_PRESENCE_n O Board Present
RESET_n I Reset External reset to the module. It is internally pulled down GND by 10k
IIC_SDA IO I2C Data
IIC_SCL I I2C Clock
LED_WLAN_0 OC 2.4G LED Open collector driven, sink maxim 20mA current when LED lit
LED_WLAN_1 OC 5G LED Open collector driven, sink maxim 20mA current when LED lit
LED_WLAN_2 OC LED_Reserved (Reserved) Open collector driven, sink maxim 20mA current when
LED_WLAN_3 OC LED_Reserved (Reserved) Open collector driven, sink maxim 20mA current when
VCC_5.1V POW
5V_SENSE POW
UART_WIFI_MB O UART signal from MB
UART_MB_WIFI I UART signal from The signal must be driven by 1.8V logic
I2C_WP I I2C write protect signal On module this signal is connected to EEPROM write protection,
VDD_IF I 1.8V voltage On module this is 1.8V voltage level reference
I2C_9550_SCL
(for test)
I2C_9550_SDA
(for test)
Reserved NC Reserved pins The reserved pins are NOT connected on the Wi-Fi module
GND GND GND GND
JTAG I/O JTAG debug pins Connected to CPU EJTAG port for device debug. This interface shall
I SGMII Differential
Input
The signal is AC coupled. Proper biasing is provided on the module
receiver.
Input Single Voltage High
Input Single Voltage Low
Input Differential Threshold
Internal Offset Voltage
Receiver Differential Input
Impedance
High Level Output Voltage
Low Level Output Voltage
Output Differential Voltage
Output Offset Voltage
O SGMII Differential
Output
Vih
Vil
Vidth
Vio
Rin
Voh
Vol
VoD
VoS
NC Reserved The signals are not connected on the module.
On module the signal is pulled to GND with a 0 ohm resistor.
Indication
ohm resistor. This reset signal is connected to module CPU through
GPIO..
The signal must be driven by 1.8V logic.
Input Voltage High
Vih
Input Voltage Low
Vil
High Level Output Voltage
Voh
Low Level Output Voltage
Vol
LED lit
LED lit
5V Power Input 5.1V+/-0.15V. 0~3A
ER
5V Power Sense The 5V sense is directly wired on the Wi-Fi module from VCC_5.1V
ER
The signal must be driven by 1.8V logic
to Module
O I2C clk signal from
9550
I/O I2C data signal
between 9550 and
slave units
driving high to enable EEPROM write protection.
The signal must be driven by 3.3V logic
On module this is connected to CPU GPIO16 for manufacturing test
only
On module this is connected to CPU GPIO 21 for manufacturing test
only
not be daisy chained on MB. This interface must be driven by 2.5V
logic
-/-/1480 (mV, min/typ/max)
520/-/- (mV, min/typ/max)
-50/-/50 (mV, min/typ/max)
800/900/1000 (mV,min/typ/max)
100ohm
-/1050/1195 (mV, min/typ/max)
200/750/-(mV, min/typ/max)
300mV
500/900/1070(mV, min/typ/max)
2/-/3.5 (V, min/typ/max)
-0.5/-/0.8 (V, min/typ/max)
2.2/-/3.3 (V, min/typ/max)
-0.2/-/0.6 (V, min/typ/max)
Page 2
Power Supply
Power consumption
Capacitive load
Power up ramping
Average power consumption of the module under typical operation mode shall be less than 10W. Peak power supply current is less than 3A at 5.1V. The module shall not present a capacitive load to the mainboard larger than 1500uF
The module is not designed for hot swapping. The power supply ramping speed is not controlled by the module itself.
Operation Environment
The module shall support a low operating temperature limit of -40C.
Operating temperature
Operating humidity
Storage temperature Elevations
Environment
Surge
The upper operating temperature limit will be determined by empirically measuring the case temperature of the critical components and ensuring that none of the individual component limits are violated while the module is operating within the Nokia host platform. Once data is available, this entry shall be updated with the upper operating temperature limit. The module is expected to withstand heatsink body temperature of 80C when proper heatsinking is in place.
5% to 95% non-condensing
-40°C to +85°C 86kPa106kPa Shall be RoHS 2011/65/EU compliant (RoHS 6 compliant, no Pb);
WEEE 2002/96/EC recyclable materials requirements Telcordia GR-63-CORE The module does not provide onboard surge protection.
Safety and EMC
Safety
EMC/EMI GB 9254 -2008(Class B of Product) , EN55022, CISPR 22:2006 , EN55024, CISPR 24:2010
Unwanted Emission
ESD
This WiFi module design shall not prevent the host product from obtaining NRTL Listing 60950 (US &CA), CB with IEC/EN 60950-1 (Basic safety certificate for worldwide marketing)
The noisy circuits such as crystal, CPU, DDR, etc. are well shielded to avoid generating unwanted emission impacting the LTE/3G band receiver.
HBM 1.5KV
Package information
1. PCBA Label 1
PCBA Label
2D data Matrix, no printed label.
2. PCBA Label 2
Label on PCBA board---Nokia SN
Label size : 30 x 7mm Material : heat resisting PET Colors: White material, printing in black Font Arial size is 3pt Barcode: code 128B
Label on PCBA board---Certification information Label size : 15 x 5mm Material : heat resisting PET Colors: White material, printing in black Font Arial size is 3pt
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