Nokia NSD-6, 3280, 3285 System Module
Programmes After Market Services
NSD-6 Series Transceivers
System Module
Issue 1 04/01 Nokia Mobile Phones Ltd.
NSD-6
System Module PAMS Technical Documentation
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PAMS Technical Documentation System Module
Contents
Page No
Transceiver NSD-6 ........................................................................................................ 5
Introduction ..................................................................................................................5
Modes of Operation................................................................................................... 5
Interconnection Diagram .............................................................................................6
System Module .............................................................................................................. 7
Circuit Description .......................................................................................................7
Connectors ...................................................................................................................7
System Connector ..................................................................................................... 7
RF Connector ............................................................................................................ 8
Baseband Module ........................................................................................................9
Block Diagram .......................................................................................................... 9
Baseband Elements ................................................................................................... 9
Baseband ASICS Description ................................................................................... 9
Memories................................................................................................................. 10
Clocks...................................................................................................................... 10
Baseband Power Distribution.................................................................................. 12
Digital control ......................................................................................................... 22
MAD4...................................................................................................................... 22
CAFE Submodule ................................................................................................... 31
Audio CODEC ........................................................................................................ 33
EMC Strategy.......................................................................................................... 34
RF Module .................................................................................................................35
Transmitter .............................................................................................................. 35
1900 MHz Transmitter ............................................................................................ 36
800 MHz Transmitter .............................................................................................. 38
1900 MHz Receiver ................................................................................................ 41
800 MHz Receiver .................................................................................................. 42
RF - Base Band Connections .................................................................................. 45
Parts list of UF4D (NSD-6GX) (EDMS Issue 3.1) Code: 0201713 ..........................50
Parts list of UF4D (NSD-6HX) (EDMS Issue 3.1) Code: 0201712 ..........................66
Schematic Diagrams: (A3 size, at the back of binder)
BB-RF Interface ................................................................................................... A-1
Circuit Diagram of BB ......................................................................................... A-2
Circuit Diagram of Power Supply........................................................................ A-3
Circuit Diagram of RF Block ............................................................................... A-4
Circuit Diagram of RX......................................................................................... A-5
Circuit Diagram of TX ......................................................................................... A-6
Circuit Diagram of Synthesizer............................................................................ A-7
Circuit Diagram of Cafe....................................................................................... A-8
Circuit Diagram of MAD4 ................................................................................... A-9
Circuit Diagram of MAD4 External Memories ................................................. A-10
Layout Diagram of UF4D (top/bottom)............................................................. A-11
Troubleshooting Test Points Diagram for UF4D (top/bottom).......................... A-12
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Transceiver NSD-6
Introduction
The NSD–3 is a tri–mode radio transceiver unit for the CDMA 800/1900MHz and AMPS
network. The transceiver is true 3 V transceiver. The transceiver consists of System/RF
module ( UF4D/UF4I ), User interface module ( CU3 ), and assembly parts.
The transceiver has full graphic display, and the user interface is based on two soft keys.
The transceiver has leakage tolerant earpiece.
The antenna is either fixed or extendable according to the phone type.
External antenna connection is provided by rear RF connector.
Modes of Operation
There are five different operation modes:
– power off mode
– idle mode
– active mode
– charge mode
– local mode
In the power off mode only the circuits needed for power up are supplied.
In the idle mode circuits are powered down and only sleep clock is running.
In the active mode all the circuits are supplied with power although some parts might be
in the idle state part of the time.
The charge mode is effective in parallel with all previous modes. The charge mode itself
consists of two different state: charge and maintenance mode.
The local mode is used for alignment and testing.
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Interconnection Diagram
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System Module
Circuit Description
The transceiver electronics consist of the Radio Module, RF + System blocks, the UI PCB,
the display module and audio components. The key pad and the display module are connected to the Radio Module with connectors. System blocks and RF blocks are interconnected with PCB wiring. The Transceiver is connected to accessories via a bottom system
connector with charging and accessory control.
The RF block is designed for a handportable phone which operates in the CDMA 800 system. The purpose of the RF block is to receive and de-modulate the radio frequency signal from the base station and to transmit a modulated RF signal to the base station.
Connectors
System Connector
B side view
Engine PCB
A side view
Fixing pads (2 pcs)
DC Jack
Charger pads (3 pcs)
1
Microphone
acoustic ports
8
7
14
Bottom
connector (6 pads)
Cavity for microphone
IBI connector
(6 pads)
Cable locking holes (3 pcs)
Note: Intelligent Battery Interface, IBI, is an accessory interface on the battery side of
the phone including the same signals as the bottom connector. The accessory ( e.g. an IBI
accessory) can be a battery pack with special features or an accessory module attached
between the phone and a normal battery pack.
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Pin Name Function Description
1 V_IN Bottom charger contacts Charging voltage
2 L_GND DC Jack Logic and charging ground
3 V_IN DC Jack Charging voltage
4 CHRG_CTRL DC Jack Charger control
5 CHRG_CTRL Bottom charger contacts Charger control
6 MICP Microphone Microphone signal; positive node
7 MICN Microphone Microphone signal; negative node
8 XMIC Bottom & IBI connectors Analog audio input
9 SGND Bottom & IBI connectors Audio signal ground
10 XEAR Bottom & IBI connectors Analog audio output
11 MBUS Bottom & IBI connectors Bidirectional serial bus
12 FBUS_RX Bottom & IBI connectors Serial data in
13 FBUS_TX Bottom & IBI connectors Serial data out
14 L_GND Bottom charger contacts Logic and charging ground
ÁÁÁ
RF Connector
The RF–connector is needed to utilize the external antenna with Car Cradle. The RF–connector is located on the back side of the transceiver on the top section. The connector is
plug type connector with special mechanical switching.
Accessory side of connector
Part will be floating in
car holder
Phone side of connector
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Baseband Module
Block Diagram
TX/RX SIGNALS
Cafe SUPPLY
RF SUPPLIES
PA SUPPL Y
SYSTEM CLOCK
19.2MHzCLK
UI
BASEBAND
Baseband Elements
Baseband refers to all technology elements in the phone design, which do not include RF
functions. The Baseband Module therefore includes audio, logic control, signal processing, power supply, and user interface functions. Baseband functionality of this product
consists of third generation Digital Core Technology (DCT3) design solutions.
Cafe
MEMORIES
AUDIOLINES
MAD
+
CCONT
BB SUPPLY
SYSCON
CHARGING
SWITCH
SLEEP CLOCK
32kHz
CLK
VBAT
BATTERY
Baseband ASICS Description
MAD4
The MAD4 ASIC contains four main components: DSP, MCU, RAM, and ROM. This ASIC
controls logic functions for the user interface, USART and PWMs, CAFÉ, Control Timing
and Interrupts (CTI), RX Modem, RF Interface, Accessory Interface, and CDMA functionality.
The DSP controls the RF power and implements the compressor and e-pander for AMPS,
the vocoders for CDMA and DTMF tone generation.
The MCU performs tasks such as UI control, timers, PUP control, RX Modem interface,
audio control, evaluation of sensor data from CCONT A\D, and battery charging control.
CAFÉ
The CAFÉ ASIC provides CODEC functionality (A/D and D/A conversions for voice data,
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microphone and speaker amplification, variable RX and TX Audio Gain), provides system
clock squaring, utilizes PLL for CDMA clock generation from system clock, and interfaces
to the RF section and to MAD4.
CCONT
The CCONT ASIC provides linear regulated power to most of the phone. It has a multiplexed A/D converter for temperature sensor digitization, battery voltage, charger voltage, current consumption, and battery type detection. An external 32 kHz oscillator
circuit is connected to CCONT, which is used for sleep clock generation. It also has a
watchdog circuit used to power off the phone in the event that MCU receives an interrupt from power key depression, or an event has caused a process to over run and MCU
does not service the register to prevent the watchdog timer from timing out.
PENTA
The PENTA IC chip operates as a low noise, low drop out regulator with 5 independent
2.8–volt outputs used to power on various sections of the RF module. The PENTA IC has 5
control inputs controlled by the MAD4 ASIC.
CHAPS
CHAPS operates as an integrated power switch for controlling charger current. Its features are limited start up current, limited maximum switch current, transient voltage
protection, voltage limit protection, and reverse voltage protection. It is designed to be
used with either a single lithium cell or three nickel cells battery types.
Memories
SRAM
External SRAM is used by MAD4. Size is 2 Mbit (256k x 8 bit).
FLASH MEMORY
Flash memory contains the main program code for the MCU and default EEPROM values.
Refer to the table below.
EEPROM
An EEPROM is used to store user data and tuning parameters. Refer to the table below.
FLASH Memory EEPROM Memory
NSD-6HX, 6GX 32 Mbit (2M x 16 bit) 1024kbit (128 x 8 bit)
Clocks
System Clock and CDMA Clock
A 19.2 MHz signal is passed to the CAFÉ ASIC from the RF section. The CAFÉ then generates the 19.2 MHz system clock and the 9.8304 MHz CDMA clock, which are derived
from the RF signal. Both of these clocks are passed to MAD4.
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8kHz Frame Sync Clock
An 8 kHz frame sync is generated in MAD4 and passed to the CAFÉ in order to synchronize the internal CAFÉ clocks with the equivalent MAD4 clocks. This signal is also used to
“frame” the CODEC voice data at 8kHz. The pulse width of the frame sync will be equal to
one period of the 320 kHz clock, which is internal to CAFÉ.
Sleep Clock
Sleep clock is provided by CCONT and produces a 32.768 kHz clock used by MAD4 when
it is in sleep mode. The crystal oscillator in the external CCONT circuitry to CCONT is not
automatically started when the battery is connected, but after power up the oscillator is
always running, even during power off periods. The only exception is when the battery is
removed.
UIF and CCONT Serial Clock (UIF_CCONT_SCLK)
This 960 KHz clock is used to synchronize serial data transmission on the UIF and CCONT
serial data bus UIF_CCONT_SDIO.
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Baseband Power Distribution
Description
Power management and distribution in the phone is handled by the CCONT asic. CCONT
is a multi function power management IC which has seven 2.8V linear regulators for the
RF–section of the phone. One 2.8V regulator is used to power up the baseband of the
phone, and its output is called Vbb. Additionally, one adjustable regulator is used to power up certain parts of the baseband. There are also a 5V charge pump, 5V regulator and a
3/5V regulator.
The main functions are voltage regulation, power up/down procedures, reset logic,
charging control (PWM) , watchdog, sleep control, ADC and real time clock.
CCONT Regulators
Battery voltage VBAT is connected to CCONT which regulates all the supply voltages VBB,
VR1–VR7, V2V, VR1_SW, VSIM and V5V. CCONT’s default startup mode is to turn on VR1,
VBB, V2V, VR6 and Vref in power–up. Vrefs default value is 1.5V, but in in this phone we
use 1.25V for Vref, so one of the first things MAD4 does on power up is to do a write to
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CCONT to change Vref to 1.25V.
VBB is used as baseband power supply for all digital parts, and it is on whenever the
phone is powered up. V2V is reserved for a later version of the MAD4 ASIC which will
have a lower core voltage. When the low voltage core version of MAD4 is available, V2V
will be connected to those pins on MAD4 which power the core. VSIM is used as programming voltage for the Flash memory after the phone is cut out of the panel. This is
necessary if re–flashing is needed after initial flash programming in production. V5V is
used for RF parts only. VR6 supplies the power for CAFE.
VR1 is used for the VCTCXO supply. VR1_SW is derived from VR1 inside CCONT, and is
actually the same voltage, but can be separately switched on and off. This VR1_SW is
used as an optional external microphone bias voltage. CLK_EN signal to CCONT controls
both the VR1 and VR6 regulators; they can be switched off in sleep modes, during
standby.
CCONT regulators are controlled through a seial data bus from MAD4. Regulators VR3, 4,
5 and 7 are controllable through external pins; these pins forming a logical ’OR’ function
with the serial commands. If a regulator’s control pin is at logic ’1’, that regulator will
turn on. If the pins are not used for external control they are grounded.
Most of the regulator outputs depend on pin control. In the table the ’State in reset’ is
based on assumption that pin controls are ’0’.
Charging
Charging can be performed in any operating mode. The charging algorithm is dependent
on the battery technology used. A resistor internal to the battery pack indicates the battery type. The resistor value corresponds to a specific battery capacity. This capacity
value is related to the battery technology as different capacity values are achieved by
using different battery technologies.
The CCONTs A/D converter input measures the battery voltage, temperature, size and
current.
NOTE: Power management circuitry controls the charging current delivered from the
charger to the battery. Charging is controlled with a PWM input signal from CCONT. The
pulse width is controlled by MAD4 and is sent to CCONT through a serial bus. The battery
voltage rise is limited by turning CHAPS switch off when the battery voltage has reached
the desired limits.
Watchdog
MAD4 must reset the CCONT watchdog regularly. CCONT watchdog time can be set
through SIO between 0 and 63 seconds at 1 second steps. After power–up the default
value is 32 seconds. If the watchdog expires, CCONT will cut off all supply voltages. After
total cut–off the phone can be re–started through any normal power–up procedure.
CCONTs watchdog functionality may be temporarily disabled by holding CCONTs
PWRONX/WDDISX pin at logic low.
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Power Up
There are four ways to power on the phone.
1. Pressing the power button
2. Connecting a charger
3. An IBI interrupt on BTEMP
4. Internal RTC times out.
Each of four methods is described in general in the following sections. When the battery
is connected to phone, nothing will happen until the power–up procedure is initiated, for
instance by pressing the power–button or by connecting a charger. After that the 32kHz
crystal oscillator of CCONT is started (can take up to 1 sec), and the default regulators
are powered up.
If a power down is done and the battery remains connected, the 32 kHz crystal oscillator
keeps running in the CCONT.
VCTCXO
CAFE
FLASH
RF
VR1–VR7
VCHAR
CHAPS
VBAT
PWM
BATTERY
CCONT
VR1_SW
MAD
VR1
VR6
VBB
SIO
VSIM
V5V
Vref
Power distribution diagram
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Pressing power key
PWRONX
VR1, VBB, VR6
CLK_EN
VCTCXO
CAFE CLK
PURX
SLCLK
t1
t2
t3
t1 < 1 ms
t2 1 - 6 ms, VCXO settled
t3 62 ms, PURX delay generated by CCONT
After PWR–key has been pushed, CCONT gives PURX reset to MAD4 and turns on VR1,
VBB and VR6 regulators (if battery voltage has exceeded 3.0 V). VR1 supplies VCTCXO,
VBB supplies MAD, and VR6 supplies digital parts of CAFE. After the initial delay, t2,
VCTCXO starts to give a proper 19.2MHz clock to CAFE, which further divides it to
9.83MHz for MAD4. CAFE will output the 9.83MHz clock only after the PURX reset has
been removed. After delay, t3, CCONT releases PURX and MAD4 can take control of the
operation of the phone.
After MAD4s reset is released MCU–SW detects that the PWR–key is still pushed and
shows the user that the phone is powering up by turning on the LCD and the lights.
MCU–SW then powers up the RF receiver part.
V5V–regulator (for RF) default value is off in power–up, and can be con-trolled on via
serial bus when needed.
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Power up when charger connected
Normal battery voltage
VCHAR
VR1, VBB, VR6
CLK_EN
VCTCXO
9.83 MHz CLK
PURX
SLCLK
CCONTINT
t1
t2
t3
Power up, charger connected, VBAT > 3.0 V
Power up, charger connected, VBAT > 3.0 V
The power up procedure is similar to the process described in the previous chapter with
the exception that the rising edge of VCHAR triggers the power up in CCONT.
CCONT sets output CCONT_INT, MAD4 detects the interrupt and reads CCONT status register to find the reason for the interrupt (charger in this case). After reading the A/D register to determine that the charger voltage is correct MAD should initiate charging
activities. The phone will remain in the so called ”acting dead” state which means that
only the battery bars are displayed on the LCD. The user perceives that the phone is off. If
the power on button is pushed the LCD display will come on and startup will be the same
as normal power on.
CCONT_INT is generated both when the charger is connected, and when the charger is
disconnected.
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Empty battery
VBAT > 3.0 V
VCHAR
VR1, VBB, VR6
CLK_EN
VCTCXO
9.83MHz
PURX
SLCLK
CCONT_INT
Power up, charger connected, VBAT < 3.0 V
Before battery voltage voltage rises over 3.0 V CHAPS gives an initial charge (with limited current) to the battery. After battery voltage reaches 3.0V the power up procedure is
as described in the previous section.
If a power down is done and the battery remains connected, the 32 kHz crystal oscillator
keeps running in the CCONT. When a power–up is initiated again, the complete power–
up sequence is described in the figure below. This time the power–up sequence is faster
because the oscillator is already running.
Charging – CHAPS
CHAPS comprises the hardware for charging the battery and protecting the phone from
over–voltage in charger connector.
The main functions are:
t1
t2
t3
–transient, over–voltage and reverse charger voltage protection
–limited start–up charge current for a totally empty battery
–voltage limit when battery removed
–with SW protection protection against too high charging current
CHAPS is basically a PWM (Pulse Width Modulation) controlled switch which connects
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the charger to VBAT. MAD4 controlls CHAPS by writing PWM values to CCONTs PWM
register over a serial bus. CCONT thenoutputs a PWM which is used by CHAPS to control
the switch. In the case of an external fast charger, the PWM is available at the system
connector to control the charger. In the case of a dead battery, shorted battery, or if the
battery is below 3.0V, CHAPS supplies a controlled leakage current of about 180mA
through the switch to attempt to bring the battery voltage up.
Pin
Number
1, 16 VCH Charger voltage input
5 RSENSE High current output, connected to current sense resistor of phone
12 VBAT Battery voltage (connected to voltage sense part of CHAPS)
10 VBACK Backup battery charging voltage output
9 LIM Output voltage limit select input
7 PWM Charging switch control input
8 CTIM External capacitor for soft switching
2,3,4,6,11
13,14,15
Name Description
GND Ground
CHAPS
Vin
BATTERY
MAD
System
Connector
To
charger
PWMOUT
Charging Control
CCONT
serial control
V_charge
2–wire charging
With 2–wire charging the charger provides constant output current, and the charging is
controlled by PWMOUT signal from CCONT to CHAPS. PWMOUT signal frequency is
selected to be 1 Hz, and the charging switch in CHAPS is pulsed on and off at this frequency. The final charging current to the battery is controlled by adjusting the PWMOUT
signal pulse width.
Both the PWMOUT frequency selection and pulse width control are made by the MCU
which writes these values to CCONT.
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The 2–wire charger is part number ACP–7, has full–wave rectified output, defined output
voltage and impedance. Typical output current into empty battery is about 350 mA at
nominal mains voltage.
3–wire charging
With 3–wire charging the charger provides adjustable output current, and the charging
is controlled by PWMOUT signal from CCONT to Charger, with the bottom connector signal. PWMOUT signal frequency is selected to be 32 Hz, and the charger output voltage is
controlled by adjusting the PWMOUT signal pulse width. The charger switch in CHAPS is
constantly on in this case.
The 3–wire charger is part number ACP–9, a switch mode power supply (SMPS) adapter
using 3–wire charging structure (controlled constant voltage). Typical output into an
empty battery is about 850mA at nominal mains voltage.
Battery disconnected when charger is connected
From hardware point of view the phone could otherwise continue functioning normally,
but if the charger voltage is higher than the maximum allowed battery voltage, this can
damage the RF parts. Therefore, output overvoltage protection is needed in case the battery is removed when a charger is connected, or if a charger is connected before the battery to the phone. With a charger connected, if VBAT exceeds preset limits in CHAPS, the
switch turns OFF immediately (soft switching bypassed). There are two voltage limits,
VLIM1 and VLIM2. VLIM input = ’0’ selects VLIM1, VLIM input = ’1’ selects VLIM2.
Parameter Symbol Min Typ Max Unit
Output voltage cutoff limit (during
transmission or Li-battery)
Output voltage cutoff limit (no
transmission or Ni-battery)
VLIM1 4.4 4.6 4.8 V
VLIM2 4.8 5.0 5.2 V
When the switch turns off due to an overvoltage condition, it stays off until the input
voltage falls below the specified limit (VCH<VBAT). Phone software will stop the charging as fast as it detects that there is no battery present.
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VBAT
VLIM
4V
t
PWM
”1”
”0”
t
WITCH
1. Battery removed, (standard) charger connected, VBAT rises (follows charger voltage).
2. VBAT exceeds limit VLIM(X), switch is turned immediately OFF.
3. VBAT falls (no battery), also VCH<VBAT (standard chargers full-rectified output). When
VCH>VBAT and VBAT<VLIM(X) -> switch turned on again (also PWM is still HIGH) and
VBAT exceeds VLIM(X).
4. Software sets PWM = LOW -> CHAPS does not enter PWM mode.
Output overvoltage protection when battery removed (in principle).
Power Down
Pressing power key
ON
OFF
21 3 4
t
When the user wishes to turn the phone off and presses the power key, MAD (MCU SW)
detects that PWR–key is pressed for a long enough time. After that the lights and LCD
are turned off. MCU stops all the activities it was doing (e.g. ends a call), sends power off
command to CCONT by writing a ’zero’ amount of time to the watchdog register, and
goes to idle–task. After the delay CCONT cuts all the supply voltages from the phone.
Only the 32 kHz sleep clock remains running.
Note that the phone doesn’t go to power off (from HW point of view) when the charger
is connected and PWR–key is pushed. The user perceives that the phone is off, but in fact
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the phone is just acting as if it is off (this state is usually called ”acting dead”).
Battery charge low
As a battery discharges, energy management software keeps a constant watch on the
voltage and displays an appropriate amount of battery bars.
When the battery discharges to a critical level the software notifies the user by beeping.
If left on, the software will power off the phone at a VBAT of TBD V.
If the SW fails to power down the phone, hardware will take over and CCONT will do a
reset and power down the phone when the battery voltage drops below 2.8 V.
Watchdog expires
If the SW fails to update the watchdog, the watchdog will eventually expire and CCONT
cuts all the supply voltages to the phone. On startup, the initial value set in CCONT’s
watchdog timer register is 32.5 seconds. The watchdog is programmable from 0 to 63
seconds.
Disconnected battery
When battery is disconnected, immediate and totally uncontrolled power–down happens. Therefore a power off procedure in this case cannot be described. One possible risk
is that if the MCU is writing something to the EEPROM exactly at the same moment, the
memory contents may be corrupted.
RF to Baseband Interface
The RF to Baseband interface consists of MAD4 and CAFÉ communicating with various
parts of the RF module. The MAD4 ASIC produces the Pulse Duration Modulators (PDMs)
which allow analog voltages to be used for RF control. It also controls the VCTCXO
enable, as well as band and mode selects. MAD also controls the RF supply voltages
through CCONT. The CAFÉ ASIC performs the A/D and D/A conversions for CDMA and
AMPS RX and TX paths. CAFÉ also receives the VCTCXO 19.2 MHz signal and provides
MAD4 with the 19.2 MHz system clock.
Audio control
Audio Controls and Processing
The audio control is handled by the MAD4 MCU. Speech coding functions are performed
in MAD4 DSP. In transmission mode, the speech code is sent to CAFÉ ASIC for D/
A conversion. In receiver mode, PCM coded blocks are read from the CAFE ASIC Both
audio and RF CODECs reside in CAFÉ.
Earpiece
The internal earpiece is connected to the UI board by means of mounting springs for
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automated assembly. The 32–ohm impedance, dynamic type earpiece is connected to the
differential output of the CAFÉ ASIC.
Microphone
The internal microphone is connected to the bottom connector by means of mounting
springs. The microphone bias is provided by the CAFÉ ASIC.
Audio Accessory Interface
External audio is interfaced to the phone through the system connector. XEAR, XMIC,
and SGND are the phone’s external audio signal pins used for communication during a
hands free accessory call.
Digital control
MAD4
The baseband functions are controlled by the MAD asic, which consists of a MCU, a system ASIC and a DSP. The CDMA specific asic is named as MAD4.
MCU
For general purpose processing applications.
DSP
The DSP is in charge of the channel and speech coding. The Main interfaces are to the
MCU, and via System Logic to CAFE and RF.
System Logic
Peripheral interface:
_ MCU Parallel I/O, UART, and PWM control (PUP)
Serial Accessory Interface (FBUS):
_ Autobauding support (AccIf)
_ Interface to external memories
_ Address lines and chip select decoding (BUSC)
_ RF Interface and Control (RFIfCtrl)
_ Clocking, timing and interrupts (CTI)
_ Sleep Control (SleepBlk)
_ CAFE Control (CAFECtrl)
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User Interface Control (UserIf)
Reset Generator (RstGen)
Clock Generator (ClkGen)
Test Interface (TestIf)
MAD Interfaces
UI and CCONT Serial interface
MAD4s serial interface is used to control the Serial LCD on the User Interface board, and
to provide access to CCONTs registers. The DataSelX and DataClk are generated by MAD4
during both transmit and receive cycles. Each device has its own chip select signal and
must hold its data pin in a high impedance state if its chip select is not active. Data must
be valid on the rising edge of DataClk during both transmit and receive.
CAFE Interface
The MAD4 ASIC supplies an interface to the CAFE ASIC. This interface consists of parallel
transmit and receive busses for CDMA and AMPS data, and a serial interface for Codec
control and data.
FBUS
FBUS (Fast Bus) is a fast serial interface between the DSP and data accessories or the
DSP and multipath analyzer. This interface is a full–duplex, asynchronous, two–line bus.
Tsds
Tsdh
mdMCUSDIO (Serial Clk)
accFBusRXD (Serial Data)
Data 0 Data 1
...
Data 7
USART Synchronous Mode Receive (Flashing Mode)
MBUS
MBUS is the MCUs serial interface which is used for FLASH downloading (not program
code), testing, and communication with external devices. Supported baud rates are 9.6,
19.2, 38.4 and 57.6 kbit/s.
JTAG Interface
The JTAG interface is used for MAD4 ASIC emulation. This interface provides for coemulation of the DSP and MCU.
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TRUST Interface
TRUST (Trace Utility for Software Testing) is a hardware module used to capture tracing
data from a phone during testing. It serves as a buffer memory, storing data from the
address and data buses of the phone MCU until read by a PC. A time label is attached to
each data word. The unit also includes a buffer for commands from the PC to the phone.
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PAMS Technical Documentation System Module
Signal Definitions
SIGNAL NAME DESCRIPTION From/To
Busses, Strobes, and Clocks
Includes parallel and serial busses as well as data clocks and chip selects
ADD(20:0) 21-bit Memory Address Bus MAD4 to FLASH and
SRAM
DATA(15:0) 16-bit Memory Data Bus MAD4 to FLASH and
SRAM
RXD(11:0) Receive Data CAFE to MAD4 0 to 2.8V Digital
TXD(7:0) Transmit Data MAD4 to CAFE 0 to 2.8V Digital
EEPROMSCLK SCLK to serial EEPROM MAD4 to EEPROM 0 to 2.8V Digital
EEPROMSDA Serial data line for serial EEP-
ROM
UIF_CCONT_SCLK Clock for UI and CCONT serial
interface
UIF_CCONT_SDIO User interface and CCONT
Serial Data
CCONTCSX CCONT Chip Select MAD4 to CCONT 0 to 2.8V Digital
MAD4 to EEPROM 0 to 2.8V Digital
MAD4 to CCONT and
UI connector
MAD4 to CCONT and
UI connector
Signal
Characteristics
0 to 2.8V Digital
0 to 2.8V Digital
(Pullup)
0 to 2.8V Digital
0 to 2.8V Digital
Notes
LCDCS LCD Chip Select MAD4 to UI connector 0 to 2.8V Digital
MEM(3) Memory Read Strobe MAD4 to FLASH and
SRAM
MEM(2) Memory Write Strobe MAD4 to FLASH and
SRAM
MEM(1) RAM Chip Select MAD4 to SRAM 0 to 2.8V Digital
MEM(0) FLASH chip enable MAD4 to FLASH 0 to 2.8V Digital
MBUS MCU serial bus for external
communication
FBUS_TX DSP accessory UART Data
Output
FBUS_RX DSP accessory UART Data
Input
ADATA AMPS Data Input to Rx
Modem (MAD4)
CAFESIO(2) CAFE I/F Frame Sync MAD4 to CAFE 0 to 2.8V Digital
CAFESIO(1) CAFE I/F Serial Data from
CAFE
MAD4 to system connector
MAD4 to system connector
System connector to
MAD4
CAFE to MAD4 0 to 2.8V Digital
CAFE to MAD4 0 to 2.8V Digital
0 to 2.8V Digital
0 to 2.8V Digital
0 to 2.8V Digital
0 to 2.8V Digital
0 to 2.8V Digital
CAFESIO(0) CAFE I/F Serial Data to CAFE MAD4 to CAFE 0 to 2.8V Digital
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System Module PAMS Technical Documentation
SIGNAL NAME DESCRIPTION From/To
Busses, Strobes, and Clocks
Includes parallel and serial busses as well as data clocks and chip selects
CLK9M20 19.2MHz System Clock CAFE to MAD4 0 to 2.8V Digital
CLK9M83 9.8304MHz CDMA Clock CAFE to MAD4 0 to 2.8V Digital
SLEEPCLK 32.768kHz Sleep Clock CCONT to MAD4 0 to 2.8V Digital Osc. run-
RF Interface Control Signals
CAFE_TX_GATE Transmitter Gating Signal MAD4 to RF 0 to 2.8V Digital
TIF_EN TIF chip enable MAD4 to RF 0 to 2.8V Digital
SYN_ACQ&SYN_
PWR_DN
SYN_LK1 MAD4 to RF 0 to 2.8V Digital
RIF_EN MAD4 to RF 0 to 2.8V Digital
MAD4 to RF 0 to 2.8V Digital
Signal
Characteristics
Notes
ning while
phone is
powered
down.
TX_LIM Indicates TX Power Greater
than TXI_REF
SYN_CLK R/F I/F Serial Clock MAD4 to RF 0 to 2.8V Digital
SYN_DAT R/F I/F Serial Data MAD4 to RF 0 to 2.8V Digital
SYN_LE1 R/F I/F Serial Latch Enable #1 MAD4 to RF 0 to 2.8V Digital
CEL_MODE R/F I/F Serial Latch Enable #2 MAD4 to RF 0 to 2.8V Digital
BAND_SEL RF Frequency Band Select
(PCS or Cellular)
MODE_SEL RF Mode Select (CDMA or
AMPS)
AFC AFC PDM MAD4 to RF 0 to 2.8V conti-
RX_IF_AGC Receive IF AGC PDM MAD4 to RF 0 to 2.8V conti-
TX_IF_AGC Transmit IF AGC PDM MAD4 to RF 0 to 2.8V conti-
TX_RF_AGC Transmit RF AGC PDM MAD4 to RF 0 to 2.8V conti-
RF to MAD4
MAD4 to RF 0 to 2.8V Digital
MAD4 to RF 0 to 2.8V Digital
nously variable
nously variable
nously variable
nously variable
TX_VCO_CAL PENTA Regulator control (PS) MAD4 to RF 0 to 2.8V Not used
as a PDM
TX_LIM_ADJ General Purpose PDM2 MAD4 to RF 0 to 2.8V continu-
ously variable
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