NIKO P45N02LV, P48N02LD Datasheet
1
JUL-11-2001
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P48N02LD
TO-252 (D PAK)
NIKO-SEM
ABSOLUTE MAXIMUM RATIN GS (T
C
= 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS
Gate-Source Voltage VGS ±20 V
TC = 25 °C 52
Continuous Drain Current
T
C
= 100 °C
I
D
35
Pulsed Drain Current1 I
DM
156
Avalanche Current IAR 33
A
Avalanche Energy L = 0.1mH EAS 250
Repetitive Avalanche Energy2 L = 0.05mH EAR 8.6
mJ
TC = 25 °C 45
Power Dissipation
T
C
= 100 °C
P
D
25
W
Operating Junction & Storage Temperature Range Tj, T
stg
-55 to 150
Lead Temperature (1/16” from case for 10 sec.) TL 275
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS
Junction-to-Case
R
θ
JC
2.5
Junction-to-Ambient
R
θ
JA
65
Case-to-Heatsink
R
θ
CS
0.7
°C / W
1
Pulse width limited by maximum junction temperature.
2
Duty cycle ≤ 1％
ELECTRICAL CHARACTERISTICS (T
C
= 25 °C, Unless Otherwise Noted)
LIMITS
PARAMETER SYMBOL TEST CONDITIONS
MIN TYP MAX
UNIT
STATIC
Drain-Source Breakdown Voltage V
(BR)DSS
V
GS
= 0V, ID = 250µA
25
Gate Threshold Voltage V
GS(th)
V
DS
= VGS, ID = 250µA
1 1.6 3
V
Gate-Body Leakage I
GSS
V
DS
= 0V, VGS = ±20V ±250 nA
VDS = 20V, VGS = 0V 25
Zero Gate Voltage Drain Current I
DSS
V
DS
= 20V, VGS = 0V, TC = 125 °C 250
µ
A
1. GATE
2. DRAIN
3. SOURCE
PRODUCT SUMMARY
V
(BR)DSS
R
DS(ON)
I
D
25
14m
Ω
52A
G
D
S
2
JUL-11-2001
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P48N02LD
TO-252 (D PAK)
NIKO-SEM
On-State Drain Current1 I
D(ON)
V
DS
= 10V, VGS = 10V 60 A
VGS = 4.5V, ID = 21A 16 20
Drain-Source On-State
Resistance
1
R
DS(ON)
V
GS
= 10V, ID = 26A 11 14
mΩ
Forward Transconductance1 g
fs
V
DS
= 10V, ID = 26A 32 S
DYNAMIC
Input Capacitance C
iss
1200 1800
Output Capacitance C
oss
600 1000
Reverse Transfer Capacitance C
rss
V
GS
= 0V, VDS = 15V, f = 1MHz
350 500
pF
Total Gate Charge2 Q
g
35 60
Gate-Source Charge2 Q
gs
8
Gate-Drain Charge2 Q
gd
VDS = 10V, VGS = 10V,
I
D
= 52A
5
nC
Turn-On Delay Time2 t
d(on)
6 16
Rise Time2 t
r
V
DS
= 15V, RL = 1Ω
120 250
Turn-Off Delay Time2 t
d(off)
I
D
≅ 52A, VGS = 10V, R
GEN
= 24Ω
40 90
Fall Time2 t
f
105 200
nS
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current IS 52
Pulsed Current3 I
SM
156
A
Forward Voltage1 V
SD
I
S
= 26A, VGS = 0V 0.9 1.3 V
Reverse Recovery Time trr 70 nS
Peak Reverse Recovery Current I
RM(REC)
I
F
= IS, dlF/dt = 100A / µS
200 A
Reverse Recovery Charge Qrr 0.043
µC
1
Pulse test : Pulse Width
≤
300 µsec, Duty Cycle
≤
2％.
2
Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.
REMARK: THE PRODUCT MARKED WITH “P48N02LD”, DATE CODE or LOT #
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