NEC UPD16676W, UPD16676P, UPD16676GF-3BA Datasheet

DATA SHEET
MOS INTEGRATED CIRCUIT
PD16676
µµµµ
1/16, 1/32 DUTY LCD CONTROLLER/DRIVER
DESCRIPTION
µPD16676 is a controller/driver containing RAMs capable of full-dot LCD displays. One of these IC chips can drive the full-dot LCD up to 61-by-16 dots. These ICs are the most suitable for Kanji character or Chinese character pagers, as well as graphic pagers, displaying 16-by-16 dots per character.
FEATURES
LCD driver with built-in display RAM
Dot display RAM: 2560 bits
Output: 61 segments & 16 commons
8-bit parallel interface
Oscillation circuit incorporated
ORDERING INFORMATION
Part Number Package
PD16676P Chips
µ
PD16676W Wafer
µ
PD16676GF-3BA 100-PIN PLASTIC QFP (14 x 20 mm)
µ
Remark
Purchasing the above products in terms of chips per wafer requires an exchange of other documents as well, including a memorandum of the product quality. Therefore, those who are interested in this regard are advised to contact an NEC salesperson for further details.
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. S10561EJ5V0DS00 (5th edition) Date Published June 1999 NS CP(K) Printed in Japan
The mark
••••
shows major revised points.
©
1996
1. BLOCK DIAGRAM
SEG
µµµµ
PD16676
0
SEG
60
COM
0
COM
15
RAM Read/Write
Controller
Column Address Decoder
8
Segment Driver
61
61-bit Latch
Display Data RAM
(2560 bits)
Column Address Counter & Register
8
Line Preset
Line Address Decoder
8
Common Driver
16
Common Counter
Timing Generator
Internal Oscillator
Register & Counter
8
OSC
OSC
1
2
Remark
DB0-DB
7
A0
E(/RD)
R,/W(/WR)
/RESET
M,/S FR
/xxx indicates active low signals.
8
Parallel Interface
8
Command Decoder
VDDV
V
LC1
V
LC2
V
LC3
V
LC4
V
LC5
SS
2
Data Sheet S10561EJ5V0DS00
2. PIN CONFIGURATION (Pad Layout)
5049 3231
µµµµ
PD16676
51 52
79 80
30 29
2 1
9981 82
100
Data Sheet S10561EJ5V0DS00
3
3. PIN CONNECTION
Pin No. Pin Symbol I/O Pin No. Pin Symbol I/O
1COM5Output 51 SEG 2COM6Output 52 SEG 3COM7Output 53 SEG 4COM8Output 54 SEG 5COM9Output 55 SEG 6COM10Output 56 SEG 7COM11Output 57 SEG 8COM12Output 58 SEG
9COM13Output 59 SEG 10 COM 11 COM 12 SEG 13 SEG 14 SEG 15 SEG 16 SEG 17 SEG 18 SEG 19 SEG 20 SEG 21 SEG 22 SEG 23 SEG 24 SEG 25 SEG 26 SEG 27 SEG 28 SEG 29 SEG 30 SEG 31 SEG 32 SEG 33 SEG 34 SEG 35 SEG 36 SEG 37 SEG 38 SEG 39 SEG 40 SEG 41 SEG 42 SEG 43 SEG 44 SEG 45 SEG 46 SEG 47 SEG 48 SEG 49 SEG 50 SEG
14
15
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
Output 60 SEG Output 61 SEG Output 62 SEG Output 63 SEG Output 64 SEG Output 65 SEG Output 66 SEG Output 67 SEG Output 68 SEG Output 69 SEG Output 70 SEG Output 71 SEG Output 72 SEG Output 73 A0 Input Output 74 OSC Output 75 OSC Output 76 E(/RD) Input Output 77 R,/W(/WR) Input Output 78 V Output 79 DB Output 80 DB Output 81 DB Output 82 DB Output 83 DB Output 84 DB Output 85 DB Output 86 DB Output 87 V Output 88 /RESET Input Output 89 FR Input/Output Output 90 V Output 91 V Output 92 V Output 93 M,/S Input Output 94 V Output 95 V Output 96 COM Output 97 COM Output 98 COM Output 99 COM Output 100 COM
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
2
SS
0
1
2
3
4
5
6
7
DD
LC5
LC3
LC2
LC4
LC1
0
1
2
3
4
µµµµ
PD16676
Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output
Input
Output
— Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output
Output Output Output Output Output
4
Data Sheet S10561EJ5V0DS00
4. PIN COORDINATES
µµµµ
PD16676
Chip Size : 4.04 x 5.53 mm Pad Size Al Area : 120 x 120 µm Pad Size Open Area : 108 x 108 µm
Pin No. X (µm) Y (µm) Pin No. X (µm) Y (µm) Pin No. X (µm) Y (µm)
1 1771 2 1771 3 1771 4 1771 5 1771 6 1771 7 1771 8 1771
9 1771 10 1771 11 1771 12 1771 13 1771 14 1771 15 1771 16 1771 80 51 17 1771 234 52 18 1771 388 53 19 1771 542 54 20 1771 696 55 21 1771 850 56 22 1771 1004 57 23 1771 1158 58 24 1771 1312 59 25 1771 1466 60 26 1771 1620 61 27 1771 1774 62 28 1771 1928 63 29 1771 2082 64 30 1771 2236 65 31 1418.8 2517.2 66 32 1268.8 2517.2 67 33 1118.8 2517.2 68 34 968.8 2517.2 69 35 818.8 2517.2 70
2230 36 668.8 2517.2 71
2076 37 518.8 2517.2 72
1922 38 368.8 2517.2 73
1768 39 218.8 2517.2 74
1614 40 68.8 2517.2 75
1460 41
1306 42
1152 43
998 44
844 45
690 46
536 47
382 48
228 49
74 50
2
2
2
1771
1771
1767.8
1767.8
1767.8
81.2 2517.2 76
231.2 2517.2 77
381.2 2517.2 78
531.2 2517.2 79
681.2 2517.2 80
831.2 2517.2 81
981.2 2517.2 82
1131.2 2517.2 83
1281.2 2517.2 84
1431.2 2517.2 85
1771 2242.8 86
1771 2092.8 87
1771 1942.8 88
1771 1792.8 89
1771 1642.8 90
1771 1492.8 91 69.8
1771 1342.8 92 219.8
1771 1192.8 93 369.8
1771 1042.8 94 569.8
1771 892.8 95 719.8
1771 742.8 96 952.4
1771 592.8 97 1102.4
1771 442.8 98 1252.4
1771 292.8 99 1402.4
1771 142.8 100 1552.4
1771
1771
1771
1771
1771
157.2
307.2
457.2
607.2
7.2
1767.8
1767.8
1767.8
1767.8
1767.8
1745
1595
1395
1245
1045
895
682.6
532.2
382.2
106.6
757.2
907.2
1149.4
1299.4
1489.4
1639.4
1839.4
1989.4
2139.4
2289.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
2513.4
Data Sheet S10561EJ5V0DS00
5
5. PIN DESCRIPTIONS
5.1 Power System
Pin Symbol Pin Name Pin No. I/O Function Description
µµµµ
PD16676
DD
V
SS
V
LC1
V
to V
Power supply pin Ground 78
LC5
Reference power supply for drivers
87
90,91,92,
94,95
5.2 Logic system
Pin Symbol Pin Name Pin No. I/O
M,/S Master/Slave selection 93
FR LCD to AC signal 89
DB0 to DB7Data Bus 79 to 86
A0 Data/Instruction Switching 73
/RESET Reset and 68/80-series
switching
E(/RD) Enable and read enabl e 76
R,/W(/WR) Read/Write and Write
enable
1
OSC
OSC
2
Oscillation pin 74
Oscillation pin 75
88
77
— —
Input
Input/
Output
Input/
Output
Input
Input
Input
Input
Input
Output
Power supply Ground Reference power supply for LCD driving
Function Description
Switches between the master c hi p and the slave chip. Exchanges synchronizing signals (LCD-to-AC signals) in connecting c ascades. This pin is for output if the chip is the master, and for input if the chip is t he slave. Data inputs/outputs
This pin is used for switchi ng between the display data and the instruction. High level : Display data Low level : Instruction This pin performs reset at the edge of the low-level pulse. At that level, i t performs switching 68/80 series modes. High level : 68 series MPU int erface Low level : 80 series MPU interfac e 68 series mode : Enable s i gnal 80 series mode : Read enable si gnal 68 series mode : Read/Write signal 80 series mode : Write enable signal Oscillation (connected with a register bet ween
2
)
OSC Oscillation (connected with a register bet ween
1
)
OSC
5.3 Driver System
Pin Symbol Pin Name Pin No. I/O Description
SEG0 to SEG COM0 to COM
6
Segment 72 to 12
60
Common 96 to 100,
15
1 to 11
Data Sheet S10561EJ5V0DS00
Output
Output
Segment output pins
Common output pins If the chip is a slave, these pins correspond to
16
to COM31.
COM
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