NEC PD17P236 DATA SHEET
DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD17P236
4-BIT SINGLE-CHIP MICROCONTROLLER
FOR SMALL GENERAL-PURPOSE INFRARED
REMOTE CONTROLLER
The µPD17P236 is a model of the µPD17236 with a one-time PROM instead of an internal mask ROM.
Since the user can write programs to the µPD17P236, it is ideal for experimental production or small-scale
µ
production of the
When reading this document, also read the documents related to the µPD17230, 17231, 17232, 17233, 17234,
17235, and 17236.
Detailed functions are described in the following user's manual. Read this manual when designing your system.
PD17230, 17231, 17232, 17233, 17234, 17235, or 17236 systems.
µ
PD172×× Series User's Manual: U12795E
FEATURES
• Pin compatible with µPD17230, 17231, 17232, 17233, 17234, 17235, and 17236 (except PROM programming
function)
• Carrier generator circuit for infrared remote controller (REM output)
• 17K architecture: General-purpose register method
• Program memory (one-time PROM): 32 Kbytes (16,384 × 16)
• Data memory (RAM): 223 × 4 bits
• Low-voltage detection circuit
• Input/output of P1A
Input/output of P1A0 pin Output Input Output Input
Clock (RfX) selection for carrier generation RfX = fX/2 RfX = fX
• Supply voltage: VDD = 2.2 to 3.6 V (fX = 4 MHz: high-speed mode, 4 µs)
APPLICATIONS
Preset remote controllers, toys, and portable systems
0 pin, clock selection for carrier generation
µ
PD17P236M1µPD17P236M2µPD17P236M3µPD17P236M4
VDD = 3.0 to 3.6 V (fX = 8 MHz: high-speed mode, 2 µs)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U14776EJ1V0DS00 (1st edition)
Date Published June 2000 J CP(K)
Printed in Japan
©
2000
ORDERING INFORMATION
Part Number Package
µ
PD17P236M1GT 28-pin plastic SOP (9.53 mm (375))
µ
PD17P236M1MC-5A4 30-pin plastic SSOP (7.62 mm (300))
µ
PD17P236M2GT 28-pin plastic SOP (9.53 mm (375))
µ
PD17P236M2MC-5A4 30-pin plastic SSOP (7.62 mm (300))
µ
PD17P236M3GT 28-pin plastic SOP (9.53 mm (375))
µ
PD17P236M3MC-5A4 30-pin plastic SSOP (7.62 mm (300))
µ
PD17P236M4GT 28-pin plastic SOP (9.53 mm (375))
µ
PD17P236M4MC-5A4 30-pin plastic SSOP (7.62 mm (300))
PIN CONFIGURATION (TOP VIEW)
(1) Normal operation mode
• 28-pin plastic SOP (9.53 mm (375))
µ
PD17P236M1GT, 17P236M2GT, 17P236M3GT, 17P236M4GT
µ
PD17P236
P0D
P0D
INT
P0E
P0E
P0E
P0E
REM
V
X
OUT
X
GND
RESET
P1A
2
3
1
2
3
0
1
2
3
4
5
6
7
8
DD
9
10
IN
11
12
13
0
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
P0D
P0D
P0C
P0C
P0C
P0C
P0B
P0B
P0B
P0B
P0A
P0A
P0A
P0A
1
0
3
2
1
0
3
2
1
0
3
2
1
0
2
Data Sheet U14776EJ1V0DS00
• 30-pin plastic SSOP (7.62 mm (300))
µ
PD17P236M1MC-5A4, 17P236M2MC-5A4, 17P236M3MC-5A4, 17P236M4MC-5A4
µ
PD17P236
P0D
P0D
INT
P0E
P0E
P0E
P0E
REM
V
X
OUT
X
GND
RESET
P1A
IC1
2
3
1
2
3
0
1
2
3
4
5
6
7
8
DD
9
10
IN
11
12
13
0
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
IC2
P0D
P0D
P0C
P0C
P0C
P0C
P0B
P0B
P0B
P0B
P0A
P0A
P0A
P0A
1
0
3
2
1
0
3
2
1
0
3
2
1
0
GND : Ground
IC1, IC2 : Internally connected
Note 1
INT : External interrupt request signal input
P0A0-P0A3 : Input port (CMOS input)
0-P0B3 : Input/output port (CMOS input/N-ch open-drain output)
P0B
P0C0-P0C3 : Input/output port (CMOS input/N-ch open-drain output)
P0D0-P0D3 : Input/output port (CMOS input/N-ch open-drain output)
0-P0E3 : Input/output port (CMOS push-pull output)
P0E
P1A0 : Input port (CMOS input) or output port (N-ch open-drain output)
REM : Remote controller output (CMOS push-pull output)
RESET : Reset input
DD : Power supply
V
XIN, XOUT : Resonator connection
Notes 1. This pin cannot be used. Leave open.
2. Input port or output port is selected depending on the product (see 2. PIN
FUNCTIONS).
Note 2
Data Sheet U14776EJ1V0DS00
3
(2) PROM programming mode
• 28-pin plastic SOP (9.53 mm (375))
µ
PD17P236M1GT, 17P236M2GT, 17P236M3GT, 17P236M4GT
D
2
D
3
V
PP
(L)
µ
PD17P236
D
D
D
D
D
D
MD
1
0
7
6
5
4
3
1
2
3
4
5
6
7
28
27
26
25
24
23
22
(Open)
V
(Open)
CLK
GND
(L)
(Open)
MD
MD
MD
2
1
0
8
DD
9
10
11
12
21
20
19
18
17
(L)
13
14
16
15
4
Data Sheet U14776EJ1V0DS00
• 30-pin plastic SSOP (7.62 mm (300))
µ
PD17P236M1MC-5A4, 17P236M2MC-5A4, 17P236M3MC-5A4, 17P236M4MC-5A4
µ
PD17P236
D
D3
VPP
(L)
(Open)
V
(Open)
CLK
GND
(L)
(Open)
(Open)
2
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
(Open)
D
1
D0
D7
D6
D5
D4
MD3
MD2
MD1
MD0
(L)
Caution Contents in parentheses indicate how to handle unused pins in PROM programming mode.
L : Connect to GND via a resistor (470
Ω) separately.
Open : Leave unconnected.
CLK : Clock input for PROM
0-D7 : Data input/output for PROM
D
GND : Ground
0-MD3 : Mode select input for PROM
MD
VDD : Power supply
VPP : Power supply for PROM writing
Data Sheet U14776EJ1V0DS00
5
BLOCK DIAGRAM
µ
PD17P236
P0A
P0A
P0A
P0A
P0B0 (MD0)
1
(MD1)
P0B
2
(MD2)
P0B
3
(MD3)
P0B
P0C0 (D4)
1
(D5)
P0C
2
(D6)
P0C
3
(D7)
P0C
P0D0 (D0)
1
(D1)
P0D
2
(D2)
P0D
3
(D3)
P0D
0
1
2
3
P0A
RF
Remote
Control
Divider
REM
RAM
223 × 4 bits
8-bit
timer
P0B
SYSTEM REG.
Interrupt
Controller
INT (V
PP
)
ALU
Reset
Controller
RESET
P0C
Instruction
One Time PROM
Decoder
16,384 × 16 bits
P0D
Program Counter
Power
P0E
P1A
P0E
P0E
P0E
Note
0
0
1
2
3
P0E
Stack (5 levels)
Basic Interval/
Watchdog Timer
Supply
Circuit
CPU Clock
P1A
Note Input port or output port is selected depending on the product (see 2. PIN FUNCTIONS).
Remark ( ): During PROM programming mode
OSC
DD
V
GND
IN
X
OUT
X
(CLK)
6
Data Sheet U14776EJ1V0DS00
µ
PD17P236
CONTENTS
1. DIFFERENCES BETWEEN µPD17236 AND µPD17P236 ........................................................... 8
2. PIN FUNCTIONS ........................................................................................................................... 9
2.1 Normal Operation Mode .................................................................................................................... 9
2.2 PROM Programming Mode ............................................................................................................... 10
2.3 Input/Output Circuits ......................................................................................................................... 11
2.4 Processing of Unused Pins .............................................................................................................. 12
2.5 Notes on Using the RESET and INT Pins ........................................................................................12
3. WRITING AND VERIFYING ONE-TIME PROM (PROGRAM MEMORY) .................................... 13
3.1 Operating Mode When Writing/Verifying Program Memory .......................................................... 13
3.2 Program Memory Writing Procedure ............................................................................................... 14
3.3 Program Memory Reading Procedure .............................................................................................15
4. ELECTRICAL SPECIFICATIONS ................................................................................................. 16
5. PACKAGE DRAWING .................................................................................................................. 23
6. RECOMMENDED SOLDERING CONDITIONS ............................................................................ 25
APPENDIX. DEVELOPMENT TOOLS................................................................................................ 27
Data Sheet U14776EJ1V0DS00
7
µ
PD17P236
1. DIFFERENCES BETWEEN µPD17236 AND µPD17P236
µ
PD17P236 is equipped with PROM to which data can be written by the user instead of the internal mask ROM
(program memory) of the µPD17236.
µ
Table 1-1 shows the differences between the
The CPU functions and internal hardware of the µPD17P236, 17230, 17231, 17232, 17233, 17234, 17235, and
17236 are identical. Therefore, the µPD17P236 can be used to evaluate the program developed for the µPD17230,
17231, 17232, 17233, 17234, 17235, and 17236 system. Note, however, that some of the electrical specifications
such as supply current and low-voltage detection voltage of the
µ
PD17230, 17231, 17232, 17233, 17234, 17235, and 17236.
Table 1-1. Differences among
PD17236 and µPD17P236.
µ
PD17P236 are different from those of the
µ
PD17236 and µPD17P236
Product Name
Item 17P236M3, 17P236M4
Program memory One-time PROM Mask ROM
32 Kbytes (16,384 × 16)
(0000H-3FFFH)
Data memory 223 × 4 bits
Input/output of P1A0 pin • Input (µPD17P236M2, 17P236M4) Any (mask option)
• Output (µPD17P236M1, 17P236M3)
Clock (RfX) selection for carrier • RfX = fX/2 (µPD17P236M1, 17P236M2) Any (mask option)
generation • RfX = fX (µPD17P236M3, 17P236M4)
Low-voltage detection circuit
Instruction execution time • 2 µs (VDD = 3.0 to 3.6 V) • 2 µs (VDD = 2.2 to 3.6 V)
Supply voltage VDD = 2.2 to 3.6 V VDD = 2.0 to 3.6 V
Package • 28-pin plastic SOP (9.53 mm (375))
Note
Provided Any (mask option)
• 4 µs (VDD = 2.2 to 3.6 V) • 4 µs (VDD = 2.0 to 3.6 V)
• 30-pin plastic SSOP (7.62 mm (300))
µ
PD17P236
µ
PD17P236M1, 17P236M2,
µ
PD17236
Note Although the circuit configuration is identical, its electrical characteristics differ depending on the product.
8
Data Sheet U14776EJ1V0DS00
2. PIN FUNCTIONS
2.1 Normal Operation Mode (1/2)
µ
PD17P236
Pin No. Symbol Function
27 (28) P0D0 These pins constitute a 4-bit I/O port which can be set in the input N-ch Low-level
28 (29) P0D1 or output mode in 4-bit units (group I/O). open-drain output
1 (1) P0D2 In the input mode, these pins serve as CMOS input pins with a
2 (2) P0D3 pull-up resistor, and can be used as key return input lines of a key
matrix. The standby status must be released when at least one of
the input lines goes low. In the output mode, these pins are used
as N-ch open-drain output pins and can be used as the output
lines of a key matrix.
3 (3) INT External interrupt request signal. This signal releases the standby – Input
status if an external interrupt request signal is input to it when the
INT pin interrupt enable flag (IP) is set.
4 (4) P0E0 These pins constitute a 4-bit I/O port that can be set in the input or CMOS Input
5 (5) P0E1 output mode in 1-bit units. push-pull
6 (6) P0E2 In the output mode, this port functions as a high current CMOS
7 (7) P0E3 output port. In the input mode, function as CMOS input and can be
specified to connect pull-up resistor by program.
8 (8) REM Outputs transfer signal for infrared remote controller. CMOS Low-level
Active-high output. push-pull output
9 (9) VDD Power supply – –
10 (10) XOUT Connects ceramic resonator for system clock oscillation – (Oscillation
11 (11) XIN stops)
12 (12) GND Ground – –
13 (13) RESET Turns ON pull down resistor if POC or watchdog timer overflows – Input
and if the stack pointer overflows or underflows, and resets the
system. Usually, the pull-down resistor is ON.
14 (14) P1A0
15 (16) P0A0 These pins are CMOS input pins with a 4-bit pull-up resistor. – Input
16 (17) P0A1 They can be used as the key return input lines of a key matrix.
17 (18) P0A2 If any one of these pins goes low, the standby status is released.
18 (19) P0A3
19 (20) P0B0 These pins constitute a 4-bit I/O port that can be set in the input or N-ch Input
20 (21) P0B1 output mode in 1-bit units. open-drain
21 (22) P0B2 In the input mode, these pins are CMOS input pins with a pull-up
22 (23) P0B3 resistor, and can be used as the key return input lines of a key
µ
PD17P136M1, This pin is 1-bit output port (N-ch open-drain N-ch High-
µ
PD17P136M3 output) and can be used as the output lines of open-drain impedance
a key matrix. output
µ
PD17P136M2, This pin is 1-bit input port (CMOS input). – Input
µ
PD17P136M4 However, it cannot release the STOP mode.
matrix. The standby status is released when at least one of these
pins goes low.
In the output mode, they serve as N-ch open-drain output pins and
can be used as the output lines of a key matrix.
Output Format
At Reset
Remark The number in parenthesis in the Pin No. column indicates the pin numbers of the 30-pin plastic SSOP.
Data Sheet U14776EJ1V0DS00
9
2.1 Normal Operation Mode (2/2)
µ
PD17P236
Pin No. Symbol Function
23 (24) P0C0 These pins constitute a 4-bit I/O port that can be set in the input or N-ch Low-level
24 (25) P0C1 output mode in 4-bit units (group I/O). open-drain output
25 (26) P0C2 In the input mode, these pins are CMOS input pins with a pull-up
26 (27) P0C3 resistor, and can be used as the key return input lines of a key
matrix. The standby status is released when at least one of these
pins goes low.
In the output mode, they serve as N-ch open-drain output pins and
can be used as the output lines of a key matrix.
(15) IC1 These pins cannot be used. – –
(30) IC2 Leave open.
Output Format
At Reset
Remark The number in parenthesis in the Pin No. column indicates the pin numbers of the 30-pin plastic SSOP.
2.2 PROM Programming Mode
Pin No. Symbol Function
3VPP Power supply for PROM programming. – –
Apply +12.5 V to this pin as the program voltage when writing/
verifying program memory.
9VDD Power supply. Apply +6 V to this pin when writing/verifying – –
program memory.
11 CLK Inputs clock for PROM programming. – –
12 GND Ground. – –
19 (20) MD0 Input pins used to select operation mode when PROM is – Input
programmed.
22 (23) MD3
23 (24) D4 Input/output 8-bit data for PROM programming CMOS Input
push-pull
26 (27) D7
27 (28) D0
28 (29) D1
1D2
2D3
Output Format
At Reset
Remarks 1. The other pins are not used in the PROM programming mode. How to handle the other opins are
described in PIN CONFIGURATION (2) PROM programming mode.
2. The number in parenthesis in the Pin No. column indicates the pin numbers of the 30-pin plastic
SSOP.
10
Data Sheet U14776EJ1V0DS00
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