NEC PD17P236 DATA SHEET

DATA SHEET

MOS INTEGRATED CIRCUIT

μPD17P236

4-BIT SINGLE-CHIP MICROCONTROLLER FOR SMALL GENERAL-PURPOSE INFRARED REMOTE CONTROLLER

The μPD17P236 is a model of the μPD17236 with a one-time PROM instead of an internal mask ROM.

Since the user can write programs to the μPD17P236, it is ideal for experimental production or small-scale production of the μPD17230, 17231, 17232, 17233, 17234, 17235, or 17236 systems.

When reading this document, also read the documents related to the μPD17230, 17231, 17232, 17233, 17234, 17235, and 17236.

Detailed functions are described in the following user's manual. Read this manual when designing your system.

μPD172×× Series User's Manual: U12795E

FEATURES

•Pin compatible with μPD17230, 17231, 17232, 17233, 17234, 17235, and 17236 (except PROM programming function)

•Carrier generator circuit for infrared remote controller (REM output)

•17K architecture: General-purpose register method

•Program memory (one-time PROM): 32 Kbytes (16,384 × 16)

•Data memory (RAM): 223 × 4 bits

•Low-voltage detection circuit

•Input/output of P1A0 pin, clock selection for carrier generation

μPD17P236M1 μPD17P236M2 μPD17P236M3 μPD17P236M4

Input/output of P1A0 pin	Output	Input	Output	Input
Clock (RfX) selection for carrier generation	RfX = fX/2		RfX = fX

• Supply voltage: VDD = 2.2 to 3.6 V (fX = 4 MHz: high-speed mode, 4 μs) VDD = 3.0 to 3.6 V (fX = 8 MHz: high-speed mode, 2 μs)

APPLICATIONS

Preset remote controllers, toys, and portable systems

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.

Document No. U14776EJ1V0DS00 (1st edition) Date Published June 2000 J CP(K)

Printed in Japan

© 2000

μPD17P236

ORDERING INFORMATION

Part Number	Package
μPD17P236M1GT	28-pin plastic SOP (9.53 mm (375))
μPD17P236M1MC-5A4	30-pin plastic SSOP (7.62 mm (300))
μPD17P236M2GT	28-pin plastic SOP (9.53 mm (375))
μPD17P236M2MC-5A4	30-pin plastic SSOP (7.62 mm (300))
μPD17P236M3GT	28-pin plastic SOP (9.53 mm (375))
μPD17P236M3MC-5A4	30-pin plastic SSOP (7.62 mm (300))
μPD17P236M4GT	28-pin plastic SOP (9.53 mm (375))
μPD17P236M4MC-5A4	30-pin plastic SSOP (7.62 mm (300))

PIN CONFIGURATION (TOP VIEW)

(1)Normal operation mode

•28-pin plastic SOP (9.53 mm (375))

μPD17P236M1GT, 17P236M2GT, 17P236M3GT, 17P236M4GT

P0D 2	1	28	P0D 1
P0D 3	2	27	P0D 0
INT	3	26	P0C 3
P0E 0	4	25	P0C 2
P0E 1	5	24	P0C 1
P0E 2	6	23	P0C 0
P0E 3	7	22	P0B 3
REM	8	21	P0B 2
V DD	9	20	P0B 1
X OUT	10	19	P0B 0
X IN	11	18	P0A 3
GND	12	17	P0A 2
RESET	13	16	P0A 1
P1A0	14	15	P0A 0

2	Data Sheet U14776EJ1V0DS00

μPD17P236

•30-pin plastic SSOP (7.62 mm (300))

μPD17P236M1MC-5A4, 17P236M2MC-5A4, 17P236M3MC-5A4, 17P236M4MC-5A4

P0D2	1	30	IC2
P0D3	2	29	P0D1
INT	3	28	P0D0
P0E0	4	27	P0C3
P0E1	5	26	P0C2
P0E2	6	25	P0C1
P0E3	7	24	P0C0
REM	8	23	P0B3
VDD	9	22	P0B2
XOUT	10	21	P0B1
XIN	11	20	P0B0
GND	12	19	P0A3
RESET	13	18	P0A2
P1A0	14	17	P0A1
IC1	15	16	P0A0

GND		:	Ground
IC1, IC2		:	Internally connectedNote 1
INT		: External interrupt request signal input
P0A0-P0A3		: Input port (CMOS input)
P0B0-P0B3		: Input/output port (CMOS input/N-ch open-drain output)
P0C0-P0C3		: Input/output port (CMOS input/N-ch open-drain output)
P0D0-P0D3		: Input/output port (CMOS input/N-ch open-drain output)
P0E0-P0E3		: Input/output port (CMOS push-pull output)
P1A0		:	Input port (CMOS input) or output port (N-ch open-drain output)Note 2
REM		: Remote controller output (CMOS push-pull output)
RESET		:	Reset input
VDD		:	Power supply

XIN, XOUT : Resonator connection

Notes 1. This pin cannot be used. Leave open.

2.Input port or output port is selected depending on the product (see 2. PIN FUNCTIONS).

Data Sheet U14776EJ1V0DS00

3

μPD17P236

(2)PROM programming mode

•28-pin plastic SOP (9.53 mm (375))

μPD17P236M1GT, 17P236M2GT, 17P236M3GT, 17P236M4GT

D2	1	28	D1
D3	2	27	D0
VPP	3	26	D7
	4	25	D6
(L)	5	24	D5
			D4
	6	23
	7	22	MD3
(Open)	8	21	MD2
VDD	9	20	MD1
(Open)	10	19	MD0
CLK	11	18
GND	12	17	(L)
(L)	13	16
(Open)	14	15

4	Data Sheet U14776EJ1V0DS00

μPD17P236

•30-pin plastic SSOP (7.62 mm (300))

μPD17P236M1MC-5A4, 17P236M2MC-5A4, 17P236M3MC-5A4, 17P236M4MC-5A4

D2	1	30	(Open)
D3	2	29	D1
VPP	3	28	D0
	4	27	D7
	5	26	D6
(L)
	6	25	D5
	7	24	D4
(Open)	8	23	MD3
VDD	9	22	MD2
(Open)	10	21	MD1
CLK	11	20	MD0
GND	12	19
(L)	13	18
(Open)	14	17	(L)
(Open)	15	16

Caution Contents in parentheses indicate how to handle unused pins in PROM programming mode. L : Connect to GND via a resistor (470 Ω) separately.

Open : Leave unconnected.

CLK	: Clock input for PROM
D0-D7	: Data input/output for PROM
GND	:	Ground
MD0-MD3 : Mode select input for PROM
VDD	:	Power supply
VPP	:	Power supply for PROM writing

Data Sheet U14776EJ1V0DS00

5

μPD17P236

BLOCK DIAGRAM

P0A0			Remote
			Control	REM
P0A1	P0A
		RF	Divider
P0A2
P0A3
		RAM
		223 × 4 bits	8-bit
P0B0 (MD0)			timer
		SYSTEM REG.
P0B1 (MD1)	P0B
P0B2 (MD2)
			Interrupt
P0B3 (MD3)				INT (VPP)
			Controller
		ALU
P0C0 (D4)			Reset	RESET
			Controller
P0C1 (D5)	P0C
P0C2 (D6)
P0C3 (D7)

			One Time PROM	Instruction
				Decoder
P0D0	(D0)		16,384 × 16 bits
P0D1	(D1)	P0D
P0D2	(D2)
P0D3	(D3)

		Program Counter		VDD
			Power
P0E0			Supply	GND
P0E1	P0E		Circuit
P0E2
P0E3		Stack (5 levels)	CPU Clock
		Basic Interval/		XIN (CLK)
P1A0Note			OSC
		Watchdog Timer		XOUT
	P1A

Note Input port or output port is selected depending on the product (see 2. PIN FUNCTIONS).

Remark ( ): During PROM programming mode

6	Data Sheet U14776EJ1V0DS00

μPD17P236

CONTENTS

1.	DIFFERENCES BETWEEN μPD17236 AND μPD17P236 ...........................................................				8
2.	PIN FUNCTIONS ...........................................................................................................................				9
	2.1	Normal Operation Mode ....................................................................................................................			9
	2.2	PROM Programming Mode ...............................................................................................................			10
	2.3	Input/Output Circuits .........................................................................................................................			11
	2.4	Processing of Unused Pins ..............................................................................................................			12
	2.5	Notes on Using the	RESET	........................................................................................and INT Pins	12
3.	WRITING AND VERIFYING ONE-TIME PROM (PROGRAM MEMORY) ....................................				13
	3.1	Operating Mode When Writing/Verifying Program Memory ..........................................................			13
	3.2	Program Memory Writing Procedure ...............................................................................................			14
	3.3	Program Memory Reading Procedure .............................................................................................			15
4.	ELECTRICAL SPECIFICATIONS .................................................................................................				16
5.	PACKAGE DRAWING ..................................................................................................................				23
6.	RECOMMENDED SOLDERING CONDITIONS ............................................................................				25
APPENDIX. DEVELOPMENT TOOLS ................................................................................................					27

Data Sheet U14776EJ1V0DS00

7

μPD17P236

1.DIFFERENCES BETWEEN μPD17236 AND μPD17P236

μPD17P236 is equipped with PROM to which data can be written by the user instead of the internal mask ROM (program memory) of the μPD17236.

Table 1-1 shows the differences between the μPD17236 and μPD17P236.

The CPU functions and internal hardware of the μPD17P236, 17230, 17231, 17232, 17233, 17234, 17235, and 17236 are identical. Therefore, the μPD17P236 can be used to evaluate the program developed for the μPD17230, 17231, 17232, 17233, 17234, 17235, and 17236 system. Note, however, that some of the electrical specifications such as supply current and low-voltage detection voltage of the μPD17P236 are different from those of the

μPD17230, 17231, 17232, 17233, 17234, 17235, and 17236.

Table 1-1. Differences among μPD17236 and μPD17P236

Product Name	μPD17P236	μPD17236
	μPD17P236M1, 17P236M2,
Item	17P236M3, 17P236M4
Program memory	One-time PROM	Mask ROM

32 Kbytes (16,384 × 16)

(0000H-3FFFH)

Data memory	223 × 4 bits
Input/output of P1A0 pin	•	Input (μPD17P236M2, 17P236M4)	Any (mask option)
	•	Output (μPD17P236M1, 17P236M3)
Clock (RfX) selection for carrier	•	RfX = fX/2 (μPD17P236M1, 17P236M2)	Any (mask option)
generation	•	RfX = fX (μPD17P236M3, 17P236M4)
Low-voltage detection circuitNote	Provided		Any (mask option)
Instruction execution time	•	2 μs (VDD = 3.0 to 3.6 V)	•	2 μs (VDD = 2.2 to 3.6 V)
	•	4 μs (VDD = 2.2 to 3.6 V)	•	4 μs (VDD = 2.0 to 3.6 V)
Supply voltage	VDD = 2.2 to 3.6 V		VDD = 2.0 to 3.6 V
Package	•	28-pin plastic SOP (9.53 mm (375))
	•	30-pin plastic SSOP (7.62 mm (300))

Note Although the circuit configuration is identical, its electrical characteristics differ depending on the product.

8	Data Sheet U14776EJ1V0DS00

μPD17P236

2.PIN FUNCTIONS

2.1 Normal Operation Mode (1/2)

Pin No.			Symbol				Function	Output Format	At Reset
27	(28)		P0D0		These pins constitute a 4-bit I/O port which can be set in the input			N-ch	Low-level
28	(29)		P0D1		or output mode in 4-bit units (group I/O).			open-drain	output
1	(1)		P0D2		In the input mode, these pins serve as CMOS input pins with a
2	(2)		P0D3		pull-up resistor, and can be used as key return input lines of a key
					matrix. The standby status must be released when at least one of
					the input lines goes low. In the output mode, these pins are used
					as N-ch open-drain output pins and can be used as the output
					lines of a key matrix.
3	(3)		INT		External interrupt request signal. This signal releases the standby			–	Input
					status if an external interrupt request signal is input to it when the
					INT pin interrupt enable flag (IP) is set.
4	(4)		P0E0		These pins constitute a 4-bit I/O port that can be set in the input or			CMOS	Input
5	(5)		P0E1		output mode in 1-bit units.			push-pull
6	(6)		P0E2		In the output mode, this port functions as a high current CMOS
7	(7)		P0E3		output port. In the input mode, function as CMOS input and can be
					specified to connect pull-up resistor by program.
8	(8)		REM		Outputs transfer signal for infrared remote controller.			CMOS	Low-level
					Active-high output.			push-pull	output
9	(9)		VDD		Power supply			–	–
10	(10)		XOUT		Connects ceramic resonator for system clock oscillation			–	(Oscillation
11	(11)		XIN						stops)
12	(12)		GND		Ground			–	–
13	(13)		RESET		Turns ON pull down resistor if POC or watchdog timer overflows			–	Input
					and if the stack pointer overflows or underflows, and resets the
					system. Usually, the pull-down resistor is ON.
14	(14)		P1A0		μPD17P136M1,		This pin is 1-bit output port (N-ch open-drain	N-ch	High-
					μPD17P136M3		output) and can be used as the output lines of	open-drain	impedance
							a key matrix.		output
					μPD17P136M2,		This pin is 1-bit input port (CMOS input).	–	Input
					μPD17P136M4		However, it cannot release the STOP mode.
15	(16)		P0A0		These pins are CMOS input pins with a 4-bit pull-up resistor.			–	Input
16	(17)		P0A1		They can be used as the key return input lines of a key matrix.
17	(18)		P0A2		If any one of these pins goes low, the standby status is released.
18	(19)		P0A3
19	(20)		P0B0		These pins constitute a 4-bit I/O port that can be set in the input or			N-ch	Input
20	(21)		P0B1		output mode in 1-bit units.			open-drain
21	(22)		P0B2		In the input mode, these pins are CMOS input pins with a pull-up
22	(23)		P0B3		resistor, and can be used as the key return input lines of a key
					matrix. The standby status is released when at least one of these
					pins goes low.
					In the output mode, they serve as N-ch open-drain output pins and
					can be used as the output lines of a key matrix.

Remark The number in parenthesis in the Pin No. column indicates the pin numbers of the 30-pin plastic SSOP.

Data Sheet U14776EJ1V0DS00

9

						μPD17P236
	2.1 Normal Operation Mode (2/2)
		Pin No.	Symbol	Function	Output Format	At Reset
		23 (24)	P0C0	These pins constitute a 4-bit I/O port that can be set in the input or	N-ch	Low-level
		24 (25)	P0C1	output mode in 4-bit units (group I/O).	open-drain	output
		25 (26)	P0C2	In the input mode, these pins are CMOS input pins with a pull-up
		26 (27)	P0C3	resistor, and can be used as the key return input lines of a key
				matrix. The standby status is released when at least one of these
				pins goes low.
				In the output mode, they serve as N-ch open-drain output pins and
				can be used as the output lines of a key matrix.
		(15)	IC1	These pins cannot be used.	–	–
		(30)	IC2	Leave open.

Remark The number in parenthesis in the Pin No. column indicates the pin numbers of the 30-pin plastic SSOP.

2.2 PROM Programming Mode

Pin No.	Symbol	Function	Output Format	At Reset
3	VPP	Power supply for PROM programming.	–	–
		Apply +12.5 V to this pin as the program voltage when writing/
		verifying program memory.
9	VDD	Power supply. Apply +6 V to this pin when writing/verifying	–	–
		program memory.
11	CLK	Inputs clock for PROM programming.	–	–
12	GND	Ground.	–	–
19 (20)	MD0	Input pins used to select operation mode when PROM is	–	Input
ï	ï	programmed.
22 (23)	MD3
23 (24)	D4	Input/output 8-bit data for PROM programming	CMOS	Input
ï	ï		push-pull
26 (27)	D7
27 (28)	D0
28 (29)	D1
1	D2
2	D3

Remarks 1. The other pins are not used in the PROM programming mode. How to handle the other opins are

described in PIN CONFIGURATION (2) PROM programming mode.

2.The number in parenthesis in the Pin No. column indicates the pin numbers of the 30-pin plastic SSOP.

10	Data Sheet U14776EJ1V0DS00