The Copyright to this document belongs to NEC LCD Technologies, Ltd. (hereinafter called "NEC").
No part of this document will be used, reproduced or copied without prior written consent of NEC.
NEC does and will not assume any liability for infringement of patents, copyrights or other intellectual
property rights of any third party arising out of or in connection with application of the products
described herein except for that directly attributable to mechanisms and workmanship thereof. No license,
express or implied, is granted under any patent, copyright or other intellectual property right of NEC.
Some electronic parts/components would fail or malfunction at a certain rate. In spite of every effort to
enhance reliability of products by NEC, the possibility of failures and malfunction might not be avoided
entirely. To prevent the risks of damage to death, human bodily injury or other property arising out
thereof or in connection therewith, each customer is required to take sufficient measures in its safety
designs and plans including, but not limited to, redundant system, fire-containment and anti-failure.
The products are classified into three quality grades: "Standard", "Special", and "Specific" of the
highest grade of a quality assurance program at the choice of a customer. Each quality grade is designed
for applications described below. Any customer who intends to use a product for application other than
that of Standard quality grade is required to contact an NEC sales representative in advance.
The Standard quality grade applies to the products developed, designed and manufactured in
accordance with the NEC standard quality assurance program, which are designed for such application as
any failure or malfunction of the products (sets) or parts/components incorporated therein a customer
uses are, directly or indirectly, free of any damage to death, human bodily injury or other property, like
general electronic devices.
Examples: Computers, office automation equipment, communications equipment, test and measurement
equipment, audio and visual equipment, home electronic appliances, machine tools, personal
electronic equipment, industrial robots, etc.
The Special quality grade applies to the products developed, designed and manufactured in accordance
with an NEC quality assurance program stricter than the standard one, which are designed for such
application as any failure or malfunction of the products (sets) or parts/components incorporated therein
a customer uses might directly cause any damage to death, human bodily injury or other property, or
such application under more severe condition than that defined in the Standard quality grade without
such direct damage.
Examples: Control systems for transportation equipment (automobiles, trains, ships, etc.), traffic control
systems, anti-disaster systems, anti-crime systems, medical equipment not specifically
designed for life support, safety equipment, etc.
The Specific quality grade applies to the products developed, designed and manufactured in accordance
with the standards or quality assurance program designated by a customer who requires an extremely
higher level of reliability and quality for such products.
Examples: Military systems, aircraft control equipment, aerospace equipment, nuclear reactor control
systems, medical equipment/devices/systems for life support, etc.
The quality grade of this product is the "Standard" unless otherwise specified in this document.
Color LCD module NL3224BC35-22 is composed of the amorphous silicon thin film transistor liquid
crystal display (a-Si TFT LCD) panel structure with driver LSIs for driving the TFT (Thin Film
Transistor) array and a backlight.
The a-Si TFT LCD panel structure is injected liquid crystal material into a narrow gap between the
TFT array glass substrate and a color-filter glass substrate.
Color (Red, Green, Blue) data signals from a host system (e.g. signal generator, etc.) are modulated
into best form for active matrix system by a signal processing circuit, and sent to the driver LSIs
which drive the individual TFT arrays.
The TFT array as an electro-optical switch regulates the amount of transmitted light from the
backlight assembly, when it is controlled by data signals. Color images are created by regulating the
amount of transmitted light through the TFT array of red, green and blue dots.
1.2 APPLICATION
• For industrial use
1.3 FEATURES
• Adoption of ST-NLT (Super-Transmissive Natural Light TFT)
• High luminance
• Wid e co lo r ga mu t
• Wide viewing angle
• Low reflection
• 6-bit digital RGB signals
• Reversible-scan direction
• Selectable QVGA or VGA mode
• Edge light type (without inverter)
• Replaceable lamp for backlight
• Acquisition product for UL60950-1/CSA-C22.2 No.60950-1-03 (File number: E170632)
• Compliance with the European RoHS directive (2002/95/EC)
(From product which was produced after April. 1, 2006)
NL3224BC35-22
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2. GENERAL SPECIFICATIONS
Display area
NL3224BC35-22
111.36 (H) × 83.52 (V) mm
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio Note1 500:1 (typ.)
Viewing angle Note1
Designed viewing direction
Polarizer surface
14cm (5.5 inches)
a-Si TFT active matrix
262,144 colors
320 (H) × 240 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
• Horizontal: Right side 55° (typ.), Left side 55° (typ.)
• Vertical: Up side 50° (typ.), Down side 40° (typ.)
At DPSH, DPSV= Low or Open: Normal scan
• Viewing direct i on wi thout image reversal: down side (6 o'clock)
• Viewing direction with contrast peak: up side (12 o'clock)
• Viewing angle with optimum grayscale (γ=2.2): normal axis (perpendicular)
Clear + Antireflection (AR)
≥
10:1
Polarizerpencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
Backlight
Power consumption Note1
Note1: At QVGA mode
2H (min.) [by JIS K5400]
At LCD panel center
50% (typ.) [against NTSC color space]
Ton+Toff (10%
30ms (typ.)
At IBL= 5.0mArms / lamp
750cd/m
6-bit digital signals for data of RGB colors,
Dot clock (CLK), Data enable (DE),
Horizontal synchronous signal (Hsync),
Vertical synchronous signal (Vsync)
LCD panel signal processing board: 3.3V or 5.0V
Edge light type: 2 cold cathode fluorescent lamps
Replaceable part
• Lamp holder set: Type No. 55LHS11
Recommended inverter (Option)
• Inverter: Type No. 55PW131
At IBL=5.0mArms / lamp, Checkered flag pattern
3.8W (typ., Power dissipation of the inverter is not included.)
2
(typ.)
←→
90%)
DATA SHEET DOD-PP-0301 (6th edition)
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3. BLOCK DIAGRAM
Host
100Ω
R0 to R5
100Ω
G0 to G5
100Ω
B0 to B5
CLK
100Ω
Hsync
100Ω
Vsync
100Ω
DE
DPSH
DPSV
Q/V
GND
Note1, Note2
VCC
VDDB
GNDB
Note2
LCD module (Product)
47Ω
Controller
47kΩ
Note3
Note4
Power supply
Note4
Fuse
for gradation
DC/DC
converter
LCD panel signal processing board
VBLH
VBLC
Inverter (Option)
Note1
VBLH
VBLC
Note1
NL3224BC35-22
H-driver
960 lines
LCD panel
H: 320 × 3 (R, G, B)
240 lines
V-driver
V: 240
Backlight (Edge light type)
Lamp
Lamp
DATA SHEET DOD-PP-0301 (6th edition)
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NL3224BC35-22
Note1: Relations between GND (Signal ground), shie ld plate and VBLC (Lamp low vo ltage terminal)
in the LCD module are as follows.
Front shield plate - Rear shield plate Not connected
GND - Front shield plate and Rear shield plate Not connected
VBLC - Front shield plate and Rear shield plate Not connected
GND - VBLC Not connected
Note2: GND and GNDB must be connected to customer equipment’s ground, and it is recommended
that these grounds are connected together in customer equipment.
Note3: Pull-down resistance of DPSH pin
Power supply voltage
VCC
at 3.3V 8.2 13.0 18.3
at 5.0V 6.0 10.0 15.0
min. typ. max.
Pull-down resistance of DPSH pin (kΩ)
Note4: Pull-down resistance of DPSV pin and Q/V pin
Power supply voltage
VCC
at 3.3V 13.0 18.3 23.0
at 5.0V 10.0 15.0 20.0
Pull-down resistance of DPSV pin and Q/V pin (kΩ)
min. typ. max.
Front shield plate
Rear shield plate
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4. DETAILED SPECIFICATIONS
4.1 MECHANICAL SPECIFICATIONS
ParameterSpecificationUnit
NL3224BC35-22
Module size
Display area
Weight215 (typ.), 225 (max.)g
Note1: See "7. OUTLINE DRAWINGS".
4.2 ABSOLUTE MAXIMUM RATINGS
Parameter SymbolRating Unit Remarks
Power supply
voltage
Input voltage
for signals
Operating temperature
LCD panel signal processing boardVCC -0.3 to +6.5 V
Note1: CLK, Hsync, Vsync, DE, DATA (R0 to R5, G0 to G5, B0 to B5)
Note2: DPSH, DPSV, Q/V
Note3: If the product surface (polarizer) is exposed to an ultraviolet ray, the polarizer may discolor
(Surface treatment may be damaged.). Use a filter to protect the polarizer from the ultraviolet
ray.
Note4: Measured at center of LCD panel surface (including self-heat)
Note5: Measured at center of LCD module's rear shield surface (including self-heat)
Note6: No condensation
Note7: Water amount at Ta= 70°C and RH= 42%
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4.3 ELECTRICAL CHARACTERISTICS
4.3.1 LCD panel signal processing board
ParameterSymbolmin. typ. max. UnitRemarks
NL3224BC35-22
(Ta= 25°C)
Power supply voltageVCC
QVGA
mode
Power supply current
VGA
mode
Logic input voltage for
display signals
Input voltage for DPSH,
DPSV and Q/V signal
ICC
HighVDLH0.7VCC - VCC V
LowVDLL0 - 0.3VCC V
HighVFDH0.7VCC - VCC V
LowVFDL0 - 0.9 V
3.0 3.3 3.6 Vat VCC= 3.3V
4.75 5.0 5.25 V
-
-
-
-
65
Note1
50
Note1
95
Note1
70
Note1
105
Note2
85
Note2
175
Note2
130
Note2
at VCC= 5.0V
mA at VCC= 3.3V
at VCC= 5.0V
mA
mA at VCC= 3.3V
at VCC= 5.0V
mA
CMOS level
-
Note1: Checkered flag pattern [by EIAJ ED-2522]
Note2: Pattern for maximum current
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⏐
⏐
×
⏐
×
×
4.3.2 Backlight lamp
Lamp current
Lamp voltage
Lamp starting voltage
Lamp oscillation frequency
Note1: This product consists of 2 backlight lamps, and these specifications are for each lamp.
Note2: The lamp voltage cycle between lamps should be kept on a same phase. "VS" and "VBLH"
Note3: The asymmetric ratio of working waveform for lamps (Power supply voltage peak ratio,
Note4: The inverter should be designed so that the lamp starting voltage can be maintained for more
Note5: In case "FO" is not the recommended value, beat noise may display on the screen, because of
Note6: Method of lamp cable installation may invite fluctuation of lamp current and voltage or
NL3224BC35-22
(Ta=25°C, Note1)
Parameter Symbolmin. typ. max. Unit Remarks
Note3
Note2, Note3
Note2, Note3, Note4, Note7
Note5
IBL 4.5 5.0 5.5 mArms
VBLH- 350 - Vrms -
550 - - Vrms
VS
780 - - Vrms
FO 39 43 47 kHz -
are the voltage value between low voltage side (Cold) and high voltage side (Hot).
power supply current peak ratio and waveform space ratio) should be less than 5 % (See the
following figure.). If the waveform is asymmetric, DC (Direct current) element apply into the
lamp. In this case, a lamp lifetime may be shortened, because a distribution of a lamp
enclosure substance inclines toward one side between low voltage terminal (Cold terminal)
and high voltage terminal (Hot terminal). When designing the inverter, evaluate asymmetric of
lamp working waveform sufficiently.
Pa
Pb
Sa
0
Sb
Pa - Pb
Pb
Sa - Sb⏐
Sb
100 ≤ 5 %
100 ≤ 5 %
Pa: Supply voltage/current peak for positive, Pb: Supply voltage/current peak for negative
Sa: Waveform space for positive part, Sb: Waveform space for negative part.
than 1 second. Otherwise the lamp may not be turned on.
interference between "FO" and "1/th". Recommended value of "FO" is as following
FO
=
1
4
×
1
th
(2n-1)
th: Horizontal cycle (See "4.9 INPUT SIGNAL TIMINGS".)
n: Natural number (1, 2, 3 ⋅⋅⋅⋅⋅⋅⋅⋅)
asymmetric of lamp working waveform. When designing method of lamp cable installation,
evaluate the fluctuation of lamp current, voltage and working waveform sufficiently.
at IBL= 5.0mArms:
L= 750cd/m
Ta= 25°C
Ta= -10°C
2
DATA SHEET DOD-PP-0301 (6th edition)
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Note7: In case of Inverter with Ballast condenser, "VS" is the voltage level between Ballast condenser
and Connector (Refer to the below “Example of measurement”). "VS" should be designed to
be more than minimum "VS". Otherwise the lamp may not be turned on because the lamp
starting voltage is less than minimum "VS".
Example of measurement
Probe capacity: 3pF (Tektronix, inc.: P6015A)
Transformer
4.3.3 Power supply voltage ripple
This product works, even if the ripple voltage levels are beyond th e permissible values as following
the table, but there might be noise on the display image.
Power supply voltage
Ballast condenser
Inverter
NL3224BC35-22
(Lamp side)
Connector
Probe capacity
Ripple voltage Note1
(Measure at input terminal of power supply)
High voltage probe
VS
Unit
VCC
3.3V
5.0V
≤ 100
≤ 100
Note1: The permissible ripple voltage includes spike noise.
4.3.4 Fuse
Parameter
Type Supplier
VCC ICP-S1.8 ROHM Co., Ltd.
Fuse
Rating Fusing current Remarks
1.8A
4.0A Note1
50V
Note1: The power supply capacity should be more than the fusing current. If it is less than the fusing
current, the fuse may not blow in a short time, and then nasty smell, smoke and so on may
occur.
mVp-p
mVp-p
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
3.0V or 4.75V
0V
Display signals,
Function signals
Note2
0ms < t < 35ms
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V in "VCC
= 3.3V" or 4.75V in "VCC = 5.0V", a protection circuit may work, and then this product
may not work.
Note2: Display signals (CLK, Hsync, Vsync, DE, DATA (R0 to R5, G0 to G5, B0 to B5)) and
function signals (DPSH, DPSV, Q/V) must be Low or High-impedance, exclude the VALID
period (See above sequence diagram), in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. VCC should be cut
when the display and function signals are stopped.
4.4.2 Inverter (Option)
Display signals,
Function signals
Note1
VDDB
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The backligh t should be tu rned on with in the va lid period of display an d functio n signals, in
1 GND Ground Note1
2 CLK Dot clock
3 Hsync Horizontal synchronous signal
4 Vsync Vertical synchronous signal
5 GND Ground Note1
6 R0 Red data (LSB) Least significant bit
7 R1 Red data
8 R2 Red data
9 R3 Red data
10 R4 Red data
11 R5 Red data (MSB) Most significant bit
12 GND Ground Note1
13 G0 Green data (LSB) Least significant bit
14 G1 Green data
15 G2 Green data
16 G3 Green data
17 G4 Green data
18 G5 Green data (MSB) Most significant bit
19 GND Ground Note1
20 B0 Blue data (LSB) Least significant bit
21 B1 Blue data
22 B2 Blue data
23 B3 Blue data
24 B4 Blue data
25 B5 Blue data (MSB) Most significant bit
26 GND Ground Note1
27 DE Selection of DE / Fixed mode
28 VCC Power supply
29 VCC Power supply
30 DPSH Selection of scan direction (Horizontal)
31 DPSV Selection of scan direction (Vertical)
The following table is the coordinates per pixel (See "4.8 SCANNING DIRECTIONS".).
C (0, 0)
R G B
C( 0, 0) C( 1, 0)
C( 0, 1) C( 1, 1)
•
•
•
C( 0, Y) C( 1, Y)
•
•
•
C( 0,238) C( 1,238)
C( 0,239) C( 1,239)
4.8 SCANNING DIRECTIONS
4.8.1 QVGA mode
The following figures are seen from a front view. Also the arrow shows the direction of scan.
C (0, 0)
D (0, 0)
C (0, 239)
D (0, 239)
Figure1. DPSH= Low or Open (Normal scan)
DPSV= Low or Open (Normal scan)
C (0, 0)
D (0, 239)
C (0, 239)
D (0, 0)
Figure3. DPSH= Low or Open (Normal scan)
DPSV= High (Reverse scan)
Note1: Meaning of C (X, Y) and D (X, Y)
C (X, Y): The coordinates of the display position (See "4.7 DISPLAY POSITIONS".)
D (X, Y): The data number of input signal for LCD panel signal processing board
NL3224BC35-22
C( X, 0)
C( X, 1)
•
•
•
C( X, Y)
•
•
•
C( X,238)
C( X,239)
• • •
• • •
•
• • •
•
• • •
•
• • •
•
• • •
• • •
C (0, 0)
D (319, 0)
C (0, 239)
D (319, 239)
Figure2. DPSH= High (Reverse scan)
DPSV= Low or Open (Normal scan)
C (0, 0)
D (319, 239)
C (0, 239)
D (319, 0)
Figure4. DPSH= High (Reverse scan)
DPSV= High (Reverse scan)
• • •
• • •
•
•
•
•
•
•
C (319, 239)
D (319, 239)
•
• • •
•
• • •
•
• • •
•
• • •
• • •
C (319, 0)
D (319, 0)
C (319, 0)
D (319, 239)
C (319, 239)
D (319, 0)
C(318, 0) C(319, 0)
C(318, 1) C(319, 1)
•
•
•
C(318, Y) C(319, Y)
•
•
•
C(318, 238) C(319, 238)
C(318, 239) C(319, 239)
C (319, 0)
D (0, 0)
C (319, 239)
D (0, 239)
C (319, 0)
D (0, 239)
C (319, 239)
D (0, 0)
•
• • •
•
•
•
•
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4.8.2 VGA mode
C (0, 0)
D (0, 0)
C (0, 239)
D (0, 479)
C (0, 0)
C (0, 239)
D (0, 0)
NL3224BC35-22
The following figures are seen from a front view. Also the arrow shows the direction of scan. In the
VGA mode, only quarter of VGA data signals (640×480) are displayed on the screen.
C (319, 0)
C (319, 239)
D (0, 479)
Figure1. DPSH= Low or Open (Normal scan)
DPSV= Low or Open (Normal scan)
C (319, 0)
C (319, 239)
Figure3. DPSH= Low or Open (Normal scan)
DPSV= High (Reverse scan)
D (639, 0)
D (639, 479)
D (639, 479)
D (639, 0)
Note1: Meaning of C (X, Y) and D (X, Y)
C (X, Y): The coordinates of the display position (See "4.7 DISPLAY POSITIONS".)
D (X, Y): The data number of input signal for LCD panel signal processing board
D (639, 0)
D (639, 479)
Figure2. DPSH= High (Reverse scan)
D (639, 479)
D (639, 0)
Figure4. DPSH= High (Reverse scan)
DPSV= Low or Open (Normal scan)
DPSV= High (Reverse scan)
C (0, 0)
C (0, 239)
C (0, 0)
C (0, 239)
C (319, 0)
D (0, 0)
C (319, 239)
D (0, 479)
D (0, 479)
C (319, 0)
C (319, 0)
C (319, 239)
D (0, 0)
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4.9 INPUT SIGNAL TIMINGS
4.9.1 QVGA mode
(1) Outline of input signal timings
• Horizontal signal
Note1
Hsync
Note2
Display period
DE (Data enable)
• Vertical signal
Note1
Vsync
Note2
Display period
DE (Data enable)
Note1: This diagram indicates virtual signal for set up to timing.
Note2: Fixed mode cannot be used while working of DE mode.
Note3: See "4.9.1 (3) Input signal timing chart" for numeration of pulse.
Note2: Keep tvp + tvb and thp + thb within the table. If it is out of specification, display position will
be shifted to right/left side or up/down.
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NL3224BC35-22
(b) DE mode
(Note1, Note2)
Parameter Symbolmin. typ. max.Unit Remarks
Frequency 1/tc 5.0 6.4 7.0 MHz 157.5ns (typ.)
CLK
DATA
(R0-R5)
(G0-G5)
(B0-B5)
Vsync
DE
Duty tcd 0.4 - 0.6 -
Rise time, Fall time tcrf - - 10 ns
CLK-DATA
Rise time, Fall time tdrf - - 10 ns
Pulse width tvp 2 - 20 H
Vsync-DE
Rise time, Fall time tvrf - - 10 ns
Horizontal
Vertical
(One frame)
Setup time tds 5 - - ns
Hold time tdh 10 - - ns
Setup time tvds 1 - - CLK
Hold time tvdh 1 - - CLK
Cycle th
57.7 63.5 80.8
331 404 - CLK
Display periodthd 320 CLK
15.1 16.6 21.2 ms 60.1Hz (typ.)
Cycle tv
242 262 - H
Display periodtvd 240 H
μs
-
-
-
15.7kHz (typ.)
-
CLK-DE
Setup time tdes 5 - - ns
Hold time tdeh 10 - - ns
Rise time, Fall time tderf - - 10 ns
-
Note1: Definition of parameters is as follows.
tc= 1CLK, tcd= tch/tc, th= 1H
Note2: Hsync signal (Pin No.3 of CN1) is not used inside the product at DE mode but do not keep pin
open to avoid noise problem.
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NL3224BC35-22
(3) Input signal timing chart
(a) Fixed mode
Vsync
Hsync
Hsync
DATA
(R0-R5)
(G0-G5)
(B0-B5)
Hsync
DATA
(R0-R5)
(G0-G5)
(B0-B5)
Hsync
CLK
DATA
(R0-R5)
(G0-G5)
(B0-B5)
tvp
1
INVALID
INVALID
thp
1
2
3
2
tvb tvd
21H (fixed)
D(X,0)
D(0,Y)D(1,Y) D(X,Y) D(318,Y)D(319,Y)
thb
77CLK (fixed)
INVALID
1H
240H (fixed)
D(X,Y)
D(0,Y)D(1,Y) D(319,Y)
D(X,238)D(X,239)
1CLK
320CLK (fixed)
1H (fixed)
thd
tvf
1
INVALID
(Note: X=0 to 319)
INVALID
thf
7CLK (fixed)
1
INVALID
(Note: Y=0 to 239)
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NL3224BC35-22
(b) DE mode
Horizontal timing
CLK
DATA
(R0-R5)
(G0-G5)
(B0-B5)
DE
Vertical timing
Vsync
DATA
(R0-R5)
(G0-G5)
(B0-B5)
DE
tvds
INVALID
tvp
INVALID
tc
1 2 319 320
1 2 239 240
tvdh
tv
INVALID
thd
th
INVALID
tvd
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NL3224BC35-22
(c) Common item of Fixed mode and DE mode
tch
thv
tvrf
tc
tcrf
tdeh
thh
tdrf
tvh
tds
tdes
ths
tderf
thrf
tdh
tdrf
tdeh
tderf
tdes
CLK
0.7VCC
0.5VCC
0.3VCC
tcrf
DATA
(R0-R5)
(G0-G5)
(B0-B5)
0.7VCC
0.5VCC
0.3VCC
INVALID
DE
0.7VCC
0.5VCC
0.3VCC
CLK
0.5VCC
Hsync
0.7VCC
0.5VCC
0.3VCC
Hsync
0.5VCC
Vsync
0.7VCC
0.5VCC
0.3VCC
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t
t
4.9.2 VGA mode
(1) Outline of input signal timings
• Horizontal signal
Note1
Horizontal synchronizing pulse width (thp)
Horizontal synchronizing cycle (th)
Hsync
Note2
Horizontal back-porch (thb)
Horizontal fron
Display period
Horizontal display period (thd)
DE (Data enable)
• Vertical signal
Note1
Vertical synchronizing cycle (tv)
Vertical synchronizing pulse width (tvp)
Vsync
Note2
Vertical back-porch (tvb)
Vertical fron
Display period
Vertical display period (tvd)
DE (Data enable)
1
2
34
Note1: This diagram indicates virtual signal for set up to timing.
Note2: Fixed mode cannot be used while working of DE mode.
Note3: See "4.9.2 (3) Input signal timing chart" for numeration of pulse.
Note2: Keep tvp + tvb and thp + thb within the table. If it is out of specification, display position will
be shifted to right/left side or up/down.
DATA SHEET DOD-PP-0301 (6th edition)
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NL3224BC35-22
(b) DE mode
(Note1, Note2)
Parameter Symbolmin. typ. max.Unit Remarks
Frequency 1/tc 21.0 25.17529.0 MHz 39.72ns (typ.)
CLK
Duty tcd 0.4 0.5 0.6 -
-
Rise time, Fall time tcrf - - 10 ns
DATA
(R0-R5)
(G0-G5)
(B0-B5)
Vsync
DE
CLK-DATA
Rise time, Fall time tdrf - - 10 ns
Pulse width tvp 1 2 - H
Vsync-DE
timing
Rise time, Fall time tvrf - - 10 ns
Horizontal
Vertical
(One frame)
CLK-DE
Rise time, Fall time tderf - - 10 ns
Setup time tds 8 - - ns
Hold time tdh 12 - - ns
Setup time tvds 1 - - CLK
Hold time tvdh 1 - - CLK
Cycle th
30.0 31.77833.6
- 800 - CLK
Display periodthd 640 CLK
16.1 16.68317.2 ms 59.94Hz (typ.)
Cycle tv
- 525 - H
Display periodtvd 480 H
Setup time tdes 8 - - ns
Hold time tdeh 12 - - ns
μs
-
-
31.468kHz (typ.)
-
-
-
Note1: Definition of parameters is as follows.
tc= 1CLK, tcd= tch/tc, th= 1H
Note2: Hsync signal (Pin No.3 of CN1) is not used inside the product at DE mode.
Do not keep pin open to avoid noise problem.
DATA SHEET DOD-PP-0301 (6th edition)
26
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NL3224BC35-22
(3) Input signal timing chart
(a) Fixed mode
Vsync
Hsync
Hsync
DATA
(R0-R5)
(G0-G5)
(B0-B5)
Hsync
DATA
(R0-R5)
(G0-G5)
(B0-B5)
Hsync
CLK
DATA
(R0-R5)
(G0-G5)
(B0-B5)
1H
tvp tvb tvdtvf
33H (fixed)
2
1
3
INVALID
INVALID
1
D(X,0)
D(0,Y)D(1,Y) D(X,Y) D(638,Y)D(639,Y)
thp thbthdthf
144CLK (fixed)640CLK (fixed) 16CLK (fixed)
2
INVALID
480H (fixed)
D(X,Y)
1CLK
D(0,Y)D(1,Y) D(639,Y)
12H (fixed)
D(X,478)D(X,479)
1
INVALID
(Note: X=0 to 639)
INVALID
1
INVALID
(Note: Y=0 to 479)
DATA SHEET DOD-PP-0301 (6th edition)
27
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NL3224BC35-22
(
(b) DE mode
Horizontal timing
CLK
DATA
(R0-R5)
(G0-G5)
B0-B5)
DE
Vertical timing
Vsync
DATA
(R0-R5)
(G0-G5)
(B0-B5)
DE
tvds
INVALID
tvp
INVALID
tc
1 2 639 640
1 2 479 480
tvdh
tv
INVALID
thd
th
INVALID
tvd
DATA SHEET DOD-PP-0301 (6th edition)
28
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NL3224BC35-22
(c) Common item of Fixed mode and DE mode
CLK
0.7VCC
0.5VCC
0.3VCC
tcrf
DATA
(R0-R5)
(G0-G5)
(B0-B5)
0.7VCC
0.5VCC
0.3VCC
INVALID
DE
0.7VCC
0.5VCC
0.3VCC
CLK
0.5VCC
Hsync
0.7VCC
0.5VCC
0.3VCC
Hsync
0.5VCC
Vsync
0.7VCC
0.5VCC
0.3VCC
tch
thv
tvrf
tc
tcrf
tdeh
thh
tdrf
tvh
tds
tdes
ths
tderf
thrf
tdh
tdrf
tdeh
tderf
tdes
DATA SHEET DOD-PP-0301 (6th edition)
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4.10 OPTICS
4.10.1 Optical characteristics
Optical characteristics are only applied to the QVGA mode. The VGA mode is exempted from the
assurance.
Parameter Condition Symbolmin. typ. max. Unit Remarks
Luminance
Contrast ratio
Luminance uniformity
Chromaticity
Color gamut
Response time
Viewing angle
Note1: These are initial characteristics.
Note2: Measurement conditions are as follows.
Optical characteristics are measured at luminance saturation after 20minutes from working
the product, in the dark room. Also measurement methods are as follows.
Note3: See "4.10.2 Definition of contrast ratio".
Note4: See "4.10.3 Definition of luminance uniformity".
Note5: Th ese coord inates are found on CIE 1931 chromaticity diagram.
Note6: Product surface temperature: TopF= 33°C
Note7: See "4.10.4 Definition of response times".
Note8: See "4.10.5 Definition of viewing angles".
NL3224BC35-22
(Note1, Note2)
White
Red
Green
Blue
Right
Left
Up
Down
White at center
θR= 0°, θL= 0°, θU= 0°, θD= 0°
White/Black at center
θR= 0°, θL= 0°, θU= 0°, θD= 0°
White
θR= 0°, θL= 0°, θU= 0°, θD= 0°
x coordinate Wx 0.2700.3000.330 -
y coordinate Wy 0.3100.3400.370 -
x coordinate Rx - 0.615- -
y coordinate Ry - 0.350- -
x coordinate Gx - 0.320- -
y coordinate Gy - 0.575- -
x coordinate Bx - 0.150- -
y coordinate By - 0.130- -
θR= 0°, θL= 0°, θU= 0°, θD= 0°
at center, against NTSC color space
White to Black Ton - 5 15 ms
Black to White Toff - 25 50 ms
°C, VCC= 3.3V, IBL= 5.0mArms/lamp, QVGA, Horizontal cycle= 1/15.7kHz,
50cm
Photodetector (BM-5A)
LCD module
(Product)
1°
2
-
°
°
°
°
Note5
Note6
Note7
Note8
DATA SHEET DOD-PP-0301 (6th edition)
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N
4.10.2 Definition of contrast ratio
The contrast ratio is calculated by using the following formula.
Contrast ratio (CR) =
4.10.3 Definition of luminance uniformity
The luminance uniformity is calculated by using following formula.
Luminance uniformity (LU) =
The luminance is measured at near the 5 points shown below.
40
120
200
4.10.4 Definition of response times
Response time is measured, the luminance changes from "white" to "black", or "black" to
"white" on the same screen point, by photo-detector. Ton is the time it takes the luminance
change from 90% down to 10%. Also Toff is the time it takes the luminance change from 10% up
to 90% (See the following diagram.).
White
100%
90%
Luminance
Black
10%
0%
4.10.5 Definition of viewing angles
ormal axis (Perpendicular)
Left
θD
Lower
θL
Luminance of white screen
Luminance of black screen
Maximum luminance from ①
Minimum luminance from ①
53
160
266
①
③
④
Ton
12 o’clock
θU
Upper
θR
Right
NL3224BC35-22
to ⑤
to ⑤
②
⑤
Toff
DATA SHEET DOD-PP-0301 (6th edition)
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5. RELIABILITY TESTS
Reliability tests are only applied to the QVGA mode. The VGA mode is exempted from the assurance.
Test itemConditionJudgment
High temperature and humidity
(Operation)
NL3224BC35-22
① 55 ± 2°C, RH = 85%, 240hours
② Display data is black.
High temperature
(Operation)
Heat cycle
(Operation)
Thermal shock
(Non operation)
ESD
(Operation)
Dust
(Operation)
Vibration
(Non operation)
Mechanical shock
(Non operation)
① 70 ± 3°C, 240hours
② Display data is black.
① -10 ± 3°C…1hour
70 ± 3°C…1hour
② 50cycles, 4hours/cycle
③ Display data is black.
① -30 ± 3°C…30minutes
80 ± 3°C…30minutes
② 100cycles, 1hour/cycle
③ Temperature transition time is within
5 minutes.
① 150pF, 150Ω, ±10kV
② 9 places on a panel surface Note2
③ 10 times each places at 1 sec interval
① Sample dust: No. 15 (by JIS-Z8901)
② 15 seconds stir
③ 8 times repeat at 1 hour interval
① 5 to 200Hz, 29.4m/s2
② 10 minutes/cycle
③ X, Y direction…2hours
④ Z direction…4hours
① 980m/ s2, 11ms
② ±X, ±Y, ±Z direction
③ 3 times each directions
No display malfunctions
Note1
No display malfunctions
No physical damages
Note1
Note1: Display and appearance are checked under environmental conditions equivalent to the
inspection conditions of defect criteria.
Note2: See the following figure for discharge points.
{ {
{
{
{
{
{
{
{
DATA SHEET DOD-PP-0301 (6th edition)
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!
6. PRECAUTIONS
6.1 MEANING OF CAUTION SIGNS
The following caution signs have very important meaning. Be sure to read "6.2 CAUTIONS" and
"6.3 ATTENTIONS", after understanding these contents!
This sign has the meaning that customer will be injured by himself or the product will
sustain a damage, if customer has wrong operations.
This sign has the meaning that customer will get an electrical shock, if customer has
wrong operations.
This sign has the meaning that customer will be injured by himself, if customer has
wrong operations.
6.2 CAUTIONS
∗ Do not touch the working backlight. There is a danger of an electric shock.
NL3224BC35-22
∗ Do not touch the working backlight. There is a danger of burn injury.
∗ Do not shock and press the LCD panel and the backlight! There is a danger of breaking,
because they are made of glass. (Shock: To be not greater 980m/s
11ms, Pressure: To be not greater 19.6 N (φ16mm jig))
6.3 ATTENTIONS
6.3.1 Handling of the product
① Take hold of both ends without touching the circuit board when the product (LCD module) is
picked up from inner packing box to avoid broken down or misadjustment, because of stress to
mounting parts on the circuit board.
② Do not hook nor pull cables such as lamp cable, and so on, in order to avoid any damage.
③ When the product is put on the table temporarily, display surface must be placed downward.
④ When handling the product, take the measures of electrostatic discharge with such as earth band,
ionic shower and so on, because the product may be damaged by electrostatic.
⑤ The torque for product mounting screws must never exceed 0.294N⋅m. Higher torque might result
in distortion of the bezel.
⑥ The product must be installed using mounting holes without undue stress such as bends or twist
(See outline drawings). And do not add undue stress to any portion (such as bezel flat area). Bends
or twist described above and undue stress to any portion may cause display mura.
⑦ Do not press or rub on the sensitive product surface. When cleaning the product surface, use of the
cloth with ethanolic liquid such as screen cleaner for LCD is recommended.
⑧ Do not push nor pull the interface connectors while the product is working.
2
and to be not greater
!
DATA SHEET DOD-PP-0301 (6th edition)
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⑨ Do not bend or unbend the lamp cable at the near part of the lamp holding rubber, to avoid the
⑩ Properly connect the plug (backlight side) to adaptable socket (inverter side) without incomplete
⑪ If the lamp cable is attached on the metal part of the product directly, high frequency leak current
⑫ When not connecting shield plate of the LCD module to the customer's equipment ground, inverter
⑬ When handling the product, use of an original protection sheet on the product surface (polarizer) is
⑭ Usually liquid crystals don't leak through the breakage of glasses because of the surface tension of
6.3.2 Environment
① Do not operate or store in high temperature, high humidity, dewdrop atmosphere or corrosive gases.
② In order to prevent dew condensation occurring by temperature difference, the product packing
③ Do not operate in high magnetic field. Circuit boards may be broken down by it.
④ This product is not designed as radiation hardened.
6.3.3 Characteristics
The following items are neither defects nor failures.
① Response time, luminance and color may be changed by ambient temperature.
② Display mura, flicker, vertical seam or small spot may be observed depending on display pat tern s .
③ Optical characteristics (e.g. luminance, display uniformity, etc.) gradually is going to change
④ Do not display the fixed pattern for a long time because it may cause image sticking. Use a screen
⑤ The display color may be changed depending on viewing angle because of the use of condenser
⑥ Optical characteristics may be changed depending on input signal timings.
⑦ The interference noise between input signal frequency for this product's signal processing board
⑧ The color of the polarizer surface may differ between products because of antireflection treatment.
⑨ After the product is stored under condition of low temperature or dark place for a long time, the
NL3224BC35-22
damage for high voltage side of the lamp.
connection. After connecting, be careful not to hook the lamp cables because incomplete
connection may occur by hooking the lamp cables. This incomplete connection may cause
abnormal operation of high voltage circuit.
to the metal part may occur, then the brightness may decrease or the lamp may not be turned on.
noise may create video noise on the LCD screen.
recommended for protection of product surface. Adhesive type protection sheet may change color
or characteristics of the polarizer.
thin layer and the construction of LCD panel. But, if you contact with liquid crystal for the worst,
please wash it out with soap.
Keep the product in packing box with antistatic pouch in room temperature to avoid dusts and
sunlight, when storing the product.
box should be opened after enough time being left under the environment of an unpacking room.
Evaluate the leaving time sufficiently because a situation of dew condensation occurring is
changed by the environmental temperature and humidity. (Recommended leaving time: 6 hours or
more with packing state)
depending on operating time, and especially low temperature, because the LCD has cold cathode
fluorescent lamps.
saver, if the fixed pattern is displayed on the screen.
sheet in the backlight.
and luminance control frequency of the inverter may appear on a display. Set up luminance control
frequency of the inverter so that the interference noise does not appear.
cold cathode fluorescent lamp may not be turned on under the same condition because of the
general characteristic of cold cathode fluorescent lamp. In addition, when Luminance control ratio
is low in pulse width modulation method inverter, the lamp may not be turned on. In this case,
power should be supplied again.
DATA SHEET DOD-PP-0301 (6th edition)
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NL3224BC35-22
6.3.4 Other
① All GND and VCC terminals should be used without any non-connected lines.
② Do not disassemble a product or adjust variable resistors.
③ See "REPLACEMENT MANUAL FOR LAMP HOLDER SET", when replacing backlight lamps.
④ Pay attention not to insert foreign materials inside of the product, when using tapping screws.
⑤ Pack the product with original shipping package, in order to avoid any damages during
transportation, when returning the product to NEC for repair and so on.
DATA SHEET DOD-PP-0301 (6th edition)
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7. OUTLINE DRAWINGS
7.1 FRONT VIEW
Note1: The torque for product mounting screws must never exceed 0.294N⋅m.
NL3224BC35-22
Unit: mm
DATA SHEET DOD-PP-0301 (6th edition)
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7.2 REAR VIEW
NL3224BC35-22
Unit: mm
Note1: The torque for product mounting screws must never exceed 0.294N⋅m.
DATA SHEET DOD-PP-0301 (6th edition)
37
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