NEC NL256204AM15-01A Specification

TFT MONOCHROME LCD MODULE

NL256204AM15-01 NL256204AM15-01A

51cm (20.1 Type)

QSXGA

LVDS Interface (4 ports)

DATA SHEET

DOD-PP-0209 (8th edition)

This DATA SHEET is updated document from DOD-PP-0113(7).

All information is subject to change without notice. Please confirm the sales representative before starting to design your system.

Document Number: DOD-PP-0209 (8th edition) Published date: March 2007 CP(N)

NL256204AM15-01/01A

INTRODUCTION

The Copyright to this document belongs to NEC LCD Technologies, Ltd. (hereinafter called "NEC").

No part of this document will be used, reproduced or copied without prior written consent of NEC.

NEC does and will not assume any liability for infringement of patents, copyrights or other intellectual property rights of any third party arising out of or in connection with application of the products described herein except for that directly attributable to mechanisms and workmanship thereof. No license, express or implied, is granted under any patent, copyright or other intellectual property right of NEC.

Some electronic parts/components would fail or malfunction at a certain rate. In spite of every effort to enhance reliability of products by NEC, the possibility of failures and malfunction might not be avoided entirely. To prevent the risks of damage to death, human bodily injury or other property arising out thereof or in connection therewith, each customer is required to take sufficient measures in its safety designs and plans including, but not limited to, redundant system, fire-containment and anti-failure.

The products are classified into three quality grades: "Standard", "Special", and "Specific" of the highest grade of a quality assurance program at the choice of a customer. Each quality grade is designed for applications described below. Any customer who intends to use a product for application other than that of Standard quality grade is required to contact an NEC sales representative in advance.

The Standard quality grade applies to the products developed, designed and manufactured in accordance with the NEC standard quality assurance program, which are designed for such application as any failure or malfunction of the products (sets) or parts/components incorporated therein a customer uses are, directly or indirectly, free of any damage to death, human bodily injury or other property, like general electronic devices.

Examples: Computers, office automation equipment, communications equipment, test and measurement

equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment, industrial robots, etc.

The Special quality grade applies to the products developed, designed and manufactured in accordance with an NEC quality assurance program stricter than the standard one, which are designed for such application as any failure or malfunction of the products (sets) or parts/components incorporated therein a customer uses might directly cause any damage to death, human bodily injury or other property, or such application under more severe condition than that defined in the Standard quality grade without such direct damage.

Examples: Control systems for transportation equipment (automobiles, trains, ships, etc.), traffic control

systems, anti-disaster systems, anti-crime systems, medical equipment not specifically designed for life support, safety equipment, etc.

The Specific quality grade applies to the products developed, designed and manufactured in accordance with the standards or quality assurance program designated by a customer who requires an extremely higher level of reliability and quality for such products.

Examples: Military systems, aircraft control equipment, aerospace equipment, nuclear reactor control

systems, medical equipment/devices/systems for life support, etc.

The quality grade of this product is the "Standard" unless otherwise specified in this document.

DATA SHEET DOD-PP-0209 (8th edition)

NL256204AM15-01/01A

INTRODUCTION ..........................................................................................................................................2

1. OUTLINE....................................................................................................................................................4

1.1 STRUCTURE AND PRINCIPLE...........................................................................................................4

1.2 APPLICA TION.......................................................................................................................................4

1.3 FEATURES.............................................................................................................................................4

2. GENERAL SPECIFICATIONS ................................................................................................................5

3. BLOCK DIAGRAM...................................................................................................................................6

4. DETAILED SPECIFICATIONS...............................................................................................................7

4.1 MECHANICAL SPECIFICATIONS......................................................................................................7

4.2 ABSOLUTE MAXIMUM RATINGS....................................................................................................7

4.3 ELECTRICAL CHARACTERISTICS...................................................................................................8

4.3.1 LCD panel signal processing board...............................................................................................8

4.3.2 Inverter...........................................................................................................................................9

4.3.3 Inverter current wave.....................................................................................................................9

4.3.4 Power supply voltage ripple.........................................................................................................10

4.3.5 Fuse..............................................................................................................................................10

4.4 POWER SUPPLY VOLTAGE SEQUENCE........................................................................................11

4.4.1 LCD panel signal processing board.............................................................................................11

4.4.2 Inverter.........................................................................................................................................11

4.5 CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS.........................................................12

4.5.1 LCD panel signal processing board.............................................................................................12

4.5.2 Inverter.........................................................................................................................................14

4.5.3 Positions of socket.......................................................................................................................14

4.6 LUMINANCE CONTROL...................................................................................................................15

4.6.1 Luminance control methods.........................................................................................................15

4.6.2 Detail of BRTP timing .................................................................................................................16

4.7 METHOD OF CONNECTION FOR LVDS TRANSMITTER............................................................17

4.8 DISPLAY GRAY SCALE AND INPUT DATA SIGNALS..................................................................19

4.9 INPUT SIGNAL TIMINGS..................................................................................................................20

4.9.1 Timing characteristics..................................................................................................................20

4.9.2 Input signal timing chart..............................................................................................................20

4.10 LVDS DATA TRANSMISSION MODE............................................................................................21

4.11 DISPLAY POSITIONS.......................................................................................................................22

4.12 PIXEL ARRANGNMENT .................................................................................................................23

4.13 TEN-bit LOOK UP TABLE FOR GAMMA ADJUSTMENT............................................................24

4.14 LUT SERIAL COMMUNICATION TIMINGS.................................................................................27

4.15 OPTICS...............................................................................................................................................29

4.15.1 Optical characteristics................................................................................................................29

4.15.2 Definition of contrast ratio.........................................................................................................31

4.15.3 Definition of luminance uniformity...........................................................................................31

4.15.4 Definition of response times......................................................................................................31

4.15.5 Definition of viewing angles......................................................................................................31

5. RELIABILITY TESTS.............................................................................................................................32

6. PRECAUTIONS .......................................................................................................................................33

6.1 MEANING OF CAUTION SIGNS......................................................................................................33

6.2 CAUTIONS..........................................................................................................................................33

6.3 A TTENTI ONS......................................................................................................................................33

6.3.1 Handling of the product...............................................................................................................33

6.3.2 Environment.................................................................................................................................34

6.3.3 Characteristics..............................................................................................................................35

6.3.4 Other............................................................................................................................................35

7. OUTLINE DRAWINGS...........................................................................................................................36

DATA SHEET DOD-PP-0209 (8th edition)

1. OUTLINE

1.1 STRUCTURE AND PRINCIPLE

Monochrome LCD module NL256204AM15-01 and NL256204AM15-01A are composed of the amorphous silicon thin film transistor liquid crystal display (a-Si TFT LCD) panel structure with driver LSIs for driving the TFT (Thin Film Transistor) array and a backlight.

The a-Si TFT LCD panel structure is injected liquid crystal material into a narrow gap between the TFT array glass substrate and a monochrome-filter glass substrate.

Grayscale data signals from a host system (e.g. signal generator, etc.) are modulated into best form for active matrix system by a signal processing board, and sent to the driver LSIs which drive the individual TFT arrays.

The TFT array as an electro-optical switch regulates the amount of transmitted light from the backlight assembly, when it is controlled by data signals. Monochrome images are created by regulating the amount of transmitted light through the TFT array.

1.2 APPLICATION

• Monochrome monitor system

1.3 FEATURES

• Ultra-wide viewing angle (Adopti on of Super- Advanced Super Fine TFT (SA-SFT))

• High luminance

• High contrast

• Low reflection

• High resolution

• 256 gray scales per 1 sub-pixel

• L VDS interface

• Adjustable gamma characteristics by using built-in 10-bit LUT (look up table)

• Selectable LVDS data input map

• Selectable LVDS data transmission mode

• Small foot print

• Incorporated direct type backlight

• Replaceable backlight unit and inverter

• Compliance with the European RoHS directive (2002/95/EC)

(From product which was produced after April. 1, 2006)

• Differences between NL256204AM15-01 and NL256204AM15-01A

NL256204AM15-01/01A

Item NL256204AM15-01 NL256204AM15-01A

White chromaticity Wx, Wy = (0.255, 0.310) (typ.) Wx, Wy = (0.280, 0.304) (typ.)

Backlight unit

(Replaceable part)

201LHS07 201LHS08

DATA SHEET DOD-PP-0209 (8th edition)

2. GENERAL SPECIFICATIONS

Display area Diagonal size of display

NL256204AM15-01/01A

399.36 (H) × 319.488 (V) mm 51 cm (20.1 inches)

Drive system Display gray scale Pixel Pixel arrangement Sub-pixel pitch Pixel pitch Module size Weight Contrast ratio

Viewing angle

Designed viewing direction Polarizer surface

Polarizer pencil-hardness Response time

Luminance

White chromaticity

a-Si TFT active matrix 256 gray scales per 1 sub-pixel (8-bit) (766 gray scales per 1 pixel) 2,560 (H) × 2,048 (V) pixels (1 pixel consists of 3 sub pixels (LCR)) LCR Vertical stripe

0.052 (H) × 0.156 (V) mm

0.156 (H) × 0.156 (V) mm

423.4 (W) × 343.5 (H) × 43.5 (D) mm (typ.) 2,440 g (typ.) 600:1 (typ.)

≥

At the contrast ratio

10:1

• Horizontal: Right side 85° (typ.), Left side 85° (typ.)

• Vertical: Up side 85° (typ.), Down side 85° (typ.)

Viewing angle with optimum grayscale (γ=DICOM): normal axis (perpendicular)

Note1

Antiglare 2H (min.) [by JIS K5400]

Ton + Toff (10%

←→

90%)

30 ms (typ.)

At the maximum luminance control

850 cd/m

(typ.)

NL256204AM15-01 Wx, Wy = (0.255, 0.310) (typ.) NL256204AM15-01A Wx, Wy = (0.280, 0.304) (typ.)

Signal system

Power supply voltage

4 ports LVDS interface [LCR 8-bit signals, Data enable signal (DE), Dot clock (CLK)]

LCD panel signal processing board: 12.0V Inverter: 12.0V

Direct light type: 12 cold cathode fluorescent lamps with an inverter

Backlight

Power consumption

At checkered flag pattern, the maximum luminance control

49.2 W (typ.)

Note1: When the product luminance is 850cd/m

DATA SHEET DOD-PP-0209 (8th edition)

NL256204AM15-01

NL256204AM15-01A

, the gamma characteristic is designed to γ=DICOM.

Replaceable parts

• Backlight unit: Type No.: 201LHS07

• Inverter: Type No.: 201PW121

Replaceable parts

• Backlight unit: Type No.: 201LHS08

• Inverter: Type No.: 201PW121

NL256204AM15-01/01A

3. BLOCK DIAGRAM

Note1: Relations between GND (Signal ground), FG (Frame ground) and GNDB (Inverter ground) in the

Note2: GND, FG and GNDB must be connected to customer equipment’s ground, and it is recommended that

Host LCD module (product)

DA0+/DA1+/DA2+/CKA+/DA3+/-

DB0+/DB1+/DB2+/CKB+/DB3+/-

DC0+/DC1+/DC2+/CKC+/DC3+/-

DD0+/DD1+/DD2+/CKD+/DD3+/-

MOD[0:1] BSEL[0:1] CSR, CSL SCLK SDAT

VDD

GND

ote1, Note2

VDDB BRTC BRTH BRTI BRTP PWSEL GNDB

ote1, Note2

Fuse

LVDS receiver

Fuse

Controller

DC/DC

Converter

Inverter

2,048 lines

V-driver

Power supply for drivers

LCD module are as follows.

GND - FG Connected GND - GNDB Not connected FG - GNDB Not connected

these grounds are connected together in customer equipment.

H-driver

7,680 lines

TFT LCD panel

H: 2,560 × 3 (L, C, R)

V: 2,048

H-driver

Backlight (Direct light type)

V-driver

DATA SHEET DOD-PP-0209 (8th edition)

4. DETAILED SPECIFICATIONS

4.1 MECHANICAL SPECIFICATIONS

Parameter Specification Unit

NL256204AM15-01/01A

Module size Display area

Weight 2,440 (typ.), 2,600 (max.) g

Note1: See "7. OUTLINE DRAWINGS".

4.2 ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Rating Unit Remarks

Power supply voltage

LCD panel signal

processing board

Input voltage

for signals

Inverter

423.4 ± 1.0 (W) × 343.5 ± 1.0 (H) × 43.5 ± 1.0 (D)

399.36 (H) × 319.488 (V)

LCD panel signal

processing board

Inverter VDDB -0.3 to +15.0 V

Display signals

Note1

Function signal 1

Note2

Function signal 2

Note3

BRTI signal VBI -0.3 to +1.5 V BRTP signal VBP -0.3 to +5.5 V

BRTC signal VBC -0.3 to +5.5 V

PWSEL signal VPSL -0.3 to +5.5 V

VDD -0.3 to +15.0 V

VD -0.3 to +3.6

VF1

-0.3 to +3.9

VF2

Note1 mm Note1 mm

Ta = 2 5°C

VDD=12.0V

Ta = 2 5°C

VDDB = 12.0V

Storage temperature Tst -20 to +60

Operating temperature

Relative humidity

Absolute humidity

Note6

Front surface TopF 0 to +55

Rear surface TopR 0 to +55

≤ 95

≤ 85

≤ 70

≤ 73

Note7

°C

g/m3

Note4

Note5

Ta ≤ 40°C

40 < Ta ≤ 50°C

50 < Ta ≤ 55°C

Ta > 5 5°C

Note1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, CKB+/-, DC0+/-,

DC1+/-, DC2+/-, DC3+/-, CKC+/-, DD0+/-, DD1+/-, DD2+/-, DD3+/-, CKD+/Note2: MOD0, MOD1, BSEL0, BSEL1 Note3: CSR, CSL, SCLK, SDAT Note4: Measured at center of LCD panel surface (including self-heat) Note5: Measured at center of LCD module's rear shield surface (including self-heat) Note6: No condensation Note7: Water amount at Ta = 55°C and RH = 70%

DATA SHEET DOD-PP-0209 (8th edition)

NL256204AM15-01/01A

4.3 ELECTRICAL CHARACTERISTICS

4.3.1 LCD panel signal processing board

Parameter Symbol min. typ. max. Unit Remarks

Power supply voltage VDD 10.8 12.0 13.2 V -

Power supply current IDD -

Differential input threshold voltage for Display signals

Input voltage swing VI 0 - 2.4 V Note4

High VTH - - +100 mV

Low VTL -100 - - mV

900

Note1

1,800

Note2

(Ta = 25°C)

at VDD = 12.0V,

Mode 0 is selected.

at VCM= 1.2V

Note3, Note4

Terminating resistance RT - 100 -

Input voltage for Function signal 1

Input current for Function signal 1

Input voltage for Function signal 2

High VFH1 Keep this pin open. -

Low VFL1 0 - 0.8 V

Low IFL1 -10 - 10

High V+ - - 2.3 V

Low V- 0.5 - - V

Hysteresis VH 0.4 - - V

Note5

μA

Note6

Note1: Checkered flag pattern [by EIAJ ED-2522] Note2: Pattern for maximum current Note3: Common mode voltage for LVDS receiver Note4: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, CKB+/-,

DC0+/-, DC1+/-, DC2+/-, DC3+/-, CKC+/-, DD0+/-, DD1+/-, DD2+/-, DD3+/-, CKD+/-. Note5: MOD0, MOD1, BSEL0, BSEL1 Note6: CSR, CSL, SCLK, SDAT

DATA SHEET DOD-PP-0209 (8th edition)

NL256204AM15-01/01A

4.3.2 Inverter (Ta = 25°C)

Parameter Symbol min. typ. max. Unit Remarks

Power supply voltage VDDB 11.4 12.0 12.6 V -

VDDB = 12.0V,

Power supply current IDDB - 3,200 4,000

BRTI signal VBI 0 - 1.0 V

High VBPH 2.0 - 5.25 V

Low VBPL 0 - 0.8 V

High VBCH 2.0 - 5.25 V

Low VBCL 0 - 0.8 V

High VPSLH 2.0 - 5.25 V

Low VPSLL 0 - 0.8 V

High IBPH - - 3.5 mA

Low IBPL -1.6 - - mA

High IBCH - - 440

Low IBCL -610 - -

High IPSLH - - 440

Low IPSLL -610 - -

Input voltage

for signals

Input current

for signals

BRTP signal

BRTC signal

PWSEL signal BRTI signal IBI -130 - BRTP signal

BRTC signal

PWSEL signal

4.3.3 Inverter current wave

3,200 (mA) typ.

0 (A)

Duty

Luminance control frequency

Maximum luminance control: 100% Minimum luminance control: 20% Luminance control frequency: 285Hz (typ.)

Note1: Luminance control frequency indicate the input pulse frequency, when select the external pulse

control. See "4.6.2 Detail of BRTP timing".

Note2: The power supply lines (VDDB and GNDB) have large ripple voltage (See "4.3.4 Power

supply voltage ripple".) during luminance control. There is the possibility that the ripple voltage produces acoustic noise and signal wave noise in audio circuit and so on. Put a capacitor (5,000 to 6,000μF) between the power supply lines (VDDB and GNDB) to reduce the noise, if the noise occurred in the circuit.

At the maximum

mΑ

luminance control

μΑ

μΑ μΑ μΑ μΑ

DATA SHEET DOD-PP-0209 (8th edition)

NL256204AM15-01/01A

4.3.4 Power supply voltage ripple

This product works, even if the ripple voltage levels are beyond the permissible values as following

the table, but there might be noise on the display image.

Power supply voltage

(Measure at input terminal of power supply)

Ripple voltage Note1

Unit

VDD 12.0 V

VDDB 12.0 V

Note1: The permissible ripple voltage includes spike noise.

Example of the power supply connection

a) Separate the power supply b) Put in the filter

Power

4.3.5 Fuse

Parameter

VDD

VDDB 0453007 Littelfuse Inc.

Type Supplier

FHC20 502AD

Note1: The power supply capacity should be more than the fusing current. If it is less than the fusing

current, the fuse may not blow in a short time, and then nasty smell, smoke and so on may occur.

VDD

VDDB

Fuse

KAMAYA ELECTRIC

Co., Ltd.

Power

≤ 100

≤ 200

Filter

Rating Fusing current Remarks

24V

125V

12.5A,

5s max.

14A,

5s max.

mVp-p

VDD

VDDB

Note1

DATA SHEET DOD-PP-0209 (8th edition)

NL256204AM15-01/01A

4.4 POWER SUPPLY VOLTAGE SEQUENCE

4.4.1 LCD panel signal processing board

VDD Note1

VDD ON

10.8V

9.6V

VDD dip < 20ms

5ms < Tr < 80ms

LVDS Signals *1,*2 Note2

CSR, CSL, SCLK, SDAT Note2

VALID period

t≥20ms Note3

VALID period

10ms < t < 35ms 10ms < t < 35ms

*1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, CKB+/-,

DC0+/-, DC1+/-, DC2+/-, DC3+/-, CKC+/-, DD0+/-, DD1+/-, DD2+/-, DD3+/-, CKD+/-

*2: LVDS signals should be measured at the terminal of 100Ω resistance.

Note1: In terms of voltage variation (voltage drop) while VDD rising edg e is below 1 0.8V, a protection

circuit may work, and then this product may not work.

Note2: LVDS signals and CSR, CSL, SCLK, SDAT must be Low or High-impedance, exclude the

VALID period (See above sequence diagram), in order to avoid that internal circuits is damaged. If some of signals are cut while this product is working, even if the signal input to it once again, it might not work normally. VDD should be cut when the display and function signals are stopped.

Note3: At the beginning of the serial communication mode, take 20ms or more after the LVDS signal

input.

4.4.2 Inverter

Voltage

tr≤800ms

BRTC

12.0V

11.4V

VDDB

0ms<t

Note1: The backlight should be turned on within the valid period of LVDS signals, in order to avoid

unstable data display. Note2: If tr is more than 800ms, the backlight will be turned off by a protection circuit for inverter. Note3: When VDDB is 0V or BRTC is Low, PWSEL must be set to Low or Open.

VDD OFF

10.8V

VDD ON

10.8V

Toff > 50ms

0ms < t < 35ms

Time

0ms<t

DATA SHEET DOD-PP-0209 (8th edition)

+ 25 hidden pages

NEC NL256204AM15-01A Specification

INTRODUCTION

CONTENTS

1. OUTLINE

1.1 STRUCTURE AND PRINCIPLE

1.2 APPLICATION

1.3 FEATURES

2. GENERAL SPECIFICATIONS

3. BLOCK DIAGRAM

4. DETAILED SPECIFICATIONS

4.1 MECHANICAL SPECIFICATIONS

4.2 ABSOLUTE MAXIMUM RATINGS

4.3 ELECTRICAL CHARACTERISTICS

4.3.1 LCD panel signal processing board

4.3.2 Inverter (Ta = 25°C)

4.3.3 Inverter current wave

4.3.4 Power supply voltage ripple

4.3.5 Fuse

4.4 POWER SUPPLY VOLTAGE SEQUENCE

4.4.1 LCD panel signal processing board

4.4.2 Inverter