NEC NL192120AC25-02 Specification

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TFT COLOR LCD MODULE

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NL192120AC25-02

57cm (22.5 Type)

WUXGA

LVDS Interface (4 port)

DATA SHEET

DOD-PP-0872 (2nd edition)

This DATA SHEET is updated document from
DOD-PP-0729(1).

All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.

Document Number: DOD-PP-0872 (2nd edition)
Published date: October 2009 CP(N)

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¤ NEC LCD Technologies, Ltd.

2009 All rights reserved.

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The Copyright to this document belongs to NEC LCD Technologies, Ltd. (hereinafter called "NEC").

No part of this document will be used, reproduced or copied without prior written consent of NEC.

NEC does and will not assume any liability for infringement of patents, copyrights or other intellectual
property rights of any third party arising out of or in connection with application of the products
described herein except for that directly attributable to mechanisms and workmanship thereof. No license,
express or implied, is granted under any patent, copyright or other intellectual property right of NEC.

Some electronic parts/components would fail or malfunction at a certain rate. In spite of every effort to
enhance reliability of products by NEC, the possibility of failures and malfunction might not be avoided
entirely. To prevent the risks of damage to death, human bodily injury or other property arising out
thereof or in connection therewith, each customer is required to take sufficient measures in its safety
designs and plans including, but not limited to, redundant system, fire-containment and anti-failure.

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NL192120AC25-02

INTRODUCTION

The products are classified into three quality grades: "Standard", "Special", and "Specific" of the
highest grade of a quality assurance program at the choice of a customer. Each quality grade is designed
for applications described below. Any customer who intends to use a product for application other than
that of Standard quality grade is required to contact an NEC sales representative in advance.

The Standard quality grade applies to the products developed, designed and manufactured in
accordance with the NEC standard quality assurance program, which are designed for such application as
any failure or malfunction of the products (sets) or parts/components incorporated therein a customer
uses are, directly or indirectly, free of any damage to death, human bodily injury or other property, like
general electronic devices.
Examples: Computers, office automation equipment, communications equipment, test and measurement

equipment, audio and visual equipment, home electronic appliances, machine tools, personal
electronic equipment, industrial robots, etc.

The Special quality grade applies to the products developed, designed and manufactured in accordance
with an NEC quality assurance program stricter than the standard one, which are designed for such
application as any failure or malfunction of the products (sets) or parts/components incorporated therein a
customer uses might directly cause any damage to death, human bodily injury or other property, or such
application under more severe condition than that defined in the Standard quality grade without such
direct damage.
Examples: Control systems for transportation equipment (automobiles, trains, ships, etc.), traffic control

systems, anti-disaster systems, anti-crime systems, medical equipment not specifically
designed for life support, safety equipment, etc.

The Specific quality grade applies to the products developed, designed and manufactured in accordance
with the standards or quality assurance program designated by a customer who requires an extremely
higher level of reliability and quality for such products.
Examples: Military systems, aircraft control equipment, aerospace equipment, nuclear reactor control

systems, medical equipment/devices/systems for life support, etc.

The quality grade of this product is the "Standard" unless otherwise specified in this document.

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INTRODUCTION ..........................................................................................................................................2

1. OUTLINE....................................................................................................................................................4

1.1 STRUCTURE AND PRINCIPLE...........................................................................................................4

1.2 APPLICATION.......................................................................................................................................4

1.3 FEATURES.............................................................................................................................................4

2. GENERAL SPECIFICATIONS ................................................................................................................5

3. BLOCK DIAGRAM ................................................................................................................................... 6

4. DETAILED SPECIFICATIONS ............................................................................................................... 7

4.1 MECHANICAL SPECIFICATIONS......................................................................................................7

4.2 ABSOLUTE MAXIMUM RATINGS ....................................................................................................7

4.3 ELECTRICAL CHARACTERISTICS................................................................................................... 8

4.3.1 LCD panel signal processing board ............................................................................................... 8

4.3.2 Inverter........................................................................................................................................... 9

4.3.3 Inverter current wave ..................................................................................................................... 9

4.3.4 Power supply voltage ripple.........................................................................................................10

4.3.5 Fuse.............................................................................................................................................. 10

4.4 POWER SUPPLY VOLTAGE SEQUENCE ........................................................................................11

4.4.1 LCD panel signal processing board ............................................................................................. 11

4.4.2 Inverter......................................................................................................................................... 11

4.5 CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS.........................................................12

4.5.1 LCD panel signal processing board ............................................................................................. 12

4.5.2 Inverter......................................................................................................................................... 15

4.5.3 Positions of socket .......................................................................................................................16

4.6 LUMINANCE CONTROL................................................................................................................... 17

4.6.1 Luminance control methods.........................................................................................................17

4.6.2 Detail of BRTP timing .................................................................................................................18

4.7 CONNECTION BETWEEN RECEIVER AND TRANSMITTER FOR LVDS..................................19

4.8 POLARITY REVERSING CONTROL................................................................................................21

4.8.1 Polarity reversing outside control ................................................................................................ 21

4.9 DISPLAY COLORS AND INPUT DATA SIGNALS ..........................................................................22

4.10 DISPLAY POSITIONS.......................................................................................................................23

4.11 LVDS DATA TRANSMISSION METHOD .......................................................................................23

4.12 INPUT

4.12.1 Timing characteristics................................................................................................................24

4.12.2 Input signal timing chart ............................................................................................................ 25

4.13 OPTICS...............................................................................................................................................26

4.13.1 Optical characteristics................................................................................................................26

4.13.2 Definition of contrast ratio......................................................................................................... 27

4.13.3 Definition of luminance uniformity...........................................................................................27

4.13.4 Definition of response times ...................................................................................................... 27

4.13.5 Definition of viewing angles......................................................................................................27

5. ESTIMATED LUMINANCE LIFETIME..............................................................................................28

6. RELIABILITY TESTS.............................................................................................................................29

7. PRECAUTIONS .......................................................................................................................................30

7.1 MEANING OF CAUTION SIGNS ...................................................................................................... 30

7.2 CAUTIONS ..........................................................................................................................................30

7.3 ATTENTIONS ......................................................................................................................................30

7.3.1 Handling of the product ............................................................................................................... 30

7.3.2 Environment.................................................................................................................................31

7.3.3 Characteristics..............................................................................................................................32

7.3.4 Other ............................................................................................................................................32

8. OUTLINE DRAWINGS ........................................................................................................................... 33

8.1 FRONT VIEW......................................................................................................................................33

8.2 REAR VIEW ........................................................................................................................................34

SIGNAL TIMINGS................................................................................................................24

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NL192120AC25-02

CONTENTS

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1. OUTLINE

1.1 STRUCTURE AND PRINCIPLE

Color LCD module NL192120AC25-02 are composed of the amorphous silicon thin film transistor
liquid crystal display (a-Si TFT LCD) panel structure with driver LSIs for driving the TFT (Thin Film
Transistor) array and a backlight.

The a-Si TFT LCD panel structure is injected liquid crystal material into a narrow gap between the
TFT array glass substrate and a color-filter glass substrate.

Grayscale data signals from a host system (e.g. signal generator, etc.) are modulated into best form for
active matrix system by a signal processing board, and sent to the driver LSIs which drive the individual
TFT arrays.

The TFT array as an electro-optical switch regulates the amount of transmitted light from the backlight
assembly, when it is controlled by data signals. Color images are created by regulating the amount of
transmitted light through the TFT array of red, green and blue dots.

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NL192120AC25-02

1.2 APPLICATION

x Color monitor system

1.3 FEATURES

x Ultra-wide viewing angle (Adoption of Ultra-Advanced Super Fine TFT (UA-SFT))
x Active matrix LCD
x LVDS interface (4port)
x Full - HD
x 1,024 gray scales per 1 sub-pixel (10-bit)
x Wide color gamut
x High contrast
x 120Hz frame driving
x Fast response time
x Incorporated direct light type backlight with an inverter
x Compliance with the European RoHS directive (2002/95/EC)
x Acquisition product for UL60950-1/CSA C22.2 No.60950-1-03 (File number: E170632)

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2. GENERAL SPECIFICATIONS

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NL192120AC25-02

Display area

Diagonal size of display

Drive system

Display gray scale

Pixel

Pixel arrangement

Sub-pixel pitch

Pixel pitch

Module size

Weig ht

Contrast ratio

Viewing angle

Designed viewing direction

Polarizer surface

Polarizer pencil-hardness

Response time

Luminance

Color gamut

Signal system

Power supply voltage

Backlight

Power consumption

483.84 (H) u302.4(V) mm

57.0 cm (22.5 inches)

a-Si TFT active matrix

1,073,741,824 colors (10-bit)
1,920 (H) u 1,200 (V) pixels

RGB (Red dot, Green dot, Blue dot) vertical stripe

0.084 (H) u 0.252 (V) mm

0.252 (H) u 0.252 (V) mm

542.0 (W) u 362.0 (H) u 40.0 (D) mm (typ.)

[Excluding projection]

3,450 g (typ.)

800:1 (typ.)

t

mo

10:1

90%)

At the contrast ratio

x Horizontal: Right side 88q (typ.), Left side 88q (typ.)
x Vertical: Up side 88q (typ.), Down side 88q (typ.)

Viewing angle with optimum grayscale (Jล 2.2): normal axis (perpendicular)

Antiglare

2H (min.) [by JIS K5400]

Ton + Toff (10%

12 ms (typ.)

At the maximum luminance

420 cd/m

At LCD panel center

97 % (typ.) [against Adobe RBG]

4 ports LVDS interface
[RGB 10-bit signals, Data enable signal (DE), Dot clock (CLK)]

LCD panel signal processing board: 12.0V
Inverter: 12.0V

Direct light type: 12 cold cathode fluorescent lamp with an inverter

At luminance maximum, Checkered flag pattern

63.6 W (typ.)

2

(typ.)

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N

r

N

3. BLOCK DIAGRAM

I/F LCD module (product)

DA0+/­DA1+/­DA2+/-

CKA+/-

DA3+/­DA4+/-

DB0+/­DB1+/­DB2+/-

CKB+/-

DB3+/­DB4+/-

DC0+/­DC1+/-

DC2+/-

CKC+/-

DC3+/­DC4+/-

DD0+/­DD1+/-

DD2+/­CKD+/-

DD3+/­DD4+/-

Equivalent of

THC63LVD104S (THine)

Equivalent of

THC63LVD104S (THine)

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Controller

V- Driver

NL192120AC25-02

H - Driver

5760 Line

TFT LCD Panel

1200 Line

H: 1920×3 (R,G,B)
V: 1200

Backlight (Direct light type)

V- Driver

EXTPOL

DLPOUT
VSPOUT

VDD

GND

FG

ote1, Note2

VDDB

BRTC
BRTH
BRTL

BRTP

PWSEL

GNDB

ote1, Note2

External input terminal

External output terminal

DC/DC

Fuse

Fuse

Converter

Inverter

Power
supply for
d

ivers

Note1: Relations between GND (Signal ground), FG (Frame ground) and GNDB (Inverter ground) in

the LCD module are as follows.

GND - FG Connected

GND-GNDB Not connected

FG-GNDB Not connected

Note2: GND and FG must be connected to customer equipment’s ground, and it is recommended that

these grounds are connected together in customer equipment.

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4. DETAILED SPECIFICATIONS

4.1 MECHANICAL SPECIFICATIONS

Parameter Specification Unit

Module size

Display area

Weight 3,450 (typ.), 3,650 (max.) g

Note1: See "8. OUTLINE DRAWINGS".

4.2 ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Rating Unit Remarks

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542 ±0.5 (W) u 362 ±0.5 (H) u 40 ±1.0 (D)

55.5 (max., D)

483.84(H) u 302.4 (V)

NL192120AC25-02

Note1 mm

Note1 mm

Power supply

voltage

Input voltage

for signals

Operating temperature

LCD panel signal processing board VDD

-0.3 to +14.0

Inverter VDDB

LVDS signals

Note1

External input signal

Note2

BRTL signal VBL -0.3 to +1.5 V

BRTP signal VBP -0.3 to +5.5 V

Inverter

BRTC signal VBC -0.3 to +5.5 V

PWSEL signal VBS -0.3 to +5.5 V

Storage temperature Tst -20 to +60

Front surface1 0 to +50 Note3

Front surface2

Rear surface1 TopR 0 to +55

Relative humidity

Note6

Absolute humidity

Note6

Operating altitude

VD

VF

TopF

RH

AH

-

-0.3 to +3.3 V VDD= 12.0V

+60

d 95

d 85

d 70

Note7

d 4,850

V -

VDDB= 12.0 V

qC

qC

qC

%

%

g/m

m

40qC < Ta d 50qC

3

-

Note4

Note5

Ta d 40qC

Ta > 50qC

0qC d Ta d 50qC

Storage altitude

-

d 13,600

m

-20qC d Ta d 60qC

Note1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, DA4+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-,

DB4+/-,CKB+/-, DC0+/-, DC1+/-, DC2+/-, DC3+/-, DC4+/-, CKC+/-, DD0+/-, DD1+/-,

DD2+/-, DD3+/-, DD4+/-, CKD+/­Note2: EXTPOL
Note3: Measured at center of LCD panel surface (including self-heat)
Note4: Maximum measured in LCD panel surface side (including self-heat)
Note5: Measured at center of LCD module's rear shield surface (including self-heat)
Note6: No condensation
Note7: Water amount at Ta= 50°C and RH= 85%

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4.3 ELECTRICAL CHARACTERISTICS

4.3.1 LCD panel signal processing board

Parameter Symbol min. typ. max. Unit Remarks

Power supply voltage VDD 10.8 12.0 13.2 V -

Power supply current IDD -

Permissible ripple voltage VRP - - 100 mVp-p for VDD

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800

Note1

1,500

Note2

NL192120AC25-02

(Ta= 25qC)

mA at VDD= 12.0V

Differential input threshold
voltage for Display signals

Input voltage swing Vi 0 - 2.4 V Note4

Terminating resistance RT - 100 -

External input signal threshold
voltage

External input signal threshold
current

External output signal level

External output signal current

High ViTH - - +100 mV

Low ViTL -100 - - mV

:

High ViCH 2.0 - - V

Low ViCL - - 0.8 V

High IiCH -10 - 10 A

Low IiCL -10 - 10 A

High VoCH 2.4 - - V

Low VoCL - - 0.4 V

High IoCH -12 - - mA

Low IoCL - - 12 mA

at VCM= 1.2V

Note3, Note4

-

Note5

Note6

Note1: Checkered flag pattern [by EIAJ ED-2522]
Note2: Pattern for maximum current
Note3: Common mode voltage for LVDS receiver
Note4: DA0+/-, DA1+/-, DA2+/-, DA3+/-, DA4+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-,

DB4+/-, CKB+/-, DC0+/-, DC1+/-, DC2+/-, DC3+/-, DC4+/-, CKC+/-, DD0+/-, DD1+/-,

DD2+/-, DD3+/-, DD4+/-, CKD+/­Note5: EXTPOL
Note6: DLPOUT, VSPOUT

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4.3.2 Inverter

Parameter Symbol min. typ. max. Unit Remarks

Power supply voltage VDDB 11.4 12.0 12.6 V -

Power supply current IDDB - 4,500 5,000 mA

BRTL signal VBL 0.2 - 1.0 V

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NL192120AC25-02

(Ta= 25qC)

VDDB= 12.0V,
At the maximum
luminance

BRTP signal

Input voltage for

signals

Input current for

signals

BRTC signal

PWSEL signal

BRTL signal IBI -130 - -

BRTP signal

BRTC signal

PWSEL signal

4.3.3 Inverter current wave

High VBPH 2.0 - 5.25 V

Low VBPL 0 - 0.8 V

High VBCH 2.0 - 5.25 V

Low VBCL 0 - 0.8 V

High VBSH 2.0 - 5.25 V

Low VBSL 0 - 0.8 V

P$

High IBPH - - 3,500

Low IBPL -1,580 - -

High IBCH - - 440

Low IBCL -610 - -

High IBSH - - 440

Low IBSL -610 - -

P$

P$

P$

P$

P$

P$

-

4,500 mA (typ.)

0mA

Duty

Luminance control frequency

At the maximum luminance control: 100%
At the minimum luminance control: 20%
Luminance control frequency: 255Hz (typ.)

Note1: Luminance control frequency indicate the input pulse frequency, when select the external pulse

control. See "4.6.2 Detail of BRTP timing".
Note2: The power supply lines (VDDB and GNDB) have large ripple voltage (See "4.3.4 Power

supply voltage ripple".) during luminance control. There is the possibility that the ripple

voltage produces acoustic noise and signal wave noise in audio circuit and so on. Put a

capacitor (5,000 to 6,000PF) between the power supply lines (VDDB and GNDB) to reduce

the noise, if the noise occurred in the circuit.

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4.3.4 Power supply voltage ripple

This product works, even if the ripple voltage levels are beyond the permissible values as following

the table, but there might be noise on the display image.

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NL192120AC25-02

Power supply voltage

VDD 12.0 V

VDDB 12.0 V

(Measure at input terminal of power supply)

Ripple voltage Note1

d 100

d 100

Note1: The permissible ripple voltage includes spike noise.

4.3.5 Fuse

Parameter

VDD

VDDB 11CT 10A SOC

Type Supplier

TF16AT5.00TTD KOA

Fuse

Rating Fusing current Remarks

5.0A

32V

10A

72V

10A,

5sec.max.

20A,

60sec.max.

Note1: The power supply capacity should be more than the fusing current. If it is less than the fusing

current, the fuse may not blow in a short time, and then nasty smell, smoke and so on may

occur.

Unit

mVp-p

mVp-p

Note1

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4.4 POWER SUPPLY VOLTAGE SEQUENCE

4.4.1 LCD panel signal processing board

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NL192120AC25-02

OFF

10.8V

High-impedance

VDD
Note1

LVDS Signals *1,*2
Note2

High-impedance

Control signals *3

0V

VCM

1.2V

0V

0V

ON

10.8V

9.6V

VDD dip < 20ms

0.1ms < Tr < 80ms

VALID period

t 20ms Note3

VALID period

Note2

10ms < t < 35ms

10ms < t < 35ms 0ms < t < 35ms

*1: DA0+/-, DA1+/-, DA2+/-, DA3+/-,DA4+/-, CLKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, DB4+/-, CLKB+/-,

DC0+/-, DC1+/-, DC2+/-, DC3+/-, DC4+/-, CLKC+/-, DD0+/-, DD1+/-, DD2+/-, DD3+/-, DD4+/-, CLKD+/-

*2: LVDS signals should be measured at the terminal of 100: resistance.
*3: PCI, EXPOL

Note1: In terms of voltage variation (voltage drop) while VDD rising edge is below 10.8V, a

protection circuit may work, and then this product may not work.

Note2: LVDS signals must be Low or High-impedance, exclude the VALID period (See above

sequence diagram), in order to avoid that internal circuits is damaged.

If some of signals are cut while this product is working, even if the signal input to it once

again, it might not work normally. VDD should be cut when the display and function

signals are stopped.
Note3: The control signal is input since 20ms after the LVDS signal is input.
Note4: The backlight should be turned on within the valid period of LVDS signals, in order to

avoid unstable data display.

ON

10.8V

Toff > 200ms

4.4.2 Inverter

Voltage

12.0 V

tr d 1ms

BRTC

VDDB

11.4 V

0 V

Time

0ms<t

0ms<t

Note1: The backlight should be turned on within the valid period of LVDS signals, in order to

avoid unstable data display.
Note2: If tr is more than 1ms, the backlight will be turned off by a protection circuit for inverter.

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4.5 CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS

4.5.1 LCD panel signal processing board

CN1 socket (LCD module side): FI-RE51S-HF (Japan Aviation Electronics Industry Limited (JAE))
Adaptable plug: FI-RE51HL, FI-RE51CL (Japan Aviation Electronics Industry Limited (JAE))

Pin No. Symbol Signal Remarks

1 GND Ground Note1

2 GND Ground Note1

3 GND Ground Note1

4 DA0-

5 DA0+

6 GND Ground Note1

7 DA1-

8 DA1+

9 GND Ground Note1

10 DA2-

11 DA2+

12 GND Ground Note1

13 CLKA-

14 CLKA+

15 GND Ground Note1

16 DA3-

17 DA3+

18 GND Ground Note1

19 DA4-

20 DA4+

21 GND Ground Note1

22 DB0-

23 DB0+

24 GND Ground Note1

25 DB1-

26 DB1+

27 GND Ground Note1

28 DB2-

29 DB2+

30 GND Ground Note1

31 CLKB-

32 CLKB+

33 GND Ground Note1

34 DB3-

35 DB3+

36 GND Ground Note1

37 DB4-

38 DB4+

39 GND Ground Note1

40 GND Ground Note1

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NL192120AC25-02

Pixel data A0 LVDS differential data input Note2

Pixel data A1 LVDS differential data input Note2

Pixel data A2 LVDS differential data input Note2

Pixel clock A LVDS differential data input Note2

Pixel data A3 LVDS differential data input Note2

Pixel data A4 LVDS differential data input Note2

Pixel data B0 LVDS differential data input Note2

Pixel data B1 LVDS differential data input Note2

Pixel data B2 LVDS differential data input Note2

Pixel clock B LVDS differential data input Note2

Pixel data B3 LVDS differential data input Note2

Pixel data B4 LVDS differential data input Note2

To be continued

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Pin No. Symbol Signal Remarks

41 GND Ground Note1

42 RESERVED RESERVED Keep this pin Open.

43 RESERVED RESERVED Keep this pin Open.

44 RESERVED RESERVED Keep this pin Open.

45 RESERVED RESERVED Keep this pin Open.

46 GND Ground Note1

47 EXTPOL External polarity control input signal Note3, Note4

48 DLPOUT Data latch pulse output signal Note4

49 VSPOUT Gate start pulse output signal Note4

50 RESERVED RESERVED Keep this pin Open.

51 GND Ground Note1

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NL192120AC25-02

Continued

CN1: Connection inserting side

connector

LCD panel signal processing board

1 2 3 4 48 49 50 51

Note1: All GND terminals should be used without any non-connected lines.
Note2: Twist pair wires with 100: (Transmission impedance) should be used between LCD panel

signal processing board and LVDS transmitter.

Note3: This terminal is pulled-down in the product. (10.0k:)
Note4: See "4.8 POLARITY REVERSING CONTROL"

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CN2 socket (LCD module side): FI-RE41S-HS (Japan Aviation Electronics Industry Limited (JAE))
Adaptable plug: FI-RE41HL, FI-RE41CL (Japan Aviation Electronics Industry Limited (JAE))

Pin No. Symbol Signal Remarks

1 GND Ground Note1
2 GND Ground Note1
3 GND Ground Note1
4 DC0­5 DC0+
6 GND Ground Note1
7 DC1­8 DC1+

9 GND Ground Note1
10 DC2­11 DC2+
12 GND Ground Note1
13 CLKC­14 CLKC+
15 GND Ground Note1
16 DC3­17 DC3+
18 GND Ground Note1
19 DC4­20 DC4+
21 GND Ground Note1
22 DD0­23 DD0+
24 GND Ground Note1
25 DD1­26 DD1+
27 GND Ground Note1
28 DD2­29 DD2+
30 GND Ground Note1
31 CLKD­32 CLKD+
33 GND Ground Note1
34 DD3­35 DD3+
36 GND Ground Note1
37 DD4­38 DD4+
39 GND Ground Note1
40 GND Ground Note1
41 GND Ground Note1

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NL192120AC25-02

Pixel data C0 LVDS differential data input Note2

Pixel data C1 LVDS differential data input Note2

Pixel data C2 LVDS differential data input Note2

Pixel clock C LVDS differential data input Note2

Pixel data C3 LVDS differential data input Note2

Pixel data C4 LVDS differential data input Note2

Pixel data D0 LVDS differential data input Note2

Pixel data D1 LVDS differential data input Note2

Pixel data D2 LVDS differential data input Note2

Pixel clock D LVDS differential data input Note2

Pixel data D3 LVDS differential data input Note2

Pixel data D4 LVDS differential data input Note2

CN2: Connector inserting side

connector

LCD panel signal processing board

1 2 3 4 38 39 40 41

Note1: All GND terminals should be used without any non-connected lines.
Note2: Twist pair wires with 100: (Characteristic impedance) should be used between LCD panel

signal processing board and LVDS transmitter.

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CN3 socket (LCD module side): IL-Z-12PL1-SMTYE (Japan Aviation Electronics Industry Limited (JAE))
Adaptable plug: IL-Z-12S-S125C3 (Japan Aviation Electronics Industry Limited (JAE))

Pin No. Symbol Function Description

1 VDD

2 VDD

3 VDD

4 VDD

5 VDD

6 VDD

7 GND

8 GND

9 GND
10 GND
11 GND
12 GND

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Power supply

Signal ground Note1

+12V
Note1

NL192120AC25-02

CN3: Connector inserting side

connector

LCD panel signal processing board

12 11 2 1

Note1: All VDD and GND terminals should be used without any non-connected lines.

4.5.2 Inverter

CN201 socket (LCD module side): DF3Z-10P-2H (2) (Hirose Electric Co., Ltd.(HRS))
Adaptable plug: DF3-10S-2C (HIROSE ELECTRIC Co., Ltd. (HRS))

Pin No. Symbol Function Description

1 GNDB

2 GNDB

3 GNDB

4 GNDB

5 GNDB

6 VDDB

7 VDDB

8 VDDB

9 VDDB
10 VDDB

Inverter ground Note1

Power supply Note1

Note1: All GNDB and VDDB terminals should be used without any non-connected lines.

CN202 socket (LCD module side): IL-Z-9PL-SMTYE (Japan Aviation Electronics Industry Limited (JAE))
Adaptable plug: IL-Z-9S-S125C3 (Japan Aviation Electronics Industry Limited (JAE))

Pin No. Symbol Function Description

1 GNDB

2 GNDB

3 N.C. - Keep this pin Open.

4 BRTC Backlight ON/OFF control signal

5 BRTH

6 BRTI

7 BRTP BRTP signal

8 GNDB Inverter ground Note1

9 PWSEL Selection of luminance control signal method Note2

Inverter ground Note1

Luminance control terminal

High or Open: Backlight ON
Low: Backlight OFF

-

Note1: All GNDB terminals should be used without any non-connected lines.
Note2: When VDDB is 0V or BRTC is Low, PWSEL must be set to Low or Open.

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4.5.3 Positions of socket

Backlight
inverter

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NL192120AC25-02

Rear side

Signal processing board

CN201

CN202

10
1

1
9

CN2 CN3

Insert direction

CN1

1 51 1 41

Insert direction

12 1

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4.6 LUMINANCE CONTROL

4.6.1 Luminance control methods

Method Adjustment and luminance ratio PWSEL terminal BRTP terminal

x Adjustment

The variable resistor (R) for luminance control should be 10k:
r5%, 1/10W. Minimum point of the resistance is the minimum
luminance and maximum point of the resistance is the maximum
luminance.
The resistor (R) must be connected between BRTH-BRTI

Variable resistor

control

Note1

terminals.

BRTH

x Luminance ratio Note3

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R

Resistance Luminance ratio

1.0k:Note4
10k:

BRTL

20% (Min. Luminance)

100% (Max. Luminance)

NL192120AC25-02

High or Open Open

x Adjustment

Voltage control method works, when BRTH terminal is 0V and
VBI voltage is input between BRTI-BRTH terminals. This
control method can carry out continuation adjustment of

Voltage control

Note1

Pulse width
modulation

Note1
Note2
Note5

luminance.
Luminance is the maximum when BRTI terminal is Open.

x Luminance ratio Note3

BRTI Voltage (VBI) Luminance ratio

0.2V Note4 20% (Min. Luminance)

1.0V 100% (Max. Luminance)

x Adjustment

Pulse width modulation (PWM) method works, when PWSEL
terminal is Low and PWM signal (BRTP signal) is input into
BRTP terminal. The luminance is controlled by duty ratio of
BRTP signal.

x Luminance ratio Note3

Duty ratio Luminance ratio

0.2 Note4 20% (Min. Luminance)

1.0 100% (Max. Luminance)

Low PWM signal

Note1: In case of the variable resistor control method and the voltage control method, noises may

appear on the display image depending on the input signals timing for LCD panel signal
processing board.

Use PWM method, if interference noises appear on the display image!

Note2: The inverter will stop working, if the Low period of BRTP signal is continue from 1s to 3s

while BRTC signal is High or Open. Then the backlight will not turn on anymore, even if
BRTP signal is input again. This is not out of order. The inverter will start to work when power
is supplied again.

Note3: These data are the target values.
Note4: Do not set the variable resistor, BRTI voltage and Pulse width modulation in less than 1.0k:,

less than 0.2V or less than 0.2 (Duty ratio). Otherwise flicker or display mura may cause, or
the lamp may not be turned on.

Note5: See "4.6.2 Detail of BRTP timing".

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4.6.2 Detail of BRTP timing

(1) Timing diagrams

x Outline chart

BRTC

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NL192120AC25-02

PWSEL (Low)

A

BRTP

0ms d tPWL d 1s

x Detail of A part

VBPH

BRTP

VBPL

tPWH

tPW

tPWL

(2) Each parameter

Parameter Symbol min. typ. max. Unit Remarks

Luminance control frequency FL 190 - 305 Hz Note1, Note2

Duty ratio DL 0.2 - 1.0 - Note1, Note3

High period tPWH 784 - - us Note4

Low period tPWL 0 - 1.0 s Note5

Note1: Definition of parameters is as follows.

FL=

1

tPW

,

DL=

tPWH

tPW

0ms d tPWL d 1s 0ms d tPWL d 1s

Note2: See the following formula for luminance control frequency.

Luminance control frequency= 1/tv u (n+0.25) [or (n+0.75)]

n = 1, 2, 3 · · · · · ·
tv: Vertical cycle (See "4.12.1 Timing characteristics".)

The interference noise of luminance control frequency and input signal frequency for
LCD panel signal processing board may appear on a display. Set up luminance control
frequency so that the interference noise does not appear!

Note3: See "4.6.1 Luminance control methods".
Note4: tPWH secures more than 784us.
Note5: If tPWL is continue from 1s to 3s, the backlight will be turned off by a protection circuit for

inverter. The inverter will start to work when power is supplied again.

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4.7 CONNECTION BETWEEN RECEIVER AND TRANSMITTER FOR LVDS

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NL192120AC25-02

Pixel

data

Pixel

data

A

B

Transmitter Pin Assign

Bit mapping

RA4 TA0 R14 - ­RA5 TA1 R15
RA6 TA2 R16
RA7 TA3 R17
RA8 TA4 R18
RA9 TA5 R19
GA4 TA6 G14
GA5 TB0 G15
GA6 TB1 G16
GA7 TB2 G17
GA8 TB3 G18
GA9 TB4 G19
BA4 TB5 B14
BA5 TB6 B15
BA6 TC0 B16
BA7 TC1 B17
BA8 TC2 B18

BA9 TC3 B19
Hsync TC4 Hsync
Vsync TC5 Vsync

DE TC6 DE
RA2 TD0 R12
RA3 TD1 R13
GA2 TD2 G12
GA3 TD3 G13
BA2 TD4 B12
BA3 TD5 B13
N.C. TD6 -
RA0 TE0 R10

RA1 TE1 R11
GA0 TE2 G10

GA1 TE3 G11
BA0 TE4 B10
BA1 TE5 B11
N.C.

CLK CLK CLK

RB4 TA0 R14 - ­RB5 TA1 R15
RB6 TA2 R16
RB7 TA3 R17
RB8 TA4 R18
RB9 TA5 R19
GB4 TA6 G14
GB5 TB0 G15
GB6 TB1 G16
GB7 TB2 G17
GB8 TB3 G18
GB9 TB4 G19
BB4 TB5 B14
BB5 TB6 B15
BB6 TC0 B16
BB7 TC1 B17
BB8 TC2 B18
BB9 TC3 B19

Hsync TC4 Hsync
Vsync TC5 Vsync

DE TC6 DE
RB2 TD0 R12
RB3 TD1 R13
GB2 TD2 G12
GB3 TD3 G13
BB2 TD4 B12
BB3 TD5 B13
N.C. TD6 -
RB0 TE0 R10
RB1 TE1 R11
GB0 TE2 G10
GB1 TE3 G11
BB0 TE4 B10
BB1 TE5 B11
N.C. TE6 -

CLK

Dual type LVDS Tx CN1

Single type

LVDS Tx

TE6 -

CLK CLK

Thine

THC63LVD104S

Output

Connector

ATA-  4 DA0-

ATA+  5 DA0+

ATB-  7 DA1-

ATB+  8 DA1+

ATC-  10 DA2-

ATC+  11 DA2+

ATD-  16 DA3-

ATD+  17 DA3+

AT E -

AT E +

ATCLK-  13 CKA-

ATCLK+  14 CKA+

BTA-  22 DB0-

BTA+  23 DB0+

BTB-  25 DB1-

BTB+  26 DB1+

BTC-  28 DB2-

BTC+  29 DB2+

BTD-  34 DB3-

BTD+  35 DB3+

BTE-

BTE+

BTCLK-

BTCLK+

Pin No.












Signal

Name

- -

- -

- -

- -

19 DA4-

20 DA4+

- -

- -

- -

- -

- -

37 DB4-

38 DB4+

- -

31 CKB­32 CKB+

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NL192120AC25-02

Pixel

Data

Pixel

Data

C

D

Transmitter Pin Assign

Bit mapping

RC4 TA0 R14 - ­RC5 TA1 R15
RC6 TA2 R16
RC7 TA3 R17
RC8 TA4 R18
RC9 TA5 R19
GC4 TA6 G14
GC5 TB0 G15
GC6 TB1 G16
GC7 TB2 G17
GC8 TB3 G18
GC9 TB4 G19
BC4 TB5 B14
BC5 TB6 B15
BC6 TC0 B16
BC7 TC1 B17
BC8 TC2 B18
BC9 TC3 B19

Hsync TC4 Hsync
Vsync TC5 Vsync

DE TC6 DE
RC2 TD0 R12
RC3 TD1 R13
GC2 TD2 G12
GC3 TD3 G13
BC2 TD4 B12
BC3 TD5 B13
N.C. TD6 -
RC0 TE0 R10
RC1 TE1 R11
GC0 TE2 G10
GC1 TE3 G11
BC0 TE4 B10
BC1 TE5 B11
N.C.

CLK CLK CLK

RD4 TA0 R14 - ­RD5 TA1 R15
RD6 TA2 R16
RD7 TA3 R17
RD8 TA4 R18
RD9 TA5 R19
GD4 TA6 G14
GD5 TB0 G15
GD6 TB1 G16
GD7 TB2 G17
GD8 TB3 G18
GD9 TB4 G19
BD4 TB5 B14
BD5 TB6 B15
BD6 TC0 B16
BD7 TC1 B17
BD8 TC2 B18
BD9 TC3 B19

Hsync TC4 Hsync
Vsync TC5 Vsync

DE TC6 DE
RD2 TD0 R12
RD3 TD1 R13
GD2 TD2 G12
GD3 TD3 G13
BD2 TD4 B12
BD3 TD5 B13
N.C. TD6 -
RD0 TE0 R10
RD1 TE1 R11
GD0 TE2 G10
GD1 TE3 G11
BD0 TE4 B10
BD1 TE5 B11
N.C. TE6 -

CLK

Dual type LVDS Tx CN2

Single type

LVDS Tx

TE6 -

CLK CLK

Thine

THC63LVD104S

Output

Connector

CTA-  4 DC0-

CTA+  5 DC0+

CTB-  7 DC1-

CTB+  8 DC1+

CTC-  10 DC2-

CTC+  11 DC2+

CTD-  16 DC3-

CTD+  17 DC3+

CTE-

CTE+

CTCLK-  13 CKC-

CTCLK+  14 CKC+

DTA-  22 DD0-

DTA+  23 DD0+

DTB-  25 DD1-

DTB+  26 DD1+

DTC-  28 DD2-

DTC+  29 DD2+

DTD-  34 DD3-

DTD+  35 DD3+

DTE-

DTE+

DTCLK-

DTCLK+

Pin No.












Signal

Name

- -

- -

- -

- -

19 DC4-

20 DC4+

- -

- -

- -

- -

- -

37 DD4-

38 DD4+

- -

31 CKD­32 CKD+

Note1: Twist pair wires with 100: (Characteristic impedance) should be used between LCD panel

signal processing board and LVDS transmitter.

Note2: All DA4+/-, DB4+/-, DC4+/-, and DD4+/- in the open when using it with 8bit Use it. However,

because subordinate position 2bit of 10bit becomes HI fixation, 3 gray scales of 10bit become
minimum gray scale.

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N

N

N

N

4.8 POLARITY REVERSING CONTROL

This product is possible to control the polarity inversion by entering an external signal into No.47 pin.

4.8.1 Polarity reversing outside control
Controlling the polarity reversing from the outside becomes possible by inputting the signal to 47

pins of CN1.

The control circuit is shown as follows. (PC-IN: Polarity Control In, PC-OUT: Polarity Control

Out are internal signals)

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NL192120AC25-02

In order to make the synchronization, there are control outputs pin 48 and 49 on CN1. There are
VSPOUT and DLPOUT timing and EXTPOL transition timing below.

Frame

VSPOUT

DLPOUT

EXTPOL

one transitioning

period

Frame m

Determines the polarity of n-1

line

1Htotal=th

n-1 line

436CLK 1Htotal=th

50ns

one transitioning

period

Frame m +1

44CLK

6ns

Determines the polarity of n-1

50ns6ns

line

n1 n

ote: m and n are natural number.

Note: Utilizing this function, you may change the polarity inversion any forms, however, it causes

the degradation of picture quality due to un-proper AC driving the LC cell. Please make the
necessary evaluation before using EXTPOL function.

n line

one transitioning

period

6ns

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4.9 DISPLAY COLORS AND INPUT DATA SIGNALS

This product can display in equivalent to 1,073,741,824 colors in 1,024 gray scales. Also the relation

between display colors and input data signals is as the following table.

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NL192120AC25-02

Display

colors

Black

Blue

Red

Magenta

Green

Cyan

Basic Colors

Yellow

White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

Black

dark

bright

Red gray scale

Red

Black

dark

bright

Green gray scale

Green

Black

dark

RA9 RA8 RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0
RB9 RB8 RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
RC9 RC8 RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0
RD9 RD8 RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

n
p

n
p

1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0

GA9 GA8 GA7 GA6 GA5 GA4 GA3 GA2 GA1 GA0
GB9 GB8 GB7 GB6 GB5 GB4 GB3 GB2 GB1 GB0
GC9 GC8 GC7 GC6 GC5 GC4 GC3 GC2 GC1 GC0
GD9 GD8 GD7 GD6 GD5 GD4 GD3 GD2 GD1 GD0

: : :

: : :

: : :

: : :

BA9 BA8 BA7 BA6 BA5 BA4 BA3 BA2 BA1 BA0
BB9 BB8 BB7 BB6 BB5 BB4 BB3 BB2 BB1 BB0
BC9 BC8 BC7 BC6 BC5 BC4 BC3 BC2 BC1 BC0
BD9 BD8 BD7 BD6 BD5 BD4 BD3 BD2 BD1 BD0

: : :

Data signal (0: Low level, 1: High level)

n
p

bright

Blue gray scale

Blue

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 1

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

: : :

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4.10 DISPLAY POSITIONS

Left half of display (0 d n < 480, 0d m < 1200) Right half of display (480 d n < 960, 0 d m1 < 200)

pixel (even)

D(2n,m)

pixel (odd)
D(2n+1,m)

RA GA BA RB GB BB RC GC BC RD GD BD

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pixel (even)

D(2n,m)

NL192120AC25-02

pixel (odd)
D(2n+1,m)

D(0,0) D(1,0)
D(0,1) D(1,1)

෬
෬
෬

෬
෬
෬

D(0,1199) D(1,1199)

෬෬෬
෬෬෬

෬
෬
෬

෬෬෬

D(959,0) D(960,0) D(961,0)
D(959,1) D(960,1) D(961,1)

෬
෬
෬

D(959,1199) D(960,1199) D(961,1199)

Note1: n, m: counting number

4.11 LVDS DATA TRANSMISSION METHOD

RA(9:0)

Pixel data A

Pixel data B

Pixel data C

GA(9:0)
BA(9:0)

CLK

RB(9:0)
GB(9:0)
BB(9:0)

CLK

RC(9:0)
GC(9:0)
BC(9:0)

D0(9:0)

D(1919,0)
D(1919,1)

෬
෬
෬

D(1919,1199)

෬
෬
෬

෬
෬
෬

෬෬෬
෬෬෬

෬
෬
෬

෬෬෬

D4(9:0) D2(9:0)

D3(9:0) D1(9:0)

D5(9:0)

D964(9:0)D962(9:0)D960(9:0)

CLK

RD(9:0)

Pixel data D

GD(9:0)
BD(9:0)

CLK

D965(9:0)D963(9:0)D961(9:0)

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4.12 INPUT SIGNAL TIMINGS

4.12.1 Timing characteristics

Parameter Symbol min. typ. max. Unit Remarks

Frequency

CLK

Horizontal

Vertical

DE

Rise time, Fall time - ns

Display period thd 480 CLK

Display period tvd 1,200 H

Setup time - ns

Hold time - ns

Rise time, Fall time -

Note1: See the data sheet of LVDS transmitter.
Note2: The sum of jitter and skew of horizontal period should be within r1 CLK.
Note3: See the data sheet of LVDS transmitter.
Note4: Set up pulse value of the horizontal signal in 4n (n= 1, 2, 3...).

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1/tc 60 77.0 82.5 MHz

tc - 12.987 - ns

Duty -

Cycle th

Cycle tv

6.255 6.753 9.351

516 520 720 CLK

7.530 8.340 10.805 ms

1,204 1,235 1,600 H

NL192120AC25-02

Note1

-

-

-

Ps

ns

Note3

148.077 kHz (typ.)
Note1, Note2,

Note4

119.900Hz (typ.)

-

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)

(

)

4.12.2 Input signal timing chart

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NL192120AC25-02

tv

DE

Invalid Invalid Invalid Invalid

DE

DotCLK

DATA(A)to(D)

tvd = 1200H

fixed

th

thd = 480CLK (fixed

tc

Invalid Invalid

CLKx+

CLKx+

x=A,B,C,D

Vdiff=0V

Vdiff=0V

r 0.3 u tc

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4.13 OPTICS

4.13.1 Optical characteristics

Parameter Condition Symbol min. typ. max. Unit

Luminance

Contrast ratio

Luminance uniformity

White

Red

Chromaticity

Green

Blue

Color gamut

Response time

Right

Viewing angle

Left

Up

Down

RGB= 1023 gray scale at center

TR = 0q, TL = 0q,TU = 0q, TD = 0q

RGB= 1023 Gray scale / RGB=0 gray scale center

TR = 0q, TL = 0q,TU = 0q, TD = 0q

RGB= 1023 gray scale

TR = 0q, TL = 0q,TU = 0q, TD = 0q

RGB= 0 gray scale

TR = 0q, TL = 0q,TU = 0q, TD = 0q

RGB= 1023 gray scale at center

TR = 0q, TL = 0q,TU = 0q, TD = 0q

R= 1023 gray scale at center

TR = 0q, TL = 0q,TU = 0q, TD = 0q

G= 1023 gray scale at center

TR = 0q, TL = 0q,TU = 0q, TD = 0q

B= 1023 gray scale at center

TR = 0q, TL = 0q,TU = 0q, TD = 0q

TR = 0q, TL = 0q,TU = 0q, TD = 0q

at center,

RGB=0 gray scale to RGB=1023 gray scale Ton - 6 12

RGB=1023 gray scale to RGB=0 gray scale Toff - 6 12

TU = 0q, TD = 0q, CR t 10 TR
TU = 0q, TD = 0q, CR t 10 TL

TR = 0q, TL = 0q, CR t 10 TU
TR = 0q, TL = 0q, CR t 10 TD

Note1: These are initial characteristics.
Note2: Measurement conditions are as follows.

Ta=25qC, VDD=12.0V, VDDB=120V, Luminance control = maximum, Display mode:
WUXGA,
Horizontal cycle = 148.077 kHz, Vertical cycle = 119.900 Hz.
Optical characteristics are measured after 20minutes from working the product, in the dark
room. Also measurement methods are as follows.

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x coordinate

y coordinate

x coordinate

y coordinate

x coordinate

y coordinate

x coordinate

y coordinate

against Adobe RBG

NL192120AC25-02

(Note1, Note2)

Measuring
instrument

BM-5A

L 350 420 - cd/m

CR 600 800 - -

75 - -

LU

50 - -

Wx 0.283 0.313 0.343 -

Wy 0.299 0.329 0.359 -

Rx - 0.655 - -

Ry - 0.334 - -

Gx - 0.210 - -

Gy - 0.686 - -

Bx - 0.148 - -

By - 0.064 - -

C - 97 - %

70 88 -

70 88 -

70 88 -

70 88 -

2

or SR-3
BM-5A

or SR-3

BM-5A

%

or SR-3

SR-3 Note5

ms BM-5A

q
q

SR-3 Note8

q
q

Remarks

-

Note3

Note4

Note6
Note7

50cm

Photodetector (BM-5A or SR-3)

or equivalent

LCD module

(Product)

1q

Note3: Product surface temperature: TopF=40qC
Note4: See "4.13.2 Definition of contrast ratio".
Note5: See "4.13.3 Definition of luminance uniformity".
Note6: These coordinates are found on CIE 1931 chromaticity diagram.
Note7: See "4.13.4 Definition of response times".
Note8: See "4.13.5 Definition of viewing angles".

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N

4.13.2 Definition of contrast ratio

The contrast ratio is calculated by using the following formula.

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NL192120AC25-02

Contrast ratio (CR) =

4.13.3 Definition of luminance uniformity

The luminance uniformity is calculated by using following formula.

Luminance uniformity (LU) =

The luminance is measured at near the 9 points shown below.

192

120

360

600

720

1080

཰

ཱིུ

ྲྀ

Luminance of white screen
Luminance of black screen

Minimum luminance from ཰ to ླྀ
Maximum luminance from ཰ to ླྀ

576 960 1344 1728

ཱ

ཷླྀ

ི

ཱུ

4.13.4 Definition of response times

Response time is measured, the luminance changes from "black" to "white", or "white" to "black"
on the same screen point, by photo-detector. Ton is the time it takes the luminance change from
10% up to 90%. Also Toff is the time it takes the luminance change from 90% down to 10% (See
the following diagram.).

100%

White

Luminance

Black

90%

10%

0%

4.13.5 Definition of viewing angles

ormal axis (Perpendicular)

TL

Left

TD

TU

Ton

12 o’clock

Upper

TR

Tof f

Lower

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Right

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5. ESTIMATED LUMINANCE LIFETIME

The luminance lifetime is the time from initial luminance to half-luminance.

This lifetime is the estimated value, and is not guarantee value.

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NL192120AC25-02

Luminance lifetime (MTTF)

Note1, Note2

35,000 h

25,000 h

45,000 h

Module

Cold cathode

fluorescent lamp

Condition

25qC (Ambient temperature of the product)

Continuous operation, Luminance maximum

50qC (Surface temperature at screen center)

Continuous operation, Luminance maximum

25qC (Ambient temperature of the lamp)

Continuous operation, IBL=5.0mArms

Note1: MTTF is mean time to half-luminance.
Note2: In case the product works under low temperature environment, the lifetime becomes short.

Unit

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6. RELIABILITY TESTS

Test item Condition Note1, None2 Judgment Note3

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NL192120AC25-02

High temperature and humidity

(Operation)

Heat cycle

(Operation)

Thermal shock

(Non operation)

Vibration

(Non operation)

Mechanical shock

(Non operation)

ESD

(Operation)

Dust

(Operation)

Non-operation

Low pressure

Operation

཰ 60 r 2qC, RH= 60%, 240hours
ཱ Display data is white.

཰ 0 r 3qC}1hour

50 r 3qC}1hour

ཱ 50cycles, 4 hours/cycle
ི Display data is white.

཰ -20 r 3qC}30minutes

60 r 3qC}30minutes

ཱ 100cycles, 1hour/cycle
ི Temperature transition time is within 5

minutes.

཰ 5 to 100Hz, 11.76m/s
ཱ 1 minute/cycle
ི X, Y, Z directions
ཱི 10 times each directions

2

཰ m/ s
ཱ X, Y, Z directions
ི  times each directions

཰ 150pF, 150:, r10kV
ཱ 9 places on a panel surface Note4
ི 10 times each places at 1 sec interval

཰ Sample dust: No. 15 (by JIS-Z8901)
ཱ 15 seconds stir
ི 8 times repeat at 1 hour interval

཰ 15 kPa (Equivalent to altitude 13,600m)
ཱ -20qCr3qC}24 hours
ི +60qCr3qC}24 hours

཰ 53.3 kPa (Equivalent to altitude 4,850m)
ཱ 0qCr3qC}24 hours

ི +55qCr3qC}24 hours

, 11ms

2

No display malfunctions

No display malfunctions
No physical damages

No display malfunctions

཰ 15 kPa (Equivalent to altitude

13,600m)

ཱ -20qCr3qC}24 hours
ི +60qCr3qC}24 hours

཰ 53.3 kPa (Equivalent to

altitude 4,850m)

ཱ 0qCr3qC}24 hours
ི +55qCr3qC}24 hours

Note1: In the environmental test chamber, it is assumed the air circulation method in each setting

condition, and assumes the evaluated module surrounding to be a state kept constant.
Note2: Inspection conditions are as follows.
VDD= 12.0V, VDDB= 120V, Display mode: WUXGA, Horizontal cycle= 148.077 kHz,

Vertical cycle= 119.900 Hz
Note3: Display and appearance are checked under environmental conditions equivalent to the

inspection conditions of defect criteria.
Note4: See the following figure for discharge points

{

{

{

DATA SHEET DOD-PP-0872 (2nd edition)

{

{

{

{

{

{

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!






I

7. PRECAUTIONS

7.1 MEANING OF CAUTION SIGNS

The following caution signs have very important meaning. Be sure to read "7.2 CAUTIONS" and

"7.3 ATTENTIONS", after understanding these contents!

This sign has the meaning that customer will be injured by personnel or the product will

sustain a damage, if customer has wrong operations.

This sign has the meaning that customer will get an electrical shock, if customer has

wrong operations.

This sign has the meaning that customer will be injured by personnel, if customer has

wrong operations.

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NL192120AC25-02

7.2 CAUTIONS

Do not touch the working backlight. There is a danger of an electric shock.

Do not touch the working backlight. There is a danger of burn injury.
Do not shock and press the LCD panel and the backlight! There is a danger of breaking,

because they are made of glass. (Shock: To be not greater 294m/s
11ms, Pressure: To be not greater 19.6N (

7.3 ATTENTIONS

7.3.1 Handling of the product

཰ Take hold of both ends without touching the circuit board when the product (LCD module) is

picked up from inner packing box to avoid broken down or misadjustment, because of stress to
mounting parts on the circuit board.

ཱ Do not hook nor pull cables such as lamp cable, and so on, in order to avoid any damage.
ི When the product is put on the table temporarily, display surface must be placed downward.
ཱི When handling the product, take the measures of electrostatic discharge with such as earth band,

ionic shower and so on, because the product may be damaged by electrostatic.

ུ The torque for product mounting screws must never exceed 0.67 Nm. Higher torque might result

in distortion of the bezel. And the length of product mounting screws must be d 7.0mm.

!

16mm jig))

2

and to be not greater

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ཱུ The product must be installed using mounting holes without undue stress such as bends or twist

(See outline drawings). And do not add undue stress to any portion (such as bezel flat area). Bends
or twist described above and undue stress to any portion may cause display mura. Recommended
installing method: An ideal plane that is defined by datum point and mounting holes is to be the
same plane within r0.3 mm.

Product

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NL192120AC25-02

Mounting hole

An ideal plane defined by datum
point and mounting holes

Datum point

Mounting hole

ྲྀ Do not press or rub on the sensitive product surface. When cleaning the product surface, use of the

cloth with ethanolic liquid such as screen cleaner for LCD is recommended.

ཷ Do not push nor pull the interface connectors while the product is working.
ླྀ When handling the product, use of an original protection sheet on the product surface (polarizer) is

recommended for protection of product surface. Adhesive type protection sheet may change color
or characteristics of the polarizer.

ཹ Usually liquid crystals don't leak through the breakage of glasses because of the surface tension of

thin layer and the construction of LCD panel. But, if you contact with liquid crystal for the worst,
please wash it out with soap.

7.3.2 Environment

཰ Do not operate or store in high temperature, high humidity, dewdrop atmosphere or corrosive

gases. Keep the product in packing box with antistatic pouch in room temperature to avoid dusts
and sunlight, when storing the product.

ཱ In order to prevent dew condensation occurring by temperature difference, the product packing

box should be opened after enough time being left under the environment of an unpacking room.
Evaluate the leaving time sufficiently because a situation of dew condensation occurring is
changed by the environmental temperature and humidity. (Recommended leaving time: 6 hours or
more with packing state)

ི Do not operate in high magnetic field. Circuit boards may be broken down by it.
ཱི This product is not designed as radiation hardened.

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7.3.3 Characteristics

The following items are neither defects nor failures.

཰ Response time, luminance and color may be changed by ambient temperature.
ཱ Display mura, flicker, vertical seam or small spot may be observed depending on display patterns.
ི Optical characteristics (e.g. luminance, display uniformity, etc.) gradually is going to change

depending on operating time, and especially low temperature, because the LCD has cold cathode
fluorescent lamps.

ཱི Do not display the fixed pattern for a long time because it may cause image sticking. Use a screen

saver, if the fixed pattern is displayed on the screen.

ུ The display color may be changed depending on viewing angle because of the use of condenser

sheet in the backlight.

ཱུ Optical characteristics may be changed depending on input signal timings.
ྲྀ The interference noise between input signal frequency for this product's signal processing board

and luminance control frequency of the inverter may appear on a display. Set up luminance control
frequency of the inverter so that the interference noise does not appear.

ཷ After the product is stored under condition of low temperature or dark place for a long time, the

cold cathode fluorescent lamp may not be turned on under the same condition because of the
general characteristic of cold cathode fluorescent lamp. In addition, when Luminance control ratio
is low in pulse width modulation method inverter, the lamp may not be turned on. In this case,
power should be supplied again.

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NL192120AC25-02

7.3.4 Other

཰ All GND, GNDB, VDD and VDDB terminals should be used without any non-connected lines.
ཱ Do not disassemble a product or adjust variable resistors.
ི Pack the product with original shipping package, in order to avoid any damages during

transportation, when returning the product to NEC for repair and so on.

ཱི The LCD module by itself or integrated into end product should be packed and transported with

display in the vertical position. Otherwise the display characteristics may be degraded.

ུ The information of China RoHS directive six hazardous substances or elements in this product is

as follows.

China RoHS directive six hazardous substances or elements

Lead

(Pb)

ᅜᅜഊഊഊഊ

Mercury

(Hg)

Cadmium

(Cd)

Hexavalent

Chromium

(Cr VI)

Polybrominated

Biphenys

(PBB)

Polybrominated

Biphenyl Ethers

(PBDE)

Note1: ഊ : This indicates that the poisonous or harmful material in all the homogeneous materials

for this part is equal or below the limitation level of SJ/T11363-2006 standard
regulation.

ᅜ : This indicates that the poisonous or harmful material in all the homogeneous

materials for this part is above the limitation level of SJ/T11363-2006 standard
regulation.

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p

NL192120AC25-02

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33

Unit: mm

DATA SHEET DOD-PP-0872 (2nd edition)

arentheses are for reference.

8.1 FRONT VIEW

8. OUTLINE DRAWINGS

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Note2: The torque for product mounting screws must never exceed 0.67 Nm.

Note3: The length of product mounting screws from surface of plate must be d 7.0 mm.

Note4: The values in

Note1: Not shown tolerances of the dimensions are r0.5mm.

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NL192120AC25-02

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34

Unit: mm

DATA SHEET DOD-PP-0872 (2nd edition)

8.2 REAR VIEW

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Note1: Not shown tolerances of the dimensions are r0.5mm.

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