NEC NL160120BC27-14 Specification
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TFT COLOR LCD MODULE
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NL160120BC27-14
54cm (21.3 Type)
UXGA
LVDS Interface (2 ports)
DATA SHEET
DOD-PD-1400 (2nd edition)
This DATA SHEET is updated document from
DOD-PD-1335(1).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PD-1400 (2nd edition)
Published date: March 2006 CP(N)
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¤ NEC LCD Technologies, Ltd.
2006 All rights reserved.
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The Copyright to this document belongs to NEC LCD Technologies, Ltd. (hereinafter called "NEC").
No part of this document will be used, reproduced or copied without prior written consent of NEC.
NEC does and will not assume any liability for infringement of patents, copyrights or other intellectual
property rights of any third party arising out of or in connection with application of the products
described herein except for that directly attributable to mechanisms and workmanship thereof. No license,
express or implied, is granted under any patent, copyright or other intellectual property right of NEC.
Some electronic parts/components would fail or malfunction at a certain rate. In spite of every effort to
enhance reliability of products by NEC, the possibility of failures and malfunction might not be avoided
entirely. To prevent the risks of damage to death, human bodily injury or other property arising out
thereof or in connection therewith, each customer is required to take sufficient measures in its safety
designs and plans including, but not limited to, redundant system, fire-containment and anti-failure.
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NL160120BC27-14
INTRODUCTION
The products are classified into three quality grades: "Standard", "Special", and "Specific" of the
highest grade of a quality assurance program at the choice of a customer. Each quality grade is designed
for applications described below. Any customer who intends to use a product for application other than
that of Standard quality grade is required to contact an NEC sales representative in advance.
The Standard quality grade applies to the products developed, designed and manufactured in
accordance with the NEC standard quality assurance program, which are designed for such application as
any failure or malfunction of the products (sets) or parts/components incorporated therein a customer uses
are, directly or indirectly, free of any damage to death, human bodily injury or other property, like general
electronic devices.
Examples: Computers, office automation equipment, communications equipment, test and measurement
equipment, audio and visual equipment, home electronic appliances, machine tools, personal
electronic equipment, industrial robots, etc.
The Special quality grade applies to the products developed, designed and manufactured in accordance
with an NEC quality assurance program stricter than the standard one, which are designed for such
application as any failure or malfunction of the products (sets) or parts/components incorporated therein a
customer uses might directly cause any damage to death, human bodily injury or other property, or such
application under more severe condition than that defined in the Standard quality grade without such
direct damage.
Examples: Control systems for transportation equipment (automobiles, trains, ships, etc.), traffic control
systems, anti-disaster systems, anti-crime systems, medical equipment not specifically
designed for life support, safety equipment, etc.
The Specific quality grade applies to the products developed, designed and manufactured in accordance
with the standards or quality assurance program designated by a customer who requires an extremely
higher level of reliability and quality for such products.
Examples: Military systems, aircraft control equipment, aerospace equipment, nuclear reactor control
systems, medical equipment/devices/systems for life support, etc.
The quality grade of this product is the
"Standard" unless otherwise specified in this document.
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INTRODUCTION ..........................................................................................................................................2
1. OUTLINE....................................................................................................................................................4
1.1 STRUCTURE AND PRINCIPLE...........................................................................................................4
1.2 APPLICATION.......................................................................................................................................4
1.3 FEATURES............................................................................................................................................. 4
2. GENERAL SPECIFICATIONS ................................................................................................................5
3. BLOCK DIAGRAM ................................................................................................................................... 6
4. DETAILED SPECIFICATIONS ...............................................................................................................7
4.1 MECHANICAL SPECIFICATIONS......................................................................................................7
4.2 ABSOLUTE MAXIMUM RATINGS ....................................................................................................7
4.3 ELECTRICAL CHARACTERISTICS................................................................................................... 8
4.3.1 LCD panel signal processing board ............................................................................................... 8
4.3.2 Backlight lamp...............................................................................................................................9
4.3.3 Power supply voltage ripple.........................................................................................................10
4.3.4 Fuse.............................................................................................................................................. 10
4.4 POWER SUPPLY VOLTAGE SEQUENCE ........................................................................................ 11
4.5 CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS.........................................................12
4.5.1 LCD panel signal processing board ............................................................................................. 12
4.5.2 Backlight lamp.............................................................................................................................14
4.5.3 Positions of plug and socket ........................................................................................................15
4.6 LVDS DATA INPUT MAP ................................................................................................................... 16
4.6.1 Mode A ........................................................................................................................................16
4.6.2 Mode B ........................................................................................................................................17
4.6.3 Mode C ........................................................................................................................................18
4.7 DISPLAY COLORS AND INPUT DATA SIGNALS ..........................................................................19
4.8 INPUT SIGNAL TIMINGS..................................................................................................................20
4.8.1 Timing characteristics..................................................................................................................20
4.8.2 Input signal timing chart ..............................................................................................................20
4.9 DISPLAY POSITIONS..........................................................................................................
4.10 TEN-bit
4.11 LUT SERIAL COMMUNICATION TIMINGS .................................................................................25
4.11.1 Timing Chart ..............................................................................................................................25
4.11.2 Timing specifications .................................................................................................................26
4.12 OPTICS...............................................................................................................................................27
4.12.1 Optical characteristics................................................................................................................27
4.12.2 Definition of contrast ratio......................................................................................................... 28
4.12.3 Definition of luminance uniformity...........................................................................................28
4.12.4 Definition of response times ...................................................................................................... 28
4.12.5 Definition of viewing angles......................................................................................................28
5. RELIABILITY TESTS.............................................................................................................................29
6. PRECAUTIONS .......................................................................................................................................30
6.1 MEANING OF CAUTION SIGNS ...................................................................................................... 30
6.2 CAUTIONS ..........................................................................................................................................30
6.3 ATTENTIONS ......................................................................................................................................30
6.3.1 Handling of the product ............................................................................................................... 30
6.3.2 Environment.................................................................................................................................31
6.3.3 Characteristics..............................................................................................................................32
6.3.4 Other ............................................................................................................................................32
7. OUTLINE DRAWINGS ........................................................................................................................... 33
7.1 FRONT VIEW......................................................................................................................................33
7.2 REAR VIEW ........................................................................................................................................34
LOOK UP TABLE FOR GAMMA ADJUSTMENT............................................................22
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NL160120BC27-14
CONTENTS
...............21
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1. OUTLINE
1.1 STRUCTURE AND PRINCIPLE
Color LCD module NL160120BC27-14 module is composed of the amorphous silicon thin film
transistor liquid crystal display (a-Si TFT LCD) panel structure with driver LSIs for driving the TFT
(Thin Film Transistor) array and a backlight.
The a-Si TFT LCD panel structure is injected liquid crystal material into a narrow gap between the TFT
array glass substrate and a color-filter glass substrate.
Color (Red, Green, Blue) data signals from a host system (e.g. signal generator, etc.) are modulated into
best form for active matrix system by a signal processing board, and sent to the driver LSIs which drive
the individual TFT arrays.
The TFT array as an electro-optical switch regulates the amount of transmitted light from the backlight
assembly, when it is controlled by data signals. Color images are created by regulating the amount of
transmitted light through the TFT array of red, green and blue dots.
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NL160120BC27-14
1.2 APPLICATION
x Monitor for PC
1.3 FEATURES
x Ultra-wide viewing angle (Adoption of Super-Advanced Super Fine TFT (SA-SFT))
x Wide color gamut
x High resolution
x LVDS interface
x Adjustable gamma characteristics by using built-in 10-bit LUT (look up table)
x Selectable LVDS data input map
x Small foot print
x Incorporated edge light type backlight (without inverter)
x Acquisition product for UL60950-1/CSA C22.2 No.60950-1-03 (File number: E170632)
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2. GENERAL SPECIFICATIONS
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NL160120BC27-14
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weig ht
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
432.0 (H) u 324.0 (V) mm
54cm (21.3 inches)
a-Si TFT active matrix
16,777,216 colors
1,600 (H) u 1,200 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.090 (H) u 0.270 (V) mm
0.270 (H) u 0.270 (V) mm
457.0 (W) u 350.0 (H) u 25.0 (D) mm (typ.)
3,750g (typ.)
550:1 (typ.)
At the contrast ratio t 10:1
x Horizontal: Right side 85q (typ.), Left side 85q (typ.)
x Vertical: Up side 85q (typ.), Down side 85q (typ.)
Viewing angle with optimum grayscale (J=2.2): Normal axis
(Perpendicular)
Antiglare
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
Backlight
Power consumption
2H (min.) [by JIS K5400]
At LCD panel center
72% (typ.) [against NTSC color space]
Ton+Toff (10%
20ms (typ.)
At IBL= 6.0mArms / lamp
250cd/m
2 ports LVDS interface (THC63LVD824 THine Electronics, Inc. or
equivalent)
>RGB 8-bit signals, Data enable signal (DE), Dot clock (CLK)@
LCD panel signal processing board: 12.0V
Edge light type: 6 cold cathode fluorescent lamps (without inverter)
At IBL= 6.0mArms / lamp, Checkered flag pattern
30.7W (typ., Power dissipation of the inverter is not included.)
2
(typ.)
mo
90%)
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3. BLOCK DIAGRAM
I/F LCD module (product)
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NL160120BC27-14
DA0+
DA0-
DA1+
DA1-
DA2+
DA2-
CKA+
CKADA3+
DA3-
DB0+
DB0-
DB1+
DB1-
DB2+
DB2-
CKB+
CKB-
DB3+
DB3-
TxSEL0
TxSEL1
CS
SDATO
SDATI
SCLK
100:
100:
100:
100:
100:
100:
100:
100:
100:
100:
THC63LVD824 (THine Electronics, Inc.) or equivalent
Controller
V-driver
H-driver
4,800 lines
TFT LCD panel
1,200 lines
H: 1,600 u 3 (R, G, B)
V: 1,200
Backlight
(Edge light type)
Fuse
VDD
FG
GND
Note1, Note2
VBLH1/2/3
VBLH4/5/6
VBLC1/2/3
VBLC4/5/6
Note1
DC/DC
Converter
Power supply
for gradation
Note1: Relations between GND (Signal ground), FG (Frame ground) and VBLC (Lamp low voltage terminal)
in the LCD module are as follows.
GND - FG Connected
GND - VBLC Not connected
FG - VBLC Not connected
Note2: GND and FG must be connected to customer equipment's ground, and it is recommended that GND, FG
and customer inverter ground are connected together in customer equipment.
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4. DETAILED SPECIFICATIONS
4.1 MECHANICAL SPECIFICATIONS
Parameter Specification Unit
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NL160120BC27-14
Module size
Display area
Weight 3,750 (typ.), 4,000 (max.) g
457.0 r 0.5 (W) u 350.0 r 0.5 (H) u 25.0 r 0.5 (D)
432.0 (H) u 324.0 (V)
Note1, Note2 mm
Note1 mm
Note1: Excluding warpage of the signal processing board cover and the connection board cover
Note2: See "7. OUTLINE DRAWINGS".
4.2 ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Rating Unit Remarks
Power supply
voltage
Operating temperature
LCD panel signal processing board VDD -0.3 to +14.0 V
Lamp voltage VBLH 3,000 Vrms
Input signal voltage
Note1
Storage temperature Tst -20 to +60
Front surface TopF 0 to +55
Rear surface TopR 0 to +65
Vi -0.3 to +2.8 V VDD= 12.0V
qC
qC
qC
ყ
-
-
Note2
Note3
%
%
%
g/m
m
m
Ta d 40qC
40qC < Ta d 50qC
50qC < Ta d 55qC
3
Ta > 55qC
0qC d Ta d 55qC
-20qC d Ta d 60qC
Relative humidity
Note4
Absolute humidity
Note4
Operating altitude -
Storage altitude -
RH
AH
d 95
d 85
d 70
d 73
Note5
d 4,850
d 13,600
Note1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, CKB+/-
CS, SDATI, SCLK, TxSEL0, TxSEL1
Note2: Measured at center of LCD panel surface (including self-heat)
Note3: Measured at center of LCD module's rear shield surface (including self-heat)
Note4: No condensation
Note5: Water amount at Ta= 55°C and RH= 70%
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4.3 ELECTRICAL CHARACTERISTICS
4.3.1 LCD panel signal processing board
Parameter Symbol min. typ. max. Unit Remarks
Supply voltage VDD 10.8 12.0 13.2 V -
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NL160120BC27-14
(Ta= 25qC)
Supply current IDD -
Ripple voltage VRP - - 100 mVp-p for VDD
Differential input Threshold
voltage
Input voltage swing VI 0 - 2.4 V Note4
Terminating resistance RT - 100 - : -
Control signal input threshold
voltage
Control signal input current Low IIL -10 - 10 PA
Serial communication signal
input threshold voltage
High VTH - - +100 mV
Low VTL -100 - - mV
High VIH
Low VIL 0 - 0.5 V
High V+ - 1.4 1.9 V
Low V- 0.4 0.7 - V
Hysteresis VH 0.3 - - V
310
Note1
Keep this pin open.
700
Note2
mA at VDD= 12.0V
at VCM= 1.2V
Note3, Note4
-
Note5
Note6
High VOH 1.9 - - V
Output signal threshold voltage
Low VOL - - 0.4 V
High IOH -4 - - mA
Output signal current
Low IOL - - 4 mA
Note1: Checkered flag pattern (by EIAJ ED-2522)
Note2: Pattern for maximum current
Note3: Common mode voltage for LVDS driver
Note4: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, CKB+/Note5: T
SEL0, TXSEL1
X
Note6: CS, SDATI, SCLK
Note7: SDATO
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4.3.2 Backlight lamp
Parameter Symbol min. typ. max. Unit Remarks
Lamp current IBL 3.0 6.0 7.0 mArms
Lamp voltage VBLH - 750 - Vrms Note2, Note3
Lamp starting voltage VS
Lamp oscillation frequency FO 50 56 60 kHz Note5
Note1: This product consists of 6 backlight lamps, and these specifications are for each lamp.
Note2: The lamp voltage cycle between lamps should be kept on a same phase. "VS" and "VBLH" are
the voltage value between low voltage side (Cold) and high voltage side (Hot).
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1,220 - - Vrms
1,460 - - Vrms
NL160120BC27-14
(Ta= 25qC, Note1)
at IBL= 6.0mArms:
L= 250cd/m
Note2, Note3, Note4
Note2, Note3, Note4
Note3
Ta= 25qC
Ta= 0qC
2
(typ.)
Note3: The asymmetric ratio of working waveform for lamps (Lamp voltage peak ratio, Lamp current
peak ratio and waveform space ratio) should be less than 5 % (See the following figure.). If the
waveform is asymmetric, DC (Direct current) element apply into the lamp. In this case, a lamp
lifetime may be shortened, because a distribution of a lamp enclosure substance inclines toward
one side between low voltage terminal (Cold terminal) and high voltage terminal (Hot terminal).
When designing the inverter, evaluate asymmetric of lamp working waveform sufficiently.
Pa
Pb
Sa
0
Sb
_Pa - Pb_
Pb
_Sa - Sb_
Sb
u 100 d 5 %
u 100 d 5 %
Pa: Supply voltage/current peak for positive, Pb: Supply voltage/current peak for negative
Sa: Waveform space for positive part, Sb: Waveform space for negative part
Note4: The inverter should be designed so that the lamp starting voltage can be maintained for more
than 1 second. Otherwise the lamp may not be turned on.
Note5: In case "FO" is not the recommended value, beat noise may display on the screen, because of
interference between "FO" and "1/th". Recommended value of "FO" is as following.
FO=
1
4
1
th
u
(2n-1)
u
th: Horizontal cycle period (See "4.8.1 Timing characteristics".)
n: Natural number (1, 2, 3 )
Note6: Method of lamp cable installation may invite fluctuation of lamp current and voltage or
asymmetric of lamp working waveform. When designing method of lamp cable installation,
evaluate the fluctuation of lamp current, voltage and working waveform sufficiently.
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4.3.3 Power supply voltage ripple
This product works, even if the ripple voltage levels are beyond the permissible values as following
the table, but there might be noise on the display image.
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NL160120BC27-14
Note1: The permissible ripple voltage includes spike noise.
4.3.4 Fuse
Note1: The power supply capacity should be more than the fusing current. If it is less than the
Power supply voltage
VDD 12.0V
Parameter
VDD
Type Supplier
FCC16132AB
Fuse
KAMAYA ELECTRIC
Co., Ltd.
Ripple voltage Note1
(Measure at input terminal of power supply)
d 100
Rating Fusing current Remarks
1.25A
32V
2.5A,
5 seconds
maximum
fusing current, the fuse may not blow in a short time, and then nasty smell, smoke and so
on may occur.
Unit
mVp-p
Note1
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
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NL160120BC27-14
VDD
Note1
0V
10.8V
ON OFF
10.8V
9.6V
VDD dip < 20ms
0.1ms < Tr < 80ms
ON
10.8V
Toff > 200ms
LVDS Signals *1,*2
Note2
0V
CS, SDATI, SCLK
Note2
*1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, CKB+/*2: LVDS signals should be measured at the terminal of 100: resistance.
0V
10ms < t < 35ms
10ms < t < 35ms
VALID period
tt 20ms Note3
VALID period
0ms < t < 35ms
Note1: In terms of voltage variation (voltage drop) while VDD rising edge is below 10.8V, a protection
circuit may work, and then this product may not work.
Note2: LVDS signals and CS, SDATI, SCLK must be Low or High-impedance, exclude the VALID
period (See above sequence diagram), in order to avoid that internal circuits is damaged.
If some of signals are cut while this product is working, even if the signal input to it once again,
it might not work normally. VDD should be cut when the display and function signals are
stopped.
Note3: At the beginning of the serial communication mode, take 20ms or more after the LVDS signal
input. When writing and reading the LUT data, see “4.10 TEN-bit LOOK UP TABLE FOR
GAMMA ADJUSTMENT”.
Note4: The backlight should be turned on within the valid period of LVDS signals, in order to avoid
unstable data display.
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