NEC 2sk3484 Datasets

Page 1
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
SWITCHING
DESCRIPTION
The 2SK3484 is N-channel MOS Field Effect Transistor
designed for high current switching applications.
FEATURES
• Low on-state resistance
DS(on)1 = 125 mΩ MAX. (VGS = 10 V, ID = 8 A)
R
DS(on)2 = 148 mΩ MAX. (VGS = 4.5 V, ID = 8 A)
R
• Low C
• Built-in gate protection diode
• TO-251/TO-252 package
iss: Ciss = 900 pF TYP.
ABSOLUTE MAXIMUM RATINGS (T
Drain to Source Voltage (VGS = 0 V) VDSS 100 V
Gate to Source Voltage (VDS = 0 V) VGSS ±20 V
Drain Current (DC) (TC = 25°C) ID(DC) ±16 A
Drain Current (pulse)
Total Power Dissipation (TC = 25°C) PT1 30 W
Total Power Dissipation (TA = 25°C) PT2 1.0 W
Channel Temperature T
Storage Temperature Tstg –55 to +150 °C
Single Avalanche Current
Single Avalanche Energy
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Starting T
Note1
Note2
Note2
ch = 25°C, VDD = 50 V, RG = 25 Ω, VGS = 20 → 0 V
A = 25°C)
ID(pulse) ±22 A
ch 150 °C
I
AS 10 A
EAS 10 mJ
THERMAL RESISTANCE
Channel to Case Thermal Resistance Rth(ch-C) 4.17 °C/W
Channel to Ambient Thermal Resistance Rth(ch-A) 125 °C/W
ORDERING INFORMATION
PART NUMBER PACKAGE
2SK3484 TO-251 (MP-3)
2SK3484-Z TO-252 (MP-3Z)
2SK3484
(TO-251)
(TO-252)
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information.
Document No. D15069EJ2V0DS00 (2nd edition) Date Published August 2004 NS CP(K) Printed in Japan
The mark shows major revised points.
2002
Page 2
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
2SK3484
Zero Gate Voltage Drain Current IDSS VDS = 100 V, VGS = 0 V 10
µ
A
Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA
Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 2.5 V
Forward Transfer Admittance
Drain to Source On-state Resistance
Note
Note
| y
fs | VDS = 10 V, ID = 8 A 4.7 9.5 S
R
DS(on)1 VGS = 10 V, ID = 8 A 100 125 mΩ
RDS(on)2 VGS = 4.5 V, ID = 8 A 110 148 mΩ
Input Capacitance Ciss VDS = 10 V 900 pF
Output Capacitance Coss VGS = 0 V 110 pF
Reverse Transfer Capacitance Crss f = 1 MHz 50 pF
Turn-on Delay Time td(on) VDD = 50 V, ID = 8 A 9.0 ns
Rise Time tr VGS = 10 V 5.0 ns
Turn-off Delay Time td(off) RG = 0 Ω 30 ns
Fall Time tf 4.0 ns
Total Gate Charge QG VDD = 80 V 20 nC
Gate to Source Charge QGS VGS = 10 V 3.0 nC
Gate to Drain Charge QGD ID = 16 A 5.0 nC
Body Diode Forward Voltage
Note
V
F(S-D) IF = 16 A, VGS = 0 V 1.0 V
Reverse Recovery Time trr IF = 16 A, VGS = 0 V 60 ns
Reverse Recovery Charge Qrr di/dt = 100 A/ µs 122 nC
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
PG.
50 Ω
VGS = 20 → 0 V
DSS
BV
I
AS
I
D
V
DD
Starting T
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG.
50 Ω
L
V
DD
V
DS
ch
R
L
V
DD
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
R
G
PG.
V
GS
0
τ = 1 s Duty Cycle ≤ 1%
R
V
DD
τ
µ
GS
V
Wave Form
I
D
Wave Form
V
GS
10%
0
I
D
10%
0
t
d(on)trtd(off)
90%
t
on
90%
V
GS
90%
I
D
10%
t
f
t
off
2
Data Sheet D15069EJ2V0DS
Page 3
2SK3484
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA
120
TOTAL POWER DISSIPATION vs. CASE TEMPERATURE
50
100
40
80
30
60
20
40
10
20
dT - Percentage of Rated Power - %
04020 60 100 14080 120 160
C - Case Temperature -
T
˚C
- Total Power Dissipation - W
T
P
0
08020 40 60 100 140120 160
TC - Case Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
100
I
D(DC)
DC
Limited
D(pulse)
Power Dissipation
10 ms
10 µs
100 µs
1 ms
10
Limited
= 10 V)
GS
DS(on)
R
(at V
1
- Drain Current - A
D
I
I
TC = 25˚C Single Pulse
0.1
0.1
1 10 100
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
1000
R
th(ch-A)
100
= 125˚C/W
10
R
th(ch-C)
= 4.17˚C/W
1
0.1
- Transient Thermal Resistance - ˚C/W
th(t)
r
0.01
µ
10
100
1 m 10 m 100 m 1 10 100 1000
µ
Single Pulse
PW - Pulse Width - s
Data Sheet D15069EJ2V0DS
3
Page 4
2SK3484
FORWARD TRANSFER CHARACTERISTICS
100
Pulsed V
DS
= 10 V
10
25
20
15
1
- Drain Current - A
D
1
0.1
I
TA = −40˚C
25˚C 75˚C
150˚C
10
- Drain Current - A
D
I
5
DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE
V
GS
=10 V
4.5 V
0.01 1234
V
GS
- Gate to Source Voltage - V
FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT
100
DS = 10 V
V
5
0
V
DS
- Drain to Source Voltage - V
23410
DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE
200
Pulsed
10
TA = 150˚C
1
75˚C 25˚C
−40˚C
0.1
0.01
| yfs | - Forward Transfer Admittance - S
0.01 0.1
I
D - Drain Current - A
1
10 100
150
100
- Drain to Source On-state Resistance - mΩ
DS(on)
R
50
ID = 16 A
0
5101520
GS
- Gate to Source Voltage - V
V
Pulsed
Pulsed
8 A
250
200
DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT
Pulsed
4
3
GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE
VDS = 10 V
D
= 1 mA
I
150
V
GS
= 4.5 V
100
10 V
50
- Drain to Source On-state Resistance - mΩ
0
DS(on)
R
4
10.1
D
- Drain Current - A
I
10 100
Data Sheet D15069EJ2V0DS
2
1
- Gate Cut-off Voltage - V
GS(off)
V
0
−50
0 50 100 150
ch
- Channel Temperature - ˚C
T
Page 5
2SK3484
DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE
300
Pulsed
D
= 8 A
I
100
10
200
V
GS
= 4.5 V
10 V
1
100
0.1
- Diode Forward Current - A
SD
I
- Drain to Source On-state Resistance - mΩ
0
−50
DS(on)
R
0
T
ch
- Channel Temperature - ˚C
50
100 150
0.01
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
Pulsed
V
GS
= 10 V
0 V
0 1.5
0.5
1
VSD - Source to Drain Voltage - V
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
10000
VGS = 0 V
1000
f = 1 MHz
C
= 0 V
iss
C
oss
C
rss
µ
100
- Switching Time - ns
f
, t
d(off)
, t
r
, t
d(on)
t
100
1000
- Capacitance - pF
rss
100
, C
oss
, C
iss
C
10
0.01 0.1
1000
1 10 100
V
DS
- Drain to Source Voltage - V
REVERSE RECOVERY TIME vs. DRAIN CURRENT
di/dt = 100 A/ s
GS
V
80
100
60
SWITCHING CHARACTERISTICS
VDD = 50 V VGS = 10 V R
G
= 0 Ω
t
f
t
d(off)
t
10
t
r
1
10.1
I
D
- Drain Current - A
d(on)
10 100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
VDD = 80 V
50 V 20 V
VGS
10
8
6
10
- Reverse Recovery Time - ns
rr
t
1
0.1
1 10 100
I
F
- Drain Current - A
40
20
VDS - Drain to Source Voltage - V
Data Sheet D15069EJ2V0DS
4
2
V
DS
D = 16 A
0
510152025
I
VGS - Gate to Drain Voltage - V
0
QG - Gate Charge - nC
5
Page 6
2SK3484
100
SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD
IAS = 10 A
10
E
SINGLE AVALANCHE ENERGY DERATING FACTOR
160
140
120
AS
=
10
mJ
100
80
VDD = 50 V R
G
= 25 Ω
V
GS
= 20 → 0 V
AS
≤ 10 A
I
1
VDD = 50 V R
G = 25 Ω
GS = 20
→
V
IAS - Single Avalanche Current - A
Startimg T
0.1
0 V
ch = 25
˚C
0.01 0.1
L - Inductive Load - mH
60
40
Energy Derating Factor - %
20
1
10
0
25 50
Starting T
75 100
ch
- Starting Channel Temperature - ˚C
125 150
6
Data Sheet D15069EJ2V0DS
Page 7
PACKAGE DRAWINGS (Unit: mm)
1) TO-251 (MP-3) 2) TO-252 (MP-3Z)
2SK3484
6.5 ±0.2
5.0 ±0.2
4
1.6 ±0.2
213
1.1 ±0.2
2.32.3
EQUIVALENT CIRCUIT
Drain
Body
Gate
Diode
+0.2
1.5 −0.1
5.5 ±0.27.0 MIN.
+0.2
−0.1
0.5
0.75
2.3 ±0.2
13.7 MIN.
1. Gate
2. Drain
3. Source
4. Fin (Drain)
0.5 ±0.1
+0.2
−0.1
0.5
+0.2
4
2.0
MAX.
−0.1
2.3 ±0.2
1.5
5.5 ±0.2
10.0 MAX.
MIN.
0.9
0.8
MAX.
1. Gate
2. Drain
3. Source
4. Fin (Drain)
0.8
0.5 ±0.1
1.0 MIN.
1.8TYP.
0.7
4.3 MAX.0.8
1.1 ±0.2
6.5 ±0.2
5.0 ±0.2
123
2.3 2.3
Gate Protection Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
Data Sheet D15069EJ2V0DS
7
Page 8
2SK3484
•
The information in this document is current as of August, 2004. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information.
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M8E 02. 11-1
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