NEC 2sk3480 Datasets

DATA SHEET

MOS FIELD EFFECT TRANSISTOR

SWITCHING

N-CHANNEL POWER MOS FET

2SK3480

DESCRIPTION

The 2SK3480 is N-channel MOS Field Effect Transistor designed for high current switching applications.

FEATURES

•Super low on-state resistance: = 31 mΩ MAX. (VGS = 10 V, ID = 25 A)

DS(on)1

R

= 36 mΩ MAX. (VGS = 4.5 V, ID = 25 A)

RDS(on)2

: C

•Low Ciss

= 3600 pF TYP.

iss

•Built-in gate protection diode

ABSOLUTE MAXI MUM RATINGS (TA = 25°C)

Drain to Source Voltage (VGS = 0 V) V Gate to Source Voltage (VDS Drain Current (DC) (TC Drain Current (pulse) Total Power Dissipation (TC Total Power Dissipation (TA

= 0 V) V

= 25°C) I

Note1

= 25°C) P

= 25°C) P Channel Temperature Tch Storage Temperature Tstg

Single Avalanche Current Single Avalanche Energy

Note2

DSS

GSS

D(DC)

I

D(pulse)

T1

T2

I

AS

E

AS

–55 to +150

100

±20 ±50

±100

84

1.5

150

34

116

ORDERING INFORMATION

PART NUMBER PACKAGE

2SK3480 TO-220AB

2SK3480-S TO-262

2SK3480-ZJ TO-263

2SK3480-Z

TO-220SMD package is produced only

Note

in Japan.

V V A

A W W °C °C

A

mJ

TO-220SMD

(TO-220AB)

(TO-262)

Note

s, Duty cycle ≤ 1%

Notes 1. PW ≤ 10

2. Starting T

µ

= 25°C, RG = 25 Ω, VGS = 20 → 0 V

ch

THERMAL RESISTANCE

Channel to Case R Channel to Ambient R

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.

Document No. D15078EJ1V0DS00 (1st edition) Date Published December 2001 NS CP(K) Printed in Japan

th(ch-C)

th(ch-A)

1.48 °C/W

83.3 °C/W

(TO-263, TO-220SMD)

©

2001

ELECTRICAL CHARACTERISTICS (TA = 25°C)

CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

2SK3480

Zero Gate Voltage Drain Current I Gate Leakage Current I Gate Cut-off Voltage V

DSS

VDS = 100 V, VGS = 0 V10

GSS

VGS = ±20 V, VDS = 0 V ±10

GS(off)VDS

= 10 V, ID = 1 mA 1.5 2.0 2.5 V

A

µ

A

µ

Forward Transfer Admittance | yfs |VDS = 10 V, ID = 25 A1734S Drain to Source On-state Resi stance R

Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Turn-on Delay Time t Rise Time t Turn-off Delay Time t Fall Time t Total Gate Charge Q Gate to Source Charge Q Gate to Drain Charge Q Body Diode Forward Voltage V Reverse Recovery Time t Reverse Recovery Charge Q

DS(on)1VGS

DS(on)2VGS

R

iss

oss

rss

d(on)

r

d(off)

f

G

GS

GD

F(S-D)IF

rr

= 10 V, ID = 25 A2531mΩ

= 4.5 V, ID = 25 A2736mΩ VDS = 10 V 3600 pF VGS = 0 V 360 pF f = 1 MHz 190 pF VDD = 50 V, ID = 25 A15ns VGS = 10 V11ns RG = 0

Ω 68 ns

6.0 ns VDD = 80 V74nC VGS = 10 V10nC ID = 50 A20nC

= 50 A, VGS = 0 V1.0V IF = 50 A, VGS = 0 V70ns di/dt = 100 A/µs 180 nC

TEST CIRCUIT 1 AVALANCHE CAPABILITY

VGS = 20 → 0 V

PG.

V

R

G

DD

= 25 Ω

50 Ω

I

D

D.U.T.

I

AS

BV

DSS

V

DS

Starting T

L

DD

V

ch

TEST CIRCUIT 3 GATE CHARGE

D.U.T.

G

= 2 mA

PG.

I

50 Ω

R

L

V

DD

TEST CIRCUIT 2 SWITCHING TIME

D.U.T.

R

PG.

V

GS

0

τ

τ = 1 µs

Duty Cycle ≤ 1%

G

V

GS

Wave Form

V

DS

Wave Form

GS

10%

0

V

DS

90%

V

DS

0

t

d(on)

10% 10%

trt

t

on

V

GS

d(off)tf

t

90%

off

R

L

V

DD

2

Data Sheet D15078EJ1V0DS

TYPICAL CHARACTERISTICS (TA = 25°C)

DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA

T

C

- Case Temperature -

˚C

dT - Percentage of Rated Power - %

04020 60 100 14080 120 160

120

100

80

60

40

20

TC - Case Temperature - ˚C

P

T

- Total Power Dissipation - W

0

8020

20

40

60

80

100

120

140

40 60 100 140120 160

TOTAL POWER DISSIPATION vs. CASE TEMPERATURE

FORWARD BIAS SAFE OPERATING AREA

V

DS

- Drain to Source Voltage - V

I

D

- Drain Current - A

10

1

0.1

100

0.1

1000

1 10 100

T

C

= 25˚C

Single Pulse

1000

R

DS(on)

Limited

(at V

GS

= 10 V)

I

D(pulse)

I

D(DC)

Power Dissipation

Limited

DC

PW = 10 µs

100 µs

1 ms

10 ms

PW - Pulse Width - s

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH

rth(t) - Transient Thermal Resistance - ˚C/W

10

0.01

0.1

1

100

1000

1 m 10 m 100 m 1 10 100 1000

Single Pulse

10

100

Rth(ch-C) = 1.48˚C/W

µ

Rth(ch-A) = 83.3˚C/W

TC = 25˚C

2SK3480

Data Sheet D15078EJ1V0DS

3

2SK3480

FORWARD TRANSFER CHARACTERISTICS

V

GS

- Gate to Source Voltage - V

I

D

- Drain Current - A

Pulsed

12345

10

1

0.1

100

1000

TA = −40˚C

25˚C 75˚C

150˚C

V

DS

= 10 V

FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT

I

D

- Drain Current - A

| y

fs

| - Forward Transfer Admittance - S

0.01 0.1

1

10

100

10 100

0.1

0.01

1

Pulsed

TA = 150˚C 75˚C 25˚C

−40˚C

V

DS

= 10 V

DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE

V

GS

- Gate to Source Voltage - V

R

DS(on)

- Drain to Source On-state Resistance - mΩ

5101520

Pulsed

50

40

30

20

10

0

25 A

ID = 50 A

DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT

I

D

- Drain Current - A

R

DS(on)

- Drain to Source On-state Resistance - mΩ

10.1

100

80

60

40

20

0

10 100

Pulsed

V

GS

= 4.5 V

10 V

GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE

T

ch

- Channel Temperature - ˚C

V

GS(off)

- Gate Cut-off Voltage - V

VDS = 10 V I

D

= 1 mA

1.0

2.0

3.0

4.0

−50

0 50 100 150

0

DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE

V

DS

- Drain to Source Voltage - V

I

D

- Drain Current - A

2

3

4

10

0

20

60

40

80

100

Pulsed

V

GS

=10 V

4.5 V

5

4

Data Sheet D15078EJ1V0DS

2SK3480

DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE

T

ch

- Channel Temperature - ˚C

R

DS(on)

- Drain to Source On-state Resistance - mΩ

−50

0

10

20

30

40

50

60

70

50

100 150

10 V

V

GS

= 4.5 V

Pulsed

I

D

= 25 A

SOURCE TO DRAIN DIODE FORWARD VOLTAGE

1.0

I

SD

- Diode Forward Current - A

0

1.5

VSD - Source to Drain Voltage - V

0.5

Pulsed

0.1

1

10

100

1000

0 V

V

GS

= 10 V

CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE

V

DS

- Drain to Source Voltage - V

C

iss

, C

oss

, C

rss

- Capacitance - pF

10

0.01

100

1000

10000

0.1 1 10 100

V

GS

= 0 V

f = 1 MHz

C

rss

C

oss

C

iss

SWITCHING CHARACTERISTICS

I

D

- Drain Current - A

t

d(on)

, t

r

, t

d(off)

, t

f

- Switching Time - ns

10

1

10.1

100

1000

10 100

t

f

t

r

t

d(on)

t

d(off)

VDD = 50 V VGS = 10 V RG = 0 Ω

REVERSE RECOVERY TIME vs. DRAIN CURRENT

I

F

- Drain Current - A

t

rr

- Reverse Recovery Time - ns

di/dt = 100 A/ns V

GS

= 0 V

1

0.1

10

1 10 100

1000

100

DYNAMIC INPUT/OUTPUT CHARACTERISTICS

V

GS

- Gate to Source Voltage - V

Q

G

- Gate Charge - nC

V

DS

- Drain to Source Voltage - V

200

0

20

40

60

80

100

0

2

4

6

8

10

40 60 80

I

D

= 83 A

V

DD

= 80 V

50 V 20 V

V

DS

V

GS

Data Sheet D15078EJ1V0DS

5

2SK3480

SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD

L - Inductive Load - mH

I

AS

- Single Avalanche Current - A

10

100

1000

110

V

DD

= 50 V

V

GS

= 20 → 0 V

R

G

= 25 Ω

IAS = 34 A

0.01 0.1

1

E

AS

=

116 mJ

Starting Tch = 25˚C

SINGLE AVALANCHE ENERGY DERATING FACTOR

Starting T

ch

- Starting Channel Temperature - ˚C

Energy Derating Factor - %

25 50

75 100

160 140 120 100

80 60 40 20

0

125 150

VDD = 50 V R

G

= 25 Ω

V

GS

= 20 → 0 V

I

AS

≤ 34 A

6

Data Sheet D15078EJ1V0DS

PACKAGE DRAWINGS (Unit: mm)

1) TO-220AB(MP-25)

2SK3480

2) TO-262(MP-25 Fin Cut)

10.6 MAX.

10.0 TYP.

3.0±0.3

4

2 3

1

1.3±0.2

0.75±0.1

2.54 TYP.

3) TO-263 (MP-25ZJ)

10 TYP.

4

φ

3.6±0.2

5.9 MIN.6.0 MAX.

15.5 MAX.12.7 MIN.

0.5±0.2

1.Gate

2.Drain

3.Source

4.Fin (Drain)

4.8 MAX.

1.3±0.2

2.8±0.2

1.3±0.2

10 TYP.

4

2 3

1

1.3±0.2

0.75±0.3

2.54 TYP. 2.54 TYP.

1.0±0.5

8.5±0.2

12.7 MIN.

4) TO-220SMD(MP-25Z)

10 TYP.

4

0.5±0.2

1.Gate

2.Drain

3.Source

4.Fin (Drain)

Note

4.8 MAX.

1.3±0.2

2.8±0.2

4.8 MAX.

1.3±0.2

1.0±0.5

123

1.4±0.2

0.7±0.2

2.54 TYP. 2.54 TYP.

2.8±0.2

EQUIVALENT CIRCUIT

Drain

Body

Gate

Gate Protection Diode

Source

Diode

8.5±0.2

5.7±0.4

0.5R TYP.

0.8R TYP.

1.Gate

2.Drain

3.Source

4.Fin (Drain)

0.5±0.2

1.0±0.5

123

1.4±0.2

0.75±0.3

2.54 TYP. 2.54 TYP.

8.5±0.2

3.0±0.5

1.1±0.4

2.8±0.2

TY

0.5R

0.8R TYP.

.

P

0.5±0.2

1.Gate

2.Drain

3.Source

4.Fin (Drain)

Note This package is produced only in Japan.

Remark The diode connected between the gate and source of the transistor

serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.

Data Sheet D15078EJ1V0DS

7

M8E 00. 4

The information in this document is current as of December, 2001. The information is subject to change without notice. For actual design-in, refer to the latest p ublications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information.

No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio

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•

2SK3480