The 2SK3109 is N channel MOS FET device that
features a low on-state resistance and excellent
switching characteristics, and designed for high voltage
applications such as DC/DC converter.
FEATURES
• Gate voltage rating ±30 V
• Low on-state resistance
DS(on)
= 0.4 Ω MAX. (VGS = 10 V, ID = 5.0 A)
R
• Low input capacitance
iss
C
= 400 pF TYP. (VDS = 10 V, VGS = 0 V)
• Avalanche capability rated
• Built-in gate protection diode
• Surface mount device available
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)
Drain to source voltage (VGS = 0 V)V
DS
Gate to source voltage (V
Drain current (DC) (T
Drain current (pulse)
Total power dissipation (T
Total power dissipation (T
= 0 V)V
C
= 25 °C)I
Note1
A
= 25 °C)P
C
= 25 °C)P
Channel temperatureT
Storage temperatureT
Single avalanche current
Single avalanche energy
Note2
Note2
DSS
GSS
D(DC)
D(pulse)
I
T1
T2
ch
stg
AS
I
AS
E
−55 to +150°C
ORDERING INFORMATION
PART NUMBERPACKAGE
2SK3109TO-220AB
2SK3109-STO-262
2SK3109-ZJTO-263
200V
±30V
±10A
±30A
1.5W
50W
150°C
10A
35mJ
Notes 1.
Document No. D13332EJ1V0DS00 (1st edition)
Date Published January 2000 NS CP (K)
Printed in Japan
CharacteristicsSymbolTest ConditionsMIN.TYP.MAX.Unit
Drain Leakage CurrentI
Gate Leakage CurrentI
Gate to Source Cut-off VoltageV
Forward Transfer Admittance| yfs |VDS = 10 V, ID = 5.0 A1.5S
Drain to Source On-state ResistanceR
Input CapacitanceC
Output CapacitanceC
Reverse Transfer CapacitanceC
Turn-on Delay Timet
Rise Timet
Turn-off Delay Timet
Fall Timet
★
Total Gate ChargeQ
Gate to Source ChargeQ
Gate to Drain ChargeQ
Diode Forward VoltageV
Reverse Recovery Timet
Reverse Recovery ChargeQ
DSS
GSS
GS(off)
DS(on)
iss
oss
rss
d(on)
r
d(off)
f
G
GS
GD
F(S-D)
rr
rr
VDS = 200 V, VGS = 0 V100
VGS = ±30 V, VDS = 0 V
±
VDS = 10 V, ID = 1 mA2.54.5V
VGS = 10 V, ID = 5.0 A0.320.4
VDS = 10 V400pF
VGS = 0 V110pF
f = 1 MHz55pF
VDD = 100 V12ns
ID = 5.0 A34ns
GS(on)
V
= 10 V40ns
RG = 10
Ω
20ns
VDD = 160 V18nC
VGS = 10 V3.5nC
ID = 10 A10nC
IF = 10 A, VGS = 0 V1.0V
IF = 10 A, VGS = 0 V250ns
di/dt = 50 A/µs1.0
2SK3109
µ
10
µ
Ω
µ
A
A
C
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
L
V
DD
PG
RG = 25 Ω
50 Ω
VGS = 20 → 0 V
DSS
BV
I
AS
V
I
D
DD
V
DS
Starting T
ch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
PG.
IG = 2 mA
50 Ω
R
L
V
DD
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
R
L
R
PG.
V
GS
0
τ = 1 s
Duty Cycle ≤ 1 %
G
V
DD
τ
µ
V
GS
Wave Form
I
D
Wave Form
V
GS
10 %
0
90 %
I
D
10 %
0
t
d(on)
r
t
on
t
90 %
V
GS
(on)
90 %
I
D
10 %
t
d(off)
t
f
t
off
2
Data Sheet D13332EJ1V0DS00
Page 3
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
V
DS - Drain to Source Voltage - V
ID - Drain Current - A
102030
25
5
0
Pulsed
10
15
20
30
35
0
VGS = 10 V
VGS = 30 V
4050
0.01
0
0.1
1
10
412
0.001
100
V
DS
= 10 V
Pulsed
FORWARD TRANSFER CHARACTERISTICS
V
GS
- Gate to Source Voltage - V
I
D
- Drain Current - A
816
Tch = 125
˚C
75
˚C
25
˚C
-25
˚C
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
T
ch
- Channel Temperature - ˚C
V
GS(off)
- Gate to Source Cut-off Voltage - V
V
DS = 10
V
I
D = 1
mA
−50
015050
2.0
2.5
100
3.0
3.5
4.0
4.5
5.0
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
|yfs| - Forward Transfer Admittance - S
ID- Drain Current - A
1
1
10
10100
VDS = 10 V
Pulsed
Tch= −25 ˚C
25 ˚C
75 ˚C
125 ˚C
0.01
0.1
0.010.1
Pulsed
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
V
GS
- Gate to Source Voltage - V
R
DS(on)
- Drain to Source On-state Resistance - Ω
08
0.1
1016
0.3
0.2
0.4
0.5
0
20
2461214 18
0.6
0.7
0.8
0.9
1.0
ID = 10 A
5 A
2 A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
I
D
- Drain Current - A
R
DS(on)
- Drain to Source On-state Resistance - Ω
1.2
0.8
0.6
0.2
10 1000.1
0
1
Pulsed
VGS = 10 V
0.4
1.0
1.4
VGS = 30 V
★
TYPICAL CHARACTERISTICS (TA = 25 °C)
2SK3109
Data Sheet D13332EJ1V0DS00
3
Page 4
2SK3109
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
50150
R
DS (on)
- Drain to Source On-state Resistance - Ω
0.4
0
0100−50
T
ch
- Channel Temperature -
˚C
0.6
0.2
V
GS
= 10 V
Pulsed
ID = 5 A
0.8
1.0
1.2
ID = 10 A
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
V
SD
- Source to Drain Voltage - V
I
SD
- Diode Forward Current - A
0.0
0.1
1
10
0.51.01.5
100
VGS = 10 V
0 V
Pulsed
2.0
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
V
DS
- Drain to Source Voltage - V
C
iss
, C
oss
, C
rss
- Capacitance - pF
0.1
100
1000
110100
V
GS = 0
V
f
= 1
MHz
C
iss
C
oss
C
rss
10
10000
1000
SWITCHING CHARACTERISTICS
I
D
- Drain Current - A
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
1
0.1
10
100
1000
110100
V
DD
=
100 V
V
GS
=
10 V
R
G
=
10 Ω
t
d(off)
t
d(on)
t
r
t
f
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
I
D
- Drain Current - A
t
rr
- Reverse Recovery Time - ns
0.1
10
110100
100
di/dt = 50 A/ µs
V
GS
= 0
V
1
1000
V
GS
- Gate to Source Voltage - V
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
Q
G
- Gate Charge - nC
V
DS
- Drain to Source Voltage - V
05101520
50
100
150
200
2
4
6
8
0
10
12
14
16
0
V
GS
V
DS
ID = 10 A
VDD = 160 V
100 V
40 V
4
Data Sheet D13332EJ1V0DS00
Page 5
2SK3109
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
T
C
- Case Temperature - ˚C
dT - Percentage of Rated Power - %
0
20406080 100 120 140 160
20
40
60
80
100
0
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
T
C
- Case Temperature - ˚C
P
T
- Total Power Dissipation - W
0
20406080 100 120 140 160
70
60
50
40
30
20
10
0
FORWARD BIAS SAFE OPERATING AREA
101001000
ID - Drain Current - A
1
V
DS - Drain to Source Voltage - V
100
10
1
0.1
100
µs
1
ms
PW
=
10
µs
R
DS(on)
Limited
ID(pulse)
I
D(DC)
3
ms
Power Dissipation Limited
TC = 25 ˚C
Single Pulse
10 ms
100
10
1
(t) - Transient Thermal Resistance - ˚C/W
th
r
0.1
0.01
10µ
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
Rth(ch-A) = 83.3
Rth(ch-C) = 2.5
˚C/W
˚C/W
Single Pulse
100µ
1m10m100m1101000100
PW - Pulse Width - s
Data Sheet D13332EJ1V0DS00
5
Page 6
2SK3109
0.01
10
0.11
10
100
V
DD
= 100 V
V
GS
= 20 V → 0 V
R
G
= 25 Ω
Starting T
ch
= 25 ˚C
1
SINGLE AVALANCHE ENERGY vs.
INDUCTIVE LOAD
L - Inductive Load - mH
I
AS
- Single Avalanche Energy - A
I
AS
= 10
A
E
AS
=
35
mJ
SINGLE AVALANCHE ENERGY
DERATING FACTOR
75150125
80
40
0
Starting Tch - Starting Channel Temperature - ˚C
Energy Derating Factor - %
5010025
100
60
20
V
DD
=
100 V
R
G
= 25
Ω
V
GS
= 20 V → 0
V
I
AS
≤ 10
A
6
Data Sheet D13332EJ1V0DS00
Page 7
PACKAGE DRAWINGS (Unit : mm)
1)TO-220AB (MP-25)2)TO-262 (MP-25 Fin Cut)
2SK3109
10.6 MAX.
3.0±0.3
4
1
1.3±0.2
0.75±0.1
2.54 TYP.
3)TO-263 (MP-25ZJ)
10.0
2 3
φ
3.6±0.2
5.9 MIN.6.0 MAX.
2.54 TYP.
15.5 MAX.12.7 MIN.
0.5±0.2
1.Gate
2.Drain
3.Source
4.Fin (Drain)
4.8 MAX.
1.3±0.2
2.8±0.2
(10)
4
1
2 3
1.3±0.2
0.75±0.3
2.54 TYP.2.54 TYP.
1.0±0.5
8.5±0.2
12.7 MIN.
EQUIVALENT CIRCUIT
4.8 MAX.
0.5±0.2
1.Gate
2.Drain
3.Source
4.Fin (Drain)
1.3±0.2
2.8±0.2
1.0±0.5
1.4±0.2
0.7±0.2
2.54 TYP.2.54 TYP.
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
123
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
(10)
4.8 MAX.
1.3±0.2
4
Drain
Body
Gate
8.5±0.2
Diode
Gate
(0.5R)
5.7±0.4
2.8±0.2
(0.8R)
1.Gate
2.Drain
3.Source
4.Fin (Drain)
0.5±0.2
Protection
Diode
Source
Data Sheet D13332EJ1V0DS00
7
Page 8
2SK3109
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
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rights of third parties by or arising from use of a device described herein or any other liability arising from use
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intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
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of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
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systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8
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