DATA SHEET
0.3 ± 0.05
1.6 ± 0.1
0.8 ± 0.1
G
0.2
+0.1
–0
0.5 0.5
1.0
1.6 ± 0.1
D
S
0.6
0.75 ± 0.05
0 to 0.1
0.1
+0.1
–0.05
Source (S)
Internal diode
Gate protection
diode
Gate (G)
Drain (D)
PIN CONNECTIONS
S: Source
D: Drain
G: Gate
Marking: A1
MOS FIELD EFFECT TRANSISTOR
P-CHANNEL MOS FET
FOR SWITCHING
2SJ243
The 2SJ243 is a P-channel vertical type MOS FET that is driven
at 2.5 V.
Because this MOS FET can be driven on a low voltage and
because it is not necessary to consider the drive current, the
2SJ243 is ideal for driving the actuator of power-saving systems,
such as VCR cameras and headphone stereo systems.
Moreover, the 2SJ243 is housed in a super small mini-mold
package so that it can help increase the mounting density on the
printed circuit board and lower the mounting cost, contributing to
miniaturization of the application systems.
FEATURES
• Small mounting area: about 60 % of the conventional mini-mold
package (SC-70)
• Can be directly driven by 3-V IC
• Can be automatically mounted
The internal diode in the right figure is a parasitic diode.
The protection diode is to protect the product from damage
due to static electricity. If there is a danger that an extremely
high voltage will be applied across the gate and source in the
actual circuit, a gate protection circuit such as an external
constant-voltage diode is necessary.
PACKAGE DIMENSIONS (in mm)
EQUIVALENT CIRCUIT
Document No. D11215EJ1V0DS00 (1st edition)
Date Published June 1996 P
Printed in Japan
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)
PARAMETER SYMBOL TEST CONDITIONS RATING UNIT
Drain to Source Voltage VDSS VGS = 0 –30 V
Gate to Source Voltage VGSS VDS = 0 ±7A
Drain Current (DC) ID(DC) ±100 mA
Drain Current (Pulse) ID(pulse) PW ≤ 10 ms ±200 mA
Total Power Dissipation PT
Channel Temperature Tch 150 ˚C
Operating Temperature Topt –55 to +80 ˚C
Storage Temperature Tstg –55 to +150 ˚C
Duty cycle ≤ 50 %
3.0 cm2 × 0.64 mm, ceramic substrate used
200 mW
1996
2SJ243
ELECTRICAL CHARACTERISTICS (TA = 25 ˚C)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Drain Cut-Off Current IDSS VDS = –30 V, VGS = 0 –1.0
Gate Leakage Current IGSS VGS = ±5 V, VDS = 0 ±0.1 ±3.0
Gate Cut-Off Voltage VGS(off) VDS = –3 V, ID = –10 µA –1.6 –1.9 –2.3 V
Forward Transfer Admittance |yfs|VDS = –3 V, ID = 10 mA 20 30 mS
Drain to Source On-State Resistance
Drain to Source On-State Resistance
RDS(on)1 VGS = –2.5 V, ID = –1 mA 55 100 Ω
RDS(on)2 VGS = –4.0 V, ID = –10 mA 20 25 Ω
Input Capacitance Ciss VDS = –5.0 V, VGS = 0, f = 1 MHz 16 pF
Output Capacitance Coss 13 pF
Reverse Transfer Capacitance Crss 2pF
Turn-On Delay Time td(on) VDD = –5V, ID = –10 mA 10 ns
Rise Time tr
Turn-Off Delay Time td(off)
VGS(on) = –5 V, RG = 10 Ω
RL = 500 Ω
40 ns
130 ns
Fall Time tf 80 ns
µ
A
µ
A
SWITCHING TIME MEASUREMENT CIRCUIT AND CONDITIONS (Resistive Load)
V
GS
Gate
L
R
V
DD
Voltage
Waveform
Drain
Current
Waveform
10 %
D
I
t
d(on)
0
10 %
trt
I
D
V
GS(on)
d(off)
90 %
PG.
0
V
GS
τ
τ = 1 s
µ
Duty cycle ≤ 1 %
DUT
R
G
90 %
90 %
t
f
10 %
2