11
outportw(FGRES,0); /* Reset the FiFo */
erasefifo(); /* Erase the FiFo */
getframe(); /* Read in FiFo and display it */
}
GrSetMode(GR_default_text); /* Restore old graphics mode */
}
void getframe()
{
unsigned short i, j;
static unsigned short iline[512];
char *p;
p=(char *)VBASE; /* Set base address of SVGA card */
outportw(FGTHR,0); /* Set discriminator level */
outportw(FGINT, FRAMEXP); /* Set number of frames and */
/* start integration period */
while(!(inportw(FGINT) & 1)) ; /* Wait until bit 0 of AFGINT */
/* goes to 1 ... */
while(inportw(FGINT) & 1) ; /* ... and to zero again: */
/* Now the integration is over */
for(j=0;j<160;j++)
outportw(FGRW, 0);
inportw(FGRW);
inportw(FGRW);
inportw(FGRES); /* Make sure that the Fifo captures */
/* also the last data words */
for(j=0;j<256;j++) { /* Read in the even lines */
inportsw(FGRW, iline, 512);
for(i=0;i<512;i++)
*(p++)=(unsigned char)(iline[i] >> (FRAMEXP+1) );
p+=1536;
}
p=(char *)VBASE + 1024;
for(j=0;j<256;j++) { /* Read in the odd lines */
inportsw(FGRW, iline, 512);
for(i=0;i<512;i++)
*(p++)=(unsigned char)(iline[i] >> (FRAMEXP+1) );
p+=1536;
}
} /* That´s it */
void erasefifo()
{
int i;
unsigned short buf[512];
for(i=0;i<512;i++) /* Load a buffer for faster output */
buf[i]=0;
for(i=0;i<513;i++)
outportsw(FGRW, buf, 512); /* Write out buffer to Fifo */
}
From the program listing you can see that there are 4 addresses that are relevant for
programming (a base address of 240 (hexadecimal) is assumed here):