P4C174
HIGH SPEED 8K x 8
CACHE TAG STATIC RAM
FEATURES
P4C174
High Speed Address-To-Match - 8 ns Maximum
Access Time
High-Speed Read-Access Time
– 8/10/12/15/20/25 ns (Commercial)
Open Drain MATCH Output
Reset Function
8-Bit Tag Comparison Logic
Automatic Powerdown During Long Cycles
DESCRIPTION
The P4C174 is a 65,536 bit high speed cache tag static
RAM organized as 8K x 8. The CMOS memory has equal
access and cycle times. Inputs are fully TTL-compatible.
The cache tag RAMs operate from a single 5V±10%
power supply. An 8-bit data comparator with a MATCH
output is included for use as an address tag comparator in
high speed cache applications. The reset function provides the capability to reset all memory locations to a LOW
level.
The MATCH output of the P4C174 reflects the comparison result between the 8-bit data on the I/O pins and
Data Retention at 2V for Battery Backup Operation
Advanced CMOS Technology
Low Power Operation
— Active: 750 mW Typical at 25 ns
— Standby: 500 µW Typical
Package Styles Available
— 28 Pin 300 mil Plastic DIP
— 28 Pin 300 mil Plastic SOJ
Single Power Supply
— 5V±10%
the addressed memory location. 8K Cache lines can be
mapped into 1M-Byte address spaces by comparing 20
address bits organized as 13-line address bits and 7-page
address bits.
Low power operation of the P4C174 is enhanced by
automatic powerdown when the memory is deselected or
during long cycle times. Also, data retention is maintained
down to V
= 2.0. Typical battery backup applications
CC
consume only 30 µW at VCC = 3.0V.
FUNCTIONAL BLOCK DIAGRAM
WE
OE
CE
ADDRESS
DATA
I/O
ROW
RESET
8
COMPARATOR
8
ROW
SELECT
8
1 (IF MATCH)
8
8
256 x 32 x 8
MEMORY
ARRAY
COLUMN SELECT
& COLUMN
SENSE
COLUMN
ADDRESS
MATCH (OPEN DRAIN)
PIN CONFIGURATION
RESET
1
A
2
12
A
7
3
A
4
6
A
5
5
A
6
4
A
3
7
A
8
2
A
1
I/0
I/0
I/0
GND
9
A
10
0
11
0
12
1
2
13
14
5
8
DIP (P5), SOJ (J5)
TOP VIEW
174.1
Means Quality, Service and Speed
99
V
28
cc
27
WE
26
MATCH
25
A
8
24
A
9
23
A
11
22
OE
21
A
10
20
CE
19
I/0
7
18
I/0
6
17
I/0
5
16
I/0
4
15
I/0
3
1Q97
P4C174
MAXIMUM RATINGS
(1)
Symbol Parameter Value Unit
V
CC
Power Supply Pin with –0.5 to +7 V
Respect to GND
Terminal Voltage with –0.5 to
V
TERM
Respect to GND VCC +0.5 V
(up to 7.0V)
T
A
Operating Temperature –55 to +125 °C
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Grade(2)
Commercial
Ambient
Temperature
0°C to +70°C
GND
0V 5.0V ± 10%
V
CC
DC ELECTRICAL CHARACTERISTICS
Over recommended operating temperature and supply voltage
Symbol
V
IH
V
IL
V
HC
V
LC
V
CD
V
OL
Input High Voltage
Input Low Voltage
CMOS Input High Voltage
CMOS Input Low Voltage
Input Clamp Diode Voltage
Output Low Voltage
(TTL Load)
V
OH
Output High Voltage
(TTL Load)
I
LI
I
LO
I
SB
Input Leakage Current
Output Leakage Current
Standby Power Supply
Current (TTL Input Levels)
I
SB1
Standby Power Supply
Current
(CMOS Input Levels)
n/a = Not Applicable
Notes:
1. Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAXIMUM rating conditions for extended
periods may affect reliability.
Parameter
Test Conditions
VCC = Min., IIN = 18 mA
IOL = +8 mA, VCC = Min.
IOH = –4 mA, VCC = Min.
VCC = Max.
VIN = GND to V
CC
VCC = Max., CE = VIH,
V
= GND to V
OUT
CE ≥ V
V
= Max .,
CC
IH
CC
f = Max., Outputs Open
CE ≥ V
V
= Max.,
CC
HC
f = 0, Outputs Open
VIN ≤ VLC or VIN ≥ V
HC
Symbol Parameter Value Unit
T
BIAS
Temperature Under –55 to +125 °C
Bias
T
STG
P
T
I
OUT
CAPACITANCES
Storage Temperature –65 to +150 °C
Power Dissipation 1.0 W
DC Output Current 50 mA
(4)
VCC = 5.0V, TA = 25°C, f = 1.0MHz
Symbol
C
IN
C
OUT
(2)
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with VIL and IIL not more negative than –3.0V and
–100mA, respectively, are permissible for pulse widths up to 20 ns.
4. This parameter is sampled and not 100% tested.
Parameter
Input Capacitance
Output Capacitance
P4C174
Min
2.2
–0.5
VCC –0.2
–0.5
(3)
(3)
Max
VCC +0.5
0.8
VCC +0.5
0.2
–1.2
0.4
2.4
–5
–5
___
___
+5
+5
25
5
Conditions
VIN = 0V
V
= 0V
OUT
Unit
V
V
V
V
V
V
V
µA
µA
mA
mA
Typ.
5
7
Unit
pF
pF
100
POWER DISSIPATION CHARACTERISTICS VS. SPEED
P4C174
Symbol Parameter
I
CC
Dynamic Operating Current* Commercial
Temperature
Range
–8 –10 –12 –15 –20 –25
200 180 170 160 155 150
*VCC = 5.5V. Tested with outputs open. f = Max. Switching inputs are 0V and 3V. CE = VIL, OE = VIH.
DATA RETENTION CHARACTERISTICS (P4C174 Military Temperature Only)
Typ.*
Symbol
V
I
CCDR
t
CDR
DR
VCC for Data Retention
Data Retention Current
Chip Deselect to
Data Retention Time
†
t
R
*TA = +25˙C
§tRC = Read Cycle Time
†
This parameter is guaranteed but not tested.
Operation Recovery Time
Parameter
Test Conditons
CE ≥ VCC –0.2V,
VIN ≥ VCC –0.2V
or VIN ≤ 0.2V
Min
2.0
0
t
RC
2.0V 3.0V
10
§
VCC =
2.0V 3.0V
15 600 900
Max
VCC =
Unit
mA
Unit
V
µA
ns
ns
READ CYCLE NO. 1 (
ADDRESS
OE
CE
DATA OUT
OEOE
OE CONTROLLED)
OEOE
t
AA
t
OE
(1)
t
OLZ
t
AC
(1)
t
LZ
(2,3)
(4)
t
RC
t
OH
(1)
t
OHZ
(1)
t
HZ
101
P4C174
AC CHARACTERISTICS—READ CYCLE
Min
8
3
3
0
0
(2)
–8
10
8
3
8
3
5
5
0
5
0
20
(VCC = 5V ± 10%, All Temperature Ranges)
Symbol
t
RC
t
AA
t
OH
Parameter
Read Cycle Time
Address Access
Time
Address Change to
Output Change
t
AC
Chip Enable LOW to
Output Valid
t
LZ
t
HZ
t
OE
Chip Enable LOW
to Output LOW-Z
(1)
Chip Enable HIGH
to Output HIGH -Z
Output Enable LOW
(1)
to Output Valid
t
t
t
OLZ
OHZ
PU
Output Enable LOW
to Output LOW-Z
(1)
Output Enable HIGH
to Output HIGH -Z
Chip Enable LOW or
(1)
Address Change to
Powerup
t
pUPD
Powerup to
Powerdown
10
10
5
6
5
20
12
3
3
0
0
–12
12
12
5
6
5
20
15
3
3
0
0
–15 –20–10
–25
Unit
MaxMinMaxMinMaxMinMaxMinMaxMinMax
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
15
8
8
5
20
20
3
3
0
0
20
20
8
10
8
20
25
25
3
25
3
10
12
0
10
0
25
Note:
1. Transition is measured ± 200 mV from steady state voltage with Output Load B.
READ CYCLE NO. 1 (OE CONTROLLED)
ADDRESS
OE
CE
t
LZ
DATA OUT
(2, 3)
(4)
t
RC
t
AA
t
OE
(1)
t
OLZ
t
AC
(1)
t
OH
(1)
t
OHZ
(1)
t
HZ
102
P4C174
READ CYCLE NO. 2 (ADDRESS CONTROLLED)
ADDRESS
t
AA
(2, 3)
(4)
t
RC
DATA OUT
READ CYCLE NO. 3 (
CE
t
OH
CECE
CE CONTROLLED)
CECE
(2)
(4)
t
RC
DATA VALIDPREVIOUS DATA VALID
t
AC
(1)
t
DATA OUT
VCC SUPPLY
(5)
CURRENT
LZ
t
PU
Notes:
1. Transition is measured ±200 mV from steady state voltage with Output
Load B. This parameter is sampled, not 100% tested.
2. CE is LOW, OE is LOW, WE is HIGH for READ cycle. CE or WE must
be HIGH during address transitions.
3. All address lines are valid no later than the transition of CE to LOW.
4. READ cycle time is measured from the last valid address to the first
transitioning address.
5. Powerup occurs as a result of any of the following conditions:
a) Falling edge of CE.
b) Falling edge of WE (CE active).
c) Any address line transition (CE active).
d) Any Data line transition (CE and WE active).
This device automatically powers down after T
any of the prior conditions. Power dissipatio is therefore a function of
has elapsed from
PUPD
cycle rate, not CE pulse width.
(1)
t
HZ
t
DATA VALID
PUPD
HIGH IMPEDANCE
6. CE is LOW, WE is LOW for WRITE cycle. CE or WE must be HIGH
during address transitions.
7. WRITE cycle time is measured from the last valid address to the first
transitioning address.
8. OE is LOW for this WRITE cycle to show TWZ and TOW.
103
P4C174
AC CHARACTERISTICS - WRITE CYCLE
(VCC = 5V ± 10%, 0°C to +70°C)
ParameterSymbol
t
WC
t
CW
Write Cycle Time
Chip Enable LOW to End of
Write
t
AS
Address Valid to Beginning
of Write
t
AW
Address Valid to End of
Write
t
AH
End of Write to Address
Change
t
WP
t
DW
t
DH
t
OW
t
WZ
Write Pulse Width
Data Valid to End of Write
End of Write to Data Change
Write Enable HIGH to Output
LOW-Z
(1)
Write Enable LOW to Output
HIGH-Z
(1)
WRITE CYCLE NO. 1 (
Max Max Max Max Max MaxMin Min Min Min Min Min
8
7
0
7
0
7
6
0
0
4
WEWE
WE CONTROLLED)
WEWE
(6)
10
9
0
9
0
9
6
0
0
–25–20–15–12–10–8
Unit
12
10
0
10
0
10
6
0
0
4
15
12
0
12
0
12
7
0
0
4
20
15
0
15
0
15
10
0
0
5
20
15
0
15
0
15
10
0
0
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
ns
ADDRESS
CE
WE
t
AS
DATA IN
DATA OUT DATA UNDEFINED
(8)
(7)
t
WC
t
CW
t
AW
t
WP
t
DW
DATA VALID
(1)
t
WZ
HIGH IMPEDANCE
t
AH
t
DH
(1)
t
OW
104
P4C174
WRITE CYCLE NO. 2 (
ADDRESS
CE
WE
DATA IN
DATA OUT
CECE
CE CONTROLLED)
CECE
t
AS
AC CHARACTERISTICS - MARCH CYCLE
(VCC = 5.0V ± 10%, 0°C to +70°C)
Symbol
t
MC
t
ADM
t
ADMH
t
CEM
t
CEMHI
t
OEMHI
t
WEMHI
t
DAM
t
DAMH
Match Cycle Time
Address Valid to MATCH
Valid
Address Change to MATCH
Change
Chip Enable LOW to
MATCH Valid
Chip Enable HIGH to
MATCH HIGH
Output Enable LOW to
MATCH HIGH
Write Enable LOW to
MATCH HIGH
Data Valid to MATCH Valid
Data Change to MATCH
Change
Parameter
Max
8
81012152025
3
788101015
788101015
7 9 10 13 15 15
000000
(6)
t
AW
HIGH IMPEDANCE
Max
10
3
(7)
t
WC
t
CW
t
AH
t
WP
t
DW
DATA VALID
t
DH
–25–20–15–12–10–8
Unit
Max Max Max MaxMin Min Min Min Min Min
12
15
20
25
ns
ns
3
3
3
3
ns
ns
ns
2015121097
ns
ns7 9 10 12 15 20
ns
ns
MATCH TIMING
ADDRESS
CE
OE
WE
RESET
DATA
MATCH
VALID READ DATA OUT
t
ADM
t
CEM
t
VALID MATCH DATA IN
t
DAM
105
MC
MATCH
NO MATCH
MATCH VALID
t
ADMH
t
CEMHI
t
t
OEMHI
t
WEMHI
t
RMHI
t
DAMH
P4C174
AC CHARACTERISTICS - RESET CYCLE
(VCC = 5.0V ± 10%, 0°C to +70°C)
Symbol
t
t
t
t
t
RRC
RP
RPU
RPD
RMHI
t
RIX
Reset Cycle Time
Reset Pulse Width
Reset LOW to Powerup
Reset LOW to Powerdown
Reset LOW to MATCH HIGH
Reset LOW to Inputs
Ignored
t
RIR
Reset LOW to inputs
Recognized
PUR
Powerup to RESET LOWt
RESET TIMING
V
CC
POWERUP
RESET
Parameter
4.5 V
t
PUR
Max
Max
Max Max Max MaxMin Min Min Min Min Min
35 40 45 50 50 60
8
0
0
8
t
RP
35
80
35
10
0
0
10
40
100
40
t
RRC
12
12
12
0
0
45
100
0
0
45
15
50
120
50
15
0
50
150
0
50
20
15
25
–25–20–15–12–10–8
Unit
ns
ns
0
60
200
0
60
ns
ns
ns
ns
ns
ns
t
INPUTS
(A, D, CE, OE, WE)
VCC SUPPLY
CURENT
MATCH
RIX
PRIOR CYCLE
t
RPU
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Level
Output Timing Reference Level
Output Load
t
RMHI
GND to 3.0V
< 3ns
1.5V
1.5V
Outputs Loads A, B & C
t
RIR
NEXT CYCLE
t
RPD
TRUTH TABLE
Mode
CECE
CE
CECE
Standby H X High Z Standby
Read L H D
Write L L High Z Active
WEWE
WE Output Power
WEWE
OUT
Active
106
+5V
P4C174
R
1
480Ω
+5V
480Ω 200Ω
R
1
+5V
R
1
OUTPUT
INCLUDING
JIG AND
SCOPE
OUTPUT LOAD A
30 pF
R
2
255Ω
PACKAGE SUFFIX
Package
Suffix
P Plastic DIP, 300 mil wide standard
J Plastic SOJ, 300 mil wide standard
Description
Performance Semiconductor's part numbering scheme is as follows:
OUTPUT
INCLUDING
JIG AND
SCOPE
OUTPUT LOAD B OUTPUT LOAD C
5 pF
R
255Ω
TEMPERATURE RANGE SUFFIX
Temperature
Range Suffix
C Commercial Temp. Range, 0°C to +70°C.
ORDERING INFORMATION
MATCH
OUT
2
INCLUDING
JIG AND
SCOPE
30 pF
Description
P4C
174
—
ss p t
Temperature Range
Package Code
Speed (Access/Cycle Time)
Device Number
Static RAM Prefix
SS = Speed (access/cycle time in ns), e.g., 10, 12, 15
P = Package code, i.e., P, J.
T = Temperature range, i.e., C.
SELECTION GUIDE
The P4C174 is available in the following temperature, speed and package options.
Temperature
Range
Package 8 10 12 15 20 25
Speed (ns)
Commercial
Plastic DIP (300 mil)
Plastic SOJ (300 mil)
-8PC
-8JC
-10PC
-10JC
107
-12PC
-12JC
-15PC
-15JC
-20PC
-20JC
-25PC
-25JC
P4C174
108
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