National Semiconductor MN54ABT646-X Technical data
MICROCIRCUIT DATA SHEET
MN54ABT646-X REV 0B0
OCTAL TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
General Description
The ABT646 consists of bus tranceiver circuits wit TRI-STATE, D-type flip-flops, and
control circuitry arranged for multiplexed transmission of data directly from the input
bus or from the internal registers. Data on the A or B bus will be clocked into the
registers as the appropriate clock pin goes to a high logic level. Control OE and
direction pins are provided to control the transceiver function. In the transceiver mode,
data present at the high impedance port may be stored in either the A or the B register or
in both. The select controls can mutiplex stored and real-time (transparent mode) data.
The direction control determines which bus will receive data when the enable control OE is
Active LOW. In the isolation mode (control OE HIGH), A data may be stored in the B
register and/or B data may be stored in the A register.
Original Creation Date: 08/25/95
Last Update Date: 10/05/98
Last Major Revision Date: 03/19/97
Industry Part Number
54ABT646
Prime Die
NB646
Controlling Document
See Features Page
Processing
MIL-STD-883, Method 5004
Quality Conformance Inspection
MIL-STD-883, Method 5005
NS Part Numbers
54ABT646E-QML *
54ABT646J-QML **
54ABT646W-QML ***
Subgrp Description Temp ( C)
1 Static tests at +25
2 Static tests at +125
3 Static tests at -55
4 Dynamic tests at +25
5 Dynamic tests at +125
6 Dynamic tests at -55
7 Functional tests at +25
8A Functional tests at +125
8B Functional tests at -55
9 Switching tests at +25
10 Switching tests at +125
11 Switching tests at -55
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1
MN54ABT646-X REV 0B0
MICROCIRCUIT DATA SHEET
Features
- Independent registers for A and B buses.
- Multiplexed real-time and stored data.
- A and B output sink capability of 48 mA, source capability of 24 mA
- Guaranteed latchup protection
- High impedance glitch free bus loading during entire power up and power down cycle.
- Non-Destructive hot insertion capability.
- SMD : 5962-9457701Q3A*, QLA**, QKA***
2
MN54ABT646-X REV 0B0
(Absolute Maximum Ratings)
(Note 1)
Vcc Pin Potential to Ground Potential
Input Voltage
(Note 2)
Input Current
(Note 2)
Voltage Applied To Any Output
Current Applied To Output
Junction Temperature (Tj)
Thermal Resistance
Storage Temperature
Lead Temperature
ESD Classification
Maximum Power Dissipation
MICROCIRCUIT DATA SHEET
-0.5V to +7.0V
-0.5V to +7.0V
-30mA to +5.0mA
-0.5V to 5.5VIn the Disabled or Power-Off State
-0.5V to VccIn The High State
96mAIn The Low State (Max)
+175CCeramic
See Mil-Std 1835Junction-To-Case (Theta JC)
-65C to +150C
+300C(Soldering, 10 seconds)
Class 3
500 mW
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
its useful life impaired. Functional operation under these conditions is not
implied.
Recommended Operating Conditions
Supply Voltage (Vcc)
Operating Temperature
Minimum Input Edge Rate (dV/dt)
Maximum Output Current
4.5V to 5.5V
-55C to +125C
50 mV/nsData Input
20 mV/nsEnable Input
100 mV/nsClock Input
-24 mAHigh Level (Ioh)
48 mALow Level (Iol)
3
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