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MM74HC393

National Semiconductor MM54HC390, MM74HC390, MM54HC393, MM74HC393 Service Manual

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MM54HC390/MM74HC390 Dual 4-Bit Decade Counter MM54HC393/MM74HC393 Dual 4-Bit Binary Counter
General Description
These counter circuits contain independent ripple carry counters and utilize advanced silicon-gate CMOS technolo­gy. The MM54HC390/MM74HC390 incorporate dual dec­ade counters, each composed of a divide-by-two and a di­vide-by-five counter. The divide-by-two and divide-by-five counters can be cascaded to form dual decade, dual bi-qui­nary, or various combinations up to a single divide-by-100 counter. The MM54HC393/MM74HC393 contain two 4-bit ripple carry binary counters, which can be cascaded to cre­ate a single divide-by-256 counter.
Each of the two 4-bit counters is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When clear is set high all four bits of each counter are set to a low level. This enables count truncation and allows the implementation of divide-by­N counter configurations.
Each of the counters outputs can drive 10 low power Schottky TTL equivalent loads. These counters are func-
January 1988
tionally as well as pin equivalent to the 54LS390/74LS390 and the 54LS393/74LS393, respectively. All inputs are pro­tected from damage due to static discharge by diodes to V
and ground.
CC
Features
Y
Typical operating frequency: 50 MHz
Y
Typical propagation delay: 13 ns (Ck to QA)
Y
Wide operating supply voltage range: 2 –6V
Y
Low input current:k1 mA
Y
Low quiescent supply current: 80 m A maximum (74HC Series)
Y
Fanout of 10 LS-TTL loads
MM54HC390/MM74HC390 Dual 4-Bit Decade Counter
MM54HC393/MM74HC393 Dual 4-Bit Binary Counter
Connection Diagrams
Dual-In-Line Package
Top View
Order Number MM54HC390 or MM74HC390
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
TL/F/5337
TL/F/5337– 1
Order Number MM54HC393 or MM74HC393
Dual-In-Line Package
TL/F/5337– 2
Top View
Absolute Maximum Ratings (Notes1&2)
Operating Conditions
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage (V
CC
)
DC Input Voltage (VIN)
DC Output Voltage (V
OUT
)
Clamp Diode Current (IIK,IOK)
DC Output Current, per pin (I
OUT
)
DC VCCor GND Current, per pin (ICC)
Storage Temperature Range (T
STG
b
b
)
b
0.5 toa7.0V
1.5 to V
CC
0.5 to V
CC
g
g
b
g
65§Ctoa150§C
a
1.5V
a
0.5V
20 mA
25 mA
50 mA
Supply Voltage (V
)26V
CC
DC Input or Output Voltage 0 V
(V
IN,VOUT
)
Operating Temp. Range (TA)
MM74HC MM54HC
Input Rise or Fall Times
e
V
2.0V(tr,tf) 1000 ns
CC
e
V
4.5V 500 ns
CC
e
V
6.0V 400 ns
CC
Power Dissipation (PD)
(Note 3) 600 mW S.O. Package only 500 mW
Lead Temp. (T
) (Soldering 10 seconds) 260§C
L
DC Electrical Characteristics (Note 4)
Symbol Parameter Conditions V
CC
A
e
T
25§C
Typ Guaranteed Limits
V
IH
Minimum High Level 2.0V 1.5 1.5 1.5 V Input Voltage 4.5V 3.15 3.15 3.15 V
6.0V 4.2 4.2 4.2 V
V
IL
Maximum Low Level 2.0V 0.5 0.5 0.5 V Input Voltage** 4.5V 1.35 1.35 1.35 V
6.0V 1.8 1.8 1.8 V
V
OH
Minimum High Level V Output Voltage
e
VIHor V
l
I
IN
OUT
IL
s
20 mA 2.0V 2.0 1.9 1.9 1.9 V
l
4.5V 4.5 4.4 4.4 4.4 V
6.0V 6.0 5.9 5.9 5.9 V
e
V
VIHor V
IN
I
l
OUT
I
l
OUT
l
I
IN
OUT
e
V
OL
Maximum Low Level V Output Voltage
IL
s
4.0 mA 4.5V 4.2 3.98 3.84 3.7 V
l
s
5.2 mA 6.0V 5.7 5.48 5.34 5.2 V
l
VIHor V
IL
s
20 mA 2.0V 0 0.1 0.1 0.1 V
l
4.5V 0 0.1 0.1 0.1 V
6.0V 0 0.1 0.1 0.1 V
e
V
VIHor V
IN
I
l
OUT
I
l
OUT
I
IN
I
CC
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package:
Note 4: For a power supply of 5V
with this supply. Worst case V I
**V
Maximum Input V Current
Maximum Quiescent V Supply Current I
g
and VILoccur at V
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
OZ
limits are currently tested at 20% of VCC. The above VILspecification (30% of VCC) will be implemented no later than Q1, CY’89.
IL
IH
e
IN
e
IN
OUT
10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing
IL
s
4.0 mA 4.5V 0.2 0.26 0.33 0.4 V
l
s
5.2 mA 6.0V 0.2 0.26 0.33 0.4 V
l
VCCor GND 6.0V
g
0.1
VCCor GND 6.0V 8.0 80 160 mA
e
0 mA
b
12 mW/§C from 65§Cto85§C; ceramic ‘‘J’’ package:b12 mW/§C from 100§Cto125§C.
e
5.5V and 4.5V respectively. (The VIHvalue at 5.5V is 3.85V.) The worst case leakage current (IIN,ICC, and
CC
74HC 54HC
eb
T
40 to 85§CT
A
g
1.0
Min Max Units
V
§
§
Units
b b
40 55
eb
A
55 to 125§C
g
CC
a
85
a
125
1.0 mA
C C
2
AC Electrical Characteristics MM54HC390/MM74HC390
e
CC
A
e
5V, T
V
Symbol Parameter Conditions Typ Guaranteed Limit Units
f
MAX
t
PHL,tPLH
t
PHL,tPLH
t
PHL,tPLH
t
PHL,tPLH
t
PHL
t
REM
t
W
25§C, C
e
L
15 pF, t
e
e
t
6ns
r
f
Maximum Operating Frequency, Clock A or B 50 30 MHz
Maximum Propagation Delay, Clock A to QAOutput 12 20 ns
Maximum Propagation Delay, Clock A to Q
Connected to Clock B)
(Q
A
C
Maximum Propagation Delay, Clock B to QBor Q
Maximum Propagation Delay, Clock B to Q
C
D
32 50 ns
15 21 ns
20 32 ns
Maximum Propagation Delay, Clear to any Output 15 28 ns
Minimum Removal Time, Clear to Clock
b
25 ns
Minimum Pulse Width, Clear or Clock 10 16 ns
AC Electrical Characteristics C
e
L
50 pF, t
Symbol Parameter Conditions V
f
MAX
t
PHL,tPLH
t
PHL,tPLH
t
PHL,tPLH
t
PHL,tPLH
t
PHL
t
REM
t
W
t
THL,tTLH
tr,t
C
PD
C
IN
Note 5: CPDdetermines the no load dynamic power consumption, P
Maximum Operating 2.0V 5 4 3 MHz Frequency 4.5V 27 21 18 MHz
Maximum Propagation 2.0V 45 120 150 180 ns Delay, Clock A to Q
A
Maximum Propagation 2.0V 100 290 360 430 ns Delay, Clock A to Q
Connected to Clock B) 6.0V 30 50 62 75 ns
(Q
A
C
Maximum Propagation 2.0V 50 130 160 195 ns Delay, Clock B to QBor 4.5V 16 26 33 39 ns Q
D
Maximum Propagation 2.0V 60 185 230 280 ns Delay, Clock B to Q
C
Maximum Propagation 2.0V 55 165 210 250 ns Delay, Clear to any Q 4.5V 17 33 41 49 ns
Minimum Removal Time 2.0V 25 25 25 ns Clear to Clock 4.5V 5 5 5 ns
Minimum Pulse Width 2.0V 30 80 100 120 ns Clear or Clock 4.5V 10 16 20 24 ns
Maximum Output Rise 2.0V 30 75 95 110 ns and Fall Time 4.5V 8 15 19 22 ns
Maximum Input Rise 2.0V 1000 1000 1000 ns
f
and Fall Time 4.5V 500 500 500 ns
Power Dissipation (per counter) 55 pF Capacitance (Note 5)
Maximum Input Capacitance 5 10 10 10 pF
e
D
e
e
t
6 ns (unless otherwise specified)
r
f
74HC 54HC
eb
T
40 to 85§CT
A
A
eb
55 to 125§C
CC
e
T
25§C
A
Typ Guaranteed Limits
6.0V 31 24 20 MHz
4.5V 15 24 30 35 ns
6.0V 13 21 26 31 ns
4.5V 35 58 72 87 ns
6.0V 13 22 28 33 ns
4.5V 20 37 46 55 ns
6.0V 17 32 40 48 ns
6.0V 15 28 35 42 ns
6.0V 5 5 5 ns
6.0V 9 14 18 20 ns
6.0V 7 13 16 19 ns
6.0V 400 400 400 ns
2
CPDV
faICCVCC, and the no load dynamic current consumption, I
CC
e
CPDVCCfaICC.
S
Units
3
AC Electrical Characteristics MM54HC393/MM74HC393
e
CC
A
e
5V, T
V
Symbol Parameter Conditions Typ Guaranteed Limit Units
f
MAX
t
PHL,tPLH
t
PHL,tPLH
t
PHL,tPLH
t
PHL,tPLH
t
PHL
t
REM
t
W
25§C, C
e
L
15 pF, t
e
e
t
6ns
r
f
Maximum Operating Frequency 50 30 MHz
Maximum Propagation Delay, Clock A to Q
Maximum Propagation Delay, Clock A to Q
Maximum Propagation Delay, Clock A to Q
Maximum Propagation Delay, Clock A to Q
A
B
C
D
13 20 ns
19 35 ns
23 42 ns
27 50 ns
Maximum Propagation Delay, Clear to any Q 15 28 ns
Minimum Removal Time
b
25 ns
Minimum Pulse Width Clear or Clock 10 16 ns
AC Electrical Characteristics C
e
L
50 pF, t
Symbol Parameter Conditions V
f
MAX
t
PHL,tPLH
t
PHL,tPLH
t
PHL,tPLH
t
PHL,tPLH
t
PHL
t
REM
t
W
t
THL,tTLH
tr,t
C
PD
C
IN
Note 5: CPDdetermines the no load dynamic power consumption, P
Maximum Operating 2.0V 5 4 3 Frequency 4.5V 27 21 18 MHz
Maximum Propagation 2.0V 45 120 150 180 ns Delay Clock A to Q
A
Maximum Propagation 2.0V 68 190 240 285 ns Delay Clock A to Q
B
Maximum Propagation 2.0V 90 240 300 360 ns Delay Clock A to Q
C
Maximum Propagation Delay 2.0V 100 290 360 430 ns Clock to Q
D
Maximum Propagation 2.0V 54 165 210 250 ns Delay Clear to any Q 4.5V 18 33 41 49 ns
Minimum Clear Removal 2.0V 25 25 25 ns Time 4.5V 5 5 5 ns
Minimum Pulse Width 2.0V 30 80 100 120 ns Clear or Clock 4.5V 10 16 20 24 ns
Maximum Output Rise 2.0V 30 75 95 110 ns and Fall Time 4.5V 8 15 19 22 ns
Maximum Input Rise 1000 1000 1000 ns
f
and Fall Time 500 500 500 ns
Power Dissipation (per counter) 42 pF Capacitance (Note 5)
Maximum Input Capacitance 5 10 10 10 pF
e
D
e
e
t
6 ns (unless otherwise specified)
r
f
74HC 54HC
eb
T
40 to 85§CT
A
A
eb
55 to 125§C
CC
e
T
25§C
A
Typ Guaranteed Limits
6.0V 31 24 20 MHz
4.5V 15 24 30 35 ns
6.0V 13 21 26 31 ns
4.5V 23 38 47 57 ns
6.0V 20 32 40 48 ns
4.5V 30 48 60 72 ns
6.0V 26 41 51 61 ns
4.5V 35 58 72 87 ns
6.0V 30 50 62 75 ns
6.0V 15 28 35 42 ns
6.0V 5 5 5 ns
6.0V 9 14 18 20 ns
6.0V 7 13 16 19 ns
400 400 400 ns
2
CPDV
faICCVCC, and the no load dynamic current consumption, I
CC
e
CPDVCCfaICC.
S
Units
4
Logic Timing Waveforms
TL/F/5337– 3
5
6
Physical Dimensions inches (millimeters)
Order Number MM54HC390J, MM54HC393J, MM74HC390J, or MM74HC393J
Order Number MM54HC390J, MM54HC393J, MM74HC390J, or MM74HC393J
NS Package J14A
NS Package J16A
7
Physical Dimensions inches (millimeters) (Continued)
Order Number MM74HC390N or MM74HC393N
NS Package N14A
MM54HC393/MM74HC393 Dual 4-Bit Binary Counter
MM54HC390/MM74HC390 Dual 4-Bit Decade Counter
Order Number MM74HC390N or MM74HC393N
NS Package N16A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user.
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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a
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a
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