Datasheet MM54C941, MM74C941 Datasheet (National Semiconductor)

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MM54C941/MM74C941 Octal Buffers/Line Receivers/ Line Drivers with TRI-STATE
Outputs
É
MM54C941/MM74C941 Octal Buffers/Line Receivers/Line Drivers with TRI-STATE Outputs
February 1988
General Description
e
5V, inputs can accept true TTL high
CC
Connection and Logic Diagrams
Dual-In-Line Package
Features
Y
Wide supply voltage range (3V to 15V)
Y
Low power consumption
Y
TTL compatibility (Improved on the inputs)
Y
High capacitive load
Y
TRI-STATE outputs
Y
Input protection
Y
20-pin dual-in-line package
Y
High output drive
Top View
Order Number MM54C941 or MM74C941
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
TL/F/5923
TL/F/5923– 1
TL/F/5923– 2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Voltage at Any Pin 0.3V to V
Operating Temperature Range (TA)
MM54C941 MM74C941
b
b
a
0.3V
CC
55§Ctoa125§C
40§Ctoa85§C
Storage Temperature Range (T
)
S
Power Dissipation (PD)
Dual-In-Line 700 mW Small Outline 500 mW
Operating V
V
CC
Range 3V to 15V
CC
Lead Temperature (TL)
65§Ctoa150§C
b
(Soldering, 10 seconds) 260
DC Electrical Characteristics Min/Max limits apply across temperature range, unless otherwise noted
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
I
IN(1)
I
IN(0)
I
CC
I
OZ
Logical ‘‘1’’ Input Voltage V
Logical ‘‘0’’ Input Voltage V
Logical ‘‘1’’ Output Voltage V
Logical ‘‘0’’ Output Voltage V
Logical ‘‘1’’ Input Current V
Logical ‘‘0’’ Input Current V
Supply Current V
TRI-STATE Leakage V
CMOS/TTL INTERFACE
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
Logical ‘‘1’’ Input Voltage 54C, V
Logical ‘‘0’’ Input Voltage 54C, V
Logical ‘‘1’’ Output Voltage 54C, V
Logical ‘‘0’’ Output Voltage 54C, V
OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet)
I
SOURCE
I
SOURCE
I
SINK
I
SINK
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation.
Output Source Current V (P-Channel) T
Output Source Current V (P-Channel) T
Output Sink Current V (N-Channel) T
Output Sink Current V (N-Channel) T
e
5.0V 2.5 V
CC
e
V
10V 8.0 V
CC
e
5.0V 0.8 V
CC
e
V
10V 2.0 V
CC
CC
V
CC
CC
V
CC
CC
CC
CC
CC
74C, V
74C, V
74C, V 54C, V 74C, V
74C, V
CC
e
A
CC
e
A
CC
e
A
CC
e
A
e e
e e
e
e
e
e
e
25§C
e
25§C
e
25§C
e
25§C
eb
5.0V, I 10V, I
5.0V, I 10V, I
15V, V
15V, V
10mA 4.5 V
O
eb
10mA 9.0 V
O
e
10 mA 0.5 V
O
e
10 mA 1.0 V
O
e
15V 0.005 1.0 mA
IN
e
0V
IN
b
1.0
b
0.005 mA
15V 0.05 300 mA
15V, V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
5.0V, V
10V, V
5.0V, V
10V, V
e
0V or 15V
OUT
e
4.5V V
e
4.75V V
e
4.5V 0.8 V
e
4.75V 0.8 V
e e e e
e e
4.5V, I
4.75V, I
4.5V, I
4.75V, I
4.5V, I
4.75V, I
OUT
OUT
OUT
OUT
eb
450 mAV
O
eb
450 mAV
O
eb
2.2 mA 2.4 V
O
eb
2.2 mA 2.4 V
O
e
2.2 mA 0.4 V
O
e
2.2 mA 0.4 V
O
e
0V
e
0V
e
V
CC
e
V
CC
b
2.5 V
CC
b
2.5 V
CC
b
0.4 V
CC
b
0.4 V
CC
b
14.0
b
36.0
b
30.0 mA
b
70.0 mA
12.0 20.0 mA
48.0 70 mA
g
10 mA
18V
C
§
2
AC Electrical Characteristics* T
e
A
25§C, C
e
50 pF, unless otherwise specified
L
Symbol Parameter Conditions Min Typ Max Units
t
pd1,tpd0
t
IH,tOH
t
H1,tH0
t
THL,tTLH
C
PD
Propagation Delay V (Data IN to OUT) V
Propagation Delay Output R Disable to Logic Level (from V High Impedance State) (from a V Logic Level)
Propagation Delay Output R Disable to Logic Level (from V High Impedance State) V
Transition Time V
e
CC
e
CC
e
V
CC
e
V
CC
e
1kX,C
L
e
CC
e
CC
e
1kX,C
L
e
CC
e
CC
e
CC
e
V
CC
e
V
CC
e
V
CC
Power Dissipation Capacitance (Note 3) (Output Enabled per Buffer) 100 pF
e
5.0V, C 10V, C
5.0V, C 10V, C
5.0V 100 200 ns
50 pF 70 140 ns
L
e
50 pF 35 70 ns
L
e
150 pF 90 160 ns
L
e
150 pF 45 90 ns
L
e
50 pF
L
210V 55 110 ns
e
50 pF
L
5.0V 100 200 ns 10V 55 110 ns
e
5.0V, C 10V, C
5.0V, C 10V, C
50 pF 50 100 ns
L
e
50 pF 30 60 ns
L
e
150 pF 80 160 ns
L
e
150 pF 50 100 ns
L
(Output Disabled per Buffer) 10 pF
C
IN
C
O
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: C
AN-90.
Input Capacitance (Note 2) (Any Input) V
(Output Capacitance) V (Output Disabled) T
determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics Application Note,
PD
e
0V, fe1 MHz, 10 pF
IN
e
T
25§C
A
e
0V, fe1 MHz,
IN
e
25§C
A
10 pF
Truth Table
OD1 OD2 Input Output
00 0 0 00 1 1 01 X Z 10 X Z 11 X Z
e
1
High
e
0
Low
e
X
Don’t Care
e
Z
TRI-STATE
3
Typical Performance Characteristics
N-Channel Output
@
Drive
25§C
P-Channel Output
@
Drive
25§C
Propagation Delay vs Load Capacitance
Typical Application
TL/F/5923– 3
TL/F/5923– 5
TL/F/5923– 4
DtPDper pF of Load Capacitance
TL/F/5923– 6
TL/F/5923– 7
4
AC Test Circuits and Switching Time Waveforms
t
pd0,tpd1
TL/F/5923– 8
CMOS to CMOS
TL/F/5923– 9
t1Hand t
H1
t0Hand t
H0
Note: Delays measured with input tr,t
TL/F/5923– 10
TL/F/5923– 12
s
20 ns.
f
t
1H
Note: VOHis defined as the DC output high voltage when the device is loaded with
a1kXresistor to ground.
t
0H
Note: VOLis defined as the DC output low voltage when the device is loaded with
a1kXresistor to V
.
CC
t
H1
t
H0
TL/F/5923– 11
TL/F/5923– 13
5
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C941J or MM74C941J
NS Package Number J20A
Molded Dual-In-Line Package (N)
Order Number MM54C941N or MM74C941N
NS Package Number N20A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user.
National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.
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MM54C941/MM74C941 Octal Buffers/Line Receivers/Line Drivers with TRI-STATE Outputs
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