MM54C941/MM74C941 Octal Buffers/Line Receivers/
Line Drivers with TRI-STATE
Outputs
É
MM54C941/MM74C941 Octal Buffers/Line Receivers/Line Drivers with TRI-STATE Outputs
February 1988
General Description
These octal buffers and line drivers are monolithic complementary MOS (CMOS) integrated circuits with TRI-STATE
outputs. These outputs have been specially designed to
drive highly capacitive loads such as bus-oriented systems.
These devices have a fan-out of 6 low power Schottky
loads. When V
and low logic levels.
e
5V, inputs can accept true TTL high
CC
Connection and Logic Diagrams
Dual-In-Line Package
Features
Y
Wide supply voltage range (3V to 15V)
Y
Low power consumption
Y
TTL compatibility (Improved on the inputs)
Y
High capacitive load
Y
TRI-STATE outputs
Y
Input protection
Y
20-pin dual-in-line package
Y
High output drive
Top View
Order Number MM54C941 or MM74C941
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor CorporationRRD-B30M105/Printed in U. S. A.
TL/F/5923
TL/F/5923– 1
TL/F/5923– 2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin0.3V to V
Operating Temperature Range (TA)
MM54C941
MM74C941
b
b
a
0.3V
CC
55§Ctoa125§C
40§Ctoa85§C
Storage Temperature Range (T
)
S
Power Dissipation (PD)
Dual-In-Line700 mW
Small Outline500 mW
Operating V
V
CC
Range3V to 15V
CC
Lead Temperature (TL)
65§Ctoa150§C
b
(Soldering, 10 seconds)260
DC Electrical Characteristics Min/Max limits apply across temperature range, unless otherwise noted
SymbolParameterConditionsMinTypMaxUnits
CMOS TO CMOS
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
I
IN(1)
I
IN(0)
I
CC
I
OZ
Logical ‘‘1’’ Input VoltageV
Logical ‘‘0’’ Input VoltageV
Logical ‘‘1’’ Output VoltageV
Logical ‘‘0’’ Output VoltageV
Logical ‘‘1’’ Input CurrentV
Logical ‘‘0’’ Input CurrentV
Supply CurrentV
TRI-STATE LeakageV
CMOS/TTL INTERFACE
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
Logical ‘‘1’’ Input Voltage54C, V
Logical ‘‘0’’ Input Voltage54C, V
Logical ‘‘1’’ Output Voltage54C, V
Logical ‘‘0’’ Output Voltage54C, V
OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet)
I
SOURCE
I
SOURCE
I
SINK
I
SINK
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Output Source CurrentV
(P-Channel)T
Output Source CurrentV
(P-Channel)T
Output Sink CurrentV
(N-Channel)T
Output Sink CurrentV
(N-Channel)T
e
5.0V2.5V
CC
e
V
10V8.0V
CC
e
5.0V0.8V
CC
e
V
10V2.0V
CC
CC
V
CC
CC
V
CC
CC
CC
CC
CC
74C, V
74C, V
74C, V
54C, V
74C, V
74C, V
CC
e
A
CC
e
A
CC
e
A
CC
e
A
e
e
e
e
e
e
e
e
e
25§C
e
25§C
e
25§C
e
25§C
eb
5.0V, I
10V, I
5.0V, I
10V, I
15V, V
15V, V
10mA4.5V
O
eb
10mA9.0V
O
e
10 mA0.5V
O
e
10 mA1.0V
O
e
15V0.0051.0mA
IN
e
0V
IN
b
1.0
b
0.005mA
15V0.05300mA
15V, V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
5.0V, V
10V, V
5.0V, V
10V, V
e
0V or 15V
OUT
e
4.5VV
e
4.75VV
e
4.5V0.8V
e
4.75V0.8V
e
e
e
e
e
e
4.5V, I
4.75V, I
4.5V, I
4.75V, I
4.5V, I
4.75V, I
OUT
OUT
OUT
OUT
eb
450 mAV
O
eb
450 mAV
O
eb
2.2 mA2.4V
O
eb
2.2 mA2.4V
O
e
2.2 mA0.4V
O
e
2.2 mA0.4V
O
e
0V
e
0V
e
V
CC
e
V
CC
b
2.5V
CC
b
2.5V
CC
b
0.4V
CC
b
0.4V
CC
b
14.0
b
36.0
b
30.0mA
b
70.0mA
12.020.0mA
48.070mA
g
10mA
18V
C
§
2
AC Electrical Characteristics* T
e
A
25§C, C
e
50 pF, unless otherwise specified
L
SymbolParameterConditionsMinTypMaxUnits
t
pd1,tpd0
t
IH,tOH
t
H1,tH0
t
THL,tTLH
C
PD
Propagation DelayV
(Data IN to OUT)V
Propagation Delay OutputR
Disable to Logic Level (fromV
High Impedance State) (from aV
Logic Level)
Propagation Delay OutputR
Disable to Logic Level (fromV
High Impedance State)V
Transition TimeV
e
CC
e
CC
e
V
CC
e
V
CC
e
1kX,C
L
e
CC
e
CC
e
1kX,C
L
e
CC
e
CC
e
CC
e
V
CC
e
V
CC
e
V
CC
Power Dissipation Capacitance(Note 3)
(Output Enabled per Buffer)100pF
e
5.0V, C
10V, C
5.0V, C
10V, C
5.0V100200ns
50 pF70140ns
L
e
50 pF3570ns
L
e
150 pF90160ns
L
e
150 pF4590ns
L
e
50 pF
L
210V55110ns
e
50 pF
L
5.0V100200ns
10V55110ns
e
5.0V, C
10V, C
5.0V, C
10V, C
50 pF50100ns
L
e
50 pF3060ns
L
e
150 pF80160ns
L
e
150 pF50100ns
L
(Output Disabled per Buffer)10pF
C
IN
C
O
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: C
AN-90.
Input Capacitance(Note 2)
(Any Input)V
(Output Capacitance)V
(Output Disabled)T
determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics Application Note,
PD
e
0V, fe1 MHz,10pF
IN
e
T
25§C
A
e
0V, fe1 MHz,
IN
e
25§C
A
10pF
Truth Table
OD1OD2InputOutput
00 0 0
00 1 1
01 X Z
10 X Z
11 X Z
e
1
High
e
0
Low
e
X
Don’t Care
e
Z
TRI-STATE
3
Typical Performance Characteristics
N-Channel Output
@
Drive
25§C
P-Channel Output
@
Drive
25§C
Propagation Delay vs
Load Capacitance
Typical Application
TL/F/5923– 3
TL/F/5923– 5
TL/F/5923– 4
DtPDper pF of Load
Capacitance
TL/F/5923– 6
TL/F/5923– 7
4
AC Test Circuits and Switching Time Waveforms
t
pd0,tpd1
TL/F/5923– 8
CMOS to CMOS
TL/F/5923– 9
t1Hand t
H1
t0Hand t
H0
Note: Delays measured with input tr,t
TL/F/5923– 10
TL/F/5923– 12
s
20 ns.
f
t
1H
Note: VOHis defined as the DC output high voltage when the device is loaded with
a1kXresistor to ground.
t
0H
Note: VOLis defined as the DC output low voltage when the device is loaded with
a1kXresistor to V
.
CC
t
H1
t
H0
TL/F/5923– 11
TL/F/5923– 13
5
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C941J or MM74C941J
NS Package Number J20A
Molded Dual-In-Line Package (N)
Order Number MM54C941N or MM74C941N
NS Package Number N20A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or2. A critical component is any component of a life
systems which, (a) are intended for surgical implantsupport device or system whose failure to perform can
into the body, or (b) support or sustain life, and whosebe reasonably expected to cause the failure of the life
failure to perform, when properly used in accordancesupport device or system, or to affect its safety or
with instructions for use provided in the labeling, caneffectiveness.
be reasonably expected to result in a significant injury
to the user.
National SemiconductorNational SemiconductorNational SemiconductorNational Semiconductor
CorporationEuropeHong Kong Ltd.Japan Ltd.
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MM54C941/MM74C941 Octal Buffers/Line Receivers/Line Drivers with TRI-STATE Outputs
Arlington, TX 76017Email: cnjwge@tevm2.nsc.comOcean Centre, 5 Canton Rd.Fax: 81-043-299-2408
Tel: 1(800) 272-9959Deutsch Tel: (
Fax: 1(800) 737-7018English Tel: (
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.