查询MM54C901供应商
MM54C901/MM74C901 Hex Inverting TTL Buffer
MM54C902/MM74C902 Hex Non-Inverting TTL Buffer
MM54C903/MM74C903 Hex Inverting CMOS Buffer
MM54C904/MM74C904 Hex Non-Inverting CMOS Buffer
February 1988
MM54C901/MM74C901 (TTL), MM54C903/MM74C903 (CMOS) Hex Inverting Buffer
MM54C902/MM74C902 (TTL), MM54C904/MM74C904 (CMOS) Hex Non-Inverting Buffer
General Description
These hex buffers employ complementary MOS to achieve
wide supply operating range, low power consumption, and
high noise immunity. These buffers provide direct interface
from PMOS into CMOS or TTL and direct interface from
CMOS to TTL or CMOS operating at a reduced V
CC
supply.
Connection Diagrams
Dual-In-Line Package
MM54C901/MM74C901
MM54C903/MM74C903
Top View
Order Number MM54C901,
MM74C901, MM54C903 or MM74C903
TL/F/5909– 1
Features
Y
Wide supply voltage range 3.0V to 15V
Y
Guaranteed noise margin 1.0V
Y
High noise immunity 0.45 VCC(typ.)
Y
TTL compatibility Fan out of 2
Dual-In-Line Package
MM54C902/MM74C902
MM54C904/MM74C904
Top View
Order Number MM54C902,
MM74C902, MM54C904 or MM74C904
driving standard TTL
TL/F/5909– 2
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
TL/F/5909
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
Voltage at Any Input Pin
MM54C901/MM74C901
MM54C902/MM74C902
MM54C903/MM74C903 V
MM54C904/MM74C904 V
Storage Temperature Range (T
b
0.3V to V
b
17V to V
CC
b
17V to V
CC
b
)
S
a
0.3V
CC
b
0.3V toa15V
b
0.3V toa15V
a
0.3V
CC
a
0.3V
CC
65§Ctoa150§C
Power Dissipation (PD)
Dual-In-Line 700 mW
Small Outline 500 mW
Operating Temperature Range (T
MM54C901, MM54C902,
MM54C903, MM54C904
MM74C901, MM74C902,
MM74C903, MM74C904
Operating VCCRange 3.0V to 15V
Absolute Maximum V
CC
Lead Temperature (TL)
(Soldering, 10 seconds) 260
)
A
b
55§Ctoa125§C
b
40§Ctoa85§C
DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
I
IN(1)
I
IN(0)
I
CC
TTL TO CMOS
V
IN(1)
V
IN(0)
CMOS TO TTL
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
Logical ‘‘1’’ Input Voltage V
Logical ‘‘0’’ Input Voltage V
Logical ‘‘1’’ Output Voltage V
Logical ‘‘0’’ Output Voltage V
Logical ‘‘1’’ Input Current V
Logical ‘‘0’’ Input Current V
Supply Current V
Logical ‘‘1’’ Input Voltage 54C V
Logical ‘‘0’’ Input Voltage 54C V
Logical ‘‘1’’ Input Voltage
MM54C901, MM54C903 V
MM54C902, MM54C904 V
MM74C901, MM74C903 V
MM74C902, MM74C904 V
Logical ‘‘0’’ Input Voltage
MM54C901, MM54C903 V
MM54C902, MM54C904 V
MM74C901, MM74C903 V
MM74C902, MM74C904 V
Logical ‘‘1’’ Output Voltage 54C V
Logical ‘‘0’’ Output Voltage
MM54C901, MM54C903 V
MM54C902, MM54C904 V
MM74C901, MM74C903 V
MM74C902, MM74C904 V
e
5.0V 3.5 V
CC
e
V
10V 8.0 V
CC
e
5.0V 1.5 V
CC
e
V
10V 2.0 V
CC
e
CC
e
V
CC
e
CC
e
V
CC
e
CC
e
CC
e
CC
74C V
74C V
e
CC
e
CC
e
CC
e
CC
e
CC
e
CC
e
CC
e
CC
74C V
e
CC
e
CC
e
CC
e
CC
eb
5.0V, I
10V, I
10 mA 4.5 V
O
eb
10 mA 9.0 V
O
5.0V 0.5 V
10V 1.0 V
e
15V, V
15V, V
15V 0.005 1.0 m A
IN
e
0V
IN
b
1.0
b
0.005 mA
15V 0.05 15 mA
e
4.5V V
CC
e
4.75V V
CC
e
4.5V 0.8 V
CC
e
4.75V 0.8 V
CC
b
1.5 V
CC
b
1.5 V
CC
4.5V 4.0 V
4.5V V
4.75V 4.25 V
4.75V V
b
1.5 V
CC
b
1.5 V
CC
4.5V 1.0 V
4.5V 1.5 V
4.75V 1.0 V
4.75V 1.5 V
e
CC
e
CC
4.5V, I
4.5V, I
4.75V, I
4.75V, I
eb
4.5V, I
4.75V, I
e
O
e
O
e
O
e
O
800 mA 2.4 V
O
eb
800 mA 2.4 V
O
2.6 mA 0.4 V
3.2 mA 0.4 V
2.6 mA 0.4 V
3.2 mA 0.4 V
18V
C
§
2