National Semiconductor LP3939 Technical data
查询LP3939供应商
LP3939
Power Amplifier Driver for Dual Band CDMA Handsets
LP3939 Power Amplifier Driver for Dual Band CDMA Handsets
November 2003
General Description
Designed specifically for Qualcomm’s MSM3xxx and
MSM5xxx series, the LP3939 is an integrated device that
provides interface to the baseband processor to powerswitch two independent power amplifiers in dual band applications. By integrating the discrete components necessary
to achieve the same functions, the LP3939 drastically reduces board space and component cost.
LP3939 Application Circuit
Features
n Power-switch for dual band CDMA power amplifier
Key Specifications
n 0.002 µA Quiescent Current (typ)
n LLP16 Package
Applications
n Dual-band CDMA phones with MSM3xxx or MSM5xxx
platform
Note: This application circuit shows the connection interface to a typical Skyworks PA. Connections to other PA vendors may vary slightly.
© 2003 National Semiconductor Corporation DS200831 www.national.com
20083101
Connection Diagram
LP3939
(LLP16: NSC Marketing Drawing LQA16A)
Pin Description
Top View
20083102
See NS Package Number LQA16A
Pin Name Functional Description
1 INV_A1 Input
2V
DD2
Supply. V
DD1
and V
DD2
must be
tied together externally.
3 PCS_ON Output, open drain
4 PCS_GAIN Output, open drain
5 INV_Y1 Output
6 GAIN_MODE Input
7 EN_CELL Input
8 EN_PCS Input
9 CELL_GAIN Output, open drain
10 CELL_ON Output, open drain
11 V
DD1
Supply. V
DD1
and V
DD2
must be
tied together externally.
12 PA_ON Output
13 INV_A2 Input
14 INV_Y2 Output, open drain
15 GND GND
16 A1_SINK Output, open drain
Ordering Information
LP3939 Supplied as 1k Units, Tape and Reel LP3939 Supplied as 4.5k Units, Tape and Reel Package Marking
LP3939ILQ LP3939ILQX National Logo
Note:
U-wafer fab code
Z-assembly plant code
XY-date code
TT-die run traceability
www.national.com 2
UZXYTT
LP3939
LP3939
Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Storage Temperature −65˚C to +150˚C
ESD (Note 4):
Human Body Model 2 kV
Machine Model 200V
Distributors for availability and specifications.
V
DD1,VDD2
EN_CELL, EN_PCS,
GAIN_MODE, INV_A1,
INV_A2, PA_ON, INV_Y1,
CELL_ON, CELL_GAIN,
PCS_ON, PCS_GAIN, INV_Y2
and A1_SINK −0.3V to (V
GND to GND SLUG
Junction Temperature 150˚C
−0.3V to +6.0V
+ 0.3V)
DD
±
0.3V
Operating Ratings (Notes 1, 2)
V
DD1,VDD2
Junction Temperature −40˚C to +125˚C
Operating Temperature −40˚C to +85˚C
Thermal Resistance
θ
(LLP16)
JA
Maximum Power Dissipation
(Note 5) 1.38W
Maximum Power Dissipation
(Note 3) 2.0W
DC Electrical Characteristics
Unless otherwise noted, V
DD1=VDD2
pearing in boldface type apply over the entire junction temperature range for operation, −40˚C to +85˚C. (Note 6)
Symbol Parameter Conditions Typ
I
IN
I
Q
I
LEAKAGE
R
DS-ON
V
IH
V
IL
V
OH
V
OL
Input Current All Input Pins 0.05 5 µA
Quiescent Current All inputs tied to VDDor ground.
Output Leakage Current CELL_ON, PCS_ON
MOSFET’s ON Resistance P-Ch, VDD=3V
Logic High Input 1.8V ≤ V
Logic Low Input 1.8V ≤ VDD≤ 3.5V
Logic High Output PA_ON, INV_Y1,
Logic Low Output PA_ON, INV_Y1, I
= 3V. Typical values and limits appearing in normal type apply for TJ= 25˚C. Limits ap-
Limit
Min Max
No load at the outputs.
0.002 5 µA
CELL_GAIN, PCS_GAIN
A1_SINK 5
CELL_ON, PCS_ON
275 500
CELL_GAIN, PCS_GAIN
DD
=2V
430 650
P-Ch, V
CELL_ON, PCS_ON
CELL_GAIN, PCS_GAIN
<
2.5V
DD
EN_CELL, EN_PCS, INV_A1,
1.4
GAIN_MODE, INV_A2
2.5V ≤ V
EN_CELL, EN_PCS, INV_A1,
DD
≤ 3.5V
2.0
GAIN_MODE, INV_A2
EN_CELL, EN_PCS, INV_A1,
GAIN_MODE, INV_A2
I
SOURCE
=1mA
INV_Y2,
I
SOURCE
=1mA
INV_Y2, A1_SINK
=1mA
I
SINK
=1mA 80 200
SINK
2.93 2.8
2.74 2.5
16 55
1.8V to 5.5V
39.8˚C/W
Units
10
mΩ
0.4 V
mV
µA
V
V
www.national.com3
Loading...