National Semiconductor LP3856-ADJ Technical data

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LP3856-ADJ
3A Fast Response Ultra Low Dropout Linear Regulators

LP3856-ADJ 3A Fast Response Ultra Low Dropout Linear Regulators

July 2005

General Description

The LP3856-ADJ fast ultra low-dropout linear regulators op­erate from a +2.5V to +7.0V input supply. These ultra low
dropout linear regulators respond very quickly to step
changes in load, which makes them suitable for low voltage
microprocessor applications. The LP3856-ADJ is developed
on a CMOS process which allows low quiescent current
operation independent of output load current. This CMOS
process also allows the LP3856-ADJ to operate under ex­tremely low dropout conditions.

Dropout Voltage: Ultra low dropout voltage; typically 39mV
at 300mA load current and 390mV at 3A load current.

Ground Pin Current: Typically 4mA at 3A load current.
Shutdown Mode: Typically 10nA quiescent current when

the shutdown pin is pulled low.
Adjustable Output Voltage: The output voltage may be

programmed via two external resistors.

Typical Application Circuit

Features

n Ultra low dropout voltage
n Stable with selected ceramic capacitors
n Low ground pin current
n Load regulation of 0.08%
n 10nA quiescent current in shutdown mode
n Guaranteed output current of 3A DC
n Available in TO-263 and TO-220 packages
n Overtemperature/overcurrent protection
n −40˚C to +125˚C junction temperature range

Applications

n Microprocessor power supplies
n GTL, GTL+, BTL, and SSTL bus terminators
n Power supplies for DSPs
n SCSI terminator
n Post regulators
n High efficiency linear regulators
n Battery chargers
n Other battery powered applications

**See Application Hints

© 2005 National Semiconductor Corporation DS200742 www.national.com

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Connection Diagrams

LP3856-ADJ

Top View

20074205

TO220-5 Package

Bent, Staggered Leads

Pin Description for TO220-5 and TO263-5 Packages

Pin # LP3856-ADJ

Name Function

1SD

2V

IN

Shutdown

Input Supply

3 GND Ground

4V

OUT

Output Voltage

5 ADJ Set Output Voltage

Ordering Information

Top View

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TO263-5 Package

Package Type Designator is "T" for TO220 package, and "S" for TO263 package.

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TABLE 1. Package Marking and Ordering Information

Output

Voltage Order Number

Current

Description

Package

Type Package Marking Supplied As:

ADJ LP3856ES-ADJ 3A TO263-5 LP3856ES-ADJ Rail

ADJ LP3856ESX-ADJ 3A TO263-5 LP3856ES-ADJ Tape and Reel

ADJ LP3856ET-ADJ 3A TO220-5 LP3856ET-ADJ Rail

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Block Diagram

LP3856-ADJ

LP3856-ADJ

20074229

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Absolute Maximum Ratings (Note 1)

I

(Survival) Short Circuit Protected

OUT

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

LP3856-ADJ

Operating Ratings

Storage Temperature Range −65˚C to +150˚C

Lead Temperature

(Soldering, 5 sec.) 260˚C

ESD Rating (Note 3) 2 kV

Power Dissipation (Note 2) Internally Limited

Input Supply Voltage (Survival) −0.3V to +7.5V

Shutdown Input Voltage

Input Supply Voltage (Operating),
(Note 10) 2.5V to 7.0V

Shutdown Input Voltage
(Operating) −0.3V to 7.0V

Maximum Operating Current (DC) 3A

Operating Junction Temp. Range −40˚C to +125˚C

(Survival) −0.3V to 7.5V

Output Voltage (Survival), (Note

6), (Note 7) −0.3V to +6.0V

Electrical Characteristics
LP3856-ADJ

Limits in standard typeface are for TJ= 25˚C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: V

IN=VO(NOM)

+ 1V, IL= 10 mA, C

Symbol Parameter Conditions Typ

V

+1V ≤ VIN≤ 7V

V

∆V

ADJ

I

ADJ

OL

Adjust Pin Voltage

Adjust Pin Input Current

Output Voltage Line

OUT

10 mA ≤ I

V

OUT

10 mA ≤ I

V

OUT

≤ 3A

L

+1V ≤ VIN≤ 7V

≤ 3A

L

+1V ≤ VIN≤ 7.0V 0.02

Regulation (Note 8)

∆V

/ ∆I

O

OUT

Output Voltage Load

10 mA ≤ I

≤ 3A 0.08

L

Regulation
(Note 8)

I

V

IN-VOUT

= 300 mA 39 55

L

Dropout Voltage

I

I

I

O(PK)

GND

GND

(Note 9)

Ground Pin Current In
Normal Operation Mode

Ground Pin Current In
Shutdown Mode

Peak Output Current VO≥ V

= 3A 390 500

I

L

= 300 mA 4 9

I

L

IL=3A 4 9

VSD≤ 0.3V 0.01 10 µA

-40˚C ≤ T

≤ 85˚C 50

J

O(NOM)

Short Circuit Protection

I

SC

Short Circuit Current 6 A

= 10µF, VSD= 2V.

OUT

LP3856-ADJ

(Note 4)

(Note 5)

Min Max

1.216

1.198

1.180

1.234

1.253

10 100 nA

0.06

0.14

75

700

10

10

- 4% 4.5 A

Units

V

%

%

mV

mA

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Electrical Characteristics
LP3856-ADJ

Limits in standard typeface are for TJ= 25˚C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: V

Symbol Parameter Conditions Typ

Shutdown Input

V

SDT

T

dOFF

T

dON

I

SD

AC Parameters

PSRR Ripple Rejection

ρ

n(l/f

e

n

Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.

Note 2: At elevated temperatures, devices must be derated based on package thermal resistance. The devices in TO220 package must be derated at θ
(with 0.5in

0.5in

Note 3: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.

Note 4: Typical numbers are at 25˚C and represent the most likely parametric norm.

Note 5: Limits are guaranteed by testing, design, or statistical correlation.

Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the output must be diode-clamped to ground.

Note 7: The output PMOS structure contains a diode between the V

if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can typically withstand 200mA of DC current and 1Amp
of peak current.

Note 8: Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the input line voltage. Output voltage load
regulation is defined as the change in output voltage from the nominal value due to change in load current.

Note 9: Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. Dropout voltage
specification applies only to output voltages of 2.5V and above. For output voltages below 2.5V, the drop-out voltage is nothing but the input to output differential,
since the minimum input voltage is 2.5V.

Note 10: The minimum operating value for V

2

, 1oz. copper area), junction-to-ambient (with no heat sink). The devices in the TO263 surface-mount package must be derated at θjA= 60˚C/W (with

2

, 1oz. copper area), junction-to-ambient. See Application Hints.

(Continued)

IN=VO(NOM)

+ 1V, IL= 10 mA, C

= 10µF, VSD= 2V.

OUT

(Note 4)

LP3856-ADJ

(Note 5)

Units

Min Max

Shutdown Threshold

Output = High V

IN

Output = Low 0 0.3

2

V

Turn-off delay IL=3A 20 µs

Turn-on delay IL=3A 25 µs

SD Input Current VSD=V

V

IN=VOUT

= 10uF

C

OUT

= 3.3V, f = 120Hz

V

OUT

V

IN=VOUT

= 10uF

C

OUT

= 3.3V, f = 120Hz

V

OUT

IN

+1V

+ 0.5V

1nA

73

57

dB

Output Noise Density f = 120Hz 0.8 µV

150

100

µV (rms)

= 50˚C/W

jA

Output Noise Voltage

BW = 10Hz – 100kHz
V

BW = 300Hz – 300kHz
V

is equal to either [V

IN

= 2.5V

OUT

= 2.5V

OUT

and V

IN

OUT(NOM)+VDROPOUT

terminals. This diode is normally reverse biased. This diode will get forward biased

OUT

] or 2.5V, whichever is greater.

LP3856-ADJ

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