National Semiconductor LMX7300 Technical data

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LMP7300 Micropower Precision Comparator and Precision Reference with Adjustable Hysteresis

September 2007

LMP7300 Micropower Precision Comparator and Precision Reference with Adjustable

Hysteresis

General Description

The LMP7300 is a combination comparator and reference with ideal specifications for precision threshold detecting. The precision 2.048V reference comes with a 0.25% maximum error. The comparator features micopower (35 µW), low offset voltage (.75 mV max), and independent adjustable positive and negative hysteresis.

Hysteresis control for the comparator is accomplished through two external pins. The HYSTP pin sets the positive hysteresis and the HYSTN pin sets the negative hysteresis. The comparator design isolates the VIN source impedance and the programmable hysteresis components. This isolation prevents any undesirable interaction allowing the IC to maintain a precise threshold voltage during level detection.

The combination of low offset voltage, external hysteresis control, and precision voltage reference provides an easy to use micropower precision threshold detector.

The LMP7300 open collector output makes it ideal for mixed voltage system designs. The output voltage upper rail is unconstrained by VCC and can be pulled above VCC to a maximum of 12V. The LMP7300 is a member of the LMP precision amplifier family.

Typical Application

Micropower Precision Battery Low Voltage Detector for 3

Cell Discharge Voltage

Features

(For VS = 5V, typical unless otherwise noted)

Supply current

■

Propagation delay

■

Input offset voltage 0.3 mV

■

CMRR 100 dB

■

PSRR 100 dB

■

Positive and negative hysteresis control

■

Adjustable hysteresis 1 mV/mV

■

Reference voltage 2.048V

■

Reference voltage accuracy 0.25%

■

Reference voltage source current 1 mA

■

Wide supply voltage range 2.7V to 12V

■

Operating temperature range ambient −40°C to 125°C

■

Applications

Precision threshold detection

■

Battery monitoring

■

Battery management systems

■

Zero crossing detectors

■

13 μA

4 μs

LMP® is a registered trademark of National Semiconductor Corporation.

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/

LMP7300

Distributors for availability and specifications.

Junction Temperature (Note 3) +150°C Soldering Information

Infrared or Convection (20 sec) 235°C Wave Soldering Lead Temp. (10 sec) 260°C

ESD Tolerance (Note 2)

Human Body Model 2000V Machine Model 200V

Differential ±V

Supply Voltage (VS = V+ – V−)

Voltage at Input/Output Pins V+ + 0.3V, V− − 0.3V

Storage Temperature Range −65°C to +150°C

13.6V

Operating Ratings (Note 1)

Temperature Range (Note 3) −40°C to 125°C Supply Voltage (VS = V+ – V−)

Package Thermal Resistance (θJA (Note 3))

8-Pin SOIC 166°C/W 8-Pin MSOP 235°C/W

2.7V to 12V

2.7V Electrical Characteristics (Note 4)

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.7V, V− = 0V, and VCM = V+/2, R C

= 10 pF. Boldface limits apply at the temperature extremes.

LOAD

Symbol Parameter Conditions Min

(Note 6)

Supply Current R

= Open 9 12

PULLUP

Typ

(Note 5)

Comparator

TCV

CMRR Common Mode Rejection Ratio 1V < V

Input Offset Voltage VCM = V+/2 ±0.07 ±0.75

Input Offset Average Drift (Note 8) 1.8

Input Bias Current (Note 7) |VID| < 2.5V

1.2 3

Input Offset Current 0.15 0.5 nA

< 2.7V 80 100

PSRR Power Supply Rejection Ratio V+ = 2.7V to 12V 80 100 dB

LEAK

HYS

LIN

Output Low Voltage I

= 10 mA 0.25 0.4

LOAD

Output Leakage Current Comparator Output in High State 1 pA

Hysteresis Control Voltage Linearity

0 < Ref-HYSTP,N < 25 mV 1.000

25 mV < Ref-HYSTP,N < 100 mV 0.950

Hysteresis Leakage Current 1.2 3

Propagation Delay (High to Low)

Overdrive = 10 mV, CL = 10 pF 12 17

Overdrive = 100 mV, CL = 10 pF 4.5 7.6

Reference

Reference Voltage 2.043 2.048 2.053 V

Line Regulation VCC = 2.7V to 12V 14 80

Load Regulation I

TCV

Temperature Coefficient −40°C to 125°C 55 ppm/°C

REF/°C

Output Noise Voltage 0.1 Hz to 10 Hz 80

= 0 to 1 mA 0.2 0.5

OUT

10 Hz to 10 kHz 100

PULLUP

(Note 6)

= 100 kΩ,

Max

±2

0.5

Units

μA

μV/°C

mV/V

μs

μV/V

mV/mA

μV

RMS

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5V Electrical Characteristics (Note 4)

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, and VCM = V+/2, R 10 pF. Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 6)

Supply Current R

= Open 10 13

PULLUP

Typ

(Note 5)

Comparator

TCV

CMRR Common Mode Rejection Ratio

Input Offset Voltage VCM = V+/2 ±0.07 ±0.75

Input Offset Average Drift (Note 8) 1.8

Input Bias Current (Note 7) |VID| < 2.5V 1.2 3

Input Offset Current 0.15 0.5 nA

1 ≤ VCM ≤ 5V

80 100

PSRR Power Supply Rejection Ratio V+ = 2.7V to 12V 80 100 dB

LEAK

LIN

HYS

TPD Propagation Delay

Output Voltage Low I

= 10 mA 0.25 0.4 V

LOAD

Output Leakage Current Comparator Output in High State 1 pA

Hysteresis Control Voltage Linearity

0 < Ref-V

HYS

25 mV < Ref-V

TP,N < 25 mV 1.000

TP,N < 100 mV 0.950

HYS

Hysteresis Leakage Current 1.2 3

Overdrive = 10 mV, CL = 10 pF 12 15

(High to Low)

Overdrive = 100 mV, CL = 10 pF 4 7

Reference

Reference Voltage 2.043 2.048 2.053 V

Line Regulation VCC = 2.7V to 12V 14 80

Load Regulation I

TCV

Temperature Coefficient −40°C to 125°C 55 ppm/°C

REF/°C

Output Noise Voltage 0.1 Hz to 10 Hz 80

= 0 to 1 mA 0.2 0.5

OUT

10 Hz to 10 kHz 100

PULLUP

= 100 kΩ, C

Max

(Note 6)

±2

LOAD

Units

μA

μV/°C

mV/V

μs

μV/V

mV/mA

μV

LMP7300

RMS

12V Electrical Characteristics (Note 4)

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 12V, V− = 0V, and VCM = V+/2, R C

= 10 pF. Boldface limits apply at the temperature extremes.

LOAD

Symbol Parameter Conditions Min

(Note 6)

Supply Current R

= Open 11 14

PULLUP

Typ

(Note 5)

Comparator

TCV

CMRR Common Mode Rejection Ratio

Input Offset Voltage VCM = V+/2 ±0.08 ±0.75

Input Offset Average Drift (Note 8) 1.8

Input Bias Current (Note 7) |VID| > 2.5V 1.2 3

Input Offset Current 0.15 0.5 nA

1V ≤ V

≤ 12V

80 100

PSRR Power Supply Rejection Ratio V+ = 2.7V to 12V 80 100 dB

LEAK

Output Voltage Low I

= 10 mA 0.25 0.4 V

LOAD

Output Leakage Current Comparator Output in High State 1 pA

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PULLUP

= 100 kΩ,

Max

(Note 6)

±2

Units

µA

μV/°C

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Symbol Parameter Conditions Min

LIN

LMP7300

HYS

Hysteresis Control Voltage Linearity

0 < Ref-V

+HYS

25 mV < Ref-V

TP,N < 25 mV 1.000

TP,N < 100 mV 0.950

+HYS

Hysteresis Leakage Current 1.2 3

(Note 6)

Typ

(Note 5)

Max

(Note 6)

TPD Propagation Delay

(High to Low)

Overdrive = 10 mV, CL = 10 pF 11 15

Overdrive = 100 mV, CL = 10 pF 3.5 6.8

Reference

Reference Voltage TJ = 25°C 2.043 2.048 2.053 V

Line Regulation VCC = 2.7V to 12V 14 80

Load Regulation I

TCV

Temperature Coefficient −40°C to +125°C 55 ppm/°C

REF/°C

Output Noise Voltage 0.1 Hz to 10 Hz 80

= 0 to 1 mA 0.2 0.5 mV/mA

OUT

10 Hz to 10 kHz 100

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables.

Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)

Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

Note 3: The maximum power dissipation is a function of T PD = (T

Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA.

Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.

Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC) method.

Note 7: Positive current corresponds to current flowing into the device.

Note 8: Offset voltage average drift determined by dividing the change in VOS at temperature extremes, by the total temperature change.

– TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.

J(MAX)

, θJA. The maximum allowable power dissipation at any ambient temperature is

J(MAX)

Units

mV/V

μs

μV/V

μV

RMS

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing

8-Pin SOIC

8-Pin MSOP

LMP7300MA

LMP7300MAX 2.5k Units Tape and Reel

LMP7300MM

LMP7300MMX 3.5k Units Tape and Reel

LMP7300MA

C31A

95 Units/Rail

1k Units Tape and Reel

M08A

MUA08A

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Connection Diagram

LMP7300

8-Pin MSOP/SOIC

Top View

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Pin Descriptions

Pin Name

+IN Non-Inverting

−IN Inverting Comparator

GND Ground This pin may be connected to a negative DC voltage source for applications requiring a dual

OUT Comparator Output The output is an open-collector. It can drive voltage loads by using a pullup resistor, or it can

HYSTN Negative Hysteresis Pin This pin sets the lower trip voltage VIL. The common mode range is from 1V above the

HYSTP Positive Hysteresis pin This pin sets the upper trip voltage VIH. The common mode range is from 1V above the

REF Reference Voltage

Description

Comparator Input

Input

Output Pin

Positive Supply Terminal

The +IN has a common-mode voltage range from 1V above the negative rail to, and including, the positive rail. Internal ESD diodes, connected from the +IN pin to the rails, protect the input stage from overvoltage. If the input voltage exceeds the rails, the diodes turn on and clamp the input to a safe level.

The −IN has a common-mode voltage range from 1V above the negative rail to, and including, the positive rail. Internal ESD diodes, connected from the −IN pin to the rails, protects the input stage from overvoltage. If the input voltage exceeds the rails, the diodes turn on and clamp the input to a safe level.

supply. If connected to a negative supply, decouple this pin with 0.1 µF ceramic capacitor to ground. The internal reference output voltage is referenced to this pin. GND is the die substrate connection.

drive current loads by sinking a maximum output current. This pin may be taken to a maximum of +12V with respect to the ground pin, irrespective of supply voltage.

negative rail to VCC. The input signal must fall below VIL for the comparator to switch from high to low state.

negative rail to VCC. The input signal must rise above VIH for the comparator to switch from low to high state.

This is the output pin of a 2.048V band gap precision reference.

The supply voltage range is 2.7V to 12V. Decouple this pin with 0.1 μF ceramic capacitor to ground.

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