National Semiconductor LMX2487 Technical data

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LMX2487

3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low

LMX2487 High Performance Delta-Sigma Low Power Dual PLLatinum Frequency Synthesizer

February 2006

Power Dual PLLatinum

™

Frequency Synthesizers with

3.0 GHz Integer PLL

General Description

The LMX2487 is a low power, high performance delta-sigma
fractional-N PLL with an auxiliary integer-N PLL. It is fabri­cated using National Semiconductor’s advanced process.

With delta-sigma architecture, fractional spurs at lower offset
frequencies are pushed to higher frequencies outside the
loop bandwidth. The ability to push close in spur and phase
noise energy to higher frequencies is a direct function of the
modulator order. Unlike analog compensation, the digital
feedback technique used in the LMX2487 is highly resistant
to changes in temperature and variations in wafer process­ing. The LMX2487 delta-sigma modulator is programmable
up to fourth order, which allows the designer to select the
optimum modulator order to fit the phase noise, spur, and
lock time requirements of the system.

Serial data for programming the LMX2487 is transferred via
a three line high speed (20 MHz) MICROWIRE interface.
The LMX2487 offers fine frequency resolution, low spurs,
fast programming speed, and a single word write to change
the frequency. This makes it ideal for direct digital modula­tion applications, where the N counter is directly modulated
with information. The LMX2487 is available in a 24 lead

4.0 X 4.0 X 0.8 mm LLP package.

Applications

n Cellular phones and base stations

n Direct digital modulation applications
n Satellite and cable TV tuners
n WLAN Standards

Features

Quadruple Modulus Prescalers for Lower Divide Ratios

n RF PLL: 16/17/20/21 or 32/33/36/37
n IF PLL: 8/9 or 16/17

Advanced Delta Sigma Fractional Compensation

n 12 bit or 22 bit selectable fractional modulus
n Up to 4th order programmable delta-sigma modulator

Features for Improved Lock Times and Programming

n Fastlock / Cycle slip reduction
n Integrated time-out counter
n Single word write to change frequencies with Fastlock

Wide Operating Range

n LMX2487 RF PLL: 3.0 GHz to 6.0 GHz

Useful Features

n Digital lock detect output
n Hardware and software power-down control
n On-chip crystal reference frequency doubler.
n RF phase comparison frequency up to 50 MHz
n 2.5 to 3.6 volt operation with I

= 8.5 mA at 3.0 V

CC

Functional Block Diagram

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PLLatinum™is a trademark of National Semiconductor Corporation.

© 2006 National Semiconductor Corporation DS201547 www.national.com

Connection Diagram

LMX2487

Pin Descriptions

Pin # Pin

0 GND - Ground Substrate. This is on the bottom of the package and must be grounded.

1 CPoutRF O RF PLL charge pump output.

2 GND - RF PLL analog ground.

3 VddRF1 - RF PLL analog power supply.

4 FinRF I RF PLL high frequency input pin.

5 FinRF* I RF PLL complementary high frequency input pin. Shunt to ground with a 100 pF

6 LE I MICROWIRE Load Enable. High impedance CMOS input. Data stored in the shift

7 DATA I MICROWIRE Data. High impedance binary serial data input.

8 CLK I MICROWIRE Clock. High impedance CMOS Clock input. Data for the various counters is

9 VddRF2 - Power supply for RF PLL digital circuitry.

10 CE I Chip Enable control pin. Must be pulled high for normal operation.

11 VddRF5 I Power supply for RF PLL digital circuitry.

12 Ftest/LD O Test frequency output / Lock Detect.

13 FinIF I IF PLL high frequency input pin.

14 VddIF1 - IF PLL analog power supply.

15 GND - IF PLL digital ground.

16 CPoutIF O IF PLL charge pump output

17 VddIF2 - IF PLL power supply.

18 OSCout O Buffered output of the OSCin signal.

19 ENOSC I Oscillator enable. When this is set to high, the OSCout pin is enabled regardless of the

20 OSCin I Reference Input.

21 NC I This pin must be left open.

22 VddRF3 - Power supply for RF PLL digital circuitry.

23 FLoutRF O RF PLL Fastlock Output. Also functions as Programmable TRI-STATE CMOS output.

24 VddRF4 - RF PLL analog power supply.

Name

Top View

24-Pin LLP (SQ)

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I/O Pin Description

capacitor.

registers is loaded into the internal latches when LE goes HIGH

clocked into the 24 bit shift register on the rising edge

state of other pins or register bits.

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Absolute Maximum Ratings (Notes 1, 2)

LMX2487

Parameter Symbol

Power Supply Voltage V

Voltage on any pin with GND = 0V V

Storage Temperature Range T

Lead Temperature (Solder 4 sec.) T

Min Typ Max

CC

i

s

L

-0.3 4.25 V

-0.3 VCC+0.3 V

-65 +150 ˚C

Value

Units

+260 ˚C

Recommended Operating Conditions

Parameter Symbol

Power Supply Voltage (Note 1) V

Operating Temperature T

Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. "Recommended Operating Conditions" indicate conditions for
which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical
Characteristics. The guaranteed specifications apply only for the test conditions listed. The voltage at all the power supply pins of VddRF1, VddRF2, VddRF3,
VddRF4, VddRF5, VddIF1 and VddIF2 must be the same. V
through all these power pins.

Note 2: This Device is a high performance RF integrated circuit with an ESD rating
be done at ESD-free workstations.

Electrical Characteristics (V

CC

A

will be used to refer to the voltage at these pins and ICCwill be used to refer to the sum of all currents

CC

= 3.0V; -40˚C ≤ TA≤ +85˚C unless otherwise specified)

CC

Min Typ Max

2.5 3.0 3.6 V

-40 25 +85 ˚C

<

2 kV and is ESD sensitive. Handling and assembly of this device should only

Symbol Parameter Conditions

Icc PARAMETERS

I

RF

CC

IF

I

CC

TOTAL

I

CC

PD Power Down Current

I

CC

Power Supply Current,
RF Synthesizer

Power Supply Current,
IF Synthesizer

Power Supply Current,
Entire Synthesizer

IF PLL OFF
RF PLL ON
Charge Pump TRI-STATE

IF PLL ON
RF PLL OFF
Charge Pump TRI-STATE

IF PLL ON
RF PLL ON
Charge Pump TRI-STATE

CE = ENOSC = 0V
CLK, DATA, LE = 0V

RF SYNTHESIZER PARAMETERS

f

FinRF

p

FinRF

Operating
Frequency

LMX2487

Input Sensitivity 3000 - 6000 MHz -10 0 dBm

RF_P = 16 3000 4000

RF_P = 32 3000 6000

Phase Detector

f

COMP

Frequency
(Note 3)

RF_CPG = 0

CPoutRF

CPoutRF

=VCC/2

=VCC/2

I

CPoutRF

SRCE

RF Charge Pump
Source Current
(Note 4)

V

RF_CPG = 1
V

... ... µA

RF_CPG = 15
V

CPoutRF

=VCC/2

Value

Value

Min Typ Max

5.7 mA

2.5 mA

8.5 mA

<

1µA

95 µA

190 µA

1520 µA

Units

50 MHz

Units

MHz

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Electrical Characteristics (V

= 3.0V; -40˚C ≤ TA≤ +85˚C unless otherwise specified) (Continued)

CC

LMX2487

Symbol Parameter Conditions

RF SYNTHESIZER PARAMETERS

RF Charge Pump Sink

I

CPoutRF

SINK

Current
(Note 4)

RF Charge Pump

I

CPoutRF

TRI

TRI-STATE Current
Magnitude

Magnitude of RF CP

|I

CPoutRF

%MIS |

Sink vs. CP Source
Mismatch

|I

|I

CPoutRF

CPoutRF

%V |

%T |

Magnitude of RF CP
Current vs. CP Voltage

Magnitude of RF CP
Current vs. Temperature

IF SYNTHESIZER PARAMETERS

f

FinIF

p

FinIF

f

COMP

I

CPoutIF

I

CPoutIF

SRCE

SINK

Operating Frequency

IF Input Sensitivity -10 +5 dBm

Phase Detector
Frequency

IF Charge Pump Source
Current

IF Charge Pump Sink
Current

IF Charge Pump

I

CPoutIF

TRI

TRI-STATE Current
Magnitude

|I

|I

|I

CPoutIF

CPoutIF

CPoutIF

%MIS |

%V |

%TEMP

Magnitude of IF CP Sink
vs. CP Source Mismatch

Magnitude of IF CP
Current vs. CP Voltage

Magnitude of IF CP
Current vs. Temperature

OSCILLATOR PARAMETERS

f

OSCin

v

OSCin

I

OSCin

Oscillator Operating
Frequency

Oscillator Input
Sensitivity

Oscillator Input Current -100 100 µA

SPURS

Spurs in band(Note 5) -55 dBc

RF_CPG = 0

CPoutRF

=VCC/2

V

RF_CPG = 1
V

CPoutRF

=VCC/2

Value

Min Typ Max

-95 µA

-190 µA

Units

... ... µA

RF_CPG = 15
V

0.5 ≤ V

V
V
T

A

0.5 ≤ V
T

A

V

=VCC/2

CPoutRF

≤ VCC-0.5 2 10 nA

=

RF_CPG

>

2 3 10 %

RF_CPG ≤ 2 3 13 %

≤ VCC-0.5

CPoutRF

/2

CC

= 25˚C

CPoutRF

CPoutRF

= 25˚C

=VCC/2 4 %

CPoutRF

IF_P = 8 250 2000

IF_P = 16 250 3000

-1520 µA

28 %

MHz

10 MHz

V

CPoutIF=VCC

V

CPoutIF=VCC

0.5 ≤ V

V

CPoutIF=VCC

= 25˚C

T

A

0.5 ≤ V
= 25˚C

T

A

V

CPoutIF=VCC

/2 3.5 mA

/2 -3.5 mA

≤ VCCRF -0.5 2 10 nA

CPoutIF

CPoutIF

/2

≤ VCC-0.5

18 %

410 %

/2 4 %

OSC2X = 0 5 110 MHz

OSC2X = 1 5 20 MHz

0.5 V

CC

V

P-P

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LMX2487

Electrical Characteristics (V

Symbol Parameter Conditions

= 3.0V; -40˚C ≤ TA≤ +85˚C unless otherwise specified) (Continued)

CC

Value

Min Typ Max

PHASE NOISE

RF_CPG = 0 -202

RF Synthesizer

L

F1Hz

RF

Normalized Phase Noise
Contribution(Note 6)

RF_CPG = 1 -204

RF_CPG = 3 -206

RF_CPG = 7 -210

RF_CPG = 15 -210

IF Synthesizer

IF

L

F1Hz

Normalized Phase Noise

-209 dBc/Hz

Contribution

DIGITAL INTERFACE (DATA, CLK, LE, ENOSC, CE, Ftest/LD, FLoutRF)

V

IH

V

IL

I

IH

I

IL

V

OH

V

OL

High-Level Input Voltage 1.6 V

CC

Low-Level Input Voltage 0.4 V

High-Level Input Current VIH=V

CC

-1.0 1.0 µA

Low-Level Input Current VIL= 0 V -1.0 1.0 µA

High-Level Output
Voltage

Low-Level Output
Voltage

= -500 µA VCC-0.4 V

I

OH

= 500 µA 0.4 V

I

OL

MICROWIRE INTERFACE TIMING

t

CS

t

CH

t

CWH

t

CWL

t

ES

t

EW

Note 3: For Phase Detector Frequencies above 20 MHz, Cycle Slip Reduction (CSR) may be required. Legal divide ratios are also required.

Note 4: Refer to table in Section 2.4.2 RF_CPG -- RF PLL Charge Pump Gain for complete listing of charge pump currents.

Note 5: In order to measure the in-band spur, the fractional word is chosen such that when reduced to lowest terms, the fractional numerator is one. The spur offset

frequency is chosen to be the comparison frequency divided by the reduced fractional denominator. The loop bandwidth must be sufficiently wide to negate the
impact of the loop filter. Measurement conditions are: Spur Offset Frequency = 10 kHz, Loop Bandwidth = 100 kHz, Fraction = 1/2000, Comparison Frequency =
20 MHz, RF_CPG = 7, DITH = 0, VCO Frequency = 3 GHz, and a 4th Order Modulator (FM = 0). These are relatively consistent over tuning range.

Note 6: Normalized Phase Noise Contribution is defined as: L
measured at an offset frequency, f, ina1HzBandwidth. The offset frequency, f, must be chosen sufficiently smaller than the PLL loop bandwidth, yet large enough
to avoid substantial phase noise contribution from the reference source. Measurement conditions are: Offset Frequency = 11 kHz, Loop Bandwidth = 100 kHz for
RF_CPG = 7, Fraction = 1/2000, Comparison Frequency = 20 MHz, FM = 0, DITH = 0, VCO Frequency = 3 GHz.

Data to Clock Set Up
Time

See MICROWIRE Input Timing 25 ns

Data to Clock Hold Time See MICROWIRE Input Timing 8 ns

Clock Pulse Width High See MICROWIRE Input Timing 25 ns

Clock Pulse Width Low See MICROWIRE Input Timing 25 ns

Clock to Load Enable
Set Up Time

Load Enable Pulse
Width

See MICROWIRE Input Timing 25 ns

See MICROWIRE Input Timing 25 ns

(f) = L(f) – 20log(N) – 10log(f

N

) where L(f) is defined as the single side band phase noise

COMP

Units

dBc/Hz

V

MICROWIRE INPUT TIMING DIAGRAM

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Typical Performance Characteristics : Sensitivity (Note 7)

LMX2487

RF PLL Fin Sensitivity

= 25˚C, RF_P = 32

T

A

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RF PLL Fin Sensitivity

= 3.0 V, RF_P = 32

V

CC

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Typical Performance Characteristics : Sensitivity (Note 7) (Continued)

IF PLL Fin Sensitivity

T

= 25˚C, IF_P = 16

A

LMX2487

IF PLL Fin Sensitivity

= 3.0 V, IF_P = 16

V

CC

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Typical Performance Characteristics : Sensitivity (Note 7) (Continued)

LMX2487

OSCin Sensitivity

T

= 25˚C, OSC_2X = 0

A

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OSCin Sensitivity

= 3.0 V, OSC_2X = 0

V

CC

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Typical Performance Characteristics : Sensitivity (Note 7) (Continued)

OSCin Sensitivity

T

= 25˚C, OSC_2X =1

A

LMX2487

OSCin Sensitivity

= 3.0 V, OSC_2X = 1

V

CC

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Typical Performance Characteristic : FinRF Input Impedance (Note 7)

LMX2487

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FinRF Input Impedance

Frequency (MHz) Real (Ohms) Imaginary (Ohms)

3000 39 -94

3200 37 -86

3400 33 -78

3600 30 -72

3800 28 -69

4000 26 -66

4250 24 -63

4500 23 -60

4750 22 -57

5000 20 -54

5250 19 -50

5500 18 -49

5750 17 -47

6000 17 -45

6250 16 -44

6500 16 -42

6750 16 -40

7000 16 -39

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Typical Performance Characteristic : FinIF Input Impedance (Note 7)

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FinIF Input Impedance

Frequency (MHz) Real (Ohms) Imaginary (Ohms)

100 508 -233

150 456 -215

200 420 -206

250 403 -205

300 370 -207

400 344 -215

500 207 -223

600 274 -225

700 242 -225

800 242 -225

900 214 -222

1000 171 -208

1200 137 -191

1400 112 -176

1600 91 -158

1800 76 -139

2000 62 -122

2200 51 -105

2300 46 -96

2400 42 -88

2600 37 -74

2800 29 -63

3000 25 -54

LMX2487

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Typical Performance Characteristic : OSCin Input Impedance (Note 7)

LMX2487

Frequency (MHz) Powered Up Powered Down

Real Imaginary Magnitude Real Imaginary Magnitude

5 1730 -3779 4157 392 -8137 8146

10 846 -2236 2391 155 -4487 4490

20 466 -1196 1284 107 -2215 2217

30 351 -863 932 166 -1495 -1504

40 316 -672 742 182 -1144 1158

50 278 -566 631 155 -912 925

60 261 -481 547 153 -758 774

70 252 -425 494 154 -652 669

80 239 -388 456 147 -576 595

90 234 -358 428 145 -518 538

100 230 -337 407 140 -471 492

110 225 -321 392 138 -436 458

120 219 -309 379 133 -402 123

130 214 -295 364 133 -374 397

140 208 -285 353 132 -349 373

150 207 -279 348 133 -329 355

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