LMX2430/LMX2433/LMX2434 PLLatinum Dual High Frequency Synthesizer for RF Personal
Communications
PLLatinum
™
Dual High Frequency Synthesizer for RF
Personal Communications
LMX24303.0 GHz/0.8 GHz
LMX24333.6 GHz/1.7 GHz
LMX24345.0 GHz/2.5 GHz
General Description
The LMX243x devices are high performance frequency synthesizers with integrated dual modulus prescalers. The
LMX243x devices are designed for use as RF and IF local
oscillators for dual conversion radio transceivers.
A 32/33 or a 16/17 prescale ratio can be selected for the 5.0
GHz LMX2434 RF synthesizer. An 8/9 or a 16/17 prescale
ratio can be selected for both the LMX2430 and LMX2433
RF synthesizers. The IF circuitry contains an 8/9 or a 16/17
prescaler. Using a proprietary digital phase locked loop technique, the LMX243x devices generate very stable, low noise
control signals for RF and IF voltage controlled oscillators.
Both the RF and IF synthesizers include a two-level programmable charge pump. Both the RF and IF synthesizers
have dedicated Fastlock circuitry with integrated timeout
counters. Furthermore, only a single word write is required to
power up and tune the synthesizers to a new frequency.
Serial data is transferred to the devices via a three-wire
interface (DATA, LE, CLK). A low voltage logic interface
allows direct connection to 1.8V devices. Supply voltages
from 2.25V to 2.75V are supported . The LMX243x family
features low current consumption:
1 of the 20-Pin UTCSP and Pin#2 of the 20-Pin TSSOP
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Connection Diagrams
LMX2430/LMX2433/LMX2434
Ultra Thin Chip Scale Package (SLE)
(Top View)
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Thin Shrink Small Outline Package (TM)
(Top View)
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Pin Descriptions
Pin No.
UTCSP
Pin No.
TSSOP
12GND—Ground for the IF PLL analog and digital circuits, MICROWIRETM, Ftest/LD and
23FinIFIIF PLL prescaler input. Small signal input from the VCO.
34ENIChip Enable input. High Impedance CMOS input. When this pin is set HIGH,
45CPoutIFOIF PLL charge pump output. The output is connected to the external loop filter,
56ENoscIOscillator Enable input. High impedance CMOS input. When this pin is set
67OSCout/
78OSCinIReference oscillator input. The input has an approximate Vcc/2 threshold and is
89Vcc—Power supply bias for the RF PLL digital circuits and oscillator circuits. Vcc may
910Ftest/LDOProgrammable multiplexed output. Functions as a general purpose CMOS
Pin NameI/ODescription
oscillator circuits.
the RF and IF PLLs are powered up. Powerdown is then controlled through the
MICROWIRE. When this pin is set LOW, the device is asynchronously powered
down and the charge pump output is forced to a high impedance state
(TRI-STATE).
which drives the input of the IF VCO.
HIGH, the oscillator buffer is always powered up, independent of the state of
the EN pin. When this pin is set LOW, the OSCout/ FLoutIF pin functions as an
IF Fastlock output, which connects a resistor in parallel to R2 of the external
loop filter.
OOscillator output/ IF PLL Fastlock output. The output configuration is dependent
FLoutIF
on the state of the ENosc pin. When ENosc is set LOW, the pin functions as an
IF Fastlock output, which connects a resistor in parallel to R2 of the external
loop filter. This configuration also functions as a general purpose CMOS
TRI-STATE output. When ENosc is set HIGH, the pin functions as an oscillator
output so that an external crystal can be used.
driven by an external AC coupled source.
range from 2.25V to 2.75V. Bypass capacitors should be placed as close as
possible to this pin and be connected directly to the ground plane.
TRI-STATE output, N and R divider output, RF/ IF PLL push-pull analog lock
detect output, RF/ IF PLL open-drain analog lock detect output, or RF/ IF PLL
digital filtered lock detect output.
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Pin Descriptions (Continued)
Pin No.
UTCSP
1011FLoutRFORF PLL Fastlock output. This pin connects a resistor in parallel to R2 of the
1112GND—Ground for the RF PLL digital circuits.
1213CPoutRFORF PLL charge pump output. The output is connected to the external loop filter,
LMX2430/LMX2433/LMX2434
1314GND—Ground for the RF PLL analog circuits.
1415FinRFIRF PLL prescaler input. Small signal input from the VCO.
1516FinRF
1617Vcc—Power supply bias for the RF PLL analog circuits. Vcc may range from 2.25V to
1718LEIMICROWIRE Latch Enable input. High impedance CMOS input. When LE
1819CLKIMICROWIRE Clock input. High impedance CMOS input. DATA is clocked into
1920DATAIMICROWIRE Data input. High impedance CMOS input. Binary serial data. The
201Vcc—Power supply bias for the IF PLL analog and digital circuits, MICROWIRE, and
Pin No.
TSSOP
Pin NameI/ODescription
external loop filter. This pin can also function as a general purpose CMOS
TRI-STATE output.
which drives the input of the RF VCO.
*
IRF PLL prescaler complementary input. For single ended operation, this pin
should be AC grounded through a 100 pF capacitor. The LMX243x can be
driven differentially when the AC coupled capacitor is omitted.
2.75V. Bypass capacitors should be placed as close as possible to this pin and
be connected directly to the ground plane.
transitions HIGH, DATA stored in the shift register is loaded into one of 6
internal control registers.
the 24-bit shift register on the rising edge of CLK.
MSB of DATA is shifted in first. The two last bits are the control bits.
Ftest/LD circuits. Vcc may range from 2.25V to 2.75V. Bypass capacitors
should be placed as close as possible to this pin and be connected directly to
the ground plane
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Ordering Information
ModelTemperature Range Package DescriptionPackingNS Package Number
LMX2430TM-40˚C to +85˚CThin Shrink Small
LMX2430TMX-40˚C to +85˚CThin Shrink Small
LMX2430SLEX-40˚C to +85˚CUltra Thin Chip Scale
LMX2433TM-40˚C to +85˚CThin Shrink Small
LMX2433TMX-40˚C to +85˚CThin Shrink Small
LMX2433SLEX-40˚C to +85˚CUltra Thin Chip Scale
LMX2434TM-40˚C to +85˚CThin Shrink Small
LMX2434TMX-40˚C to +85˚CThin Shrink Small
LMX2434SLEX-40˚C to +85˚CUltra Thin Chip Scale
LMX2430/LMX2433/LMX2434
73 Units Per RailMTC20
Outline Package
(TSSOP)
2500 Units Per ReelMTC20
Outline Package
(TSSOP)
Tape and Reel
2500 Units Per ReelSLE20A
Package (UTCSP)
Tape and Reel
73 Units Per RailMTC20
Outline Package
(TSSOP)
2500 Units Per ReelMTC20
Outline Package
(TSSOP)
Tape and Reel
2500 Units Per ReelSLE20A
Package (UTCSP)
Tape and Reel
73 Units Per RailMTC20
Outline Package
(TSSOP)
2500 Units Per ReelMTC20
Outline Package
(TSSOP)
Tape and Reel
2500 Units Per ReelSLE20A
Package (UTCSP)
Tape and Reel
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Absolute Maximum Ratings (Notes 1,
2, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to
the device may occur. Recommended Operating Conditions indicate conditions for which the device is intended to be functional, but do not guarantee
specific performance limits. For guaranteed specifications and test conditions, refer to the Electrical Characteristics section. The guaranteed specifications apply only for the conditions listed.
Note 2: This device is a high performance RF integrated circuit with an ESD
<
rating
2 kV and is ESD sensitive. Handling and assembly of this device
should only be done at ESD protected work stations.
TCXO Reference Source
RF_CPG Bit = 1
IF_PD Bit = 1
TCXO Reference Source
IF_CPG Bit = 1
RF_PD Bit = 1
= 2750 MHz
FinRF
f = 10 kHz offset
f
COMPRF
= 1 MHz
Loop Bandwidth = 100 kHz
= 2750
N
RF
=10MHz
f
OSCin
=1V
v
OSCin
PP
RF_CPG Bit = 1
IF_PD Bit = 1
= +25oC
T
A
(Note 11)
= 3200 MHz
FinRF
f = 10 kHz offset
f
COMPRF
= 1 MHz
Loop Bandwidth = 100 kHz
= 3200
N
RF
=10MHz
f
OSCin
=1V
v
OSCin
PP
RF_CPG Bit = 1
IF_PD Bit = 1
= +25oC
T
A
(Note 11)
= 4700 MHz
FinRF
f = 10 kHz offset
f
COMPRF
= 1 MHz
Loop Bandwidth = 100 kHz
= 4700
N
RF
=10MHz
f
OSCin
=1V
v
OSCin
PP
RF_CPG Bit = 1
IF_PD Bit = 1
= +25oC
T
A
(Note 11)
Value
MinTypMax
-219.0dBc/
-214.0dBc/
-90.30dBc/
-88.90dBc/
-85.60dBc/
LMX2430/LMX2433/LMX2434
Units
Hz
Hz
Hz
Hz
Hz
Note 4: Some of the values in this range are illegal divide ratios (B<A). To obtain continuous legal division, the Minimum Divide Ratio must be calculated. Use N
*
≥ P
(P−1), where P is the value of the prescaler selected.
Note 5: Refer to the LMX243x FinRF Sensitivity Test Setup section
Note 6: Refer to the LMX243x Charge Pump Test Setup section
Note 7: Refer to the Charge Pump Current Specification Definitions for details on how these measurements are made.
Note 8: Refer to the LMX243x OSCin Sensitivity Test Setup section
Note 9: Refer to the LMX243x Serial Data Input Timing section
Note 10: Normalized Phase Noise Contribution is defined as : L
measured at an offset frequency, f, ina1Hzbandwidth. The offset frequency, f, must be chosen sufficiently smaller than the PLL’s loop bandwidth, yet large enough
to avoid substantial phase noise contribution from the reference source. N is the value selected for the feedback divider and f
detector comparison frequency.
Note 11: The synthesizer phase noise is measured with the LMX2430TM/LMX2430SLE Evaluation boards and the HP8566B Spectrum Analyzer.
(f) = L(f) − 20 log (N) − 10 log (f
N
), where L(f) is defined as the single side band phase noise
COMP
is the RF/IF phase/ frequency
COMP
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Charge Pump Current Specification Definitions
LMX2430/LMX2433/LMX2434
I1 = Charge Pump Sink Current at V
I2 = Charge Pump Sink Current at V
I3 = Charge Pump Sink Current at V
I4 = Charge Pump Source Current at V
I5 = Charge Pump Source Current at V
I6 = Charge Pump Source Current at V
CPout
CPout
CPout
CPout
CPout
CPout
= Vcc − ∆V
= Vcc//2
= ∆V
= Vcc − ∆V
= Vcc/2
= ∆V
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∆V = Voltage offset from the positive and negative rails. Dependent on the VCO tuning range relative to Vcc and GND. Typical values are between 0.5V and
1.0V.
V
CPout
I
refers to either I
CPout
refers to either V
CPoutRF
CPoutRF
or I
or V
CPoutIF
CPoutIF
Charge Pump Output Current Magnitude Variation Vs Charge Pump Output Voltage
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Charge Pump Output Sink Current Vs Charge Pump Output Source Current Mismatch
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Charge Pump Output Current Magnitude Variation Vs Temperature
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Typical Performance Characteristics
Sensitivity
LMX2430 FinRF Input Power Vs Frequency
Vcc = EN = 2.25V
LMX2430/LMX2433/LMX2434
LMX2430 FinRF Input Power Vs Frequency
Vcc = EN = 2.75V
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Typical Performance Characteristics
Sensitivity
LMX2430/LMX2433/LMX2434
(Continued)
LMX2433 FinRF Input Power Vs Frequency
Vcc = EN = 2.25V
LMX2433 FinRF Input Power Vs Frequency
Vcc = EN = 2.75V
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Typical Performance Characteristics
Sensitivity
(Continued)
LMX2434 FinRF Input Power Vs Frequency
Vcc = EN = 2.35V
LMX2430/LMX2433/LMX2434
LMX2434 FinRF Input Power Vs Frequency
Vcc = EN = 2.75V
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Typical Performance Characteristics
Sensitivity
LMX2430/LMX2433/LMX2434
(Continued)
LMX2430 FinIF Input Power Vs Frequency
Vcc = EN = 2.25V
LMX2430 FinIF Input Power Vs Frequency
Vcc = EN = 2.75V
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Typical Performance Characteristics
Sensitivity
(Continued)
LMX2433 FinIF Input Power Vs Frequency
Vcc = EN = 2.25V
LMX2430/LMX2433/LMX2434
LMX2433 FinIF Input Power Vs Frequency
Vcc = EN = 2.75V
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