National Semiconductor LMX2315, LMX2320, LMX2325 Technical data
查询LMX2315供应商
September 1996
LMX2315/LMX2320/LMX2325 PLLatinum Frequency
Synthesizer for RF Personal Communications
LMX2325 2.5 GHz LMX2320 2.0 GHz LMX2315 1.2 GHz
LMX2315/LMX2320/LMX2325 PLLatinum
Frequency Synthesizer
for RF Personal Communications
LMX2325 2.5 GHz
LMX2320 2.0 GHz
LMX2315 1.2 GHz
General Description
The LMX2315/2320/2325’s are high performance frequency synthesizers with integrated prescalers designed for RF
operation up to 2.5 GHz. They are fabricated using National’s ABiC IV BiCMOS process.
A 64/65 or a 128/129 divide ratio can be selected for the
LMX2315 and LMX2320 RF synthesizer at input frequencies
of up to 1.2 GHz and 2.0 GHz, while 32/33 and 64/65 divide
ratios are available in the 2.5 GHz LMX2325. Using a proprietary digital phase locked loop technique, the LMX2315/
2320/2325’s linear phase detector characteristics can generate very stable, low noise signals for controlling a local
oscillator.
Serial data is transferred into the LMX2320 and the
LMX2325 via a three line MICROWIRE
Enable, Clock). Supply voltage can range from 2.7V to 5.5V.
The LMX2315, LMX2320 and the LMX2325 feature very low
current consumption, typically 6 mA, 10 mA and 11 mA respectively.
The LMX2315, LMX2320 and the LMX2325 are available in
a TSSOP 20-pin surface mount plastic package.
TM
interface (Data,
Features
Y
RF operation up to 2.5 GHz
Y
2.7V to 5.5V operation
Y
Low current consumption
Y
Dual modulus prescaler:
LMX2325 32/33 or 64/65
LMX2320/LMX2315 64/65 or 128/129
Y
Internal balanced, low leakage charge pump
Y
Power down feature for sleep mode:
e
I
30 mA (typ) at V
CC
Y
Small-outline, plastic, surface mount TSSOP, 0.173
wide
Applications
Y
Cellular telephone systems
(GSM, IS-54, IS-95, (RCR-27)
Y
Portable wireless communications (DECT, PHS)
Y
CATV
Y
Other wireless communication systems
TM
CC
e
3V
×
Block Diagram
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
TM
MICROWIRE
C
1996 National Semiconductor Corporation RRD-B30M106/Printed in U. S. A.
and PLLatinumTMare trademarks of National Semiconductor Corporation.
TL/W/12339
TL/W/12339– 1
http://www.national.com
Connection Diagrams
LMX2315/LMX2320/LMX2325
20-Lead (0.173×Wide) Thin Shrink Small Outline Package (TM)
TL/W/12339– 2
Order Number LMX2315TM, LMX2315TMX, LMX2325TM, LMX2325TMX, LMX2320TM or LMX2320TMX
See NS Package Number MTC20
Pin Descriptions
Pin No. Pin Name I/O Description
1 OSC
3 OSC
4V
5V
IN
OUT
P
CC
6DoO Internal charge pump output. For connection to a loop filter for driving the input of an external VCO.
7 GND Ground.
8 LD O Lock detect. Output provided to indicate when the VCO frequency is in ‘‘lock’’. When the loop is
10 f
IN
11 CLOCK I High impedance CMOS Clock input. Data is clocked in on the rising edge, into the various counters
13 DATA I Binary serial data input. Data entered MSB first. LSB is control bit. High impedance CMOS input.
14 LE I Load enable input (with internal pull-up resistor). When LE transitions HIGH, data stored in the shift
15 FC I Phase control select (with internal pull-up resistor). When FC is LOW, the polarity of the phase
16 BISW O Analog switch output. When LE is HIGH, the analog switch is ON, routing the internal charge pump
17 f
OUT
18 w
p
19 PWDN I Power Down (with internal pull-up resistor).
20 w
r
2,9,12 NC No connect.
I Oscillator input. A CMOS inverting gate input intended for connection to a crystal resonator for
operation as an oscillator. The input has a V
CMOS or TTL logic gate. May also be used as a buffer for an externally provided reference oscillator.
/2 input threshold and can be driven from an external
CC
O Oscillator output.
Power supply for charge pump. Must betVCC.
Power supply voltage input. Input may range from 2.7V to 5.5V. Bypass capacitors should be placed
as close as possible to this pin and be connected directly to the ground plane.
locked, the pin’s output is HIGH with narrow low pulses.
I Prescaler input. Small signal input from the VCO.
and registers.
registers is loaded into the appropriate latch (control bit dependent). Clock must be low when LE
toggles high or low. See Serial Data Input Timing Diagram.
comparator and charge pump combination is reversed.
output through BISW (as well as through D
).
o
O Monitor pin of phase comparator input. CMOS output.
O Output for external charge pump. wpis an open drain N-channel transistor and requires a pull-up
resistor.
e
PWDN
PWDN
Power down function is gated by the return of the charge pump to a TRI-STATE
HIGH for normal operation.
e
LOW for power saving.
condition.
É
O Output for external charge pump. wris a CMOS logic output.
http://www.national.com 2
Functional Block Diagram
Note 1: The prescalar for the LMX2315 and LMX2320 is either 64/65 or 128/129, while the prescalar for the LMX2325 is 32/33 or 64/65.
Note 2: The power down function is gated by the charge pump to prevent unwanted frequency jumps. Once the power down pin is brought low the part will go into
power down mode when the charge pump reaches a TRI-STATE condition.
TL/W/12339– 3
http://www.national.com3
Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Power Supply Voltage
V
CC
V
P
Voltage on Any Pin
with GND
e
0V (VI)
Storage Temperature Range (TS)
Lead Temperature (TL) (solder, 4 sec.)
b
0.3V toa6.5V
b
0.3V toa6.5V
b
0.3V toa6.5V
b
65§Ctoa150§C
a
260§C
Recommended Operating
Conditions
Power Supply Voltage
V
CC
V
P
Operating Temperature (TA)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to
the device may occur. Operating Ratings indicate conditions for which the
device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test
conditions listed.
Note 2: This device is a high performance RF integrated circuit with an ESD
k
2 kV and is ESD sensitive. Handling and assembly of this device
rating
should be done at ESD workstations.
2.7V to 5.5V
VCCtoa5.5V
b
40§Ctoa85§C
Electrical Characteristics
LMX2325 and LMX2320 V
CC
e
e
V
P
3.0V; LMX2315 V
CC
e
V
P
e
5.0V;b40§CkT
k
85§C, except as specified
A
Symbol Parameter Conditions Min Typ Max Units
I
CC
I
CC-PWDN
f
IN
Power Supply Current LMX2315 V
LMX2320 V
LMX2325 V
Power Down Current V
Maximum Operating Frequency LMX2315 1.2
e
3.0V 6.0 8.0 mA
CC
e
V
5.0V 6.5 8.5 mA
CC
e
3.0V 10 13.5 mA
CC
e
3.0V 11 15 mA
CC
e
3.0V 30 180 mA
CC
e
V
5.0V 60 350 mA
CC
LMX2320 2.0 GHz
LMX2325 2.5
f
OSC
f
w
Pf
IN
V
OSC
V
IH
V
IL
I
IH
I
IL
I
IH
I
IL
I
IH
I
IL
*Except fINand OSC
Oscillator Frequency 5 20 MHz
No Load on OSC
out
5 40 MHz
Phase Detector Frequency 10 MHz
Input Sensitivity V
Oscillator Sensitivity OSC
CC
V
CC
e
2.7V to 3.3V
e
3.3V to 5.5V
IN
High-Level Input Voltage * 0.7 V
Low-Level Input Voltage * 0.3 V
e
High-Level Input Current (Clock, Data) V
Low-Level Input Current (Clock, Data) V
Oscillator Input Current V
High-Level Input Current (LE, FC) V
Low-Level Input Current (LE, FC) V
IN
IH
IL
IH
V
IL
IH
IL
e
V
5.5V
CC
e
e
e
e
e
e
0V, V
V
CC
0V, V
V
CC
0V, V
5.5V
CC
e
5.5V 100 mA
e
5.5V
CC
e
5.5V
e
5.5V
CC
b
15
b
10
a
6
a
6
0.5 V
CC
CC
b
1.0 1.0 mA
b
1.0 1.0 mA
b
100 mA
b
1.0 1.0 mA
b
100 1.0 mA
dBm
PP
V
V
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Electrical CharacteristicsLMX2325 and LMX2320 V
k
T
85§C, except as specified (Continued)
A
CC
e
V
3.0V; LMX2315 V
P
CC
e
e
V
P
5.0V;b40§C
e
Symbol Parameter Conditions Min Typ Max Units
I
Do-source
I
Do-sink
I
Do-source
I
Do-sink
I
Do-Tri
I
vs V
D
o
Charge Pump Output Current V
Charge Pump Output Current V
Charge Pump TRI-STATEÉCurrent 0.5VsV
Charge Pump Output Current 0.5VsV
D
o
Magnitude Variation vs Voltage T
e
V
CC
V
CC
CC
V
CC
e
T
e
3.0V, V
P
e
e
V
3.0V, V
P
e
e
V
5.0V, V
P
e
e
V
5.0V, V
P
s
D
o
85§C
s
D
o
25§C15%
e
VP/2
D
o
e
VP/2 2.5 mA
D
o
e
VP/2
D
o
e
VP/2 5.0 mA
D
o
b
V
0.5V
P
b
V
0.5V
P
b
2.5 2.5 nA
b
2.5 mA
b
5.0 mA
e
(Note 1)
I
vs Charge Pump Output Current V
Do-sink
I
Do-source
I
vs T Charge Pump Output Current
D
o
Sink vs Source Mismatch Te25§C10%
(Note 2)
Magnitude Variation vs Temperature V
(Note 3)
V
OH
V
OL
V
OH
V
OL
I
OL
I
OH
R
ON
t
CS
t
CH
t
CWH
t
CWL
t
ES
t
EW
**Except OSC
Notes 1, 2, 3: See related equations in Charge Pump Current Specification Definitions
High-Level Output Voltage I
Low-Level Output Voltage I
High-Level Output Voltage (OSC
Low-Level Output Voltage (OSC
OUT
OUT
)I
Open Drain Output Current (wp)V
Open Drain Output Current (wp)V
Analog Switch ON Resistance (2315) 100 X
Data to Clock Set Up Time See Data Input Timing 50 ns
Data to Clock Hold Time See Data Input Timing 10 ns
Clock Pulse Width High See Data Input Timing 50 ns
Clock Pulse Width Low See Data Input Timing 50 ns
Clock to Enable Set Up Time See Data Input Timing 50 ns
Enable Pulse Width See Data Input Timing 50 ns
OUT
D
o
b
40§CkTk85§C
D
o
OH
OL
)I
OH
OL
CC
OH
e
VP/2
e
VP/2 10 %
eb
1.0 mA** V
e
1.0 mA** 0.4 V
eb
200 mAV
e
200 mA 0.4 V
e
5.0V, V
e
5.5V 100 mA
e
0.4V 1.0 mA
OL
b
0.8 V
CC
b
0.8 V
CC
k
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Typical Performance Characteristics
ICCvs VCCLMX2320/25
ICCvs VCCLMX2315
Charge Pump Current vs DoVoltage
Charge Pump Current Variation
TL/W/12339– 4
TL/W/12339– 40
TL/W/12339– 51
Charge Pump Current vs DoVoltage
TL/W/12339– 7
Sink vs Source Mismatch vs DoVoltage
TL/W/12339– 8
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TL/W/12339– 9
Typical Performance Characteristics (Continued)
I
TRI-STATE vs DoVoltage
D
o
TL/W/12339– 5
Oscillator Input Sensitivity
TL/W/12339– 14
LMX2320/25 Input Sensitivity vs Frequency
TL/W/12339– 10
LMX2315 Input Sensitivity vs Frequency
TL/W/12339– 41
LMX2320/25 Input Sensitivity vs Frequency
TL/W/12339– 11
LMX2315 Input Sensitivity vs Frequency
TL/W/12339– 42
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