National Semiconductor LMX2314, LMX2315 Technical data
查询LMX2314供应商
March 1995
LMX2314/LMX2315 PLLatinum 1.2 GHz Frequency
Synthesizer for RF Personal Communications
LMX2314/LMX2315 PLLatinum
TM
1.2 GHz Frequency Synthesizer
for RF Personal Communications
General Description
The LMX2314 and the LMX2315 are high performance frequency synthesizers with integrated prescalers designed for
RF operation up to 1.2 GHz. They are fabricated using National’s ABiC IV BiCMOS process.
The LMX2314 and the LMX2315 contain dual modulus prescalers which can select either a 64/65 or a 128/129 divide
ratio at input frequencies of up to 1.2 GHz. Using a proprietary digital phase locked loop technique, the LMX2314/15’s
linear phase detector characteristics can generate very stable, low noise local oscillator signals.
Serial data is transferred into the LMX2314 and the
LMX2315 via a three line MICROWIRE
TM
interface (Data,
Enable, Clock). Supply voltage can range from 2.7V to 5.5V.
The LMX2314 and the LMX2315 feature very low current
consumption, typically 6 mA at 3V.
The LMX2314 is available in a JEDEC 16-pin surface mount
plastic package. The LMX2315 is available in a TSSOP
20-pin surface mount plastic package.
Block Diagram
Features
Y
RF operation up to 1.2 GHz
Y
2.7V to 5.5V operation
Y
Low current consumption:
I
CC
Y
Dual modulus prescaler: 64/65 or 128/129
Y
Internal balanced, low leakage charge pump
Y
Power down feature for sleep mode:
I
CC
Y
Small-outline, plastic, surface mount JEDEC, 0.150
wide, (2314) or TSSOP, 0.173×wide, (2315) package
Applications
Y
Cellular telephone systems
(GSM, IS-54, IS-95, RCR-27)
Y
Portable wireless communications
(DECT, ISM902-928 CT-2)
Y
Other wireless communication systems
e
6 mA (typ) at V
e
30 mA (typ) at V
CC
CC
e
3V
e
3V
×
TL/W/11766– 1
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
TM
MICROWIRE
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
and PLLatinumTMare trademarks of National Semiconductor Corporation.
TL/W/11766
Connection Diagrams
LMX2314
LMX2315
JEDEC 16-Lead (0.150×Wide) Small
TL/W/11766– 2
Outline Molded Package (M)
Order Number LMX2314M or LMX2314MX
See NS Package Number M16A
20-Lead (0.173×Wide) Thin Shrink
Small Outline Package (TM)
TL/W/11766– 3
Order Number LMX2315TM or LMX2315TMX
See NS Package Number MTC20
Pin Descriptions
Pin No. Pin No. Pin Name
2314 2315 2314/2315
1 1 OSC
2 3 OSC
34V
45V
56D
IN
OUT
P
CC
o
6 7 GND Ground.
7 8 LD O Lock detect. Output provided to indicate when the VCO frequency is in ‘‘lock’’.
810f
IN
9 11 CLOCK I High impedance CMOS Clock input. Data is clocked in on the rising edge, into the
10 13 DATA I Binary serial data input. Data entered MSB first. LSB is control bit. High impedance
11 14 LE I Load enable input (with internal pull-up resistor). When LE transitions HIGH, data
12 15 FC I Phase control select (with internal pull-up resistor). When FC is LOW, the polarity of
X 16 BISW O Analog switch output. When LE is HIGH, the analog switch is ON, routing the
13 17 f
14 18 w
OUT
p
15 19 PWDN I Power Down (with internal pull-up resistor).
16 20 w
r
X 2,9,12 NC No connect.
I/O Description
I Oscillator input. A CMOS inverting gate input intended for connection to a crystal
resonator for operation as an oscillator. The input has a V
can be driven from an external CMOS or TTL logic gate. May also be used as a
buffer for an externally provided reference oscillator.
/2 input threshold and
CC
O Oscillator output.
Power supply for charge pump. Must betVCC.
Power supply voltage input. Input may range from 2.7V to 5.5V. Bypass capacitors
should be placed as close as possible to this pin and be connected directly to the
ground plane.
O Internal charge pump output. For connection to a loop filter for driving the input of
an external VCO.
When the loop is locked, the pin’s output is HIGH with narrow low pulses.
I Prescaler input. Small signal input from the VCO.
various counters and registers.
CMOS input.
stored in the shift registers is loaded into the appropriate latch (control bit
dependent). Clock must be low when LE toggles high or low. See Serial Data Input
Timing Diagram.
the phase comparator and charge pump combination is reversed.
internal charge pump output through BISW (as well as through D
).
o
O Monitor pin of phase comparator input. CMOS output.
O Output for external charge pump. wpis an open drain N-channel transistor and
requires a pull-up resistor.
e
PWDN
PWDN
Power down function is gated by the return of the charge pump to a TRI-STATE
condition.
HIGH for normal operation.
e
LOW for power saving.
O Output for external charge pump. wris a CMOS logic output.
2
Functional Block Diagram
Note 1: The power down function is gated by the charge pump to prevent any unwanted frequency jumps. Once the power down pin is brought low the part will go
into power down mode when the charge pump reaches a TRI-STATE condition.
TL/W/11766– 4
3
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Power Supply Voltage
V
CC
V
P
Voltage on Any Pin
with GND
e
0V (VI)
Storage Temperature Range (TS)
Lead Temperature (TL) (solder, 4 sec.)
b
0.3V toa6.5V
b
0.3V toa6.5V
b
0.3V toa6.5V
b
65§Ctoa150§C
a
260§C
Recommended Operating
Conditions
Power Supply Voltage
V
CC
V
P
Operating Temperature (TA)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to
the device may occur. Operating Ratings indicate conditions for which the
device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test
conditions listed.
2.7V to 5.5V
VCCtoa5.5V
b
40§Ctoa85§C
Electrical Characteristics V
CC
e
5.0V, V
e
5.0V;b40§CkT
P
k
85§C, except as specified
A
Symbol Parameter Conditions Min Typ Max Units
I
CC
I
CC-PWDN
f
IN
f
OSC
Power Supply Current V
Power Down Current V
Maximum Operating Frequency 1.2 GHz
Maximum Oscillator Frequency 20 MHz
e
3.0V 6.0 8.0 mA
CC
e
V
5.0V 6.5 8.5 mA
CC
e
3.0V 30 180 mA
CC
e
V
5.0V 60 350 mA
CC
No Load on OSC Out 40 MHz
f
w
Pf
IN
V
OSC
V
IH
V
IL
I
IH
I
IL
I
IH
I
IL
I
IH
I
IL
*Except fINand OSC
Maximum Phase Detector Frequency 10 MHz
Input Sensitivity V
Oscillator Sensitivity OSC
CC
V
CC
e
2.7V to 3.3V
e
3.3V to 5.5V
IN
High-Level Input Voltage * 0.7 V
Low-Level Input Voltage * 0.3 V
e
High-Level Input Current (Clock, Data) V
Low-Level Input Current (Clock, Data) V
Oscillator Input Current V
High-Level Input Current (LE, FC) V
Low-Level Input Current (LE, FC) V
IN
IH
IL
IH
V
IL
IH
IL
e
V
5.5V
CC
e
e
e
e
e
e
0V, V
V
0V, V
V
0V, V
5.5V
CC
e
5.5V 100 mA
CC
e
5.5V
CC
e
5.5V
CC
e
5.5V
CC
b
15
b
10
a
6
a
6
0.5 V
CC
b
1.0 1.0 mA
b
1.0 1.0 mA
b
100 mA
b
1.0 1.0 mA
b
100 1.0 mA
CC
dBm
PP
V
V
4
Electrical Characteristics V
CC
e
5.0V, V
e
5.0V;b40§CkT
P
k
85§C, except as specified (Continued)
A
Symbol Parameter Conditions Min Typ Max Units
I
Do-source
I
Do-sink
I
Do-Tri
I
vs V
D
o
Charge Pump Output Current V
Charge Pump TRI-STATEÉCurrent 0.5VsV
Charge Pump Output Current 0.5VsV
D
o
Magnitude Variation vs Voltage Te25§C15%
e
VP/2
D
o
e
V
VP/2 5.0 mA
D
o
s
b
V
D
o
e
T
85§C
D
o
0.5V
P
s
b
V
0.5V
P
b
2.5 2.5 nA
b
5.0 mA
(Note 1)
I
vs Charge Pump Output Current V
Do-sink
I
Do-source
I
vs T Charge Pump Output Current
D
o
Sink vs Source Mismatch Te25§C10%
(Note 2)
Magnitude Variation vs Temperature V
(Note 3)
V
OH
V
OL
V
OH
V
OL
I
OL
I
OH
R
ON
t
CS
t
CH
t
CWH
t
CWL
t
ES
t
EW
**Except OSC
Notes 1, 2, 3: See related equations in Charge Pump Current Specification Definitions
High-Level Output Voltage I
Low-Level Output Voltage I
High-Level Output Voltage (OSC
Low-Level Output Voltage (OSC
)I
OUT
)I
OUT
Open Drain Output Current (wp)V
Open Drain Output Current (wp)V
Analog Switch ON Resistance (2315) 100 X
Data to Clock Set Up Time See Data Input Timing 50 ns
Data to Clock Hold Time See Data Input Timing 10 ns
Clock Pulse Width High See Data Input Timing 50 ns
Clock Pulse Width Low See Data Input Timing 50 ns
Clock to Enable Set Up Time See Data Input Timing 50 ns
Enable Pulse Width See Data Input Timing 50 ns
OUT
e
VP/2
D
o
b
40§CkTk85§C
e
VP/2 10 %
D
o
eb
1.0 mA** V
OH
e
1.0 mA** 0.4 V
OL
eb
200 mAV
OH
e
200 mA 0.4 V
OL
e
5.0V, V
CC
e
5.5V 100 mA
OH
e
0.4V 1.0 mA
OL
b
0.8 V
CC
b
0.8 V
CC
5
Typical Performance Characteristics
ICCvs V
CC
I
TRI-STATE vs DoVoltage
D
o
Charge Pump Current vs DoVoltage
Charge Pump Current Variation
TL/W/11766– 29
TL/W/11766– 31
TL/W/11766– 30
Charge Pump Current vs DoVoltage
TL/W/11766– 32
Oscillator Input Sensitivity
TL/W/11766– 33
TL/W/11766– 34
6
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