National Semiconductor LMX1501A, LMX1511 Technical data

查询LMX1501供应商
November 1995
LMX1501A/LMX1511 PLLatinum 1.1 GHz Frequency
Synthesizer for RF Personal Communications
LMX1501A/LMX1511 PLLatinum
1.1 GHz Frequency Synthesizer for RF Personal Communications
The LMX1501A and the LMX1511 are high performance fre­quency synthesizers with integrated prescalers designed for RF operation up to 1.1 GHz. They are fabricated using Na­tional’s ABiC IV BiCMOS process.
The LMX1501A and the LMX1511 contain dual modulus prescalers which can select either a 64/65 or a 128/129 divide ratio at input frequencies of up to 1.1 GHz. Using a proprietary digital phase locked loop technique, the LMX1501A/11’s linear phase detector characteristics can generate very stable, low noise local oscillator signals.
Serial data is transferred into the LMX1501A and the LMX1511 via a three line MICROWIRE
TM
interface (Data, Enable, Clock). Supply voltage can range from 2.7V to 5.5V. The LMX1501A and the LMX1511 feature very low current consumption, typically 6 mA at 3V.
The LMX1501A is available in a JEDEC 16-pin surface mount plastic package. The LMX1511 is available in a TSSOP 20-pin surface mount plastic package.
Block Diagram
Features
Y
RF operation up to 1.1 GHz
Y
2.7V to 5.5V operation
Y
Low current consumption: I
CC
Y
Dual modulus prescaler: 64/65 or 128/129
Y
Internal balanced, low leakage charge pump
Y
Small-outline, plastic, surface mount JEDEC, 0.150 wide, (1501A) or TSSOP, 0.173×wide, (1511) package
Applications
Y
Cellular telephone systems (AMPS, NMT, ETACS)
Y
Portable wireless communications (PCS/PCN, Cordless)
Y
Advanced cordless telephone systems (CT-1/CT-1
Y
Other wireless communication systems
TM
e
6 mA (typ) at V
a
e
3V
CC
, CT-2, ISM902-928)
×
TL/W/12340– 1
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
TM
MICROWIRE
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
and PLLatinumTMare trademarks of National Semiconductor Corporation.
TL/W/12340
Connection Diagrams
LMX1501A
LMX1511
JEDEC 16-Lead (0.150×Wide) Small
Outline Molded Package (M)
Order Number LMX1501AM or LMX1501AMX
See NS Package Number M16A
TL/W/12340– 2
TL/W/12340– 3
20-Lead (0.173×Wide) Thin Shrink
Small Outline Package (TM)
Order Number LMX1511TM or LMX1511TMX
See NS Package Number MTC20
Pin Descriptions
Pin No. Pin No. Pin Name
1501A 1511 1501A/1511
1 1 OSC
2 3 OSC
34V
45V
56D
IN
OUT
P
CC
o
6 7 GND Ground.
7 8 LD O Lock detect. Output provided to indicate when the VCO frequency is in ‘‘lock’’.
810f
IN
9 11 CLOCK I High impedance CMOS Clock input. Data is clocked in on the rising edge, into
10 13 DATA I Binary serial data input. Data entered MSB first. LSB is control bit. High
11 14 LE I Load enable input (with internal pull-up resistor). When LE transitions HIGH,
12 15 FC I Phase control select (with internal pull-up resistor). When FC is LOW, the
X 16 BISW O Analog switch output. When LE is HIGH, the analog switch is ON, routing the
13 f
14 f
X17f
15 18 w
16 20 w
r
p
OUT
p
r
X 2,9,12,19 NC No connect.
I/O Description
I Oscillator input. A CMOS inverting gate input intended for connection to a
crystal resonator for operation as an oscillator. The input has a V threshold and can be driven from an external CMOS or TTL logic gate. May also
CC
/2 input
be used as a buffer for an externally provided reference oscillator.
O Oscillator output.
Power supply for charge pump must betVCC.
Power supply voltage input. Input may range from 2.7V to 5.5V. Bypass capacitors should be placed as close as possible to this pin and be connected directly to the ground plane.
O Internal charge pump output. For connection to a loop filter for driving the input
of an external VCO.
When the loop is locked, the pin’s output is HIGH with narrow low pulses.
I Prescaler input. Small signal input from the VCO.
the various counters and registers.
impedance CMOS input.
data stored in the shift registers is loaded into the appropriate latch (control bit dependent). Clock must be low when LE toggles high or low. See Serial Data Input Timing Diagram.
polarity of the phase comparator and charge pump combination is reversed.
internal charge pump output through BISW (as well as through Do).
O Monitor pin of phase comparator input. Programmable reference divider output.
O Monitor pin of phase comparator input. Programmable divider output.
O Monitor pin of phase comparator input. CMOS Output.
O Output for external charge pump. wpis an open drain N-channel transistor and
requires a pull-up resistor.
O Output for external charge pump. wris a CMOS logic output.
2
Functional Block Diagram
LMX1501A
TL/W/12340– 40
3
Functional Block Diagram (Continued)
LMX1511
TL/W/12340– 4
4
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Power Supply Voltage
V
CC
V
P
Voltage on Any Pin
with GND
e
0V (VI)
Storage Temperature Range (TS)
Lead Temperature (TL) (solder, 4 sec.)
b
0.3V toa6.5V
b
0.3V toa6.5V
b
0.3V toa6.5V
b
65§Ctoa150§C
a
260§C
Recommended Operating Conditions
Power Supply Voltage
V
CC
V
P
Operating Temperature (TA)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific perform­ance limits. For guaranteed specifications and test conditions, see the Elec­trical Characteristics. The guaranteed specifications apply only for the test conditions listed.
2.7V to 5.5V VCCto 5.5V
b
40§Ctoa85§C
Electrical Characteristics V
CC
e
5.0V, V
e
5.0V;b40§CkT
P
k
85§C, except as specified
A
Symbol Parameter Conditions Min Typ Max Units
I
CC
f
IN
f
OSC
f
w
Pf
IN
V
OSC
V
IH
V
IL
I
IH
I
IL
I
IH
I
IL
I
IH
I
IL
*Except fINand OSC
Power Supply Current V
Maximum Operating Frequency 1.1 GHz
Maximum Oscillator Frequency 20 MHz
Maximum Phase Detector Frequency 10 MHz
Input Sensitivity V
Oscillator Sensitivity OSC
High-Level Input Voltage * 0.7 V
Low-Level Input Voltage * 0.3 V
High-Level Input Current (Clock, Data) V
Low-Level Input Current (Clock, Data) V
Oscillator Input Current V
High-Level Input Current (LE, FC) V
Low-Level Input Current (LE, FC) V
IN
e
3.0V 6.0 8.0 mA
CC
e
V
5.0V 6.5 8.5 mA
CC
CC
IH
IL
IH
V
IL
IH
IL
e
2.7V to 5.5V
IN
e
V
CC
e
0V, V
e
V
CC
e
0V, V
e
V
CC
e
0V, V
e
5.5V
e
5.5V
CC
e
5.5V 100 mA
e
5.5V
CC
e
5.5V
e
5.5V
CC
b
10
0.5 V
CC
b
1.0 1.0 mA
b
1.0 1.0 mA
b
100 mA
b
1.0 1.0 mA
b
100 1.0 mA
a
6 dBm
CC
PP
V
V
5
Electrical Characteristics V
CC
e
5.0V, V
e
5.0V;b40§CkT
P
k
85§C, except as specified (Continued)
A
Symbol Parameter Conditions Min Typ Max Units
I
Do-source
I
Do-sink
I
Do-Tri
V
OH
V
OL
V
OH
V
OL
I
OL
I
OH
R
ON
t
CS
t
CH
t
CWH
t
CWL
t
ES
t
EW
**Except OSC
Charge Pump Output Current V
Charge Pump TRI-STATEÉCurrent 0.5VsV
High-Level Output Voltage I
Low-Level Output Voltage I
High-Level Output Voltage (OSC
Low-Level Output Voltage (OSC
)I
OUT
)I
OUT
Open Drain Output Current (wp)V
Open Drain Output Current (wp)V
e
VP/2
D
o
e
V
VP/2 5.0 mA
D
o
s
b
V
D
o
e
25§C
T
eb
1.0 mA** V
OH
e
1.0 mA** 0.4 V
OL
eb
200 mAV
OH
e
200 mA 0.4 V
OL
e
5.0V, V
CC
e
5.5V 100 mA
OH
0.5V
P
e
0.4V 1.0 mA
OL
b
5.0 5.0 nA
b
CC
b
CC
Analog Switch ON Resistance (1511) 100 X
Data to Clock Set Up Time See Data Input Timing 50 ns
Data to Clock Hold Time See Data Input Timing 10 ns
Clock Pulse Width High See Data Input Timing 50 ns
Clock Pulse Width Low See Data Input Timing 50 ns
Clock to Enable Set Up Time See Data Input Timing 50 ns
Enable Pulse Width See Data Input Timing 50 ns
OUT
b
5.0 mA
0.8 V
0.8 V
6
Typical Performance Characteristics
ICCvs V
CC
I
TRI-STATE vs DoVoltage
D
o
Charge Pump Current vs DoVoltage
Charge Pump Current Variation
TL/W/12340– 5
TL/W/12340– 7
TL/W/12340– 6
Charge Pump Current vs DoVoltage
TL/W/12340– 8
Oscillator Input Sensitivity
TL/W/12340– 9
TL/W/12340– 10
7
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