National Semiconductor LMV841, LMV842, LMV844 Technical data

LMV841/LMV842/LMV844 CMOS Input, RRIO, Wide Supply Range Operational Amplifiers
October 2007
LMV841 Single/ LMV842 Dual/ LMV844 Quad CMOS Input, RRIO, Wide Supply Range Operational
Amplifiers

General Description

The LMV841/LMV842/LMV844 are low-voltage and low-pow­er operational amplifiers that operate with supply voltages ranging from 2.7V to 12V and have rail-to-rail input and output capability. Their low offset voltage, low supply current, and MOS inputs make them ideal for sensor interface and battery­powered applications.
The single LMV841 is offered in the space-saving 5-Pin SC70 package, the dual LMV842 in the 8-Pin MSOP and 8-Pin SOIC packages, and the quad LMV844 in the 14-Pin TSSOP and 14-Pin SOIC packages. These small packages are ideal solutions for area-constrained PC boards and portable elec­tronics.

Typical Applications

Features

Unless otherwise noted, typical values at TA = 25°C, V+ = 5V.
Space saving 5-Pin SC70 package
Supply voltage range 2.7V to 12V
Guaranteed at 3.3V, 5V and ±5V
Low supply current 1 mA per channel
Unity gain bandwidth 4.5 MHz
Open loop gain 133 dB
Input offset voltage
Input bias current 0.3 pA
CMRR 112 dB
Input voltage noise 20 nV/Hz
Temperature range −40°C to 125°C
Rail-to-Rail input
Rail-to-Rail output
500 μV max

Applications

High impedance sensor interface
Battery powered instrumentation
High gain amplifiers
DAC buffer
Instrumentation amplifiers
Active filters
20168301
© 2007 National Semiconductor Corporation 201683 www.national.com

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Soldering Information Infrared or Convection (20 sec) 235°C Wave Soldering Lead Temp. (10 sec) 260°C
Distributors for availability and specifications.
ESD Tolerance (Note 2) Human Body Model 2 kV Machine Model 200V V
Differential
IN
Supply Voltage (V+ – V−)
±300 mV
13.2V Voltage at Input/Output Pins V++0.3V, V− −0.3V
Input Current 10 mA Storage Temperature Range −65°C to +150°C Junction Temperature (Note 3) +150°C

Operating Ratings (Note 1)

Temperature Range (Note 3) −40°C to +125°C Supply Voltage (V+ – V−)
Package Thermal Resistance (θJA (Note 3))
5-Pin SC70 334 °C/W 8-Pin MSOP 205 °C/W 8-Pin SOIC 126 °C/W 14-Pin TSSOP 110 °C/W 14-Pin SOIC 93 °C/W
2.7V to 12V

3.3V Electrical Characteristics (Note 4)

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 3.3V, V− = 0V, VCM = V+/2, and RL > 10 M to V+/2.
Boldface limits apply at the temperature extremes.
Symbol Parameter Conditions Min
LMV841 Single/ LMV842 Dual/ LMV844 Quad
(Note 6)
V
OS
TCV
I
B
Input Offset Voltage ±50 ±500
Input Offset Voltage Drift (Note 7) 0.5 ±5
OS
Input Bias Current
0.3 10
(Notes 7, 8)
I
OS
CMRR Common Mode Rejection Ratio
PSRR Power Supply Rejection Ratio
Input Offset Current 40
84
80
77
75
86
LMV841
Common Mode Rejection Ratio LMV842 and LMV844
0V V
CM
3.3V
2.7V V+ 12V, VO = V+/2
82
CMVR Input Common-Mode Voltage Range
A
VOL
V
O
Large Signal Voltage Gain
Output Swing High,
CMRR 50 dB
RL = 2 k VO = 0.3V to 3.0V
RL = 10 k VO = 0.2V to 3.1V
RL = 2 k to V+/2
–0.1 3.4
100
96
100
96
52 80
(measured from V+)
28 50
65 100
Output Swing Low,
RL = 10 k to V+/2
RL = 2 k to V+/2
(measured from V−)
RL = 10 k to V+/2
I
O
Output Short Circuit Current (Notes 3, 9)
Sourcing VO = V+/2 VIN = 100 mV
Sinking VO = V+/2 VIN = −100 mV
I
S
Supply Current Per Channel 0.93 1.5
SR Slew Rate (Note 10) AV = +1, VO = 2.3 V
PP
33 65
20
15
20
15
2.5
10% to 90%
GBW Gain Bandwidth Product 4.5 MHz
Typ
(Note 5)
112
106
108
123
131
32
27
Max
(Note 6)
±800
300
120
70
120
75
2
Units
μV
μV/°C
pA
fA
dB
dB
V
dB
mV
mV
mA
mA
V/μs
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LMV841 Single/ LMV842 Dual/ LMV844 Quad
Symbol Parameter Conditions Min
(Note 6)
Φ
m
e
n
R
OUT
Phase Margin 67
Input-Referred Voltage Noise f = 1 kHz 20
Open Loop Output Impedance f = 3 MHz 70
THD+N Total Harmonic Distortion + Noise f = 1 kHz , AV = 1
RL = 10 k
C
IN
Input Capacitance 7
0.005
Typ
(Note 5)
Max
(Note 6)
Units
Deg
nV/
Ω
%
pF

5V Electrical Characteristics (Note 4)

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, and RL > 10 M to V+/2.
Boldface limits apply at the temperature extremes.
Symbol Parameter Conditions Min
(Note 6)
V
OS
TCV
I
B
Input Offset Voltage ±50 ±500
Input Offset Voltage Drift (Note 7) 0.35 ±5
OS
Input Bias Current
0.3 10
(Notes 7, 8)
I
OS
CMRR Common Mode Rejection Ratio
PSRR Power Supply Rejection Ratio
Input Offset Current 40
86
80
81
79
86
LMV841
Common Mode Rejection Ratio LMV842 and LMV844
0V V
CM
5V
2.7V V+ 12V, VO = V+/2
82
CMVR Input Common-Mode Voltage Range
A
VOL
V
O
Large Signal Voltage Gain
Output Swing High,
CMRR 50 dB
RL = 2 k VO = 0.3V to 4.7V
RL = 10 k VO = 0.2V to 4.8V
RL = 2 k to V+/2
−0.2 5.2
100
96
100
96
68 100
(measured from V+)
32 50
78 120
Output Swing Low,
RL = 10 k to V+/2
RL = 2 k to V+/2
(measured from V-)
RL = 10 k to V+/2
I
O
Output Short Circuit Current (Notes 3, 9)
Sourcing VO = V+/2 VIN = 100 mV
Sinking VO = V+/2 VIN = −100 mV
I
S
Supply Current Per Channel 0.96 1.5
SR Slew Rate (Note 10) AV = +1, VO = 4 V
PP
38 70
20
15
20
15
2.5
10% to 90%
GBW Gain Bandwidth Product 4.5 MHz
Φ
m
e
n
R
OUT
Phase Margin 67
Input-Referred Voltage Noise f = 1 kHz 20
Open Loop Output Impedance f = 3 MHz 70
Typ
(Note 5)
112
106
108
125
133
33
28
Max
(Note 6)
±800
300
120
70
140
80
2
Units
μV
μV/°C
pA
fA
dB
dB
V
dB
mV
mV
mA
mA
V/μs
Deg
nV/
Ω
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Symbol Parameter Conditions Min
(Note 6)
THD+N Total Harmonic Distortion + Noise f = 1 kHz , AV = 1
0.003
Typ
(Note 5)
Max
(Note 6)
RL = 10 k
C
IN
Input Capacitance 6

±5V Electrical Characteristics (Note 4)

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = –5V, VCM = 0V, and RL > 10 M to VCM.
Boldface limits apply at the temperature extremes.
Symbol Parameter Conditions Min
(Note 6)
V
OS
TCV
I
B
Input Offset Voltage ±50 ±500
Input Offset Voltage Drift (Note 7) 0.25 ±5
OS
Input Bias Current
0.3 10
(Notes 7, 8)
I
LMV841 Single/ LMV842 Dual/ LMV844 Quad
OS
CMRR Common Mode Rejection Ratio
PSRR Power Supply Rejection Ratio
Input Offset Current 40
86
80
86
80
86
LMV841
Common Mode Rejection Ratio LMV842 and LMV844
–5V V
CM
5V
2.7V V+ 12V, VO = 0V
82
CMVR Input Common-Mode Voltage Range
A
VOL
V
O
Large Signal Voltage Gain
Output Swing High,
CMRR 50 dB
RL = 2 k VO = −4.7V to 4.7V
RL = 10 k VO = −4.8V to 4.8V
RL = 2 k to 0V
−5.2 5.2
100
96
100
96
95 130
(measured from V+)
44 75
105 160
Output Swing Low,
RL = 10 k to 0V
RL = 2 k to 0V
(measured from V−)
RL = 10 k to 0V
I
O
Output Short Circuit Current (Notes 3, 9)
Sourcing VO = 0V VIN = 100 mV
Sinking VO = 0V VIN = −100 mV
I
S
Supply Current Per Channel 1.03 1.7
SR Slew Rate (Note 10) AV = +1, VO = 9 V
PP
52 80
20
15
20
15
2.5
10% to 90%
GBW Gain Bandwidth Product 4.5 MHz
Φ
m
e
n
R
OUT
THD+N Total Harmonic Distortion + Noise f = 1 kHz , AV = 1
Phase Margin 67
Input-Referred Voltage Noise f = 1 kHz 20
Open Loop Output Impedance f = 3 MHz 70
0.006
RL = 10 k
C
IN
Input Capacitance 3
Typ
(Note 5)
112
106
108
126
136
37
29
Max
(Note 6)
±800
300
155
95
200
100
2
Units
%
pF
Units
μV
μV/°C
pA
fA
dB
dB
V
dB
mV
mV
mA
mA
V/μs
Deg
nV/
Ω
%
pF
www.national.com 4
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field­Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3: The maximum power dissipation is a function of T PD = (T
Note 4: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device.
Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC) method.
Note 7: This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 8: Positive current corresponds to current flowing into the device.
Note 9: Short circuit test is a momentary test.
Note 10: Number specified is the slower of positive and negative slew rates.
- TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.
J(MAX)
, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is
J(MAX)

Connection Diagrams

LMV841 Single/ LMV842 Dual/ LMV844 Quad
5-Pin SC70
Top View
20168302
8-Pin SOIC and MSOP
Top View
14–Pin SOIC and TSSOP
20168303
Top View

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing
5-Pin SC70
8-Pin MSOP
8-Pin SOIC
14-Pin SOIC
14-Pin TSSOP
LMV841MG
LMV841MGX 3k Units Tape and Reel
LMV842MM
LMV842MMX 3.5k Units Tape and reel
LMV842MA
LMV842MAX 2.5k Units Tape and Reel
LMV844MA
LMV844MAX 2.5k Units Tape and Reel
LMV844MT
LMV844MTX 2.5k Units Tape and Reel
A97
AC4A
LMV842MA
LMV844MA
LMV844MT
1k Units Tape and Reel
1k Units Tape and Reel
95 Units/Rail
55 Units/Rail
94 Units/Rail
20168304
MAA05A
MUA08A
M08A
M14A
MTC14
5 www.national.com

Typical Performance Characteristics At T

= 25°C, RL = 10 kΩ, VS = 5V. Unless otherwise specified.
A
VOS vs. VCM Over Temperature at 3.3V
LMV841 Single/ LMV842 Dual/ LMV844 Quad
20168310
V
vs. VCM Over Temperature at ±5.0V
OS
VOS vs. VCM Over Temperature at 5.0V
20168311
VOS vs. Supply Voltage
20168312
VOS vs. Temperature
20168314
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DC Gain vs. V
20168313
OUT
20168315
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