LMV841/LMV842/LMV844
CMOS Input, RRIO, Wide Supply Range Operational
Amplifiers
October 2007
LMV841 Single/ LMV842 Dual/ LMV844 Quad CMOS Input, RRIO, Wide Supply Range Operational
Amplifiers
General Description
The LMV841/LMV842/LMV844 are low-voltage and low-power operational amplifiers that operate with supply voltages
ranging from 2.7V to 12V and have rail-to-rail input and output
capability. Their low offset voltage, low supply current, and
MOS inputs make them ideal for sensor interface and batterypowered applications.
The single LMV841 is offered in the space-saving 5-Pin SC70
package, the dual LMV842 in the 8-Pin MSOP and 8-Pin
SOIC packages, and the quad LMV844 in the 14-Pin TSSOP
and 14-Pin SOIC packages. These small packages are ideal
solutions for area-constrained PC boards and portable electronics.
Typical Applications
Features
Unless otherwise noted, typical values at TA = 25°C, V+ = 5V.
Space saving 5-Pin SC70 package
■
Supply voltage range 2.7V to 12V
■
Guaranteed at 3.3V, 5V and ±5V
■
Low supply current 1 mA per channel
■
Unity gain bandwidth 4.5 MHz
■
Open loop gain 133 dB
■
Input offset voltage
■
Input bias current 0.3 pA
■
CMRR 112 dB
■
Input voltage noise 20 nV/√Hz
■
Temperature range −40°C to 125°C
■
Rail-to-Rail input
■
Rail-to-Rail output
■
500 μV max
Applications
High impedance sensor interface
■
Battery powered instrumentation
■
High gain amplifiers
■
DAC buffer
■
Instrumentation amplifiers
■
Active filters
■
20168301
© 2007 National Semiconductor Corporation 201683 www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Soldering Information
Infrared or Convection (20 sec) 235°C
Wave Soldering Lead Temp. (10 sec) 260°C
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Human Body Model 2 kV
Machine Model 200V
V
Differential
IN
Supply Voltage (V+ – V−)
±300 mV
13.2V
Voltage at Input/Output Pins V++0.3V, V− −0.3V
Input Current 10 mA
Storage Temperature Range −65°C to +150°C
Junction Temperature (Note 3) +150°C
Operating Ratings (Note 1)
Temperature Range (Note 3) −40°C to +125°C
Supply Voltage (V+ – V−)
Package Thermal Resistance (θJA (Note 3))
5-Pin SC70 334 °C/W
8-Pin MSOP 205 °C/W
8-Pin SOIC 126 °C/W
14-Pin TSSOP 110 °C/W
14-Pin SOIC 93 °C/W
2.7V to 12V
3.3V Electrical Characteristics (Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 3.3V, V− = 0V, VCM = V+/2, and RL > 10 MΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol Parameter Conditions Min
LMV841 Single/ LMV842 Dual/ LMV844 Quad
(Note 6)
V
OS
TCV
I
B
Input Offset Voltage ±50 ±500
Input Offset Voltage Drift (Note 7) 0.5 ±5
OS
Input Bias Current
0.3 10
(Notes 7, 8)
I
OS
CMRR Common Mode Rejection Ratio
PSRR Power Supply Rejection Ratio
Input Offset Current 40
84
80
77
75
86
LMV841
Common Mode Rejection Ratio
LMV842 and LMV844
0V ≤ V
CM
≤ 3.3V
2.7V ≤ V+ ≤ 12V, VO = V+/2
82
CMVR Input Common-Mode Voltage Range
A
VOL
V
O
Large Signal Voltage Gain
Output Swing High,
CMRR ≥ 50 dB
RL = 2 kΩ
VO = 0.3V to 3.0V
RL = 10 kΩ
VO = 0.2V to 3.1V
RL = 2 kΩ to V+/2
–0.1 3.4
100
96
100
96
52 80
(measured from V+)
28 50
65 100
Output Swing Low,
RL = 10 kΩ to V+/2
RL = 2 kΩ to V+/2
(measured from V−)
RL = 10 kΩ to V+/2
I
O
Output Short Circuit Current
(Notes 3, 9)
Sourcing VO = V+/2
VIN = 100 mV
Sinking VO = V+/2
VIN = −100 mV
I
S
Supply Current Per Channel 0.93 1.5
SR Slew Rate (Note 10) AV = +1, VO = 2.3 V
PP
33 65
20
15
20
15
2.5
10% to 90%
GBW Gain Bandwidth Product 4.5 MHz
Typ
(Note 5)
112
106
108
123
131
32
27
Max
(Note 6)
±800
300
120
70
120
75
2
Units
μV
μV/°C
pA
fA
dB
dB
V
dB
mV
mV
mA
mA
V/μs
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LMV841 Single/ LMV842 Dual/ LMV844 Quad
Symbol Parameter Conditions Min
(Note 6)
Φ
m
e
n
R
OUT
Phase Margin 67
Input-Referred Voltage Noise f = 1 kHz 20
Open Loop Output Impedance f = 3 MHz 70
THD+N Total Harmonic Distortion + Noise f = 1 kHz , AV = 1
RL = 10 kΩ
C
IN
Input Capacitance 7
0.005
Typ
(Note 5)
Max
(Note 6)
Units
Deg
nV/
Ω
%
pF
5V Electrical Characteristics (Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, and RL > 10 MΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol Parameter Conditions Min
(Note 6)
V
OS
TCV
I
B
Input Offset Voltage ±50 ±500
Input Offset Voltage Drift (Note 7) 0.35 ±5
OS
Input Bias Current
0.3 10
(Notes 7, 8)
I
OS
CMRR Common Mode Rejection Ratio
PSRR Power Supply Rejection Ratio
Input Offset Current 40
86
80
81
79
86
LMV841
Common Mode Rejection Ratio
LMV842 and LMV844
0V ≤ V
CM
≤ 5V
2.7V ≤ V+ ≤ 12V, VO = V+/2
82
CMVR Input Common-Mode Voltage Range
A
VOL
V
O
Large Signal Voltage Gain
Output Swing High,
CMRR ≥ 50 dB
RL = 2 kΩ
VO = 0.3V to 4.7V
RL = 10 kΩ
VO = 0.2V to 4.8V
RL = 2 kΩ to V+/2
−0.2 5.2
100
96
100
96
68 100
(measured from V+)
32 50
78 120
Output Swing Low,
RL = 10 kΩ to V+/2
RL = 2 kΩ to V+/2
(measured from V-)
RL = 10 kΩ to V+/2
I
O
Output Short Circuit Current
(Notes 3, 9)
Sourcing VO = V+/2
VIN = 100 mV
Sinking VO = V+/2
VIN = −100 mV
I
S
Supply Current Per Channel 0.96 1.5
SR Slew Rate (Note 10) AV = +1, VO = 4 V
PP
38 70
20
15
20
15
2.5
10% to 90%
GBW Gain Bandwidth Product 4.5 MHz
Φ
m
e
n
R
OUT
Phase Margin 67
Input-Referred Voltage Noise f = 1 kHz 20
Open Loop Output Impedance f = 3 MHz 70
Typ
(Note 5)
112
106
108
125
133
33
28
Max
(Note 6)
±800
300
120
70
140
80
2
Units
μV
μV/°C
pA
fA
dB
dB
V
dB
mV
mV
mA
mA
V/μs
Deg
nV/
Ω
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Symbol Parameter Conditions Min
(Note 6)
THD+N Total Harmonic Distortion + Noise f = 1 kHz , AV = 1
0.003
Typ
(Note 5)
Max
(Note 6)
RL = 10 kΩ
C
IN
Input Capacitance 6
±5V Electrical Characteristics (Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = –5V, VCM = 0V, and RL > 10 MΩ to VCM.
Boldface limits apply at the temperature extremes.
Symbol Parameter Conditions Min
(Note 6)
V
OS
TCV
I
B
Input Offset Voltage ±50 ±500
Input Offset Voltage Drift (Note 7) 0.25 ±5
OS
Input Bias Current
0.3 10
(Notes 7, 8)
I
LMV841 Single/ LMV842 Dual/ LMV844 Quad
OS
CMRR Common Mode Rejection Ratio
PSRR Power Supply Rejection Ratio
Input Offset Current 40
86
80
86
80
86
LMV841
Common Mode Rejection Ratio
LMV842 and LMV844
–5V ≤ V
CM
≤ 5V
2.7V ≤ V+ ≤ 12V, VO = 0V
82
CMVR Input Common-Mode Voltage Range
A
VOL
V
O
Large Signal Voltage Gain
Output Swing High,
CMRR ≥ 50 dB
RL = 2 kΩ
VO = −4.7V to 4.7V
RL = 10 kΩ
VO = −4.8V to 4.8V
RL = 2 kΩ to 0V
−5.2 5.2
100
96
100
96
95 130
(measured from V+)
44 75
105 160
Output Swing Low,
RL = 10 kΩ to 0V
RL = 2 kΩ to 0V
(measured from V−)
RL = 10 kΩ to 0V
I
O
Output Short Circuit Current
(Notes 3, 9)
Sourcing VO = 0V
VIN = 100 mV
Sinking VO = 0V
VIN = −100 mV
I
S
Supply Current Per Channel 1.03 1.7
SR Slew Rate (Note 10) AV = +1, VO = 9 V
PP
52 80
20
15
20
15
2.5
10% to 90%
GBW Gain Bandwidth Product 4.5 MHz
Φ
m
e
n
R
OUT
THD+N Total Harmonic Distortion + Noise f = 1 kHz , AV = 1
Phase Margin 67
Input-Referred Voltage Noise f = 1 kHz 20
Open Loop Output Impedance f = 3 MHz 70
0.006
RL = 10 kΩ
C
IN
Input Capacitance 3
Typ
(Note 5)
112
106
108
126
136
37
29
Max
(Note 6)
±800
300
155
95
200
100
2
Units
%
pF
Units
μV
μV/°C
pA
fA
dB
dB
V
dB
mV
mV
mA
mA
V/μs
Deg
nV/
Ω
%
pF
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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Tables.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) FieldInduced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3: The maximum power dissipation is a function of T
PD = (T
Note 4: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device.
Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality
control (SQC) method.
Note 7: This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 8: Positive current corresponds to current flowing into the device.
Note 9: Short circuit test is a momentary test.
Note 10: Number specified is the slower of positive and negative slew rates.
- TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.
J(MAX)
, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is
J(MAX)
Connection Diagrams
LMV841 Single/ LMV842 Dual/ LMV844 Quad
5-Pin SC70
Top View
20168302
8-Pin SOIC and MSOP
Top View
14–Pin SOIC and TSSOP
20168303
Top View
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
5-Pin SC70
8-Pin MSOP
8-Pin SOIC
14-Pin SOIC
14-Pin TSSOP
LMV841MG
LMV841MGX 3k Units Tape and Reel
LMV842MM
LMV842MMX 3.5k Units Tape and reel
LMV842MA
LMV842MAX 2.5k Units Tape and Reel
LMV844MA
LMV844MAX 2.5k Units Tape and Reel
LMV844MT
LMV844MTX 2.5k Units Tape and Reel
A97
AC4A
LMV842MA
LMV844MA
LMV844MT
1k Units Tape and Reel
1k Units Tape and Reel
95 Units/Rail
55 Units/Rail
94 Units/Rail
20168304
MAA05A
MUA08A
M08A
M14A
MTC14
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Typical Performance Characteristics At T
= 25°C, RL = 10 kΩ, VS = 5V. Unless otherwise specified.
A
VOS vs. VCM Over Temperature at 3.3V
LMV841 Single/ LMV842 Dual/ LMV844 Quad
20168310
V
vs. VCM Over Temperature at ±5.0V
OS
VOS vs. VCM Over Temperature at 5.0V
20168311
VOS vs. Supply Voltage
20168312
VOS vs. Temperature
20168314
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DC Gain vs. V
20168313
OUT
20168315
LMV841 Single/ LMV842 Dual/ LMV844 Quad
Input Bias Current vs. V
Input Bias Current vs. V
CM
CM
20168316
Input Bias Current vs. V
CM
20168317
Supply Current per Channel vs. Supply Voltage
Sinking Current vs. Supply Voltage
20168318
20168320
20168319
Sourcing Current vs. Supply Voltage
20168321
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Output Swing High vs. Supply Voltage RL = 2 kΩ
Output Swing High vs. Supply Voltage RL = 10 kΩ
20168322
LMV841 Single/ LMV842 Dual/ LMV844 Quad
Output Swing Low vs. Supply Voltage RL = 2 kΩ
20168324
Output Voltage Swing vs. Load Current
20168323
Output Swing Low vs. Supply Voltage RL = 10 kΩ
20168325
Open Loop Frequency Response Over Temperature
20168326
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20168327
LMV841 Single/ LMV842 Dual/ LMV844 Quad
Open Loop Frequency Response Over Load Conditions
20168328
PSRR vs. Frequency
Phase Margin vs. C
CMRR vs. Frequency
L
20168329
Channel Separation vs. Frequency
20168330
20168332
20168331
Large Signal Step Response with Gain = 1
20168373
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Large Signal Step Response with Gain = 10
Small Signal Step Response with Gain = 1
20168374
LMV841 Single/ LMV842 Dual/ LMV844 Quad
Small Signal Step Response with Gain = 10
20168376
Overshoot vs. C
L
20168375
Slew Rate vs Supply Voltage
20168337
Input Voltage Noise vs. Frequency
20168338
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20168339
LMV841 Single/ LMV842 Dual/ LMV844 Quad
THD+N vs. Frequency
20168340
Closed Loop Output Impedance vs. Frequency
THD+N vs. V
OUT
20168341
20168343
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Application Information
INTRODUCTION
The LMV841/LMV842/LMV844 are operational amplifiers
with near-precision specifications: low noise, low temperature
drift, low offset, and rail-to-rail input and output. Possible application areas include instrumentation, medical, test equipment, audio, and automotive applications.
Its low supply current of 1mA per amplifier, temperature range
of −40°C to 125°C, 12V supply with CMOS input, and the
small SC70 package for the LMV841 make the LMV841/
LMV842/LMV844 a unique op amp family and a perfect
choice for portable electronics.
INPUT PROTECTION
The LMV841/LMV842/LMV844 have a set of anti-parallel
diodes D1 and D2 between the input pins, as shown in Figure
1. These diodes are present to protect the input stage of the
amplifier. At the same time, they limit the amount of differential
input voltage that is allowed on the input pins.
LMV841 Single/ LMV842 Dual/ LMV844 Quad
A differential signal larger than one diode voltage drop can
damage the diodes. The differential signal between the inputs
needs to be limited to ±300 mV or the input current needs to
be limited to ±10 mA.
Note that when the op amp is slewing, a differential input voltage exists that forward biases the protection diodes. This may
result in current being drawn from the signal source. While
this current is already limited by the internal resistors R1 and
R2 (both 130Ω), a resistor of 1 kΩ can be placed in the feedback path, or a 500Ω resistor can be placed in series with the
input signal for further limitation.
region. Note that the CMRR and PSRR limits in the tables are
large-signal numbers that express the maximum variation of
the amplifier's input offset over the full common-mode voltage
and supply voltage range, respectively. When the amplifier's
common-mode input voltage is within the transition region,
the small signal CMRR and PSRR may be slightly lower than
the large signal limits.
CAPACITIVE LOAD
The LMV841/LMV842/LMV844 can be connected as non-inverting unity gain amplifiers. This configuration is the most
sensitive to capacitive loading. The combination of a capacitive load placed on the output of an amplifier along with the
amplifier’s output impedance creates a phase lag, which reduces the phase margin of the amplifier. If the phase margin
is significantly reduced, the response will be underdamped
which causes peaking in the transfer and, when there is too
much peaking, the op amp might start oscillating.
The LMV841/LMV842/LMV844 can directly drive capacitive
loads up to 100 pF without any stability issues. In order to
drive heavier capacitive loads, an isolation resistor, R
should be used, as shown in Figure 2. By using this isolation
ISO
resistor, the capacitive load is isolated from the amplifier’s
output, and hence, the pole caused by CL is no longer in the
feedback loop. The larger the value of R
the output voltage will be. If values of R
large, the feedback loop will be stable, independent of the
value of CL. However, larger values of R
output swing and reduced output current drive.
, the more stable
ISO
are sufficiently
ISO
result in reduced
ISO
,
20168351
FIGURE 1. Protection Diodes between the Input Pins
INPUT STAGE
The input stage of this amplifier consists of both a PMOS and
an NMOS input pair to achieve a rail-to-rail input range. For
input voltages close to the negative rail, only the PMOS pair
is active. Close to the positive rail, only the NMOS pair is active. In a transition region that extends from approximately 2V
below V+ to 1V below V+, both pairs are active, and one pair
gradually takes over from the other. In this transition region,
the input-referred offset voltage changes from the offset voltage associated with the PMOS pair to that of the NMOS pair.
The input pairs are trimmed independently to guarantee an
input offset voltage of less then 0.5 mV at room temperature
over the complete rail-to-rail input range. This also significantly improves the CMRR of the amplifier in the transition
20168350
FIGURE 2. Isolating Capacitive Load
DECOUPLING AND LAYOUT
For decoupling the supply lines it is suggested that 10 nF capacitors be placed as close as possible to the op amp.
For single supply, place a capacitor between V+ and V−. For
dual supplies, place one capacitor between V+ and the board
ground, and the second capacitor between ground and V−.
OP AMP CIRCUIT NOISE
The LMV841/LMV842/LMV844 have good noise specifications, and will frequently be used in low-noise applications.
Therefore it is important to determine the noise of the total
circuit. Besides the input referred noise of the op amp, the
feedback resistors may have an important contribution to the
total noise.
For applications with a voltage input configuration it is, in general, beneficial to keep the resistor values low. In these configurations high resistor values mean high noise levels.
However, using low resistor values will increase the power
consumption of the application. This is not always acceptable
for portable applications, so there is a trade-off between noise
level and power consumption.
Besides the noise contribution of the signal source, three
types of noise need to be taken into account for calculating
the noise performance of an op amp circuit:
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LMV841 Single/ LMV842 Dual/ LMV844 Quad
•
Input referred voltage noise of the op amp
•
Input referred current noise of the op amp
•
Noise sources of the resistors in the feedback network,
configuring the op amp
To calculate the noise voltage at the output of the op amp, the
first step is to determine a total equivalent noise source. This
requires the transformation of all noise sources to the same
reference node. A convenient choice for this node is the input
of the op amp circuit. The next step is to add all the noise
sources. The final step is to multiply the total equivalent input
voltage noise with the gain of the op amp configuration.
The input referred voltage noise of the op amp is already located at the input, we can use the input referred voltage noise
without further transferring. The input referred current noise
needs to be converted to an input referred voltage noise. The
current noise is negligibly small, as long as the equivalent resistance is not unrealistically large, so we can leave the
current noise out for these examples. That leaves us with the
noise sources of the resistors, being the thermal noise voltage. The influence of the resistors on the total noise can be
seen in the following examples, one with high resistor values
and one with low resistor values. Both examples describe an
op amp configuration with a gain of 101 which will give the
circuit a bandwidth of 44.5 kHz. The op amp noise is the same
for both cases, i.e. an input referred noise voltage of 20 nV/
and a negligibly small input referred noise current.
where:
enr = thermal noise voltage of the equivalent resistor
Req (V/ )
k = Boltzmann constant (1.38 x 10
–23
J/K)
T = absolute temperature (K)
Req = resistance (Ω)
The total equivalent input voltage noise is given by the equation:
where:
e
= total input equivalent voltage noise of the circuit
n in
env = input voltage noise of the op amp
The final step is multiplying the total input voltage noise by the
noise gain, which is in this case the gain of the op amp configuration:
The equivalent resistance for the first example with a resistor
RF of 10 MΩ and a resistor RG of 100 kΩ at 25°C (298 K)
equals:
20168377
FIGURE 3. Noise Circuit
To calculate the noise of the resistors in the feedback network, the equivalent input referred noise resistance is needed. For the example in Figure 3, this equivalent resistance
Req can be calculated using the following equation:
The voltage noise of the equivalent resistance can be calculated using the following equation:
Now the noise of the resistors can be calculated, yielding:
The total noise at the input of the op amp is:
For the first example, this input noise will, multiplied with the
noise gain, give a total output noise of:
In the second example, with a resistor RF of 10 kΩ and a resistor RG of 100Ω at 25°C (298 K), the equivalent resistance
equals:
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The resistor noise for the second example is:
The total noise at the input of the op amp is:
For the second example the input noise will, multiplied with
the noise gain, give an output noise of
LMV841 Single/ LMV842 Dual/ LMV844 Quad
a center frequency of approximately 10% from the frequency
of the total filter:
C = 33 nF
R1 = 2 kΩ
R2 = 6.2 kΩ
R3 = 45 Ω
This will give for filter A:
and for filter B with C = 27 nF:
Bandwidth can be calculated by:
In the first example the noise is dominated by the resistor
noise due to the very high resistor values, in the second example the very low resistor values add only a negligible
contribution to the noise and now the dominating factor is the
op amp itself. When selecting the resistor values, it is important to choose values that don't add extra noise to the application. Choosing values above 100 kΩ may increase the
noise too much. Low values will keep the noise within acceptable levels; choosing very low values however, will not make
the noise even lower, but will increase the current of the circuit.
ACTIVE FILTER
The rail-to-rail input and output of the LMV841/LMV842/
LMV844 and the wide supply voltage range make these amplifiers ideal to use in numerous applications. One of the
typical applications is an active filter as shown in Figure 4.
This example is a band-pass filter, for which the pass band is
widened. This is achieved by cascading two band-pass filters,
with slightly different center frequencies.
For filter A this will give:
and for filter B:
The response of the two filters and the combined filter is
shown in Figure 5.
20168358
FIGURE 4. Active Filter
The center frequency of the separate band-pass filters can be
calculated by:
In this example a filter was designed with its pass band at 10
kHz. The two separate band-pass filters are designed to have
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20168359
FIGURE 5. Active Filter Curve
The responses of filter A and filter B are shown as the thin
lines in Figure 5; the response of the combined filter is shown
as the thick line. Shifting the center frequencies of the separate filters farther apart, will result in a wider band; however,
positioning the center frequencies too far apart will result in a
less flat gain within the band. For wider bands more bandpass filters can be cascaded.
LMV841 Single/ LMV842 Dual/ LMV844 Quad
Tip: Use the WEBENCH internet tools at www.national.com
for your filter application.
HIGH-SIDE CURRENT SENSING
The rail-to-rail input and the low VOS features make the
LMV841/LMV842/LMV844 ideal op amps for high-side current sensing applications.
To measure a current, a sense resistor is placed in series with
the load, as shown in Figure 6. The current flowing through
this sense resistor will result in a voltage drop, that is amplified
by the op amp.
Suppose it is necessary to measure a current between 0A and
2A using a sense resistor of 100 mΩ, and convert it to an
output voltage of 0 to 5V. A current of 2A flowing through the
load and the sense resistor will result in a voltage of 200 mV
across the sense resistor. The op amp will amplify this 200
mV to fit the current range to the output voltage range. Use
the formula:
V
= RF/RG * V
OUT
SENSE
to calculate the gain needed. For a load current of 2A and an
output voltage of 5V the gain would be V
OUT/VSENSE
= 25.
If the feedback resistor, RF, is 100 kΩ, then the value for R
will be 4 kΩ. The tolerance of the resistors has to be low to
obtain a good common-mode rejection.
20168371
FIGURE 6. High-Side Current Sensing
HIGH IMPEDANCE SENSOR INTERFACE
With CMOS inputs, the LMV841/LMV842/LMV844 are particularly suited to be used as high impedance sensor interfaces.
Many sensors have high source impedances that may range
up to 10 MΩ. The input bias current of an amplifier will load
the output of the sensor, and thus cause a voltage drop across
the source resistance, as shown in Figure 7. When an op amp
is selected with a relatively high input bias current, this error
may be unacceptable.
The low input current of the LMV841/LMV842/LMV844 significantly reduces such errors. The following examples show
the difference between a standard op amp input and the
CMOS input of the LMV841/LMV842/LMV844.
The voltage at the input of the op amp can be calculated with
V
= VS - IB * R
IN+
S
For a standard op amp the input bias Ib can be 10 nA. When
the sensor generates a signal of 1V (VS) and the sensors
impedance is 10 MΩ (RS), the signal at the op amp input will
be
VIN = 1V - 10 nA * 10 MΩ = 1V - 0.1V = 0.9V
For the CMOS input of the LMV841/LMV842/LMV844, which
has an input bias current of only 0.3 pA, this would give
VIN = 1V – 0.3 pA * 10 MΩ = 1V - 3 μV = 0.999997V
The conclusion is that a standard op amp, with its high input
bias current input, is not a good choice for use in impedance
sensor applications. The LMV841/LMV842/LMV844, in contrast, are much more suitable due to the low input bias current.
The error is negligibly small; therefore, the LMV841/LMV842/
LMV844 are a must for use with high impedance sensors.
G
20168352
FIGURE 7. High Impedance Sensor Interface
THERMOCOUPLE AMPLIFIER
The following is a typical example for a thermocouple amplifier application using an LMV841, LMV842, or LMV844. A
thermocouple senses a temperature and converts it into a
voltage. This signal is then amplified by the LMV841,
LMV842, or LMV844. An ADC can then convert the amplified
signal to a digital signal. For further processing the digital signal can be processed by a microprocessor, and can be used
to display or log the temperature, or the temperature data can
be used in a fabrication process.
Characteristics of a Thermocouple
A thermocouple is a junction of two different metals. These
metals produce a small voltage that increases with temperature.
The thermocouple used in this application is a K-type thermocouple. A K-type thermocouple is a junction between Nickel-Chromium and Nickel-Aluminum. This is one of the most
commonly used thermocouples. There are several reasons
for using the K-type thermocouple. These include temperature range, the linearity, the sensitivity, and the cost.
A K-type thermocouple has a wide temperature range. The
range of this thermocouple is from approximately −200°C to
approximately 1200°C, as can be seen in Figure 8. This cov-
ers the generally used temperature ranges.
Over the main part of the range the behavior is linear. This is
important for converting the analog signal to a digital signal.
The K-type thermocouple has good sensitivity when compared to many other types; the sensitivity is 41 uV/°C. Lower
sensitivity requires more gain and makes the application more
sensitive to noise.
In addition, a K-type thermocouple is not expensive, many
other thermocouples consist of more expensive materials or
are more difficult to produce.
15 www.national.com
20168370
FIGURE 8. K-Type Thermocouple Response
LMV841 Single/ LMV842 Dual/ LMV844 Quad
Thermocouple Example
For this example suppose the range of interest is from 0°C to
500°C, and the resolution needed is 0.5°C. The power supply
for both the LMV841, LMV842, or LMV844 and the ADC is
3.3V.
The temperature range of 0°C to 500°C results in a voltage
range from 0 mV to 20.6 mV produced by the thermocouple.
This is shown in Figure 8
To obtain the best accuracy the full ADC range of 0 to 3.3V is
used and the gain needed for this full range can be calculated
as follows: AV = 3.3V/0.0206V = 160.
If RG is 2 kΩ, then the value for RF can be calculated with this
gain of 160. Since AV = RF/RG, RF can be calculated as follow:
RF = AV * RG = 160 x 2 kΩ = 320 kΩ.
To get a resolution of 0.5°C a step smaller then the minimum
resolution is needed. This means that at least 1000 steps are
necessary (500°C/0.5°C). A 10-bit ADC would be sufficient
as this will give 1024 steps. A 10-bit ADC such as the two
channel 10-bit ADC102S021 would be a good choice.
Unwanted Thermocouple Effect
At the point where the thermocouple wires are connected to
the circuit, usually copper wires or traces, an unwanted thermocouple effect will occur.
At this connection, this could be the connector on a PCB, the
thermocouple wiring forms a second thermocouple with the
connector. This second thermocouple disturbs the measurements from the intended thermocouple.
Using an isothermal block as a reference will compensate for
this additional thermocouple effect . An isothermal block is a
good heat conductor. This means that the two thermocouple
connections both have the same temperature. The temperature of the isothermal block can be measured, and thereby
the temperature of the thermocouple connections. This is
usually called the cold junction reference temperature.
In the example, an LM35 is used to measure this temperature.
This semiconductor temperature sensor can accurately measure temperatures from −55°C to 150°C.
The ADC in this example also coverts the signal from the
LM35 to a digital signal. Now the microprocessor can compensate the amplified thermocouple signal, for the unwanted
thermocouple effect.
FIGURE 9. Thermocouple Amplifier
www.national.com 16
20168353
Physical Dimensions inches (millimeters) unless otherwise noted
LMV841 Single/ LMV842 Dual/ LMV844 Quad
NS Package Number MAA05A
5-Pin SC70
NS Package Number MUA08A
8-Pin MSOP
17 www.national.com
LMV841 Single/ LMV842 Dual/ LMV844 Quad
NS Package Number M08A
8-Pin SOIC
14-Pin SOIC
NS Package Number M14A
www.national.com 18
14-Pin TSSOP
NS Package Number MTC14
LMV841 Single/ LMV842 Dual/ LMV844 Quad
19 www.national.com
Amplifiers
Notes
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