The LMV551/LMV552/LMV554 are high performance, low
power operational amplifiers implemented with National’s advanced VIP50 process. They feature 3 MHz of bandwidth
while consuming only 37 μA of current per amplifier, which is
an exceptional bandwidth to power ratio in this op amp class.
These amplifiers are unity gain stable and provide an excellent solution for low power applications requiring a wide bandwidth.
The LMV551/LMV552/LMV554 have a rail-to-rail output stage
and an input common mode range that extends below ground.
The LMV551/LMV552/LMV554 have an operating supply
voltage range from 2.7V to 5.5V. These amplifiers can operate over a wide temperature range (−40°C to 125°C) making
them a great choice for automotive applications, sensor applications as well as portable instrumentation applications.
The LMV551 is offered in the ultra tiny 5-Pin SC70 and 5-Pin
SOT-23 package. The LMV552 is offered in an 8-Pin MSOP
package. The LMV554 is offered in the 14-Pin TSSOP.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Human Body Model
LMV551/LMV552/LMV5542 KV
Machine Model
LMV551100V
LMV551/LMV552/LMV554
LMV552/LMV554250V
V
Differential (@ V+ = 5V)
IN
Supply Voltage (V+ - V−)
Voltage at Input/Output pinsV+ +0.3V, V− −0.3V
±2.5V
6V
Junction Temperature (Note 3)150°C
Soldering Information
Infrared or Convection (20 sec)235°C
Wave Soldering Lead Temp. (10 sec)260°C
Operating Ratings (Note 1)
Temperature Range (Note 3)−40°C to 125°C
Supply Voltage (V+ – V−)
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 3V, V− = 0V, VCM = V+/2 = VO. Boldface limits apply at
the temperature extremes. (Note 4)
SymbolParameterConditionsMin
(Note 6)
V
OS
TC V
I
B
I
OS
CMRRCommon Mode Rejection Ratio
PSRRPower Supply Rejection Ratio
Input Offset Voltage13
Input Offset Average Drift3.3
OS
Input Bias Current(Note 7)2038nA
Input Offset Current120nA
0V ≤ VCM 2.0V
3.0 ≤ V+ ≤ 5V,
LMV551/LMV55280
VCM = 0.5V
LMV55478
2.7 ≤ V+ ≤ 5.5V,
LMV551/LMV55280
VCM = 0.5V
LMV55478
CMVRInput Common-Mode Voltage
Range
A
VOL
Large Signal Voltage Gain
CMRR ≥ 68 dB
CMRR ≥ 60 dB
0.4 ≤ VO ≤ 2.6,
LMV551/LMV55281
RL = 100 kΩ to V+/2
LMV55479
0.4 ≤ VO ≤ 2.6, RL = 10 kΩ to V+/2
V
O
Output Swing High
RL = 100 kΩ to V+/2
RL = 10 kΩ to V+/2
Output Swing Low
RL = 100 kΩ to V+/2
RL = 10 kΩ to V+/2
I
SC
Output Short Circuit CurrentSourcing (Note 9)10
Sinking (Note 9)25
74
72
78
76
78
76
0
0
78
77
71
68
4048
85100
5065
95110
Typ
(Note 5)
92
92
92
2.1
90
80
Max
(Note 6)
4.5
2.1
58
120
77
130
2.7V to 5.5V
mV from
Units
mV
μV/°C
dB
dB
V
dB
rail
mA
www.national.com2
LMV551/LMV552/LMV554
SymbolParameterConditionsMin
(Note 6)
I
S
Supply Current per Amplifier3442
SRSlew RateAV = +1,
1
Typ
(Note 5)
Max
(Note 6)
52
Units
μA
V/μs
10% to 90% (Note 8)
Φm
Phase Margin
RL = 10 kΩ, CL = 20 pF
75Deg
GBWGain Bandwidth Product3MHz
e
n
i
n
THDTotal Harmonic Distortion
Input-Referred Voltage Noisef = 100 kHz70
f = 1 kHz70
Input-Referred Current Noisef = 100 kHz0.1
f = 1 kHz0.15
f = 1 kHz, AV = 2, RL = 2 kΩ
0.003%
nV/
pA/
5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2 = VO. Boldface limits apply at
the temperature extremes.
SymbolParameterConditionsMin
(Note 6)
V
OS
TC V
I
B
I
OS
CMRRCommon Mode Rejection Ratio
PSRRPower Supply Rejection Ratio
Input Offset Voltage13.0
Input Offset Average Drift3.3
OS
Input Bias Current(Note 7)2038nA
Input Offset Current120nA
0 ≤ V
CM
≤ 4.0V
3V ≤ V+ ≤ 5V to VCM = 0.5V
76
74
78
75
2.7V ≤ V+ ≤ 5.5V to VCM = 0.5V
78
75
CMVRInput Common-Mode Voltage
Range
A
VOL
Large Signal Voltage Gain
CMRR ≥ 68 dB
CMRR ≥ 60 dB
0.4 ≤ VO ≤ 4.6, RL = 100 kΩ to V+/2
0
0
78
75
0.4 ≤ VO ≤ 4.6, RL = 10 kΩ to V+/2
75
72
V
O
I
SC
Output Swing High
Output Swing Low
RL = 100 kΩ to V+/2
RL = 10 kΩ to V+/2
RL = 100 kΩ to V+/2
RL = 10 kΩ to V+/2
7092
125155
6070
110130
Output Short Circuit CurrentSourcing (Note 9)10
Sinking (Note 9)25
I
S
SRSlew RateAV = +1, VO = 1 V
Supply Current Per Amplifier3746
PP
1
10% to 90% (Note 8)
Φm
Phase Margin
RL = 10 kΩ, CL = 20 pF
75Deg
GBWGain Bandwidth Product3MHz
Typ
(Note 5)
93
90
90
4.1
90
80
Max
(Note 6)
4.5
4.1
122
210
82
155
54
Units
mV
μV/°C
dB
dB
V
dB
mV from
rail
mA
μA
V/μs
3www.national.com
SymbolParameterConditionsMin
(Note 6)
e
n
Input-Referred Voltage Noisef = 100 kHz70
Typ
(Note 5)
Max
(Note 6)
f = 1 kHz70
i
n
Input-Referred Current Noisef = 100 kHz0.1
f = 1 kHz0.15
THDTotal Harmonic Distortion
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
LMV551/LMV552/LMV554
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Tables.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Note 3: The maximum power dissipation is a function of T
PD = (T
Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ >
TA.
Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality
control (SQC) method.
Note 7: Positive current corresponds to current flowing into the device.
Note 8: Slew rate is the average of the rising and falling slew rates.
Note 9: The part is not short circuit protected and is not recommended for operation with heavy resistive loads.
- TA)/ θJA. All numbers apply for packages soldered directly onto a PC board.
J(MAX)
f = 1 kHz, AV = 2, RL = 2 kΩ
, θJA. The maximum allowable power dissipation at any ambient temperature is
The LMV551/LMV552/LMV554 have performance guaranteed at supply voltages of 3V and 5V and are guaranteed to
be operational at all supply voltages between 2.7V and 5.5V.
For this supply voltage range, the LMV551/LMV552/LMV554
draw the extremely low supply current of less than 37 μA per
amp.
Wide Bandwidth
The bandwidth to power ratio of 3 MHz to 37 μA per amplifier
is one of the best bandwidth to power ratios ever achieved.
This makes these devices ideal for low power signal processing applications such as portable media players and instrumentation.
Low Input Referred Noise
The LMV551/LMV552/LMV554 provide a flatband input referred voltage noise density of 70 nV/
cantly better than the noise performance expected from an
ultra low power op amp. They also feature the exceptionally
low 1/f noise corner frequency of 4 Hz. This noise specification makes the LMV551/LMV552/LMV554 ideal for low power
applications such as PDAs and portable sensors.
Ground Sensing and Rail-to-Rail Output
The LMV551/LMV552/LMV554 each have a rail-to-rail output
stage, which provides the maximum possible output dynamic
range. This is especially important for applications requiring
a large output swing. The input common mode range includes
the negative supply rail which allows direct sensing at ground
in a single supply operation.
Small Size
The small footprints of the LMV551/LMV552/LMV554 packages save space on printed circuit boards, and enable the
design of smaller and more compact electronic products.
Long traces between the signal source and the op amp make
the signal path susceptible to noise. By using a physically
smaller package, the amplifiers can be placed closer to the
signal source, reducing noise pickup and enhancing signal
integrity
, which is signifi-
STABILITY OF OP AMP CIRCUITS
Stability and Capacitive Loading
As seen in the Phase Margin vs. Capacitive Load graph, the
phase margin reduces significantly for CL greater than 100
pF. This is because the op amp is designed to provide the
maximum bandwidth possible for a low supply current. Stabilizing them for higher capacitive loads would have required
either a drastic increase in supply current, or a large internal
compensation capacitance, which would have reduced the
bandwidth of the op amp. Hence, if the LMV551/LMV552/
LMV554 are to be used for driving higher capacitive loads,
they will have to be externally compensated.
20152603
FIGURE 1. Gain vs. Frequency for an Op Amp
An op amp, ideally, has a dominant pole close to DC, which
causes its gain to decay at the rate of 20 dB/decade with respect to frequency. If this rate of decay, also known as the
rate of closure (ROC), remains the same until the op amp’s
unity gain bandwidth, the op amp is stable. If, however, a large
capacitance is added to the output of the op amp, it combines
with the output impedance of the op amp to create another
pole in its frequency response before its unity gain frequency
(Figure 1). This increases the ROC to 40 dB/ decade and
causes instability.
9www.national.com
In such a case a number of techniques can be used to restore
stability to the circuit. The idea behind all these schemes is to
modify the frequency response such that it can be restored to
an ROC of 20 dB/decade, which ensures stability.
In the Loop Compensation
Figure 2 illustrates a compensation technique, known as ‘in
the loop’ compensation, that employs an RC feedback circuit
within the feedback loop to stabilize a non-inverting amplifier
configuration. A small series resistance, RS, is used to isolate
the amplifier output from the load capacitance, CL, and a small
capacitance, CF, is inserted across the feedback resistor to
LMV551/LMV552/LMV554
bypass CL at higher frequencies.
FIGURE 2. In the Loop Compensation
The values for RS and CF are decided by ensuring that the
zero attributed to CF lies at the same frequency as the pole
attributed to CL. This ensures that the effect of the second
pole on the transfer function is compensated for by the presence of the zero, and that the ROC is maintained at 20 dB/
decade. For the circuit shown in Figure 2 the values of RS and
CF are given by Equation 1. Values of RS and CF required for
maintaining stability for different values of CL, as well as the
phase margins obtained, are shown in Table 1. RF, RIN, and
RL are to be 10 kΩ, while R
is 340Ω.
OUT
20152604
is shown in Figure 3. A resistor, R
tween the load capacitance and the output. This introduces a
, is placed in series be-
ISO
zero in the circuit transfer function, which counteracts the effect of the pole formed by the load capacitance and ensures
stability. The value of R
pending on the size of CL and the level of performance de-
to be used should be decided de-
ISO
sired. Values ranging from 5Ω to 50Ω are usually sufficient to
ensure stability. A larger value of R
with less ringing and overshoot, but will also limit the output
will result in a system
ISO
swing and the short circuit current of the circuit.
20152612
FIGURE 3. Compensation by Isolation Resistor
Typical Application
ACTIVE FILTERS
With a wide unity gain bandwidth of 3 MHz, low input referred
noise density and a low power supply current, the LMV551/
LMV552/LMV554 are well suited for low-power filtering applications. Active filter topologies, such as the Sallen-Key low
pass filter shown in Figure 4, are very versatile, and can be
used to design a wide variety of filters (Chebyshev, Butterworth or Bessel). The Sallen-Key topology, in particular, can
be used to attain a wide range of Q, by using positive feedback to reject the undesired frequency range.
In the circuit shown in Figure 4, the two capacitors appear as
open circuits at lower frequencies and the signal is simply
buffered to the output. At high frequencies the capacitors appear as short circuits and the signal is shunted to ground by
one of the capacitors before it can be amplified. Near the cutoff frequency, where the impedance of the capacitances is on
the same order as RG and RF, positive feedback through the
other capacitor allows the circuit to attain the desired Q.
(1)
TABLE 1.
CL (pF)
RS (Ω)
CF (pF)Phase Margin
(°)
50340847
1003401542
1503402240
Although this methodology provides circuit stability for any
load capacitance, it does so at the price of bandwidth. The
closed loop bandwidth of the circuit is now limited by RF and
CF.
Compensation by External Resistor
In some applications it is essential to drive a capacitive load
without sacrificing bandwidth. In such a case, in the loop compensation is not viable. A simpler scheme for compensation
Power Managementwww.national.com/powerFeedbackwww.national.com/feedback
Switching Regulatorswww.national.com/switchers
LDOswww.national.com/ldo
LED Lightingwww.national.com/led
PowerWisewww.national.com/powerwise
Serial Digital Interface (SDI)www.national.com/sdi
Temperature Sensorswww.national.com/tempsensors
Wireless (PLL/VCO)www.national.com/wireless
THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION
(“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY
OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO
SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS,
IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS
DOCUMENT.
TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT
NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL
PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR
APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND
APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE
NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS.
EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO
LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE
AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR
PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY
RIGHT.
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and
whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected
to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform
can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness.
National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other
brand or product names may be trademarks or registered trademarks of their respective holders.