LMS1487
5V Low Power RS-485 / RS-422 Differential Bus
Transceiver
LMS1487 5V Low Power RS-485 / RS-422 Differential Bus Transceiver
April 2003
General Description
The LMS1487 is a low power differential bus/line transceiver
designed for high speed bidirectional data communication on
multipoint bus transmission lines. It is designed for balanced
transmission lines. It meets ANSI Standards TIA/EIA
RS422-B, TIA/EIA RS485-A and ITU recommendation and
V.11 and X.27. The LMS1487 combines a TRI-STATE
differential line driver and differential input receiver, both of
which operate from a single 5.0V power supply. The driver
and receiver have an active high and active low, respectively, that can be externally connected to function as a
direction control. The driver and receiver differential inputs
are internally connected to form differential input/output (I/O)
bus ports that are designed to offer minimum loading to bus
whenever the driver is disabled or when V
ports feature wide positive and negative common mode
voltage ranges, making the device suitable for multipoint
applications in noisy environments. The LMS1487 is available in a 8-Pin SOIC and 8-pin DIP packages. It is a drop-in
socket replacement to Maxim’s MAX1487
= 0V. These
CC
Typical Application
Features
n Meet ANSI standard RS-485-A and RS-422-B
n Data rate 2.5 Mbps
n Single supply voltage operation, 5V
n Wide input and output voltage range
n Thermal shutdown protection
™
n Short circuit protection
n Low quiescent current 320µA
n Allows up to 128 transceivers on the bus
n Open circuit fail-safe for receiver
n Extended operating temperature range −40˚C to 85˚C
n Drop-in replacement to MAX1487
n Available in 8-pin SOIC and 8-pin DIP package
Applications
n Low power RS-485 systems
n Network hubs, bridges, and routers
n Point of sales equipment (ATM, barcode scanners,…)
n Local area networks (LAN)
n Integrated service digital network (ISDN)
n Industrial programmable logic controllers
n High speed parallel and serial applications
n Multipoint applications with noisy environment
A Typical multipoint application is shown in the above figure. Terminating resistors, RT, are typically required but only located at the two ends of the cable.
Pull up and pull down resistors maybe required at the end of the bus to provide fail-safe biasing. The biasing resistors provide a bias to the cable when all
drivers are in TRI-STATE, See National Application Note, AN-847 for further information.
© 2003 National Semiconductor Corporation DS200530 www.national.com
20053001
Connection Diagram
LMS1487
Truth Table
DRIVER SECTION
RECEIVER SECTION
8-Pin SOIC / DIP
Top View
RE
XHHHL
XHL LH
XLXZZ
RE
LL ≥ +0.2V H
LL ≤ −0.2V L
HX X Z
L L OPEN
DE DI A B
DE A-B RO
20053002
*
H
Note:*= Non Terminated, Open Input only
X = Irrelevant
Z = TRI-STATE
H = High level
L = Low level
Pin Descriptions
Pin#I/O Name Function
1 O RO Receiver Output: If A
will be high also if the inputs (A and B) are open (non-terminated
2I RE
3 I DE Driver Output Enable: The driver outputs (A and B) are enabled when DE is high; they are in
4 I DI Driver Input: A low on DI forces A low and B high while a high on DI forces A high and B low
5 N/A GND Ground
6 I/O A Non-inverting Driver Output and Receiver Input pin. Driver Output levels conform to RS-485
7 I/O B Inverting Driver Output and Receiver Input pin. Driver Output levels conform to RS-485 signaling
8 N/A V
CC
Receiver Output Enable: RO is enabled when RE is low; RO is in TRI-STATE when RE is high
TRI-STATE when DE is low. Pins A and B also function as the receiver input pins (see below)
when the driver is enabled
signaling levels
levels
Power Supply: 4.75V ≤ VCC≤ 5.25V
>
B by 200 mV, RO will be high; If A<B by 200mV, RO will be low. RO
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Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
8-Pin SOIC
8-Pin DIP
LMS1487CM
LMS1487CMX 2.5k Units Tape and Reel
LMS1487IM
LMS1487IMX 2.5k Units Tape and Reel
LMS1487CNA LMS1487CNA 40 Units/Rail
LMS1487INA LMS1487INA 40 Units/Rail
LMS1487CM
LMS1487IM
95 Units/Rail
95 Units/Rail
LMS1487
M08A
N08E
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Absolute Maximum Ratings (Note 1)
ESD Rating (Note 4) 7kV
If Military/Aerospace specified devices are required,
LMS1487
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage, V
Input Voltage, V
(Note 2) 7V
CC
(DI, DE, or RE) −0.3V to VCC+ 0.3V
IN
Voltage Range at Any Bus Terminal
(AB) −7V to 12V
Receiver Outputs −0.3V to V
Package Thermal Impedance, θ
JA
CC
+ 0.3V
SOIC 125˚C/W
DIP 88˚C/W
Junction Temperature (Note 3) 150˚C
Operating Free-Air Temperature
Range, T
A
Commercial 0˚C to 70˚C
Industrial −40˚C to 85˚C
Storage Temperature Range −65˚C to 150˚C
Soldering Information
Infrared or Convection (20 sec.) 235˚C
Lead Temperature 260˚C
Operating Ratings
Supply Voltage, V
Voltage at any Bus Terminal
(Separately or Common Mode)
V
or V
IN
IC
High-Level Input Voltage, V
(Note 5)
Low-Level Input Voltage, V
(Note 5)
Differential Input Voltage, V
(Note 6)
High-Level Output
Driver, I
Receiver, I
Low-Level Output
Driver, I
Receiver, I
CC
OH
OH
OL
OL
Min Nom Max
4.75 5.0 5.25 V
−7 12 V
IH
IL
ID
2V
Electrical Characteristics
Over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
Driver Section
|V
| Differential Output Voltage R =∞(Figure 1) 5.25 V
OD1
|V
| Differential Output Voltage R = 50Ω (Figure 1) ,RS-422 2.0 V
OD2
R=27Ω (Figure 1) ,RS-485 1.5 5.0
∆V
OD
V
OC
∆V
OC
V
IH
V
IL
I
IN1
Receiver Section
I
IN2
V
TH
Change in Magnitude of
R=27Ω or 50Ω (Figure 1) , (Note 7) 0.2 V
Driver Differential Output
Voltage for Complementary
Output States
Common-Mode Output
R=27Ω or 50Ω (Figure 1) 3.0
Voltage
Change in Magnitude of
R=27Ω or 50Ω (Figure 1), (Note 7) 0.2 V
Driver Common-Mode Output
Voltage for Complementary
Output States
CMOS Inout Logic Threshold
DE, DI, RE 2.0 V
High
CMOS Input Logic Threshold
DE, DI, RE 0.8
Low
Logic Input Current DE, DI, RE
Input Current (A, B) DE = 0V, VCC= 0V or 5.25V
= 12V
V
IN
V
= − 7V −0.2
IN
Differential Input Threshold
−7V ≤ VCM≤ + 12V −0.2 +0.2
Voltage
±
2µA
0.25 mA
0.8 V
±
12 V
−150 mA
−42 mA
80 mA
26 mA
V
V
V
∆V
TH
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Input Hysteresis Voltage
(V
TH+−VTH−
)
V
= 0 95 mV
CM
Electrical Characteristics (Continued)
Over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
V
OH
V
OL
I
OZR
R
IN
Power Supply Current
I
CC
I
OSD1
I
OSD2
I
OSR
Switching Characteristics
Driver
T
PLH
T
PHL
T
SKEW
,
T
R
T
F
TZH,
T
ZL
,
T
HZ
T
LZ
Receiver
T
PLH
T
PHL
T
SKEW
,
T
ZH
T
ZL
F
MAX
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Note 2: All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.
Note 3: The maximum power dissipation is a function of T
(T
J(MAX)-TA
Note 4: ESD rating based upon human body model, 100pF discharged through 1.5kΩ.
Note 5: Voltage limits apply to DI, DE, RE pins.
Note 6: Differential input/output bus voltage is measured at the non-inverting terminal A with respect to the inverting terminal B.
Note 7: |∆V
Note 8: Peak current
CMOS High-level Output
IOH= −4mA, VID= 200mV 3.5 V
Voltage
CMOS Low-level IOL= 4mA, VID= −200mV 0.40 V
Tristate Output Leakage
0.4V ≤ VO≤ + 2.4V
Current
Input Resistance − 7V ≤ VCM≤+12V 48 kΩ
Supply Current DE = V
DE = 0V, RE = GND or V
Driver Short-circuit Output
Current
Driver Short-circuit Output
Current
Receiver Short-circuit Output
VO= high, −7V ≤ VCM≤ + 12V
(Note 8)
VO= low, − 7V ≤VCM≤ + 12V
(Note 8)
0V≤VO≤ V
RE = GND or V
CC,
CC
CC
CC
320 500 µA
315 400
35 250 mA
35 250 mA
795mA
Current
,
Propagation Delay Input to
Output
Driver Output Skew RL=54Ω,CL= 100 pF
RL=54Ω,CL= 100pF
(Figure 3, Figure 7)
10 35 60 nS
510nS
(Figure 3, Figure 7)
Driver Rise and Fall Time RL=54Ω,CL= 100 pF
3 8 40 nS
(Figure 3, Figure 7)
Driver Enable to Ouput Valid
Time
Driver Output Disable Time CL= 15 pF, RL= 500Ω (Figure 4,
CL= 100 pF, RL= 500Ω
(Figure 4, Figure 8)
25 70 nS
30 70 nS
Figure 8)
,
Propagation Delay Input to
Output
Receiver Output Skew RL=54Ω,CL= 100 pF
RL=54Ω,CL= 100 pF
(Figure 5, Figure 7)
20 50 200 nS
5nS
(Figure 5, Figure 7)
Receiver Enable Time CL= 15 pF, RL=1kΩ
20 50 nS
(Figure 6, Figure 10)
Receiver Disable Time 20 50 nS
Maximum Data Rate 2.5 Mbps
, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD=
)/θJA. All numbers apply for packages soldered directly into a PC board.
| and |∆VOC| are changes in magnitude of VODand VOC, respectively when the input changes from high to low levels.
OD
J(MAX)
±
1µA
LMS1487
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Typical Performance Characteristics
LMS1487
Output Current vs. Receiver Output Low Voltage Output Current vs. Receiver Output High Voltage
20053013
20053014
Receiver Output High Voltage vs. Temperature Receiver Output Low-Voltage vs. Temperature
20053015
20053016
Driver Output Current vs. Differential Output Voltage Driver Differential Output Voltage vs. Temperature
20053017
20053018
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Typical Performance Characteristics (Continued)
Output Current vs. Driver Output Low Voltage Output Current vs. Driver Output High Voltage
LMS1487
Supply Current vs. Temperature
20053019
20053021
20053020
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Parameter Measuring Information
LMS1487
20053003
FIGURE 1. Test Circuit for VODand V
FIGURE 2. Test Circuit for V
OC
20053004
OD3
20053005
FIGURE 3. Test Circuit for Driver Propagation Delay
FIGURE 4. Test Circuit for Driver Enable / Disable
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20053006
Parameter Measuring Information (Continued)
FIGURE 5. Test Circuit for Receiver Propagation Delay
LMS1487
20053007
20053008
FIGURE 6. Test Circuit for Receiver Enable / Disable
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Switching Characteristics
LMS1487
FIGURE 7. Driver Propagation Delay, Rise / Fall Time
20053009
20053011
FIGURE 9. Receiver Propagation Delay
20053010
FIGURE 8. Driver Enable / Disable Time
20053012
FIGURE 10. Receiver Enable / Disable Time
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Application Information
POWER LINE NOISE FILTERING
A factor to consider in designing power and ground is noise
filtering. A noise filtering circuit is designed to prevent noise
generated by the integrated circuit (IC) as well as noise
entering the IC from other devices. A common filtering
method is to place by-pass capacitors (C
power and ground lines.
Placing a by-pass capacitor (C
) with the correct value at
bp
the proper location solves many power supply noise problems. Choosing the correct capacitor value is based upon
the desired noise filtering range. Since capacitors are not
) between the
bp
LMS1487
ideal, they may act more like inductors or resistors over a
specific frequency range. Thus, many times two by-pass
capacitors may be used to filter a wider bandwidth of noise.
It is highly recommended to place a larger capacitor, such as
10µF, between the power supply pin and ground to filter out
low frequencies and a 0.1µF to filter out high frequencies.
By-pass capacitors must be mounted as close as possible to
the IC to be effective. Longs leads produce higher impedance at higher frequencies due to stray inductance. Thus,
this will reduce the by-pass capacitor’s effectiveness. Surface mounted chip capacitors are the best solution because
they have lower inductance.
20053022
FIGURE 11. Placement of by-pass Capacitors, C
bp
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Physical Dimensions inches (millimeters) unless otherwise noted
LMS1487
8-Pin SOIC
NS Package Number M08A
8-Pin DIP
NS Package Number N08E
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Notes
LMS1487 5V Low Power RS-485 / RS-422 Differential Bus Transceiver
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COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
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whose failure to perform when properly used in
accordance with instructions for use provided in the
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
labeling, can be reasonably expected to result in a
significant injury to the user.
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Support Center
Email: new.feedback@nsc.com
Tel: 1-800-272-9959
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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