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LMP7711/LMP7712
Single and Dual Precision, 17 MHz, Low Noise, CMOS
Input Amplifiers
LMP7711/LMP7712 Precision, 17 MHz, Low Noise, CMOS Input Amplifiers
November 2005
General Description
The LMP7711/LMP7712 are single and dual low noise, low
offset, CMOS input, rail-to-rail output precision amplifiers
with a high gain bandwidth product and an enable pin. The
LMP7711/LMP7712 are part of the LMP
family and are ideal for a variety of instrumentation applications.
Utilizing a CMOS input stage, the LMP7711/LMP7712
achieve an input bias current of 100 fA, an input referred
voltage noise of 5.8 nV/
less than
LMP7712 superior choices for precision applications.
Consuming only 1.15 mA of supply current, the LMP7711
offers a high gain bandwidth product of 17 MHz, enabling
accurate amplification at high closed loop gains.
The LMP7711/LMP7712 have a supply voltage range of
1.8V to 5.5V, which makes these ideal choices for portable
low power applications with low supply voltage requirements. In order to reduce the already low power consumption the LMP7711/LMP7712 have an enable function. Once
in shutdown, the LMP7711/LMP7712 draw only 140 nA of
supply current.
The LMP7711/LMP7712 are built with National’s advanced
VIP50 process technology. The LMP7711 is offered in a
6-pin TSOT23 package and the LMP7712 is offered in a
10-pin MSOP.
±
150 µV. These features make the LMP7711/
, and an input offset voltage of
™
precision amplifier
Features
Unless otherwise noted, typical values at VS=5V.
n Input offset voltage
n Input bias current 100 fA
n Input voltage noise 5.8 nV/
n Gain bandwidth product 17 MHz
n Supply current (LMP7711) 1.15 mA
n Supply current (LMP7712) 1.30 mA
n Supply voltage range 1.8V to 5.5V
n THD+N
n Operating temperature range −40
n Rail-to-rail output swing
n Space saving TSOT23 package (LMP7711)
n MSOP-10 package (LMP7712)
@
f = 1 kHz 0.001%
±
150 µV (max)
o
C to 125˚C
Applications
n Active filters and buffers
n Sensor interface applications
n Transimpedance amplifiers
Typical Performance
Offset Voltage Distribution Input Referred Voltage Noise
20150322
LMP™is a trademark of National Semiconductor Corporation.
© 2005 National Semiconductor Corporation DS201503 www.national.com
20150339
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Soldering Information
Infrared or Convection (20 sec) 235˚C
Wave Soldering Lead Temp. (10
sec) 260˚C
ESD Tolerance (Note 2)
LMP7711/LMP7712
Human Body Model 2000V
Machine Model 200V
Differential
V
IN
Supply Voltage (V
Voltage on Input/Output Pins V
=V+–V−) 6.0V
S
+
+0.3V, V−−0.3V
Storage Temperature Range −65˚C to 150˚C
Junction Temperature (Note 3) +150˚C
±
0.3V
Operating Ratings (Note 1)
Temperature Range (Note 3) −40˚C to 125˚C
Supply Voltage (V
0˚C ≤ T
A
−40˚C ≤ T
Package Thermal Resistance (θ
=V+–V−)
S
≤ 125˚C 1.8V to 5.5V
≤ 125˚C 2.0V to 5.5V
A
(Note 3))
JA
6-Pin TSOT23 170˚C/W
10-Pin MSOP 236˚C/W
2.5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA= 25˚C, V+= 2.5V, V−=0V,VO=VCM=V+/2, VEN=V+. Boldface
limits apply at the temperature extremes.
Symbol Parameter Conditions Min
(Note 5)
V
OS
TC V
I
B
Input Offset Voltage
Input Offset Voltage Drift
OS
(Note 6)
Input Bias Current VCM=1V
LMP7711 –1
LMP7712 –1.75
(Notes 7, 8)
I
OS
Input Offset Current VCM=1V
(Note 8)
CMRR Common Mode Rejection Ratio 0V ≤ V
≤ 1.4V 83
CM
80
PSRR Power Supply Rejection Ratio 2.0V ≤ V+≤ 5.5V
−
= 0V, VCM=0
CMVR Input Common-Mode Voltage
Range
A
VOL
V
O
Large Signal Voltage Gain LMP7711, VO= 0.15 to 2.2V
Output Swing High RL=2kΩ to V+/2 70
V
1.8V ≤ V
V
CMRR ≥ 80 dB
CMRR ≥ 78 dB
R
LMP7712, V
R
LMP7711, V
R
LMP7712, V
R
+
−
L
L
L
L
≤ 5.5V
= 0V, VCM=0
=2kΩ to V+/2
O
=2kΩ to V+/2
O
=10kΩ to V+/2
O
=10kΩ to V+/2
= 0.15 to 2.2V
= 0.15 to 2.2V
= 0.15 to 2.2V
85
80
85 98
−0.3
–0.3
88
82
84
80
92
88
90
86
77
RL=10kΩ to V+/2 60
66
Output Swing Low RL=2kΩ to V+/2 30 70
=10kΩ to V+/2 15 60
R
L
Typ
(Note 4)
±
20
(Note 5)
0.05 50
0.006 25
100
100
98
92
110
95
25
20
Max
±
180
±
480
±
4 µV/˚C
100
50
1.5
1.5
73
62
Units
µV
pA
pA
dB
dB
V
dB
mV
from V
mV
+
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2.5V Electrical Characteristics (Continued)
Unless otherwise specified, all limits are guaranteed for TA= 25˚C, V+= 2.5V, V−=0V,VO=VCM=V+/2, VEN=V+. Boldface
limits apply at the temperature extremes.
Symbol Parameter Conditions Min
(Note 5)
I
O
Output Short Circuit Current Sourcing to V
−
VIN= 200 mV (Note 9)
Sinking to V
+
VIN= −200 mV (Note 9)
I
S
Supply Current LMP7711
Enable Mode V
≥ 2.1
EN
36
30
7.5
5.0
LMP7712 (per channel)
Enable Mode V
≥ 2.1
EN
Shutdown Mode (per channel)
≤ 0.4
V
EN
SR Slew Rate A
= +1, Rising (10% to 90%) 8.3
V
A
= +1, Falling (90% to 10%) 10.3
V
GBW Gain Bandwidth Product 14 MHz
e
n
Input-Referred Voltage Noise f = 400 Hz 6.8
f = 1 kHz 5.8
i
n
t
on
t
off
V
EN
Input-Referred Current Noise f = 1 kHz 0.01 pA/
Turn-on Time 140 ns
Turn-off Time 1000 ns
Enable Pin Voltage Range Enable Mode 2.1 2 - 2.5
Shutdown Mode 0 - 0.5 0.4
I
EN
THD+N Total Harmonic Distortion +
Enable Pin Input Current VEN= 2.5V (Note 7) 1.5 3.0
V
= 0V (Note 7) 0.003 0.1
EN
Noise
f = 1 kHz, A
= 0.9 V
V
O
f = 1 kHz, A
= 0.9 V
V
O
=1,RL= 100 kΩ
V
PP
=1,RL= 600Ω
V
PP
Typ
(Note 4)
(Note 5)
52
15
0.95 1.30
1.10 1.50
0.03 1
0.003
0.004
Max
1.65
1.85
4
Units
mA
mA
µA
V/µs
nV/
V
µA
%
LMP7711/LMP7712
5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA= 25˚C, V+= 5V, V−= 0V, VCM=V+/2, VEN=V+. Boldface limits
apply at the temperature extremes.
Symbol Parameter Conditions Min
(Note 5)
V
OS
TC V
I
B
I
OS
CMRR Common Mode Rejection
PSRR Power Supply Rejection Ratio 2.0V ≤ V+≤ 5.5V
CMVR Input Common-Mode Voltage
Input Offset Voltage
Input Offset Average Drift
OS
(Note 6)
LMP7711 –1
LMP7712 –1.75
Input Bias Current (Notes 7, 8) 0.1 50
Input Offset Current (Note 8) 0.01 25
0V ≤ V
Ratio
≤ 3.7V 85
CM
82
85
−
Range
= 0V, VCM=0
V
1.8V ≤ V
V
+
−
≤ 5.5V
= 0V, VCM=0
CMRR ≥ 80 dB
CMRR ≥ 78 dB
80
85 98
−0.3
–0.3
Typ
(Note 4)
±
10
100
100
Max
(Note 5)
±
150
±
450
±
4 µV/˚C
100
50
4
4
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Units
µV
pA
pA
dB
dB
V
5V Electrical Characteristics (Continued)
A
VOL
LMP7711/LMP7712
V
O
Large Signal Voltage Gain LMP7711, VO= 0.3 to 4.7V
=2kΩ to V+/2
R
L
LMP7712, V
=2kΩ to V+/2
R
L
LMP7711, V
=10kΩ to V+/2
R
L
LMP7712, V
=10kΩ to V+/2
R
L
= 0.3 to 4.7V
O
= 0.3 to 4.7V
O
= 0.3 to 4.7V
O
88
82
84
80
92
88
90
86
Output Swing High RL=2kΩ to V+/2 70
107
90
110
95
32
77
RL=10kΩ to V+/2 60
22
66
Output Swing Low R
=2kΩ to V+/2
L
(LMP7711)
=2kΩ to V+/2
R
L
(LMP7712)
=10kΩ to V+/2 20 60
R
L
42 70
73
50 75
78
62
I
O
I
S
Output Short Circuit Current Sourcing to V
Supply Current LMP7711
SR Slew Rate A
−
VIN= 200 mV (Note 9)
Sinking to V
+
VIN= −200 mV (Note 9)
Enable Mode V
≥ 4.6
EN
LMP7712 (per channel)
Enable Mode V
Shutdown Mode V
≥ 4.6
EN
≤ 0.4
EN
(per channel)
= +1, Rising (10% to 90%) 6.0 9.5
V
A
= +1, Falling (90% to 10%) 7.5 11.5
V
46
38
10.5
6.5
66
23
1.15 1.40
1.75
1.30 1.70
2.05
0.14 1
4
GBW Gain Bandwidth Product 17 MHz
e
n
Input-Referred Voltage Noise f = 400 Hz 7.0
f = 1 kHz 5.8
i
n
t
on
t
off
V
EN
Input-Referred Current Noise f = 1 kHz 0.01 pA/
Turn-on Time 110 ns
Turn-off Time 800 ns
Enable Pin Voltage Range Enable Mode 4.6 4.5 – 5
Shutdown Mode 0 – 0.5 0.4
I
EN
THD+N Total Harmonic Distortion +
Enable Pin Input Current VEN= 5V (Note 7) 5.6 10
V
= 0V (Note 7) 0.005 0.2
EN
Noise
f = 1 kHz, A
=4V
V
O
f = 1 kHz, A
=4V
V
O
=1,RL= 100 kΩ
V
PP
=1,RL= 600Ω
V
PP
0.001
0.004
dB
mV
from V
mV
mA
mA
µA
V/µs
nV/
V
µA
%
+
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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables.
Note 2: Human Body Model is 1.5 kΩ in series with 100 pF. Machine Model is 0Ω in series with 200 pF.
Note 3: The maximum power dissipation is a function of T
P
=(T
D
J(MAX)-TA
Note 4: Typical values represent the most likely parametric norm at the time of characterization.
Note 5: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality
Control (SQC) method.
Note 6: Offset voltage average drift is determined by dividing the change in V
Note 7: Positive current corresponds to current flowing into the device.
Note 8: Guaranteed by design.
Note 9: The short circuit test is a momentary open loop test.
)/θJA. All numbers apply for packages soldered directly onto a PC Board.
, θJA. The maximum allowable power dissipation at any ambient temperature is
J(MAX)
at the temperature extremes by the total temperature change.
OS
Connection Diagrams
6-Pin TSOT23 10-Pin MSOP
LMP7711/LMP7712
Top View
20150301
Top View
20150302
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
6-Pin TSOT23
10-Pin MSOP
LMP7711MK
LMP7711MKX 3k Units Tape and Reel
LMP7712MM
LMP7712MMX 3.5k Units Tape and Reel
AC3A
AD3A
1k Units Tape and Reel
1k Units Tape and Reel
MK06A
MUB10A
www.national.com5
Typical Performance Characteristics Unless otherwise noted: T
=V+.
Offset Voltage Distribution TCV
LMP7711/LMP7712
= 25˚C, VS= 5V, VCM=VS/2, V
A
Distribution (LMP7711)
OS
EN
20150381
Offset Voltage Distribution TCVOSDistribution (LMP7712)
20150322 20150380
Offset Voltage vs. V
CM
Offset Voltage vs. V
CM
20150303
20150310
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20150311
LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: T
=V+. (Continued)
Offset Voltage vs. V
CM
20150312
Offset Voltage vs. Temperature CMRR vs. Frequency
Offset Voltage vs. Supply Voltage
= 25˚C, VS= 5V, VCM=VS/2, V
A
20150321
EN
20150309
20150356
Input Bias Current Over Temperature Input Bias Current Over Temperature
20150323 20150324
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Typical Performance Characteristics Unless otherwise noted: T
=V+. (Continued)
Supply Current vs. Supply Voltage (LMP7711) Supply Current vs. Supply Voltage (LMP7712)
LMP7711/LMP7712
= 25˚C, VS= 5V, VCM=VS/2, V
A
EN
20150305
20150377
Supply Current vs. Supply Voltage (Shutdown) Crosstalk Rejection Ratio (LMP7712)
20150306
20150376
Supply Current vs. Enable Pin Voltage (LMP7711) Supply Current vs. Enable Pin Voltage (LMP7711)
20150308 20150307
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LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: T
= 25˚C, VS= 5V, VCM=VS/2, V
A
=V+. (Continued)
Supply Current vs. Enable Pin Voltage (LMP7712) Supply Current vs. Enable Pin Voltage (LMP7712)
20150378
Sourcing Current vs. Supply Voltage Sinking Current vs. Supply Voltage
EN
20150379
20150320
Sourcing Current vs. Output Voltage Sinking Current vs. Output Voltage
20150350
20150319
20150354
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Typical Performance Characteristics Unless otherwise noted: T
=V+. (Continued)
Output Swing High vs. Supply Voltage Output Swing Low vs. Supply Voltage
LMP7711/LMP7712
20150317 20150315
Output Swing High vs. Supply Voltage Output Swing Low vs. Supply Voltage
= 25˚C, VS= 5V, VCM=VS/2, V
A
EN
20150316
Output Swing High vs. Supply Voltage Output Swing Low vs. Supply Voltage
20150318 20150313
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20150314
LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: T
=V+. (Continued)
Open Loop Frequency Response Open Loop Frequency Response
20150341
Phase Margin vs. Capacitive Load Phase Margin vs. Capacitive Load
= 25˚C, VS= 5V, VCM=VS/2, V
A
20150373
EN
20150345
Overshoot and Undershoot vs. Capacitive Load Slew Rate vs. Supply Voltage
20150330
20150346
20150329
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Typical Performance Characteristics Unless otherwise noted: T
=V+. (Continued)
Small Signal Step Response Large Signal Step Response
LMP7711/LMP7712
20150338 20150337
Small Signal Step Response Large Signal Step Response
= 25˚C, VS= 5V, VCM=VS/2, V
A
EN
20150333
THD+N vs. Output Voltage THD+N vs. Output Voltage
20150326
20150334
20150304
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LMP7711/LMP7712
Typical Performance Characteristics Unless otherwise noted: T
=V+. (Continued)
THD+N vs. Frequency THD+N vs. Frequency
20150357 20150355
PSRR vs. Frequency Input Referred Voltage Noise vs. Frequency
= 25˚C, VS= 5V, VCM=VS/2, V
A
EN
20150328
20150339
Closed Loop Frequency Response Closed Loop Output Impedance vs. Frequency
20150336
20150332
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Application Notes
LMP7711/LMP7712
The LMP7711/LMP7712 are single and dual, low noise, low
offset, rail-to-rail output precision amplifiers with a wide gain
bandwidth product of 17 MHz and low supply current. The
wide bandwidth makes the LMP7711/LMP7712 ideal
LMP7711/LMP7712
choices for wide-band amplification in portable applications.
The low supply current along with the enable feature that is
built-in on the LMP7711/LMP7712 allows for even more
power efficient designs by turning the device off when not in
use.
The LMP7711/LMP7712 are superior for sensor applications. The very low input referred voltage noise of only 5.8
nV/
of only 10 fA/
signal-to-noise ratio.
The LMP7711/LMP7712 have a supply voltage range of
1.8V to 5.5V over a wide temperature range of 0˚C to 125˚C.
This is optimal for low voltage commercial applications. For
applications where the ambient temperature might be less
than 0˚C, the LMP7711/LMP7712 are fully operational at
supply voltages of 2.0V to 5.5V over the temperature range
of −40˚C to 125˚C.
The outputs of the LMP7711/LMP7712 swing within 25 mV
of either rail providing maximum dynamic range in applications requiring low supply voltage. The input common mode
range of the LMP7711/LMP7712 extends to 300 mV below
ground. This feature enables users to utilize this device in
single supply applications.
The use of a very innovative feedback topology has enhanced the current drive capability of the LMP7711/
LMP7712, resulting in sourcing currents as much as 47 mA
with a supply voltage of only 1.8V.
The LMP7711 is offered in the space saving TSOT23 package and the LMP7712 is offered in a 10-pin MSOP. These
small packages are ideal solutions for applications requiring
minimum PC board footprint.
National Semiconductor is heavily committed to precision
amplifiers and the market segments they serves. Technical
support and extensive characterization data is available for
sensitive applications or applications with a constrained error
budget.
CAPACITIVE LOAD
The unity gain follower is the most sensitive configuration to
capacitive loading. The combination of a capacitive load
placed directly on the output of an amplifier along with the
output impedance of the amplifier creates a phase lag which
in turn reduces the phase margin of the amplifier. If phase
margin is significantly reduced, the response will be either
underdamped or the amplifier will oscillate.
The LMP7711/LMP7712 can directly drive capacitive loads
of up to 120 pF without oscillating. To drive heavier capacitive loads, an isolation resistor, R
used. This resistor and C
phase lag or increase the phase margin of the overall system. The larger the value of R
voltage will be. However, larger values of R
reduced output swing and reduced output current drive.
at 1 kHz and very low input referred current noise
mean more signal fidelity and higher
in Figure 1, should be
ISO
form a pole and hence delay the
L
, the more stable the output
ISO
ISO
result in
20150361
FIGURE 1. Isolating Capacitive Load
INPUT CAPACITANCE
CMOS input stages inherently have low input bias current
and higher input referred voltage noise. The LMP7711/
LMP7712 enhance this performance by having the low input
bias current of only 50 fA, as well as, a very low input
referred voltage noise of 5.8 nV/
. In order to achieve
this a larger input stage has been used. This larger input
stage increases the input capacitance of the LMP7711/
LMP7712. Figure 2 shows typical input common mode input
capacitance of the LMP7711/LMP7712.
20150375
FIGURE 2. Input Common Mode Capacitance
This input capacitance will interact with other impedances
such as gain and feedback resistors, which are seen on the
inputs of the amplifier to form a pole. This pole will have little
or no effect on the output of the amplifier at low frequencies
and under DC conditions, but will play a bigger role as the
frequency increases. At higher frequencies, the presence of
this pole will decrease phase margin and also causes gain
peaking. In order to compensate for the input capacitance,
care must be taken in choosing feedback resistors. In addition to being selective in picking values for the feedback
resistor, a capacitor can be added to the feedback path to
increase stability.
The DC gain of the circuit shown in Figure 3 is simply
.
−R
2/R1
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Application Notes (Continued)
20150364
FIGURE 3. Compensating for Input Capacitance
As mentioned before, adding a capacitor to the feedback
path will decrease the peaking. This is because C
will form
F
yet another pole in the system and will prevent pairs of poles,
or complex conjugates from forming. It is the presence of
pairs of poles that cause the peaking of gain. Figure 5 shows
the frequency response of the schematic presented in Figure
3 with different values of C
. As can be seen, using a small
F
value capacitor significantly reduces or eliminates the peaking.
LMP7711/LMP7712
For the time being, ignore C
. The AC gain of the circuit in
F
Figure 3 can be calculated as follows:
(1)
This equation is rearranged to find the location of the two
poles:
(2)
As shown in Equation (2), as the values of R
and R2are
1
increased, the magnitude of the poles are reduced, which in
turn decreases the bandwidth of the amplifier. Figure 4
shows the frequency response with different value resistors
and R2. Whenever possible, it is best to chose smaller
for R
1
feedback resistors.
20150360
FIGURE 5. Closed Loop Frequency Response
TRANSIMPEDANCE AMPLIFIER
In many applications, the signal of interest is a very small
amount of current that needs to be detected. Current that is
transmitted through a photodiode is a good example. Barcode scanners, light meters, fiber optic receivers, and industrial sensors are some typical applications utilizing photodiodes for current detection. This current needs to be
amplified before it can be further processed. This amplification is performed using a current-to-voltage converter configuration or transimpedance amplifier. The signal of interest
is fed to the inverting input of an op amp with a feedback
resistor in the current path. The voltage at the output of this
amplifier will be equal to the negative of the input current
times the value of the feedback resistor. Figure 6 shows a
transimpedance amplifier configuration. C
photodiode parasitic capacitance and C
represents the
D
denotes the
CM
common-mode capacitance of the amplifier. The presence of
all of these capacitances at higher frequencies might lead to
less stable topologies at higher frequencies. Care must be
taken when designing a transimpedance amplifier to prevent
the circuit from oscillating.
With a wide gain bandwidth product, low input bias current
and low input voltage and current noise, the LMP7711/
LMP7712 are ideal for wideband transimpedance applications.
20150359
FIGURE 4. Closed Loop Frequency Response
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Application Notes (Continued)
LMP7711/LMP7712
20150369
Thermopiles generate voltage in response to receiving radiation. These voltages are often only a few microvolts. As a
result, the operational amplifier used for this application
needs to have low offset voltage, low input voltage noise,
and low input bias current. Figure 8 shows a thermopile
application where the sensor detects radiation from a distance and generates a voltage that is proportional to the
intensity of the radiation. The two resistors, R
and RB, are
A
selected to provide high gain to amplify this signal, while C
removes the high frequency noise.
F
FIGURE 6. Transimpedance Amplifier
A feedback capacitance C
to maintain circuit stability and to control the frequency
R
F
response. To achieve a maximally flat, 2
and CFshould be chosen by using Equation (3)
R
F
is usually added in parallel with
F
nd
order response,
(3)
Calculating C
from Equation (3) can sometimes result in
F
capacitor values which are less than 2 pF. This is especially
the case for high speed applications. In these instances, its
often more practical to use the circuit shown in Figure 7 in
order to allow more sensible choices for C
back capacitor, C'
as long as R
, is (1+ RB/RA)CF. This relationship holds
F
<<
RF.
A
. The new feed-
F
20150327
FIGURE 8. Thermopile Sensor Interface
PRECISION RECTIFIER
Rectifiers are electrical circuits used for converting AC signals to DC signals. Figure 9 shows a full-wave precision
rectifier. Each operational amplifier used in this circuit has a
diode on its output. This means for the diodes to conduct, the
output of the amplifier needs to be positive with respect to
ground. If V
is in its positive half cycle then only the output
IN
of the bottom amplifier will be positive. As a result, the diode
on the output of the bottom amplifier will conduct and the
signal will show at the output of the circuit. If V
IN
is in its
negative half cycle then the output of the top amplifier will be
positive, resulting in the diode on the output of the top
amplifier conducting and, delivering the signal on the amplifier’s output to the circuits output.
For R
equation shown in Figure 9.IfR
left open, no resistor needed, and R
≥ 2, the resistor values can be found by using the
2/R1
= 1, then R3should be
2/R1
should simply be
4
shorted.
20150331
FIGURE 7. Modified Transimpedance Amplifier
SENSOR INTERFACE
The LMP7711/LMP7712 have low input bias current and low
input referred noise, which make them ideal choices for
sensor interfaces such as thermopiles, Infra Red (IR) thermometry, thermocouple amplifiers, and pH electrode buffers.
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20150374
FIGURE 9. Precision Rectifier
Physical Dimensions inches (millimeters) unless otherwise noted
6-Pin TSOT23
NS Package Number MK06A
LMP7711/LMP7712
10-Pin MSOP
NS Package Number MUB10A
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Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:
LMP7711/LMP7712 Precision, 17 MHz, Low Noise, CMOS Input Amplifiers
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
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