National Semiconductor LMP7707, LMP7708, LMP7709 Technical data

LMP7707/LMP7708/LMP7709 Precision, CMOS Input, RRIO, Wide Supply Range Decompensated Amplifiers

July 30, 2008

LMP7707/LMP7708/LMP7709 Precision, CMOS Input, RRIO, Wide Supply Range Decompensated

Amplifiers

General Description

The LMP7707/LMP7708/LMP7709 devices are single, dual, and quad low offset voltage, rail-to-rail input and output precision amplifiers which each have a CMOS input stage and a wide supply voltage range. The LMP7707/LMP7708/ LMP7709 are part of the LMP® precision amplifier family and are ideal for sensor interface and other instrumentation applications. These decompensated amplifiers are stable at a gain of 6 and higher.

The guaranteed low offset voltage of less than ±200 µV along with the guaranteed low input bias current of less than ±1 pA make the LMP7707/LMP7708/LMP7709 ideal for precision applications. The LMP7707/LMP7708/LMP7709 are built utilizing VIP50 technology, which allows the combination of a CMOS input stage and a supply voltage range of 12V with rail-to-rail common mode voltage capability. The LMP7707/ LMP7708/LMP7709 are the perfect choice in many applications where conventional CMOS parts cannot operate due to the voltage conditions.

The unique design of the rail-to-rail input stage of each of the LMP7707/LMP7708/LMP7709 significantly reduces the CMRR glitch commonly associated with rail-to-rail input amplifiers. Both sides of the complimentary input stage have been trimmed, thereby reducing the difference between the NMOS and PMOS offsets. The output swings within 40 mV of either rail to maximize the signal dynamic range in applications requiring low supply voltage.

The LMP7707 is offered in the space saving 5-Pin SOT23 and 8-pin SOIC package, the LMP7708 is offered in the 8-Pin MSOP and 8-pin SOIC package and the quad LMP7709 is offered in the 14-Pin TSSOP and the 14-pin SOIC package. These small packages are ideal solutions for area constrained PC boards and portable electronics.

Features

Unless otherwise noted, typical values at VS = 5V.

Input offset voltage (LMP7707) ±200 µV (max)

■

Input offset voltage (LMP7708/LMP7709) ±220 µV (max)

■

Input bias current ±200 fA

■

Input voltage noise 9 nV/√Hz

■

CMRR 130 dB

■

Open loop gain 130 dB

■

Temperature range −40°C to 125°C

■

Gain bandwidth product (AV =10) 14 MHz

■

Stable at a gain of 10 or higher

■

Supply current (LMP7707) 715 µA

■

Supply current (LMP7708) 1.5 mA

■

Supply current (LMP7709) 2.9 mA

■

Supply voltage range 2.7V to 12V

■

Rail-to-rail input and output

■

Applications

High impedance sensor interface

■

Battery powered instrumentation

■

High gain amplifiers

■

DAC buffer

■

Instrumentation amplifier

■

Active filters

■

Open Loop Frequency Response

Increased Bandwidth for Same Supply Current at AV> 10

LMP® is a registered trademark of National Semiconductor Corporation.

20203764

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

ESD Tolerance (Note 2)

Human Body Model 2000V Machine Model 200V Charge Device Model 1000V

V

Differential

IN

Supply Voltage (VS = V+ – V−)

LMP7707/LMP7708/LMP7709

Voltage at Input/Output Pins V++ 0.3V to V− − 0.3V

Input Current 10 mA Storage Temperature Range −65°C to +150°C Junction Temperature (Note 3) +150°C

±300 mV

13.2V

Soldering Information

Infrared or Convection (20 sec) 235°C Wave Soldering Lead Temp. (10

sec) 260°C

Operating Ratings (Note 1)

Temperature Range (Note 3) −40°C to +125°C Supply Voltage (VS = V+ – V−)

Package Thermal Resistance (θJA) (Note 3)

5-Pin SOT23 265°C/W 8-Pin SOIC 190°C/W 8-Pin MSOP 235°C/W 14-Pin TSSOP 122°C/W 14-Pin SOIC 145°C/W

3V Electrical Characteristics (Note 4)

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 3V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2.

Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 6)

V

OS

TCV

I

B

I

OS

CMRR Common Mode Rejection Ratio

PSRR Power Supply Rejection Ratio

CMVR Input Common-Mode Voltage Range

A

VOL

Input Offset Voltage LMP7707 ±37 ±200

LMP7708/LMP7709 ±56 ±220

Input Offset Voltage Drift (Note 7) ±1 ±5

OS

Input Bias Current (Notes 7, 8) ±0.2 ±1

−40°C ≤ TA ≤ 85°C

−40°C ≤ TA ≤ 125°C

Input Offset Current 40 fA

Open Loop Voltage Gain

0V ≤ V LMP7707

0V ≤ V LMP7708/LMP7709

2.7V ≤ V+ ≤ 12V, VO = V+/2

CMRR ≥ 80 dB CMRR ≥ 77 dB

RL = 2 kΩ (LMP7707) VO = 0.3V to 2.7V

RL = 2 kΩ (LMP7708/LMP7709) VO = 0.3V to 2.7V

RL = 10 kΩ VO = 0.2V to 2.8V

CM

≤ 3V

±400

−0.2 3.2

100

±50

86

80

84

78

86

82

96

94

96

Typ

(Note 5)

130

98

114

124

Max

(Note 6)

±500

±520

2.7V to 12V

Units

μV

μV/°C

pA

dB

V

dB

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LMP7707/LMP7708/LMP7709

Symbol Parameter Conditions Min

(Note 6)

V

O

Output Swing High

RL = 2 kΩ to V+/2 LMP7707

RL = 2 kΩ to V+/2 LMP7708/LMP7709

RL = 10 kΩ to V+/2 LMP7707

RL = 10 kΩ to V+/2 LMP7708/LMP7709

Output Swing Low

RL = 2 kΩ to V+/2 LMP7707

RL = 2 kΩ to V+/2 LMP7708/LMP7709

RL = 10 kΩ to V+/2 LMP7707

RL = 10 kΩ to V+/2 LMP7708/LMP7709

I

O

Output Short Circuit Current (Notes 3, 9)

Sourcing VO = V+/2 VIN = 100 mV

Sinking VO = V+/2 VIN = −100 mV (LMP7707)

Sinking VO = V+/2 VIN = −100 mV (LMP7708/

40 80

30 40

35 50

40 60

45 100

20 40

20 50

25

15

25

20

25

15

Typ

(Note 5)

42

Max

(Note 6)

120

150

60

100

80

170

50

90

Units

mV

from V

mV

mA

LMP7709)

I

S

Supply Current LMP7707 0.670 1.0

1.2

LMP7708 1.4 1.8

2.1

mA

LMP7709 2.9 3.5

4.5

SR Slew Rate (Note 10) VO = 2 V

10% to 90% 5.1

PP,

V/μs

GBWP Gain Bandwidth Product AV = 10 13 MHz

THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV = 10, VO = 2.5V,

0.024 %

RL = 10 kΩ

e

n

i

n

Input-Referred Voltage Noise f = 1 kHz 9

Input-Referred Current Noise f = 100 kHz 1

nV/

fA/

+

5V Electrical Characteristics (Note 4)

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2.

Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 6)

V

OS

Input Offset Voltage LMP7707 ±37 ±200

LMP7708/LMP7709 ±32 ±220

TCV

I

B

Input Offset Voltage Drift (Note 7) ±1 ±5

OS

Input Bias Current (Notes 7, 8) ±0.2 ±1

−40°C ≤ TA ≤ 85°C

−40°C ≤ TA ≤ 125°C

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±400

±50

Typ

(Note 5)

Max

(Note 6)

±500

±520

Units

μV

μV/°C

pA

Symbol Parameter Conditions Min

(Note 6)

I

OS

CMRR Common Mode Rejection Ratio

Input Offset Current 40

0V ≤ V

CM

≤ 5V

LMP7707 0V ≤ V

CM

≤ 5V

LMP7708/LMP7709

PSRR Power Supply Rejection Ratio

2.7V ≤ V+ ≤ 12V, VO = V+/2

88

83

86

81

86

Typ

(Note 5)

130

100

Max

(Note 6)

82

CMVR Input Common-Mode Voltage Range

LMP7707/LMP7708/LMP7709

A

VOL

V

O

I

O

Open Loop Voltage Gain

Output Swing High

Output Swing Low

Output Short Circuit Current (Notes 3, 9)

CMRR ≥ 80 dB CMRR ≥ 78 dB

RL = 2 kΩ (LMP7707) VO = 0.3V to 4.7V

RL = 2 kΩ (LMP7708/LMP7709) VO = 0.3V to 4.7V

RL = 10 kΩ VO = 0.2V to 4.8V

RL = 2 kΩ to V+/2 LMP7707

RL = 2 kΩ to V+/2 LMP7708/LMP7709

RL = 10 kΩ to V+/2 LMP7707

RL = 10 kΩ to V+/2 LMP7708/LMP7709

RL = 2 kΩ to V+/2 LMP7707

RL = 2 kΩ to V+/2 LMP7708/LMP7709

RL = 10 kΩ to V+/2 LMP7707

RL = 10 kΩ to V+/2 LMP7708/LMP7709

Sourcing VO = V+/2 VIN = 100 mV (LMP7707)

Sourcing VO = V+/2 VIN = 100 mV (LMP7708/LMP7709)

Sinking VO = V+/2 VIN = −100 mV (LMP7707)

Sinking VO = V+/2 VIN = −100 mV (LMP7708/

−0.2 5.2

100

119

96

100

119

94

100

130

96

60 110

130

60 120

200

40 50

70

40 60

120

50 80

90

50 120

190

30 40

50

30 50

100

40

66

28

38

66

25

40

76

28

40

76

23

LMP7709)

I

S

Supply Current LMP7707 0.715 1.0

1.2

LMP7708 1.5 1.9

2.2

LMP7709 2.9 3.7

4.6

SR Slew Rate (Note 10) VO = 4 VPP, 10% to 90% 5.6

GBWP Gain Bandwidth Product AV = 10 14 MHz

Units

fA

dB

V

dB

mV

from V

mV

mA

V/μs

+

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LMP7707/LMP7708/LMP7709

Symbol Parameter Conditions Min

(Note 6)

THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV = 10, VO = 4.5V,

0.024 %

Typ

(Note 5)

Max

(Note 6)

RL = 10 kΩ

e

n

i

n

Input-Referred Voltage Noise f = 1 kHz 9

Input-Referred Current Noise f = 100 kHz 1

±5V Electrical Characteristics (Note 4)

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = −5V, VCM = 0V, and RL > 10 kΩ to 0V. Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 6)

V

OS

Input Offset Voltage LMP7707 ±37 ±200

LMP7708/LMP7709 ±37 ±220

TCV

I

B

Input Offset Voltage Drift (Note 7) ±1 ±5

OS

Input Bias Current (Notes 7, 8) ±0.2 1

−40°C ≤ TA ≤ 85°C

±400

I

OS

Input Offset Current 40

CMRR Common Mode Rejection Ratio

−40°C ≤ TA ≤ 125°C

−5V ≤ V

CM

≤ 5V

LMP7707

−5V ≤ V

CM

≤ 5V

LMP7708/LMP7709

PSRR Power Supply Rejection Ratio

CMVR Input Common-Mode Voltage Range

A

VOL

Open Loop Voltage Gain

2.7V ≤ V+ ≤ 12V, V− = 0V, VO = V+/2

CMRR ≥ 80 dB CMRR ≥ 78 dB

RL = 2 kΩ (LMP7707)

−5.2 5.2

100

VO = −4.7V to 4.7V

RL = 2 kΩ (LMP7708/LMP7709)

100

VO = −4.7V to 4.7V

RL = 10 kΩ (LMP7707)

100

VO = −4.8V to 4.8V

RL = 10 kΩ (LMP7708/LMP7709)

100

VO = −4.8V to 4.8V

±50

92

88

90

86

82

98

94

98

97

Typ

(Note 5)

138

98

121

134

Max

(Note 6)

±500

±520

Units

nV/

fA/

Units

μV

μV/°C

pA

fA

dB

V

dB

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Symbol Parameter Conditions Min

V

O

Output Swing High

RL = 2 kΩ to 0V LMP7707

RL = 2 kΩ to 0V LMP7708/LMP7709

RL = 10 kΩ to 0V LMP7707

RL = 10 kΩ to 0V LMP7708/LMP7709

LMP7707/LMP7708/LMP7709

Output Swing Low

RL = 2 kΩ to 0V LMP7707

RL = 2 kΩ to 0V LMP7708/LMP7709

RL = 10 kΩ to 0V LMP7707

RL = 10 kΩ to 0V LMP7708/LMP7709

I

O

Output Short Circuit Current (Notes 3, 9)

Sourcing VO = 0V VIN = 100 mV (LMP7707)

Sourcing VO = 0V VIN = 100 mV (LMP7708/LMP7709)

Sinking VO = 0V VIN = −100 mV

I

S

Supply Current LMP7707 0.790 1.1

(Note 6)

90 150

90 180

40 80

90 130

90 180

40 50

40 60

50

35

48

33

50

35

Typ

(Note 5)

86

84

Max

(Note 6)

170

290

100

150

290

60

110

1.3

LMP7708 1.7 2.1

2.5

LMP7709 3.2 4.2

5.0

SR Slew Rate (Note 10) VO = 9 VPP, 10% to 90% 5.9

GBWP Gain Bandwidth Product AV = 10 15 MHz

THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV = 10, VO = 9V,

0.024 %

RL = 10 kΩ

e

n

i

n

Input-Referred Voltage Noise f = 1 kHz 9

Input-Referred Current Noise f = 100 kHz 1

Units

mV

from V

mV

from V

mA

V/μs

nV/

fA/

+

–

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables.

Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)

Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

Note 3: The maximum power dissipation is a function of T PD = (T

Note 4: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device.

Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.

Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality Control (SQC) method.

Note 7: This parameter is guaranteed by design and/or characterization and is not tested in production.

Note 8: Positive current corresponds to current flowing into the device.

Note 9: The short circuit test is a momentary test.

Note 10: The number specified is the slower of positive and negative slew rates.

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- TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.

J(MAX)

, θJA. The maximum allowable power dissipation at any ambient temperature is

J(MAX)

Connection Diagrams

LMP7707/LMP7708/LMP7709

LMP7707

5-Pin SOT23

Top View

LMP7708

8-Pin MSOP/SOIC

20203702

LMP7707

8-Pin SOIC

Top View

LMP7709

14-Pin TSSOP/SOIC

20203701

Top View

20203703

Top View

20203704

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing

5-Pin SOT23

8-Pin SOIC

8-Pin MSOP

8-Pin SOIC

14-Pin TSSOP

14-Pin SOIC

LMP7707MF

LMP7707MFX 3k Units Tape and Reel

LMP7707MA

LMP7707MAX 2.5k Units Tape and Reel

LMP7708MM

LMP7708MMX 3.5k Units Tape and Reel

LMP7708MA

LMP7708MAX 2.5k Units Tape and Reel

LMP7709MT

LMP7709MTX 2.5k Units Tape and Reel

LMP7709MA

LMP7709MAX 2.5 Units Tape and Reel

AH4A

LMP7707MA

AJ4A

LMP7708MA

LMP7709MT

LMP7709MA

1k Units Tape and Reel

95 Units/Rail

1k Units Tape and Reel

95 Units/Rail

94 Units/Rail

55 Units/Rail

MF05A

M08A

MUA08A

M08A

MTC14

M14A

7 www.national.com

Typical Performance Characteristics Unless otherwise specified, T

connected to (V++V−)/2

= 25°C, VCM = VS/2, RL > 10 kΩ

A

Offset Voltage Distribution

LMP7707/LMP7708/LMP7709

Offset Voltage Distribution

20203736

TCVOS Distribution

20203741

TCVOS Distribution

20203737

Offset Voltage Distribution

20203738

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20203742

TCVOS Distribution

20203743