查询LMH6624供应商
LMH6624/LMH6626
Single/Dual Ultra Low Noise Wideband Operational
Amplifier
LMH6624/LMH6626 Single/Dual Ultra Low Noise Wideband Operational Amplifier
May 2003
General Description
The LMH6624/LMH6626 offer wide bandwidth (1.5GHz for
single, 1.3GHz for dual) with very low input noise (0.92nV/
, 2.3pA/ ) and ultra low dc errors (100µV VOS,
±
0.1µV/˚C drift) providing very precise operational amplifiers
with wide dynamic range. This enables the user to achieve
closed-loop gains of greater than 10, in both inverting and
non-inverting configurations.
The LMH6624 (single) and LMH6626’s (dual) traditional voltage feedback topology provide the following benefits: balanced inputs, low offset voltage and offset current, very low
offset drift, 81dB open loop gain, 95dB common mode rejection ratio, and 88dB power supply rejection ratio.
±
The LMH6624/LMH6626 operate from
dual supply mode and from +5V to +12V in single supply
configuration.
LMH6624 is offered in SOT23-5 and SOIC-8 packages.
The LMH6626 is offered in SOIC-8 and MSOP-8 packages.
2.5V to±6V in
Connection Diagrams
Features
VS=±6V, TA= 25˚C, AV= 20, (Typical values unless
specified)
n Gain bandwidth (LMH6624) 1.5GHz
n Input voltage noise 0.92nV/
n Input offset voltage (limit over temp) 700uV
n Slew rate 350V/µs
n Slew rate (A
@
n HD2
@
n HD3
n Supply voltage range (dual supply)
n Supply voltage range (single supply) +5V to +12V
n Improved replacement for the CLC425 (LMH6624)
n Stable for closed loop |A
= 10) 400V/µs
V
f = 10MHz, RL= 100Ω −63dBc
f = 10MHz, RL= 100Ω −80dBc
±
2.5V to±6V
| ≥ 10
V
Applications
n Instrumentation sense amplifiers
n Ultrasound pre-amps
n Magnetic tape & disk pre-amps
n Wide band active filters
n Professional Audio Systems
n Opto-electronics
n Medical diagnostic systems
5-Pin SOT23 8−Pin SOIC 8−Pin SOIC/MSOP
Top View
20058951
© 2003 National Semiconductor Corporation DS200589 www.national.com
Top View
20058952
Top View
20058961
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance
Wave Soldering (10 sec.) 260˚C
Storage Temperature Range −65˚C to +150˚C
Junction Temperature (Note 3), (Note 4) +150˚C
Operating Ratings (Note 1)
Human Body Model 2000V (Note 2)
LMH6624/LMH6626
Machine Model 200V (Note 9)
Differential
V
IN
Supply Voltage (V
+-V−
) 13.2V
Voltage at Input pins V
Soldering Information
Infrared or Convection (20 sec.) 235˚C
±
2.5V Electrical Characteristics
±
+
+0.5V, V−−0.5V
1.2V
Operating Temperature Range
(Note 3), (Note 4) −40˚C to +125˚C
Package Thermal Resistance (θ
)(Note 4)
JA
SOIC-8 166˚C/W
SOT23–5 265˚C/W
MSOP-8 235˚C/W
Unless otherwise specified, all limits guaranteed at TA= 25˚C, V+= 2.5V, V−= −2.5V, VCM= 0V, AV= +20, RF= 500Ω,RL=
100Ω. Boldface limits apply at the temperature extremes. See (Note 12).
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Dynamic Performance
f
CL
SR Slew Rate(Note 8) V
t
r
t
f
t
s
−3dB BW VO= 400mVPP(LMH6624) 90
V
= 400mVPP(LMH6626) 80
O
=2VPP,AV= +20 (LMH6624) 300
O
V
=2VPP,AV= +20 (LMH6626) 290
O
V
=2VPP,AV= +10 (LMH6624) 360
O
V
=2VPP,AV= +10 (LMH6626) 340
O
Rise Time VO= 400mV Step, 10% to 90% 4.1 ns
Fall Time VO= 400mV Step, 10% to 90% 4.1 ns
Settling Time 0.1% VO=2VPP(Step) 20 ns
Distortion and Noise Response
e
n
Input Referred Voltage Noise f = 1MHz (LMH6624) 0.92
f = 1MHz (LMH6626) 1.0
i
n
Input Referred Current Noise f = 1MHz (LMH6624) 2.3
f = 1MHz (LMH6626) 1.8
HD2 2
HD3 3
nd
Harmonic Distortion fC= 10MHz, VO=1VPP,RL100Ω −60 dBc
rd
Harmonic Distortion fC= 10MHz, VO=1VPP,RL100Ω −76 dBc
Input Characteristics
V
OS
I
OS
I
B
Input Offset Voltage VCM= 0V −0.75
−0.95
Average Drift (Note 7) VCM=0V
Input Offset Current VCM= 0V −1.5
−2.0
Average Drift (Note 7) V
= 0V 2 nA/˚C
CM
−0.25 +0.75
+0.95
±
0.25 µV/˚C
−0.05 +1.5
+2.0
Input Bias Current VCM= 0V 13 +20
+25
Average Drift (Note 7) VCM= 0V 12 nA/˚C
R
IN
Input Resistance (Note 10) Common Mode 6.6 MΩ
Differential Mode 4.6 kΩ
C
IN
Input Capacitance (Note 10) Common Mode 0.9 pF
Differential Mode 2.0
CMRR Common Mode Rejection
Ratio
Input Referred,
V
= −0.5 to +1.9V
CM
= −0.5 to +1.75V
V
CM
87
85
90
Units
MHz
V/µs
nV/
pA/
mV
µA
µA
dB
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±
2.5V Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed at TA= 25˚C, V+= 2.5V, V−= −2.5V, VCM= 0V, AV= +20, RF= 500Ω,RL=
100Ω. Boldface limits apply at the temperature extremes. See (Note 12).
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Transfer Characteristics
A
VOL
Large Signal Voltage Gain (LMH6624)
= 100Ω,VO= −1V to +1V
R
L
(LMH6626)
= 100Ω,VO= −1V to +1V
R
L
X
t
Crosstalk Rejection f = 1MHz (LMH6626) −75 dB
75
70
72
67
79
79
Output Characteristics
V
R
I
I
O
O
SC
OUT
Output Swing RL= 100Ω
No Load
±
±
±
±
1.1
1.0
1.4
1.25
Output Impedance f ≤ 100KHz 10 mΩ
Output Short Circuit Current (LMH6624)
Sourcing to Ground
= 200mV (Note 3), (Note 11)
∆V
IN
(LMH6624)
Sinking to Ground
= −200mV (Note 3), (Note 11)
∆V
IN
(LMH6626)
Sourcing to Ground
= 200mV (Note 3),(Note 11)
∆V
IN
(LMH6626)
Sinking to Ground
= −200mV (Note 3),(Note 11)
∆V
IN
90
75
90
75
60
50
60
50
Output Current (LMH6624)
Sourcing, V
Sinking, V
O
= −0.8V
O
= +0.8V
(LMH6626)
Sourcing, V
Sinking, V
O
= −0.8V
O
= +0.8V
±
±
145
145
120
120
100
75
1.5
1.7
Power Supply
PSRR Power Supply Rejection Ratio V
=±2.0V to±3.0V 82
S
90 dB
80
I
S
Supply Current (per channel) No Load 11.4 16
18
LMH6624/LMH6626
Units
dB
V
mA
mA
mA
±
6V Electrical Characteristics
Unless otherwise specified, all limits guaranteed at TA= 25˚C, V+= 6V, V−= −6V, VCM= 0V, AV= +20, RF= 500Ω,RL=
100Ω. Boldface limits apply at the temperature extremes. See (Note 12).
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Dynamic Performance
f
CL
SR Slew Rate (Note 8) V
t
r
−3dB BW VO= 400mVPP(LMH6624) 95
V
= 400mVPP(LMH6626) 85
O
=2VPP,AV= +20 (LMH6624) 350
O
V
=2VPP,AV= +20 (LMH6626) 320
O
V
=2VPP,AV= +10 (LMH6624) 400
O
V
=2VPP,AV= +10 (LMH6626) 360
O
Rise Time VO= 400mV Step, 10% to 90% 3.7 ns
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Units
MHz
V/µs
±
6V Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed at TA= 25˚C, V+= 6V, V−= −6V, VCM= 0V, AV= +20, RF= 500Ω,RL=
100Ω. Boldface limits apply at the temperature extremes. See (Note 12).
Symbol Parameter Conditions Min
t
f
LMH6624/LMH6626
t
s
Fall Time VO= 400mV Step, 10% to 90% 3.7 ns
Settling Time 0.1% VO=2VPP(Step) 18 ns
(Note 6)
Typ
(Note 5)
(Note 6)
Distortion and Noise Response
e
n
Input Referred Voltage Noise f = 1MHz (LMH6624) 0.92
f = 1MHz (LMH6626) 1.0
i
n
Input Referred Current Noise f = 1MHz (LMH6624) 2.3
f = 1MHz (LMH6626) 1.8
HD2 2
HD3 3
nd
Harmonic Distortion fC= 10MHz, VO=1VPP,RL100Ω −63 dBc
rd
Harmonic Distortion fC= 10MHz, VO=1VPP,RL100Ω −80 dBc
Input Characteristics
V
OS
Input Offset Voltage VCM= 0V −0.5
±
0.10 +0.5
−0.7
Average Drift (Note 7) V
I
OS
Input Offset Current Average
Drift (Note 7)
I
B
Input Bias Current VCM= 0V 13 +20
=0V
CM
(LMH6624)
=0V
V
CM
(LMH6626)
=0V
V
CM
V
= 0V 0.7 nA/˚C
CM
−1.1
−2.5
−2.0
−2.5
±
0.2 µV/˚C
0.05 1.1
0.1 2.0
Average Drift (Note 7) VCM= 0V 12 nA/˚C
R
IN
Input Resistance (Note 10) Common Mode 6.6 MΩ
Differential Mode 4.6 kΩ
C
IN
Input Capacitance (Note 10) Common Mode 0.9
Differential Mode 2.0
CMRR Common Mode Rejection
Ratio
Input Referred,
V
= −4.5 to +5.25V
CM
= −4.5 to +5.0V
V
CM
90
87
95
Transfer Characteristics
A
VOL
Large Signal Voltage Gain (LMH6624)
= 100Ω,VO= −3V to +3V
R
L
(LMH6626)
RL= 100Ω,VO= −3V to +3V
X
t
Crosstalk Rejection f = 1MHz (LMH6626) −75 dB
77
72
74
70
81
80
Output Characteristics
V
O
Output Swing (LMH6624)
= 100Ω
R
L
(LMH6624)
No Load
(LMH6626)
= 100Ω
R
L
(LMH6626)
No Load
R
O
Output Impedance f ≤ 100KHz 10 mΩ
±
±
±
±
±
±
±
±
4.4
4.3
4.8
4.65
4.3
4.2
4.8
4.65
±
4.9
±
5.2
±
4.8
±
5.2
Max
+0.7
2.5
2.5
+25
Units
nV/
pA/
mV
µA
µA
pF
dB
dB
V
www.national.com 4
±
6V Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed at TA= 25˚C, V+= 6V, V−= −6V, VCM= 0V, AV= +20, RF= 500Ω,RL=
100Ω. Boldface limits apply at the temperature extremes. See (Note 12).
Symbol Parameter Conditions Min
(Note 6)
I
SC
Output Short Circuit Current (LMH6624)
Sourcing to Ground
= 200mV (Note 3), (Note 11)
∆V
IN
(LMH6624)
Sinking to Ground
= −200mV (Note 3), (Note 11)
∆V
IN
(LMH6626)
Sourcing to Ground
= 200mV (Note 3), (Note 11)
∆V
IN
(LMH6626)
Sinking to Ground
= −200mV (Note 3), (Note 11)
∆V
IN
I
OUT
Output Current (LMH6624)
Sourcing, V
Sinking, V
O
= −4.3V
O
= +4.3V
(LMH6626)
Sourcing, V
Sinking, V
O
= −4.3V
O
= +4.3V
100
85
100
85
65
55
65
55
Typ
(Note 5)
156
156
120
120
100
80
Max
(Note 6)
Power Supply
PSRR Power Supply Rejection Ratio V
=±5.4V to±6.6V 82
S
88 dB
80
I
S
Supply Current (per channel) No Load 12 16
18
LMH6624/LMH6626
Units
mA
mA
mA
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5kΩ in series with 100pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C.
Note 4: The maximum power dissipation is a function of T
P
=(T
D
J(MAX)-TA
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: Average drift is determined by dividing the change in parameter at temperature extremes into the total temperature change.
Note 8: Slew rate is the slowest of the rising and falling slew rates.
Note 9: Machine Model, 0Ω in series with 200pF.
Note 10: Simulation results.
Note 11: Short circuit test is a momentary test. Output short circuit duration is 1.5ms.
Note 12: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
the device such that T
Absolute maximum ratings indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically.
)/ θJA. All numbers apply for packages soldered directly onto a PC board.
. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where T
J=TA
, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is
J(MAX)
>
TA.
J
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
SOT23-5 LMH6624MF A94A 1k Units Tape and Reel MF05A
LMH6624MFX 3k Units Tape and Reel
SOIC-8 LMH6624MA LMH6624MA 95 Units/Rail M08A
LMH6624MAX 2.5k Units Tape and Reel
SOIC-8 LMH6626MA LMH6626MA 95 Units/Rail M08A
LMH6626MAX 2.5k Units Tape and Reel
MSOP-8 LMH6626MM A98A 1k Units Tape and Reel MUA08A
LMH6626MMX 3.5k Units Tape and Reel
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Typical Performance Characteristics
Voltage Noise vs. Frequency Current Noise vs. Frequency
LMH6624/LMH6626
Inverting Frequency Response Inverting Frequency Response
20058962 20058963
20058989 20058988
Non-Inverting Frequency Response Non-Inverting Frequency Response
20058904
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20058903
Typical Performance Characteristics (Continued)
Open Loop Frequency Response Over Temperature Open Loop Frequency Response Over Temperature
LMH6624/LMH6626
20058966
Frequency Response with Cap. Loading Frequency Response with Cap. Loading
20058984 20058986
Frequency Response with Cap. Loading Frequency Response with Cap. Loading
20058964
20058987 20058985
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Typical Performance Characteristics (Continued)
Non-Inverting Frequency Response Varying V
LMH6624/LMH6626
Non-Inverting Frequency Response Varying V
(LMH6624)
IN
20058906 20058905
IN
Non-Inverting Frequency Response Varying V
Non-Inverting Frequency Response Varying V
(LMH6626)
IN
IN
20058908
Non-Inverting Frequency Response Varying V
IN
(LMH6624)
20058907
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20058981
Non-Inverting Frequency Response Varying V
(LMH6626)
20058980
IN
Typical Performance Characteristics (Continued)
LMH6624/LMH6626
Sourcing Current vs. V
Sourcing Current vs. V
(LMH6624) Sourcing Current vs. V
OUT
20058957
(LMH6624) Sourcing Current vs. V
OUT
(LMH6626)
OUT
(LMH6626)
OUT
20058972
VOSvs. V
20058954
(LMH6624) VOSvs. V
SUPPLY
20058967
SUPPLY
20058969
(LMH6626)
20058968
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Typical Performance Characteristics (Continued)
Sinking Current vs. V
LMH6624/LMH6626
Sinking Current vs. V
(LMH6624) Sinking Current vs. V
OUT
20058958
(LMH6624) Sinking Current vs. V
OUT
(LMH6626)
OUT
(LMH6626)
OUT
20058971
20058956
IOSvs. V
SUPPLY
20058953
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20058970
Crosstalk Rejection vs. Frequency (LMH6626)
20058979
Typical Performance Characteristics (Continued)
Distortion vs. Frequency Distortion vs. Frequency
20058944 20058946
Distortion vs. Frequency Distortion vs. Gain
LMH6624/LMH6626
Distortion vs. V
20058945 20058978
Peak to Peak Distortion vs. V
OUT
20058943
Peak to Peak
OUT
20058977
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Typical Performance Characteristics (Continued)
Non-Inverting Large Signal Pulse Response Non-Inverting Large Signal Pulse Response
LMH6624/LMH6626
20058973 20058974
Non-Inverting Small Signal Pulse Response Non-Inverting Small Signal Pulse Response
20058975 20058976
PSRR vs. Frequency PSRR vs. Frequency
20058948 20058949
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Typical Performance Characteristics (Continued)
Input Referred CMRR vs. Frequency Input Referred CMRR vs. Frequency
20058901 20058902
Amplifier Peaking with Varying R
F
Amplifier Peaking with Varying R
LMH6624/LMH6626
F
20058983
20058982
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Application Section
LMH6624/LMH6626
20058918
FIGURE 1. Non-Inverting Amplifier Configuration
INTRODUCTION
The LMH6624/LMH6626 are very wide gain bandwidth, ultra
low noise voltage feedback operational amplifiers. Their excellent performances enable applications such as medical
diagnostic ultrasound, magnetic tape & disk storage and
fiber-optics to achieve maximum high frequency signal-tonoise ratios. The set of characteristic plots in the "Typical
Performance" section illustrates many of the performance
trade offs. The following discussion will enable the proper
selection of external components to achieve optimum system performance.
BIAS CURRENT CANCELLATION
To cancel the bias current errors of the non-inverting configuration, the parallel combination of the gain setting (R
and feedback (R
source resistance (R
) resistors should equal the equivalent
f
) as defined in Figure 1. Combining
seq
this constraint with the non-inverting gain equation also seen
in Figure 1, allows both R
and Rgto be determined explicitly
f
from the following equations:
R
f=AVRseq
and Rg=Rf/(AV-1)
When driven from a 0Ω source, such as the output of an op
amp, the non-inverting input of the LMH6624/LMH6626
should be isolated with at least a 25Ω series resistor.
As seen in Figure 2, bias current cancellation is accomplished for the inverting configuration by placing a resistor
) on the non-inverting input equal in value to the resis-
(R
b
tance seen by the inverting input (R
||(Rg+Rs)). Rbshould to
f
be no less than 25Ω for optimum LMH6624/LMH6626 performance. A shunt capacitor can minimize the additional
noise of R
.
b
20058919
FIGURE 2. Inverting Amplifier Configuration
TOTAL INPUT NOISE vs. SOURCE RESISTANCE
To determine maximum signal-to-noise ratios from the
LMH6624/LMH6626, an understanding of the interaction between the amplifier’s intrinsic noise sources and the noise
arising from its external resistors is necessary.
Figure 3 describes the noise model for the non-inverting
amplifier configuration showing all noise sources. In addition
to the intrinsic input voltage noise (e
+
−
=i
(i
n=in
=√(4KTR)) associated with each of the external resistors.
(e
t
) source, there is also thermal voltage noise
n
) and current noise
n
Equation 1 provides the general form for total equivalent
input voltage noise density (e
). Equation 2 is a simplifica-
ni
tion of Equation 1 that assumes
)
g
20058920
FIGURE 3. Non-Inverting Amplifier Noise Model
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Application Section (Continued)
(1)
||Rg=R
R
f
trates the equivalent noise model using this assumption.
Figure 5 is a plot of e
) with all of the contributing voltage noise source of
(R
seq
Equation 2. This plot gives the expected e
which assumes R
The total equivalent output voltage noise (e
As seen in Figure 5,e
noise (e
below 33.5Ω. Between 33.5Ω and 6.43kΩ,e
by the thermal noise (e
resistor. Above 6.43kΩ,e
current noise (i
/√(2) in) the contribution from voltage noise and current
e
n
noise of LMH6624/LMH6626 is equal.. For example, configured with a gain of +20V/V giving a −3dB of 90MHz and
driven from R
equivalent input noise voltage (e
16.5µV
for bias current cancellation. Figure 4 illus-
seq
against equivalent source resistance
ni
for a given (R
||Rg=R
f
for bias current cancellation.
seq
FIGURE 4. Noise Model with Rf||Rg=R
is dominated by the intrinsic voltage
) of the amplifier for equivalent source resistances
n
.
rms
ni
=√(4kT(2R
t
is dominated by the amplifier’s
ni
=√(2) inR
n
=25Ω, the LMH6624 produces a total
seq
). When R
seq
ni
*
)ise
no
ni
20058921
seq
is dominated
ni
)) of the external
seq
= 464Ω (ie.,
seq
x 1.57*90MHz) of
ni
AV.
seq
(2)
LMH6624/LMH6626
R
||Rgshould be as low as possible to minimize noise.
f
Results similar to Equation 1 are obtained for the inverting
configuration of Figure 2 if R
replaced by R
yield an e
ni
. With these substitutions, Equation 1 will
g+Rs
referred to the non-inverting input. Referring e
to the inverting input is easily accomplished by multiplying
by the ratio of non-inverting to inverting gains.
e
ni
NOISE FIGURE
)
Noise Figure (NF) is a measure of the noise degradation
caused by an amplifier.
The Noise Figure formula is shown in Equation 3. The addition of a terminating resistor R
mal noise but increases the resulting NF. The NF is increased because R
reduces the input signal amplitude thus
T
reducing the input SNR.
The noise figure is related to the equivalent source resistance (R
) and the parallel combination of Rfand Rg.To
seq
minimize noise figure.
Minimize Rf||R
•
Choose the Optimum RS(R
•
is the point at which the NF curve reaches a minimum
R
OPT
g
and is approximated by:
R
NON-INVERTING GAINS LESS THAN 10V/V
Using the LMH6624/LMH6626 at lower non-inverting gains
requires external compensation such as the shunt compensation as shown in Figure 6. The compensation capacitors
are chosen to reduce frequency response peaking to less
than 1dB.
is replaced by Rband Rgis
seq
, reduces the external ther-
T
)
OPT
≈ en/i
OPT
n
ni
(3)
(4)
20058922
FIGURE 5. Voltage Noise Density vs. Source
Resistance
If bias current cancellation is not a requirement, then R
need not equal R
. In this case, according to Equation 1,
seq
f
||R
20058924
FIGURE 6. External Shunt Compensation
INVERTING GAINS LESS THAN 10V/V
The lag compensation of Figure 7 will achieve stability for
lower gains. It is best used for the inverting configuration
because of its affect on the non-inverting input impedance.
g
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Application Section (Continued)
LMH6624/LMH6626
20058925
FIGURE 7. External Lag Compensation
SINGLE SUPPLY OPERATION
The LMH6624/LMH6626 can be operated with single power
supply as shown in Figure 8. Both the input and output are
capacitively coupled to set the DC operating point.
20058926
20058927
FIGURE 9. Transimpedance Amplifier Configuration
20058928
FIGURE 10. Current Noise Density vs. Feedback
Resistance
FIGURE 8. Single Supply Operation
LOW NOISE TRANSIMPEDANCE AMPLIFIER
Figure 9 implements a low-noise transimpedance amplifier
commonly used with photo-diodes. The transimpedance
gain is set by R
noise density (i
configuration and is plotted against feedback resistance (R
. Equation 4 provides the total input current
f
) equation for the basic transimpedance
ni
)
f
showing all contributing noise sources in Figure 10. This plot
indicates the expected total equivalent input current noise
density (i
equivalent output voltage noise density (e
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) for a given feedback resistance (Rf). The total
ni
no
)isi
*
Rf.
ni
(5)
LOW NOISE INTEGRATOR
The LMH6624/LMH6626 implement a deBoo integrator
shown in Figure 11. Positive feedback maintains integration
linearity. The LMH6624/LMH6626’s low input offset voltage
and matched inputs allow bias current cancellation and provide for very precise integration. Keeping R
and RSlow
G
helps maintain dynamic stability.
Application Section (Continued)
20058929
FIGURE 11. Low Noise Integrator
HIGH-GAIN SALLEN-KEY ACTIVE FILTERS
The LMH6624/LMH6626 are well suited for high gain SallenKey type of active filters. Figure 12 shows the 2
Sallen-Key low pass filter topology. Using component predistortion methods discussed in OA-21 enables the proper
selection of components for these high-frequency filters.
nd
order
LMH6624/LMH6626
20058931
FIGURE 13. Noise Magnetic Media Equalizer
20058930
FIGURE 12. Sallen-Key Active Filter Topology
LOW NOISE MAGNETIC MEDIA EQUALIZER
The LMH6624/LMH6626 implement a high-performance low
noise equalizer for such application as magnetic tape channels as shown in Figure 13. The circuit combines an integrator with a bandpass filter to produce the low noise equalization. The circuit’s simulated frequency response is illustrated
in Figure 14.
20058932
FIGURE 14. Equalizer Frequency Response
LAYOUT CONSIDERATION
National Semiconductor suggests the copper patterns on the
evaluation boards listed below as a guide for high frequency
layout. These boards are also useful as an aid in device
testing and characterization. As is the case with all highspeed amplifiers, accepted-practice RF design technique on
the PCB layout is mandatory. Generally, a good high frequency layout exhibits a separation of power supply and
ground traces from the inverting input and output pins. Parasitic capacitances between these nodes and ground may
cause frequency response peaking and possible circuit oscillations (see Application Note OA-15 for more information).
Use high quality chip capacitors with values in the range of
1000pF to 0.1F for power supply bypassing. One terminal of
each chip capacitor is connected to the ground plane and the
other terminal is connected to a point that is as close as
possible to each supply pin as allowed by the manufacturer’s
design rules. In addition, connect a tantalum capacitor with a
value between 4.7µF and 10µF in parallel with the chip
capacitor. Signal lines connecting the feedback and gain
resistors should be as short as possible to minimize inductance and microstrip line effect. Place input and output termination resistors as close as possible to the input/output
pins. Traces greater than 1 inch in length should be impedance matched to the corresponding load termination.
www.national.com17
Application Section (Continued)
Symmetry between the positive and negative paths in the
layout of differential circuitry should be maintained to minimize the imbalance of amplitude and phase of the differential
signal.
These free evaluation boards are shipped when a device
sample request is placed with National Semiconductor.
LMH6624/LMH6626
Component value selection is another important parameter
in working with high speed/high performance amplifiers.
Choosing external resistors that are large in value compared
to the value of other critical components will affect the closed
loop behavior of the stage because of the interaction of
these resistors with parasitic capacitances. These parasitic
capacitors could either be inherent to the device or be a
by-product of the board layout and component placement.
Moreover, a large resistor will also add more thermal noise to
the signal path. Either way, keeping the resistor values low
will diminish this interaction. On the other hand, choosing
very low value resistors could load down nodes and will
contribute to higher overall power dissipation and high distortion.
Device Package Evaluation Board Part
Number
LMH6624MF SOT23–5 CLC730216
LMH6624MA SOIC-8 CLC730227
LMH6626MA SOIC-8 CLC730036
LMH6626MM MSOP-8 CLC730123
www.national.com 18
Physical Dimensions inches (millimeters) unless otherwise noted
5-Pin SOT23
NS Package Number MF05A
LMH6624/LMH6626
8-Pin SOIC
NS Package Number M08A
www.national.com19
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Pin MSOP
NS Package Number MUA08A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
LMH6624/LMH6626 Single/Dual Ultra Low Noise Wideband Operational Amplifier
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
labeling, can be reasonably expected to result in a
significant injury to the user.
National Semiconductor
Americas Customer
Support Center
Email: new.feedback@nsc.com
Tel: 1-800-272-9959
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
National Semiconductor
Europe Customer Support Center
Fax: +49 (0) 180-530 85 86
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 69 9508 6208
English Tel: +44 (0) 870 24 0 2171
Français Tel: +33 (0) 1 41 91 8790
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Support Center
Email: ap.support@nsc.com
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Tel: 81-3-5639-7560
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